1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2 3; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42 4; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1 5; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-SLOW 6; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx2,+fast-variable-shuffle | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-FAST 7; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512,AVX512-SLOW 8; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx512f,+fast-variable-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512-FAST 9; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+xop | FileCheck %s --check-prefixes=AVX,XOP 10 11define void @insert_v7i8_v2i16_2(<7 x i8> *%a0, <2 x i16> *%a1) nounwind { 12; SSE-LABEL: insert_v7i8_v2i16_2: 13; SSE: # %bb.0: 14; SSE-NEXT: movl (%rsi), %eax 15; SSE-NEXT: movd %eax, %xmm0 16; SSE-NEXT: movq (%rdi), %rcx 17; SSE-NEXT: movq %rcx, %xmm1 18; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 19; SSE-NEXT: shrq $48, %rcx 20; SSE-NEXT: movb %cl, 6(%rdi) 21; SSE-NEXT: shrl $16, %eax 22; SSE-NEXT: movw %ax, 4(%rdi) 23; SSE-NEXT: movd %xmm1, (%rdi) 24; SSE-NEXT: retq 25; 26; AVX1-LABEL: insert_v7i8_v2i16_2: 27; AVX1: # %bb.0: 28; AVX1-NEXT: movl (%rsi), %eax 29; AVX1-NEXT: vmovd %eax, %xmm0 30; AVX1-NEXT: movq (%rdi), %rcx 31; AVX1-NEXT: vmovq %rcx, %xmm1 32; AVX1-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 33; AVX1-NEXT: shrq $48, %rcx 34; AVX1-NEXT: movb %cl, 6(%rdi) 35; AVX1-NEXT: shrl $16, %eax 36; AVX1-NEXT: movw %ax, 4(%rdi) 37; AVX1-NEXT: vmovd %xmm0, (%rdi) 38; AVX1-NEXT: retq 39; 40; AVX2-LABEL: insert_v7i8_v2i16_2: 41; AVX2: # %bb.0: 42; AVX2-NEXT: movl (%rsi), %eax 43; AVX2-NEXT: vmovd %eax, %xmm0 44; AVX2-NEXT: movq (%rdi), %rcx 45; AVX2-NEXT: vmovq %rcx, %xmm1 46; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 47; AVX2-NEXT: shrq $48, %rcx 48; AVX2-NEXT: movb %cl, 6(%rdi) 49; AVX2-NEXT: shrl $16, %eax 50; AVX2-NEXT: movw %ax, 4(%rdi) 51; AVX2-NEXT: vmovd %xmm0, (%rdi) 52; AVX2-NEXT: retq 53; 54; AVX512-LABEL: insert_v7i8_v2i16_2: 55; AVX512: # %bb.0: 56; AVX512-NEXT: movl (%rsi), %eax 57; AVX512-NEXT: vmovd %eax, %xmm0 58; AVX512-NEXT: movq (%rdi), %rcx 59; AVX512-NEXT: vmovq %rcx, %xmm1 60; AVX512-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 61; AVX512-NEXT: shrq $48, %rcx 62; AVX512-NEXT: movb %cl, 6(%rdi) 63; AVX512-NEXT: shrl $16, %eax 64; AVX512-NEXT: movw %ax, 4(%rdi) 65; AVX512-NEXT: vmovd %xmm0, (%rdi) 66; AVX512-NEXT: retq 67; 68; XOP-LABEL: insert_v7i8_v2i16_2: 69; XOP: # %bb.0: 70; XOP-NEXT: movl (%rsi), %eax 71; XOP-NEXT: vmovd %eax, %xmm0 72; XOP-NEXT: movq (%rdi), %rcx 73; XOP-NEXT: vmovq %rcx, %xmm1 74; XOP-NEXT: insertq {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,1,2,3],xmm1[6,7,u,u,u,u,u,u,u,u] 75; XOP-NEXT: shrq $48, %rcx 76; XOP-NEXT: movb %cl, 6(%rdi) 77; XOP-NEXT: shrl $16, %eax 78; XOP-NEXT: movw %ax, 4(%rdi) 79; XOP-NEXT: vmovd %xmm1, (%rdi) 80; XOP-NEXT: retq 81 %1 = load <2 x i16>, <2 x i16> *%a1 82 %2 = bitcast <2 x i16> %1 to <4 x i8> 83 %3 = shufflevector <4 x i8> %2, <4 x i8> undef, <7 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef> 84 %4 = load <7 x i8>, <7 x i8> *%a0 85 %5 = shufflevector <7 x i8> %4, <7 x i8> %3, <7 x i32> <i32 0, i32 1, i32 7, i32 8, i32 9, i32 10, i32 6> 86 store <7 x i8> %5, <7 x i8>* %a0 87 ret void 88} 89 90%struct.Mat4 = type { %struct.storage } 91%struct.storage = type { [16 x float] } 92 93define void @PR40815(%struct.Mat4* nocapture readonly dereferenceable(64), %struct.Mat4* nocapture dereferenceable(64)) { 94; SSE-LABEL: PR40815: 95; SSE: # %bb.0: 96; SSE-NEXT: movaps (%rdi), %xmm0 97; SSE-NEXT: movaps 16(%rdi), %xmm1 98; SSE-NEXT: movaps 32(%rdi), %xmm2 99; SSE-NEXT: movaps 48(%rdi), %xmm3 100; SSE-NEXT: movaps %xmm3, (%rsi) 101; SSE-NEXT: movaps %xmm2, 16(%rsi) 102; SSE-NEXT: movaps %xmm1, 32(%rsi) 103; SSE-NEXT: movaps %xmm0, 48(%rsi) 104; SSE-NEXT: retq 105; 106; AVX-LABEL: PR40815: 107; AVX: # %bb.0: 108; AVX-NEXT: vmovaps (%rdi), %xmm0 109; AVX-NEXT: vmovaps 16(%rdi), %xmm1 110; AVX-NEXT: vmovaps 32(%rdi), %xmm2 111; AVX-NEXT: vmovaps 48(%rdi), %xmm3 112; AVX-NEXT: vmovaps %xmm2, 16(%rsi) 113; AVX-NEXT: vmovaps %xmm3, (%rsi) 114; AVX-NEXT: vmovaps %xmm0, 48(%rsi) 115; AVX-NEXT: vmovaps %xmm1, 32(%rsi) 116; AVX-NEXT: retq 117; 118; AVX512-LABEL: PR40815: 119; AVX512: # %bb.0: 120; AVX512-NEXT: vmovaps 16(%rdi), %xmm0 121; AVX512-NEXT: vmovaps 48(%rdi), %xmm1 122; AVX512-NEXT: vinsertf128 $1, (%rdi), %ymm0, %ymm0 123; AVX512-NEXT: vinsertf128 $1, 32(%rdi), %ymm1, %ymm1 124; AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0 125; AVX512-NEXT: vmovups %zmm0, (%rsi) 126; AVX512-NEXT: vzeroupper 127; AVX512-NEXT: retq 128 %3 = bitcast %struct.Mat4* %0 to <16 x float>* 129 %4 = load <16 x float>, <16 x float>* %3, align 64 130 %5 = shufflevector <16 x float> %4, <16 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 131 %6 = getelementptr inbounds %struct.Mat4, %struct.Mat4* %1, i64 0, i32 0, i32 0, i64 4 132 %7 = bitcast <16 x float> %4 to <4 x i128> 133 %8 = extractelement <4 x i128> %7, i32 1 134 %9 = getelementptr inbounds %struct.Mat4, %struct.Mat4* %1, i64 0, i32 0, i32 0, i64 8 135 %10 = bitcast <16 x float> %4 to <4 x i128> 136 %11 = extractelement <4 x i128> %10, i32 2 137 %12 = getelementptr inbounds %struct.Mat4, %struct.Mat4* %1, i64 0, i32 0, i32 0, i64 12 138 %13 = bitcast float* %12 to <4 x float>* 139 %14 = bitcast <16 x float> %4 to <4 x i128> 140 %15 = extractelement <4 x i128> %14, i32 3 141 %16 = bitcast %struct.Mat4* %1 to i128* 142 store i128 %15, i128* %16, align 16 143 %17 = bitcast float* %6 to i128* 144 store i128 %11, i128* %17, align 16 145 %18 = bitcast float* %9 to i128* 146 store i128 %8, i128* %18, align 16 147 store <4 x float> %5, <4 x float>* %13, align 16 148 ret void 149} 150 151define <16 x i32> @PR42819(<8 x i32>* %a0) { 152; SSE-LABEL: PR42819: 153; SSE: # %bb.0: 154; SSE-NEXT: movdqu (%rdi), %xmm3 155; SSE-NEXT: pslldq {{.*#+}} xmm3 = zero,zero,zero,zero,xmm3[0,1,2,3,4,5,6,7,8,9,10,11] 156; SSE-NEXT: xorps %xmm0, %xmm0 157; SSE-NEXT: xorps %xmm1, %xmm1 158; SSE-NEXT: xorps %xmm2, %xmm2 159; SSE-NEXT: retq 160; 161; AVX-LABEL: PR42819: 162; AVX: # %bb.0: 163; AVX-NEXT: vpermilps {{.*#+}} xmm0 = mem[0,0,1,2] 164; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 165; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1 166; AVX-NEXT: vblendps {{.*#+}} ymm1 = ymm1[0,1,2,3,4],ymm0[5,6,7] 167; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0 168; AVX-NEXT: retq 169; 170; AVX512-LABEL: PR42819: 171; AVX512: # %bb.0: 172; AVX512-NEXT: vmovdqu (%rdi), %xmm0 173; AVX512-NEXT: movw $-8192, %ax # imm = 0xE000 174; AVX512-NEXT: kmovw %eax, %k1 175; AVX512-NEXT: vpexpandd %zmm0, %zmm0 {%k1} {z} 176; AVX512-NEXT: retq 177 %1 = load <8 x i32>, <8 x i32>* %a0, align 4 178 %2 = shufflevector <8 x i32> %1, <8 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> 179 %3 = shufflevector <16 x i32> zeroinitializer, <16 x i32> %2, <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18> 180 ret <16 x i32> %3 181} 182 183@b = dso_local local_unnamed_addr global i32 0, align 4 184@c = dso_local local_unnamed_addr global [49 x i32] zeroinitializer, align 16 185@d = dso_local local_unnamed_addr global [49 x i32] zeroinitializer, align 16 186 187define void @PR42833() { 188; SSE2-LABEL: PR42833: 189; SSE2: # %bb.0: 190; SSE2-NEXT: movdqa .Lc$local+{{.*}}(%rip), %xmm1 191; SSE2-NEXT: movdqa .Lc$local+{{.*}}(%rip), %xmm0 192; SSE2-NEXT: movd %xmm0, %eax 193; SSE2-NEXT: addl .Lb${{.*}}(%rip), %eax 194; SSE2-NEXT: movd %eax, %xmm2 195; SSE2-NEXT: movd %eax, %xmm3 196; SSE2-NEXT: paddd %xmm0, %xmm3 197; SSE2-NEXT: movdqa .Ld$local+{{.*}}(%rip), %xmm4 198; SSE2-NEXT: psubd %xmm1, %xmm4 199; SSE2-NEXT: paddd %xmm1, %xmm1 200; SSE2-NEXT: movdqa %xmm0, %xmm5 201; SSE2-NEXT: paddd %xmm0, %xmm5 202; SSE2-NEXT: movss {{.*#+}} xmm5 = xmm3[0],xmm5[1,2,3] 203; SSE2-NEXT: movdqa %xmm1, .Lc$local+{{.*}}(%rip) 204; SSE2-NEXT: movaps %xmm5, .Lc$local+{{.*}}(%rip) 205; SSE2-NEXT: movdqa .Lc$local+{{.*}}(%rip), %xmm1 206; SSE2-NEXT: movdqa .Lc$local+{{.*}}(%rip), %xmm3 207; SSE2-NEXT: movdqa .Ld$local+{{.*}}(%rip), %xmm5 208; SSE2-NEXT: movdqa .Ld$local+{{.*}}(%rip), %xmm6 209; SSE2-NEXT: movdqa .Ld$local+{{.*}}(%rip), %xmm7 210; SSE2-NEXT: movss {{.*#+}} xmm0 = xmm2[0],xmm0[1,2,3] 211; SSE2-NEXT: psubd %xmm0, %xmm7 212; SSE2-NEXT: psubd %xmm3, %xmm6 213; SSE2-NEXT: psubd %xmm1, %xmm5 214; SSE2-NEXT: movdqa %xmm5, .Ld$local+{{.*}}(%rip) 215; SSE2-NEXT: movdqa %xmm6, .Ld$local+{{.*}}(%rip) 216; SSE2-NEXT: movdqa %xmm4, .Ld$local+{{.*}}(%rip) 217; SSE2-NEXT: movdqa %xmm7, .Ld$local+{{.*}}(%rip) 218; SSE2-NEXT: paddd %xmm3, %xmm3 219; SSE2-NEXT: paddd %xmm1, %xmm1 220; SSE2-NEXT: movdqa %xmm1, .Lc$local+{{.*}}(%rip) 221; SSE2-NEXT: movdqa %xmm3, .Lc$local+{{.*}}(%rip) 222; SSE2-NEXT: retq 223; 224; SSE42-LABEL: PR42833: 225; SSE42: # %bb.0: 226; SSE42-NEXT: movdqa .Lc$local+{{.*}}(%rip), %xmm0 227; SSE42-NEXT: movdqa .Lc$local+{{.*}}(%rip), %xmm1 228; SSE42-NEXT: movd %xmm1, %eax 229; SSE42-NEXT: addl .Lb${{.*}}(%rip), %eax 230; SSE42-NEXT: movd %eax, %xmm2 231; SSE42-NEXT: paddd %xmm1, %xmm2 232; SSE42-NEXT: movdqa .Ld$local+{{.*}}(%rip), %xmm3 233; SSE42-NEXT: psubd %xmm0, %xmm3 234; SSE42-NEXT: paddd %xmm0, %xmm0 235; SSE42-NEXT: movdqa %xmm1, %xmm4 236; SSE42-NEXT: paddd %xmm1, %xmm4 237; SSE42-NEXT: pblendw {{.*#+}} xmm4 = xmm2[0,1],xmm4[2,3,4,5,6,7] 238; SSE42-NEXT: movdqa %xmm0, .Lc$local+{{.*}}(%rip) 239; SSE42-NEXT: movdqa %xmm4, .Lc$local+{{.*}}(%rip) 240; SSE42-NEXT: movdqa .Lc$local+{{.*}}(%rip), %xmm0 241; SSE42-NEXT: movdqa .Lc$local+{{.*}}(%rip), %xmm2 242; SSE42-NEXT: movdqa .Ld$local+{{.*}}(%rip), %xmm4 243; SSE42-NEXT: movdqa .Ld$local+{{.*}}(%rip), %xmm5 244; SSE42-NEXT: movdqa .Ld$local+{{.*}}(%rip), %xmm6 245; SSE42-NEXT: pinsrd $0, %eax, %xmm1 246; SSE42-NEXT: psubd %xmm1, %xmm6 247; SSE42-NEXT: psubd %xmm2, %xmm5 248; SSE42-NEXT: psubd %xmm0, %xmm4 249; SSE42-NEXT: movdqa %xmm4, .Ld$local+{{.*}}(%rip) 250; SSE42-NEXT: movdqa %xmm5, .Ld$local+{{.*}}(%rip) 251; SSE42-NEXT: movdqa %xmm3, .Ld$local+{{.*}}(%rip) 252; SSE42-NEXT: movdqa %xmm6, .Ld$local+{{.*}}(%rip) 253; SSE42-NEXT: paddd %xmm2, %xmm2 254; SSE42-NEXT: paddd %xmm0, %xmm0 255; SSE42-NEXT: movdqa %xmm0, .Lc$local+{{.*}}(%rip) 256; SSE42-NEXT: movdqa %xmm2, .Lc$local+{{.*}}(%rip) 257; SSE42-NEXT: retq 258; 259; AVX1-LABEL: PR42833: 260; AVX1: # %bb.0: 261; AVX1-NEXT: vmovdqa .Lc$local+{{.*}}(%rip), %xmm0 262; AVX1-NEXT: vmovd %xmm0, %eax 263; AVX1-NEXT: addl .Lb${{.*}}(%rip), %eax 264; AVX1-NEXT: vmovd %eax, %xmm1 265; AVX1-NEXT: vpaddd %xmm1, %xmm0, %xmm1 266; AVX1-NEXT: vpaddd %xmm0, %xmm0, %xmm2 267; AVX1-NEXT: vmovdqa .Lc$local+{{.*}}(%rip), %xmm3 268; AVX1-NEXT: vpaddd %xmm3, %xmm3, %xmm3 269; AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2 270; AVX1-NEXT: vblendps {{.*#+}} ymm1 = ymm1[0],ymm2[1,2,3,4,5,6,7] 271; AVX1-NEXT: vmovdqa .Ld$local+{{.*}}(%rip), %xmm2 272; AVX1-NEXT: vpsubd .Lc$local+{{.*}}(%rip), %xmm2, %xmm2 273; AVX1-NEXT: vmovups %ymm1, .Lc$local+{{.*}}(%rip) 274; AVX1-NEXT: vpinsrd $0, %eax, %xmm0, %xmm0 275; AVX1-NEXT: vmovdqa .Ld$local+{{.*}}(%rip), %xmm1 276; AVX1-NEXT: vpsubd %xmm0, %xmm1, %xmm0 277; AVX1-NEXT: vmovdqa .Ld$local+{{.*}}(%rip), %xmm1 278; AVX1-NEXT: vmovdqa .Lc$local+{{.*}}(%rip), %xmm3 279; AVX1-NEXT: vpsubd %xmm3, %xmm1, %xmm1 280; AVX1-NEXT: vmovdqa .Ld$local+{{.*}}(%rip), %xmm4 281; AVX1-NEXT: vmovdqa .Lc$local+{{.*}}(%rip), %xmm5 282; AVX1-NEXT: vpsubd %xmm5, %xmm4, %xmm4 283; AVX1-NEXT: vmovdqa %xmm2, .Ld$local+{{.*}}(%rip) 284; AVX1-NEXT: vmovdqa %xmm4, .Ld$local+{{.*}}(%rip) 285; AVX1-NEXT: vmovdqa %xmm1, .Ld$local+{{.*}}(%rip) 286; AVX1-NEXT: vmovdqa %xmm0, .Ld$local+{{.*}}(%rip) 287; AVX1-NEXT: vpaddd %xmm3, %xmm3, %xmm0 288; AVX1-NEXT: vpaddd %xmm5, %xmm5, %xmm1 289; AVX1-NEXT: vmovdqa %xmm1, .Lc$local+{{.*}}(%rip) 290; AVX1-NEXT: vmovdqa %xmm0, .Lc$local+{{.*}}(%rip) 291; AVX1-NEXT: vzeroupper 292; AVX1-NEXT: retq 293; 294; AVX2-LABEL: PR42833: 295; AVX2: # %bb.0: 296; AVX2-NEXT: movl .Lb${{.*}}(%rip), %eax 297; AVX2-NEXT: vmovdqu .Lc$local+{{.*}}(%rip), %ymm0 298; AVX2-NEXT: addl .Lc$local+{{.*}}(%rip), %eax 299; AVX2-NEXT: vmovd %eax, %xmm1 300; AVX2-NEXT: vpaddd %ymm1, %ymm0, %ymm2 301; AVX2-NEXT: vpaddd %ymm0, %ymm0, %ymm3 302; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0],ymm3[1,2,3,4,5,6,7] 303; AVX2-NEXT: vmovdqu %ymm2, .Lc$local+{{.*}}(%rip) 304; AVX2-NEXT: vmovdqu .Lc$local+{{.*}}(%rip), %ymm2 305; AVX2-NEXT: vmovdqu .Ld$local+{{.*}}(%rip), %ymm3 306; AVX2-NEXT: vmovdqu .Ld$local+{{.*}}(%rip), %ymm4 307; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm1[0],ymm0[1,2,3,4,5,6,7] 308; AVX2-NEXT: vpsubd %ymm0, %ymm4, %ymm0 309; AVX2-NEXT: vpsubd %ymm2, %ymm3, %ymm1 310; AVX2-NEXT: vmovdqu %ymm1, .Ld$local+{{.*}}(%rip) 311; AVX2-NEXT: vmovdqu %ymm0, .Ld$local+{{.*}}(%rip) 312; AVX2-NEXT: vpaddd %ymm2, %ymm2, %ymm0 313; AVX2-NEXT: vmovdqu %ymm0, .Lc$local+{{.*}}(%rip) 314; AVX2-NEXT: vzeroupper 315; AVX2-NEXT: retq 316; 317; AVX512-LABEL: PR42833: 318; AVX512: # %bb.0: 319; AVX512-NEXT: movl .Lb${{.*}}(%rip), %eax 320; AVX512-NEXT: vmovdqu .Lc$local+{{.*}}(%rip), %ymm0 321; AVX512-NEXT: vmovdqu64 .Lc$local+{{.*}}(%rip), %zmm1 322; AVX512-NEXT: addl .Lc$local+{{.*}}(%rip), %eax 323; AVX512-NEXT: vmovd %eax, %xmm2 324; AVX512-NEXT: vpaddd %ymm2, %ymm0, %ymm2 325; AVX512-NEXT: vpaddd %ymm0, %ymm0, %ymm0 326; AVX512-NEXT: vpblendd {{.*#+}} ymm0 = ymm2[0],ymm0[1,2,3,4,5,6,7] 327; AVX512-NEXT: vmovdqa .Lc$local+{{.*}}(%rip), %xmm2 328; AVX512-NEXT: vmovdqu %ymm0, .Lc$local+{{.*}}(%rip) 329; AVX512-NEXT: vmovdqu .Lc$local+{{.*}}(%rip), %ymm0 330; AVX512-NEXT: vmovdqu64 .Ld$local+{{.*}}(%rip), %zmm3 331; AVX512-NEXT: vpinsrd $0, %eax, %xmm2, %xmm2 332; AVX512-NEXT: vinserti32x4 $0, %xmm2, %zmm1, %zmm1 333; AVX512-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm1 334; AVX512-NEXT: vpsubd %zmm1, %zmm3, %zmm1 335; AVX512-NEXT: vmovdqu64 %zmm1, .Ld$local+{{.*}}(%rip) 336; AVX512-NEXT: vpaddd %ymm0, %ymm0, %ymm0 337; AVX512-NEXT: vmovdqu %ymm0, .Lc$local+{{.*}}(%rip) 338; AVX512-NEXT: vzeroupper 339; AVX512-NEXT: retq 340; 341; XOP-LABEL: PR42833: 342; XOP: # %bb.0: 343; XOP-NEXT: vmovdqa .Lc$local+{{.*}}(%rip), %xmm0 344; XOP-NEXT: vmovd %xmm0, %eax 345; XOP-NEXT: addl .Lb${{.*}}(%rip), %eax 346; XOP-NEXT: vmovd %eax, %xmm1 347; XOP-NEXT: vpaddd %xmm1, %xmm0, %xmm1 348; XOP-NEXT: vpaddd %xmm0, %xmm0, %xmm2 349; XOP-NEXT: vmovdqa .Lc$local+{{.*}}(%rip), %xmm3 350; XOP-NEXT: vpaddd %xmm3, %xmm3, %xmm3 351; XOP-NEXT: vinsertf128 $1, %xmm3, %ymm2, %ymm2 352; XOP-NEXT: vblendps {{.*#+}} ymm1 = ymm1[0],ymm2[1,2,3,4,5,6,7] 353; XOP-NEXT: vmovdqa .Ld$local+{{.*}}(%rip), %xmm2 354; XOP-NEXT: vpsubd .Lc$local+{{.*}}(%rip), %xmm2, %xmm2 355; XOP-NEXT: vmovups %ymm1, .Lc$local+{{.*}}(%rip) 356; XOP-NEXT: vpinsrd $0, %eax, %xmm0, %xmm0 357; XOP-NEXT: vmovdqa .Ld$local+{{.*}}(%rip), %xmm1 358; XOP-NEXT: vpsubd %xmm0, %xmm1, %xmm0 359; XOP-NEXT: vmovdqa .Ld$local+{{.*}}(%rip), %xmm1 360; XOP-NEXT: vmovdqa .Lc$local+{{.*}}(%rip), %xmm3 361; XOP-NEXT: vpsubd %xmm3, %xmm1, %xmm1 362; XOP-NEXT: vmovdqa .Ld$local+{{.*}}(%rip), %xmm4 363; XOP-NEXT: vmovdqa .Lc$local+{{.*}}(%rip), %xmm5 364; XOP-NEXT: vpsubd %xmm5, %xmm4, %xmm4 365; XOP-NEXT: vmovdqa %xmm2, .Ld$local+{{.*}}(%rip) 366; XOP-NEXT: vmovdqa %xmm4, .Ld$local+{{.*}}(%rip) 367; XOP-NEXT: vmovdqa %xmm1, .Ld$local+{{.*}}(%rip) 368; XOP-NEXT: vmovdqa %xmm0, .Ld$local+{{.*}}(%rip) 369; XOP-NEXT: vpaddd %xmm3, %xmm3, %xmm0 370; XOP-NEXT: vpaddd %xmm5, %xmm5, %xmm1 371; XOP-NEXT: vmovdqa %xmm1, .Lc$local+{{.*}}(%rip) 372; XOP-NEXT: vmovdqa %xmm0, .Lc$local+{{.*}}(%rip) 373; XOP-NEXT: vzeroupper 374; XOP-NEXT: retq 375 %1 = load i32, i32* @b, align 4 376 %2 = load <8 x i32>, <8 x i32>* bitcast (i32* getelementptr inbounds ([49 x i32], [49 x i32]* @c, i64 0, i64 32) to <8 x i32>*), align 16 377 %3 = shufflevector <8 x i32> %2, <8 x i32> undef, <16 x i32> <i32 undef, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> 378 %4 = extractelement <8 x i32> %2, i32 0 379 %5 = add i32 %1, %4 380 %6 = insertelement <8 x i32> <i32 undef, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>, i32 %5, i32 0 381 %7 = add <8 x i32> %2, %6 382 %8 = shl <8 x i32> %2, %6 383 %9 = shufflevector <8 x i32> %7, <8 x i32> %8, <8 x i32> <i32 0, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 384 store <8 x i32> %9, <8 x i32>* bitcast (i32* getelementptr inbounds ([49 x i32], [49 x i32]* @c, i64 0, i64 32) to <8 x i32>*), align 16 385 %10 = load <8 x i32>, <8 x i32>* bitcast (i32* getelementptr inbounds ([49 x i32], [49 x i32]* @c, i64 0, i64 40) to <8 x i32>*), align 16 386 %11 = shufflevector <8 x i32> %10, <8 x i32> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> 387 %12 = load <16 x i32>, <16 x i32>* bitcast (i32* getelementptr inbounds ([49 x i32], [49 x i32]* @d, i64 0, i64 32) to <16 x i32>*), align 16 388 %13 = insertelement <16 x i32> %3, i32 %5, i32 0 389 %14 = shufflevector <16 x i32> %13, <16 x i32> %11, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23> 390 %15 = sub <16 x i32> %12, %14 391 store <16 x i32> %15, <16 x i32>* bitcast (i32* getelementptr inbounds ([49 x i32], [49 x i32]* @d, i64 0, i64 32) to <16 x i32>*), align 16 392 %16 = shl <8 x i32> %10, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1> 393 store <8 x i32> %16, <8 x i32>* bitcast (i32* getelementptr inbounds ([49 x i32], [49 x i32]* @c, i64 0, i64 40) to <8 x i32>*), align 16 394 ret void 395} 396