1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X32 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64 4 5define void @knownbits_zext_in_reg(i8*) nounwind { 6; X32-LABEL: knownbits_zext_in_reg: 7; X32: # BB#0: # %BB 8; X32-NEXT: pushl %ebp 9; X32-NEXT: pushl %ebx 10; X32-NEXT: pushl %edi 11; X32-NEXT: pushl %esi 12; X32-NEXT: movl {{[0-9]+}}(%esp), %eax 13; X32-NEXT: movzbl (%eax), %eax 14; X32-NEXT: imull $101, %eax, %eax 15; X32-NEXT: andl $16384, %eax # imm = 0x4000 16; X32-NEXT: shrl $14, %eax 17; X32-NEXT: movzbl %al, %eax 18; X32-NEXT: vmovd %eax, %xmm0 19; X32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,0,1,1] 20; X32-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0 21; X32-NEXT: vpextrd $1, %xmm0, %ebp 22; X32-NEXT: vmovd %xmm0, %esi 23; X32-NEXT: vpextrd $2, %xmm0, %edi 24; X32-NEXT: vpextrd $3, %xmm0, %ebx 25; X32-NEXT: xorl %ecx, %ecx 26; X32-NEXT: .p2align 4, 0x90 27; X32-NEXT: .LBB0_1: # %CF 28; X32-NEXT: # =>This Loop Header: Depth=1 29; X32-NEXT: # Child Loop BB0_2 Depth 2 30; X32-NEXT: movl %ebp, %eax 31; X32-NEXT: cltd 32; X32-NEXT: idivl %ebp 33; X32-NEXT: movl %esi, %eax 34; X32-NEXT: cltd 35; X32-NEXT: idivl %esi 36; X32-NEXT: movl %edi, %eax 37; X32-NEXT: cltd 38; X32-NEXT: idivl %edi 39; X32-NEXT: movl %ebx, %eax 40; X32-NEXT: cltd 41; X32-NEXT: idivl %ebx 42; X32-NEXT: .p2align 4, 0x90 43; X32-NEXT: .LBB0_2: # %CF237 44; X32-NEXT: # Parent Loop BB0_1 Depth=1 45; X32-NEXT: # => This Inner Loop Header: Depth=2 46; X32-NEXT: testb %cl, %cl 47; X32-NEXT: jne .LBB0_2 48; X32-NEXT: jmp .LBB0_1 49; 50; X64-LABEL: knownbits_zext_in_reg: 51; X64: # BB#0: # %BB 52; X64-NEXT: movzbl (%rdi), %eax 53; X64-NEXT: imull $101, %eax, %eax 54; X64-NEXT: andl $16384, %eax # imm = 0x4000 55; X64-NEXT: shrl $14, %eax 56; X64-NEXT: movzbl %al, %eax 57; X64-NEXT: vmovd %eax, %xmm0 58; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,0,1,1] 59; X64-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 60; X64-NEXT: vpextrd $1, %xmm0, %r8d 61; X64-NEXT: vmovd %xmm0, %r9d 62; X64-NEXT: vpextrd $2, %xmm0, %edi 63; X64-NEXT: vpextrd $3, %xmm0, %ecx 64; X64-NEXT: xorl %esi, %esi 65; X64-NEXT: .p2align 4, 0x90 66; X64-NEXT: .LBB0_1: # %CF 67; X64-NEXT: # =>This Loop Header: Depth=1 68; X64-NEXT: # Child Loop BB0_2 Depth 2 69; X64-NEXT: movl %r8d, %eax 70; X64-NEXT: cltd 71; X64-NEXT: idivl %r8d 72; X64-NEXT: movl %r9d, %eax 73; X64-NEXT: cltd 74; X64-NEXT: idivl %r9d 75; X64-NEXT: movl %edi, %eax 76; X64-NEXT: cltd 77; X64-NEXT: idivl %edi 78; X64-NEXT: movl %ecx, %eax 79; X64-NEXT: cltd 80; X64-NEXT: idivl %ecx 81; X64-NEXT: .p2align 4, 0x90 82; X64-NEXT: .LBB0_2: # %CF237 83; X64-NEXT: # Parent Loop BB0_1 Depth=1 84; X64-NEXT: # => This Inner Loop Header: Depth=2 85; X64-NEXT: testb %sil, %sil 86; X64-NEXT: jne .LBB0_2 87; X64-NEXT: jmp .LBB0_1 88BB: 89 %L5 = load i8, i8* %0 90 %Sl9 = select i1 true, i8 %L5, i8 undef 91 %B21 = udiv i8 %Sl9, -93 92 br label %CF 93 94CF: ; preds = %CF246, %BB 95 %I40 = insertelement <4 x i8> zeroinitializer, i8 %B21, i32 1 96 %B41 = srem <4 x i8> %I40, %I40 97 br label %CF237 98 99CF237: ; preds = %CF237, %CF 100 %Cmp73 = icmp ne i1 undef, undef 101 br i1 %Cmp73, label %CF237, label %CF246 102 103CF246: ; preds = %CF237 104 %Cmp117 = icmp ult <4 x i8> %B41, undef 105 %E156 = extractelement <4 x i1> %Cmp117, i32 2 106 br label %CF 107} 108