1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X32
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
4
5define void @knownbits_zext_in_reg(i8*) nounwind {
6; X32-LABEL: knownbits_zext_in_reg:
7; X32:       # BB#0: # %BB
8; X32-NEXT:    pushl %ebp
9; X32-NEXT:    pushl %ebx
10; X32-NEXT:    pushl %edi
11; X32-NEXT:    pushl %esi
12; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
13; X32-NEXT:    movzbl (%eax), %eax
14; X32-NEXT:    imull $101, %eax, %eax
15; X32-NEXT:    andl $16384, %eax # imm = 0x4000
16; X32-NEXT:    shrl $14, %eax
17; X32-NEXT:    movzbl %al, %eax
18; X32-NEXT:    vmovd %eax, %xmm0
19; X32-NEXT:    vpshufb {{.*#+}} xmm0 = zero,zero,zero,zero,xmm0[0],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
20; X32-NEXT:    vpextrd $1, %xmm0, %ebp
21; X32-NEXT:    xorl %ecx, %ecx
22; X32-NEXT:    vmovd %xmm0, %esi
23; X32-NEXT:    vpextrd $2, %xmm0, %edi
24; X32-NEXT:    vpextrd $3, %xmm0, %ebx
25; X32-NEXT:    .p2align 4, 0x90
26; X32-NEXT:  .LBB0_1: # %CF
27; X32-NEXT:    # =>This Loop Header: Depth=1
28; X32-NEXT:    # Child Loop BB0_2 Depth 2
29; X32-NEXT:    xorl %edx, %edx
30; X32-NEXT:    movl %ebp, %eax
31; X32-NEXT:    divl %ebp
32; X32-NEXT:    xorl %edx, %edx
33; X32-NEXT:    movl %esi, %eax
34; X32-NEXT:    divl %esi
35; X32-NEXT:    xorl %edx, %edx
36; X32-NEXT:    movl %edi, %eax
37; X32-NEXT:    divl %edi
38; X32-NEXT:    xorl %edx, %edx
39; X32-NEXT:    movl %ebx, %eax
40; X32-NEXT:    divl %ebx
41; X32-NEXT:    .p2align 4, 0x90
42; X32-NEXT:  .LBB0_2: # %CF237
43; X32-NEXT:    # Parent Loop BB0_1 Depth=1
44; X32-NEXT:    # => This Inner Loop Header: Depth=2
45; X32-NEXT:    testb %cl, %cl
46; X32-NEXT:    jne .LBB0_2
47; X32-NEXT:    jmp .LBB0_1
48;
49; X64-LABEL: knownbits_zext_in_reg:
50; X64:       # BB#0: # %BB
51; X64-NEXT:    movzbl (%rdi), %eax
52; X64-NEXT:    imull $101, %eax, %eax
53; X64-NEXT:    andl $16384, %eax # imm = 0x4000
54; X64-NEXT:    shrl $14, %eax
55; X64-NEXT:    movzbl %al, %eax
56; X64-NEXT:    vmovd %eax, %xmm0
57; X64-NEXT:    vpshufb {{.*#+}} xmm0 = zero,zero,zero,zero,xmm0[0],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
58; X64-NEXT:    vpextrd $1, %xmm0, %r8d
59; X64-NEXT:    xorl %esi, %esi
60; X64-NEXT:    vmovd %xmm0, %r9d
61; X64-NEXT:    vpextrd $2, %xmm0, %edi
62; X64-NEXT:    vpextrd $3, %xmm0, %ecx
63; X64-NEXT:    .p2align 4, 0x90
64; X64-NEXT:  .LBB0_1: # %CF
65; X64-NEXT:    # =>This Loop Header: Depth=1
66; X64-NEXT:    # Child Loop BB0_2 Depth 2
67; X64-NEXT:    xorl %edx, %edx
68; X64-NEXT:    movl %r8d, %eax
69; X64-NEXT:    divl %r8d
70; X64-NEXT:    xorl %edx, %edx
71; X64-NEXT:    movl %r9d, %eax
72; X64-NEXT:    divl %r9d
73; X64-NEXT:    xorl %edx, %edx
74; X64-NEXT:    movl %edi, %eax
75; X64-NEXT:    divl %edi
76; X64-NEXT:    xorl %edx, %edx
77; X64-NEXT:    movl %ecx, %eax
78; X64-NEXT:    divl %ecx
79; X64-NEXT:    .p2align 4, 0x90
80; X64-NEXT:  .LBB0_2: # %CF237
81; X64-NEXT:    # Parent Loop BB0_1 Depth=1
82; X64-NEXT:    # => This Inner Loop Header: Depth=2
83; X64-NEXT:    testb %sil, %sil
84; X64-NEXT:    jne .LBB0_2
85; X64-NEXT:    jmp .LBB0_1
86BB:
87  %L5 = load i8, i8* %0
88  %Sl9 = select i1 true, i8 %L5, i8 undef
89  %B21 = udiv i8 %Sl9, -93
90  br label %CF
91
92CF:                                               ; preds = %CF246, %BB
93  %I40 = insertelement <4 x i8> zeroinitializer, i8 %B21, i32 1
94  %B41 = srem <4 x i8> %I40, %I40
95  br label %CF237
96
97CF237:                                            ; preds = %CF237, %CF
98  %Cmp73 = icmp ne i1 undef, undef
99  br i1 %Cmp73, label %CF237, label %CF246
100
101CF246:                                            ; preds = %CF237
102  %Cmp117 = icmp ult <4 x i8> %B41, undef
103  %E156 = extractelement <4 x i1> %Cmp117, i32 2
104  br label %CF
105}
106