1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X32
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
4
5define i32 @knownbits_mask_extract_sext(<8 x i16> %a0) nounwind {
6; X32-LABEL: knownbits_mask_extract_sext:
7; X32:       # BB#0:
8; X32-NEXT:    vandps {{\.LCPI.*}}, %xmm0, %xmm0
9; X32-NEXT:    vmovd %xmm0, %eax
10; X32-NEXT:    cwtl
11; X32-NEXT:    retl
12;
13; X64-LABEL: knownbits_mask_extract_sext:
14; X64:       # BB#0:
15; X64-NEXT:    vandps {{.*}}(%rip), %xmm0, %xmm0
16; X64-NEXT:    vmovd %xmm0, %eax
17; X64-NEXT:    cwtl
18; X64-NEXT:    retq
19  %1 = and <8 x i16> %a0, <i16 15, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
20  %2 = extractelement <8 x i16> %1, i32 0
21  %3 = sext i16 %2 to i32
22  ret i32 %3
23}
24
25define float @knownbits_mask_extract_uitofp(<2 x i64> %a0) nounwind {
26; X32-LABEL: knownbits_mask_extract_uitofp:
27; X32:       # BB#0:
28; X32-NEXT:    pushl %ebp
29; X32-NEXT:    movl %esp, %ebp
30; X32-NEXT:    andl $-8, %esp
31; X32-NEXT:    subl $16, %esp
32; X32-NEXT:    vpxor %xmm1, %xmm1, %xmm1
33; X32-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3],xmm0[4,5,6,7]
34; X32-NEXT:    vpextrd $1, %xmm0, %eax
35; X32-NEXT:    vmovq %xmm0, {{[0-9]+}}(%esp)
36; X32-NEXT:    xorl %ecx, %ecx
37; X32-NEXT:    testl %eax, %eax
38; X32-NEXT:    setns %cl
39; X32-NEXT:    fildll {{[0-9]+}}(%esp)
40; X32-NEXT:    fadds {{\.LCPI.*}}(,%ecx,4)
41; X32-NEXT:    fstps {{[0-9]+}}(%esp)
42; X32-NEXT:    vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
43; X32-NEXT:    vmovss %xmm0, (%esp)
44; X32-NEXT:    flds (%esp)
45; X32-NEXT:    movl %ebp, %esp
46; X32-NEXT:    popl %ebp
47; X32-NEXT:    retl
48;
49; X64-LABEL: knownbits_mask_extract_uitofp:
50; X64:       # BB#0:
51; X64-NEXT:    vpxor %xmm1, %xmm1, %xmm1
52; X64-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3],xmm0[4,5,6,7]
53; X64-NEXT:    vmovq %xmm0, %rax
54; X64-NEXT:    testq %rax, %rax
55; X64-NEXT:    js .LBB1_1
56; X64-NEXT:  # BB#2:
57; X64-NEXT:    vcvtsi2ssq %rax, %xmm2, %xmm0
58; X64-NEXT:    retq
59; X64-NEXT:  .LBB1_1:
60; X64-NEXT:    movq %rax, %rcx
61; X64-NEXT:    shrq %rcx
62; X64-NEXT:    andl $1, %eax
63; X64-NEXT:    orq %rcx, %rax
64; X64-NEXT:    vcvtsi2ssq %rax, %xmm2, %xmm0
65; X64-NEXT:    vaddss %xmm0, %xmm0, %xmm0
66; X64-NEXT:    retq
67  %1 = and <2 x i64> %a0, <i64 65535, i64 -1>
68  %2 = extractelement <2 x i64> %1, i32 0
69  %3 = uitofp i64 %2 to float
70  ret float %3
71}
72
73define <4 x i32> @knownbits_mask_shuffle_sext(<8 x i16> %a0) nounwind {
74; X32-LABEL: knownbits_mask_shuffle_sext:
75; X32:       # BB#0:
76; X32-NEXT:    vpand {{\.LCPI.*}}, %xmm0, %xmm0
77; X32-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
78; X32-NEXT:    vpmovsxwd %xmm0, %xmm0
79; X32-NEXT:    retl
80;
81; X64-LABEL: knownbits_mask_shuffle_sext:
82; X64:       # BB#0:
83; X64-NEXT:    vpand {{.*}}(%rip), %xmm0, %xmm0
84; X64-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
85; X64-NEXT:    vpmovsxwd %xmm0, %xmm0
86; X64-NEXT:    retq
87  %1 = and <8 x i16> %a0, <i16 -1, i16 -1, i16 -1, i16 -1, i16 15, i16 15, i16 15, i16 15>
88  %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
89  %3 = sext <4 x i16> %2 to <4 x i32>
90  ret <4 x i32> %3
91}
92
93define <4 x float> @knownbits_mask_shuffle_uitofp(<4 x i32> %a0) nounwind {
94; X32-LABEL: knownbits_mask_shuffle_uitofp:
95; X32:       # BB#0:
96; X32-NEXT:    vpand {{\.LCPI.*}}, %xmm0, %xmm0
97; X32-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[2,2,3,3]
98; X32-NEXT:    vpblendw {{.*#+}} xmm1 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
99; X32-NEXT:    vpsrld $16, %xmm0, %xmm0
100; X32-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
101; X32-NEXT:    vaddps {{\.LCPI.*}}, %xmm0, %xmm0
102; X32-NEXT:    vaddps %xmm0, %xmm1, %xmm0
103; X32-NEXT:    retl
104;
105; X64-LABEL: knownbits_mask_shuffle_uitofp:
106; X64:       # BB#0:
107; X64-NEXT:    vpand {{.*}}(%rip), %xmm0, %xmm0
108; X64-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[2,2,3,3]
109; X64-NEXT:    vpblendw {{.*#+}} xmm1 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
110; X64-NEXT:    vpsrld $16, %xmm0, %xmm0
111; X64-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7]
112; X64-NEXT:    vaddps {{.*}}(%rip), %xmm0, %xmm0
113; X64-NEXT:    vaddps %xmm0, %xmm1, %xmm0
114; X64-NEXT:    retq
115  %1 = and <4 x i32> %a0, <i32 -1, i32 -1, i32 255, i32 4085>
116  %2 = shufflevector <4 x i32> %1, <4 x i32> undef, <4 x i32> <i32 2, i32 2, i32 3, i32 3>
117  %3 = uitofp <4 x i32> %2 to <4 x float>
118  ret <4 x float> %3
119}
120