1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -disable-peephole -mtriple=i686-unknown-unknown   -mattr=+sse2     | FileCheck %s --check-prefixes=X86-SSE,X86-SSE2
3; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sse2     | FileCheck %s --check-prefixes=X64-SSE,X64-SSE2
4; RUN: llc < %s -disable-peephole -mtriple=i686-unknown-unknown   -mattr=+sse4.1   | FileCheck %s --check-prefixes=X86-SSE,X86-SSE4
5; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sse4.1   | FileCheck %s --check-prefixes=X64-SSE,X64-SSE4
6; RUN: llc < %s -disable-peephole -mtriple=i686-unknown-unknown   -mattr=+avx      | FileCheck %s --check-prefixes=X86-AVX,X86-AVX1
7; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx      | FileCheck %s --check-prefixes=X64-AVX,X64-AVX1
8; RUN: llc < %s -disable-peephole -mtriple=i686-unknown-unknown   -mattr=+avx2     | FileCheck %s --check-prefixes=X86-AVX,X86-AVX2
9; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx2     | FileCheck %s --check-prefixes=X64-AVX,X64-AVX2
10; RUN: llc < %s -disable-peephole -mtriple=i686-unknown-unknown   -mattr=+avx512f  | FileCheck %s --check-prefixes=X86-AVX,X86-AVX512F
11; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f  | FileCheck %s --check-prefixes=X64-AVX,X64-AVX512F
12
13define <16 x i8> @elt0_v16i8(i8 %x) {
14; X86-SSE2-LABEL: elt0_v16i8:
15; X86-SSE2:       # %bb.0:
16; X86-SSE2-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
17; X86-SSE2-NEXT:    andps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
18; X86-SSE2-NEXT:    orps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
19; X86-SSE2-NEXT:    retl
20;
21; X64-SSE2-LABEL: elt0_v16i8:
22; X64-SSE2:       # %bb.0:
23; X64-SSE2-NEXT:    movd %edi, %xmm0
24; X64-SSE2-NEXT:    pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
25; X64-SSE2-NEXT:    por {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
26; X64-SSE2-NEXT:    retq
27;
28; X86-SSE4-LABEL: elt0_v16i8:
29; X86-SSE4:       # %bb.0:
30; X86-SSE4-NEXT:    movdqa {{.*#+}} xmm0 = <u,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15>
31; X86-SSE4-NEXT:    pinsrb $0, {{[0-9]+}}(%esp), %xmm0
32; X86-SSE4-NEXT:    retl
33;
34; X64-SSE4-LABEL: elt0_v16i8:
35; X64-SSE4:       # %bb.0:
36; X64-SSE4-NEXT:    movdqa {{.*#+}} xmm0 = <u,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15>
37; X64-SSE4-NEXT:    pinsrb $0, %edi, %xmm0
38; X64-SSE4-NEXT:    retq
39;
40; X86-AVX-LABEL: elt0_v16i8:
41; X86-AVX:       # %bb.0:
42; X86-AVX-NEXT:    vmovdqa {{.*#+}} xmm0 = <u,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15>
43; X86-AVX-NEXT:    vpinsrb $0, {{[0-9]+}}(%esp), %xmm0, %xmm0
44; X86-AVX-NEXT:    retl
45;
46; X64-AVX-LABEL: elt0_v16i8:
47; X64-AVX:       # %bb.0:
48; X64-AVX-NEXT:    vmovdqa {{.*#+}} xmm0 = <u,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15>
49; X64-AVX-NEXT:    vpinsrb $0, %edi, %xmm0, %xmm0
50; X64-AVX-NEXT:    retq
51   %ins = insertelement <16 x i8> <i8 42, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>, i8 %x, i32 0
52   ret <16 x i8> %ins
53}
54
55define <8 x i16> @elt5_v8i16(i16 %x) {
56; X86-SSE-LABEL: elt5_v8i16:
57; X86-SSE:       # %bb.0:
58; X86-SSE-NEXT:    movdqa {{.*#+}} xmm0 = <42,1,2,3,4,u,6,7>
59; X86-SSE-NEXT:    pinsrw $5, {{[0-9]+}}(%esp), %xmm0
60; X86-SSE-NEXT:    retl
61;
62; X64-SSE-LABEL: elt5_v8i16:
63; X64-SSE:       # %bb.0:
64; X64-SSE-NEXT:    movdqa {{.*#+}} xmm0 = <42,1,2,3,4,u,6,7>
65; X64-SSE-NEXT:    pinsrw $5, %edi, %xmm0
66; X64-SSE-NEXT:    retq
67;
68; X86-AVX-LABEL: elt5_v8i16:
69; X86-AVX:       # %bb.0:
70; X86-AVX-NEXT:    vmovdqa {{.*#+}} xmm0 = <42,1,2,3,4,u,6,7>
71; X86-AVX-NEXT:    vpinsrw $5, {{[0-9]+}}(%esp), %xmm0, %xmm0
72; X86-AVX-NEXT:    retl
73;
74; X64-AVX-LABEL: elt5_v8i16:
75; X64-AVX:       # %bb.0:
76; X64-AVX-NEXT:    vmovdqa {{.*#+}} xmm0 = <42,1,2,3,4,u,6,7>
77; X64-AVX-NEXT:    vpinsrw $5, %edi, %xmm0, %xmm0
78; X64-AVX-NEXT:    retq
79   %ins = insertelement <8 x i16> <i16 42, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7>, i16 %x, i32 5
80   ret <8 x i16> %ins
81}
82
83define <4 x i32> @elt3_v4i32(i32 %x) {
84; X86-SSE2-LABEL: elt3_v4i32:
85; X86-SSE2:       # %bb.0:
86; X86-SSE2-NEXT:    movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
87; X86-SSE2-NEXT:    movaps {{.*#+}} xmm0 = <42,1,2,u>
88; X86-SSE2-NEXT:    shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,3]
89; X86-SSE2-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
90; X86-SSE2-NEXT:    retl
91;
92; X64-SSE2-LABEL: elt3_v4i32:
93; X64-SSE2:       # %bb.0:
94; X64-SSE2-NEXT:    movd %edi, %xmm1
95; X64-SSE2-NEXT:    movaps {{.*#+}} xmm0 = <42,1,2,u>
96; X64-SSE2-NEXT:    shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,3]
97; X64-SSE2-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
98; X64-SSE2-NEXT:    retq
99;
100; X86-SSE4-LABEL: elt3_v4i32:
101; X86-SSE4:       # %bb.0:
102; X86-SSE4-NEXT:    movdqa {{.*#+}} xmm0 = <42,1,2,u>
103; X86-SSE4-NEXT:    pinsrd $3, {{[0-9]+}}(%esp), %xmm0
104; X86-SSE4-NEXT:    retl
105;
106; X64-SSE4-LABEL: elt3_v4i32:
107; X64-SSE4:       # %bb.0:
108; X64-SSE4-NEXT:    movdqa {{.*#+}} xmm0 = <42,1,2,u>
109; X64-SSE4-NEXT:    pinsrd $3, %edi, %xmm0
110; X64-SSE4-NEXT:    retq
111;
112; X86-AVX-LABEL: elt3_v4i32:
113; X86-AVX:       # %bb.0:
114; X86-AVX-NEXT:    vmovdqa {{.*#+}} xmm0 = <42,1,2,u>
115; X86-AVX-NEXT:    vpinsrd $3, {{[0-9]+}}(%esp), %xmm0, %xmm0
116; X86-AVX-NEXT:    retl
117;
118; X64-AVX-LABEL: elt3_v4i32:
119; X64-AVX:       # %bb.0:
120; X64-AVX-NEXT:    vmovdqa {{.*#+}} xmm0 = <42,1,2,u>
121; X64-AVX-NEXT:    vpinsrd $3, %edi, %xmm0, %xmm0
122; X64-AVX-NEXT:    retq
123   %ins = insertelement <4 x i32> <i32 42, i32 1, i32 2, i32 3>, i32 %x, i32 3
124   ret <4 x i32> %ins
125}
126
127define <2 x i64> @elt0_v2i64(i64 %x) {
128; X86-SSE-LABEL: elt0_v2i64:
129; X86-SSE:       # %bb.0:
130; X86-SSE-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
131; X86-SSE-NEXT:    unpcklpd {{.*#+}} xmm0 = xmm0[0],mem[0]
132; X86-SSE-NEXT:    retl
133;
134; X64-SSE2-LABEL: elt0_v2i64:
135; X64-SSE2:       # %bb.0:
136; X64-SSE2-NEXT:    movq %rdi, %xmm1
137; X64-SSE2-NEXT:    movapd {{.*#+}} xmm0 = <u,1>
138; X64-SSE2-NEXT:    movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
139; X64-SSE2-NEXT:    retq
140;
141; X64-SSE4-LABEL: elt0_v2i64:
142; X64-SSE4:       # %bb.0:
143; X64-SSE4-NEXT:    movdqa {{.*#+}} xmm0 = <u,1>
144; X64-SSE4-NEXT:    pinsrq $0, %rdi, %xmm0
145; X64-SSE4-NEXT:    retq
146;
147; X86-AVX-LABEL: elt0_v2i64:
148; X86-AVX:       # %bb.0:
149; X86-AVX-NEXT:    vmovsd {{.*#+}} xmm0 = mem[0],zero
150; X86-AVX-NEXT:    vunpcklpd {{.*#+}} xmm0 = xmm0[0],mem[0]
151; X86-AVX-NEXT:    retl
152;
153; X64-AVX-LABEL: elt0_v2i64:
154; X64-AVX:       # %bb.0:
155; X64-AVX-NEXT:    vmovdqa {{.*#+}} xmm0 = <u,1>
156; X64-AVX-NEXT:    vpinsrq $0, %rdi, %xmm0, %xmm0
157; X64-AVX-NEXT:    retq
158   %ins = insertelement <2 x i64> <i64 42, i64 1>, i64 %x, i32 0
159   ret <2 x i64> %ins
160}
161
162define <4 x float> @elt1_v4f32(float %x) {
163; X86-SSE2-LABEL: elt1_v4f32:
164; X86-SSE2:       # %bb.0:
165; X86-SSE2-NEXT:    movaps {{.*#+}} xmm1 = <4.2E+1,u,2.0E+0,3.0E+0>
166; X86-SSE2-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
167; X86-SSE2-NEXT:    movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
168; X86-SSE2-NEXT:    shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
169; X86-SSE2-NEXT:    retl
170;
171; X64-SSE2-LABEL: elt1_v4f32:
172; X64-SSE2:       # %bb.0:
173; X64-SSE2-NEXT:    movaps {{.*#+}} xmm1 = <4.2E+1,u,2.0E+0,3.0E+0>
174; X64-SSE2-NEXT:    movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
175; X64-SSE2-NEXT:    shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
176; X64-SSE2-NEXT:    retq
177;
178; X86-SSE4-LABEL: elt1_v4f32:
179; X86-SSE4:       # %bb.0:
180; X86-SSE4-NEXT:    movaps {{.*#+}} xmm0 = <4.2E+1,u,2.0E+0,3.0E+0>
181; X86-SSE4-NEXT:    insertps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[2,3]
182; X86-SSE4-NEXT:    retl
183;
184; X64-SSE4-LABEL: elt1_v4f32:
185; X64-SSE4:       # %bb.0:
186; X64-SSE4-NEXT:    movaps {{.*#+}} xmm1 = <4.2E+1,u,2.0E+0,3.0E+0>
187; X64-SSE4-NEXT:    insertps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[2,3]
188; X64-SSE4-NEXT:    movaps %xmm1, %xmm0
189; X64-SSE4-NEXT:    retq
190;
191; X86-AVX-LABEL: elt1_v4f32:
192; X86-AVX:       # %bb.0:
193; X86-AVX-NEXT:    vmovaps {{.*#+}} xmm0 = <4.2E+1,u,2.0E+0,3.0E+0>
194; X86-AVX-NEXT:    vinsertps {{.*#+}} xmm0 = xmm0[0],mem[0],xmm0[2,3]
195; X86-AVX-NEXT:    retl
196;
197; X64-AVX-LABEL: elt1_v4f32:
198; X64-AVX:       # %bb.0:
199; X64-AVX-NEXT:    vmovaps {{.*#+}} xmm1 = <4.2E+1,u,2.0E+0,3.0E+0>
200; X64-AVX-NEXT:    vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
201; X64-AVX-NEXT:    retq
202   %ins = insertelement <4 x float> <float 42.0, float 1.0, float 2.0, float 3.0>, float %x, i32 1
203   ret <4 x float> %ins
204}
205
206define <2 x double> @elt1_v2f64(double %x) {
207; X86-SSE-LABEL: elt1_v2f64:
208; X86-SSE:       # %bb.0:
209; X86-SSE-NEXT:    movaps {{.*#+}} xmm0 = <4.2E+1,u>
210; X86-SSE-NEXT:    movhps {{.*#+}} xmm0 = xmm0[0,1],mem[0,1]
211; X86-SSE-NEXT:    retl
212;
213; X64-SSE-LABEL: elt1_v2f64:
214; X64-SSE:       # %bb.0:
215; X64-SSE-NEXT:    movaps {{.*#+}} xmm1 = <4.2E+1,u>
216; X64-SSE-NEXT:    movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
217; X64-SSE-NEXT:    movaps %xmm1, %xmm0
218; X64-SSE-NEXT:    retq
219;
220; X86-AVX-LABEL: elt1_v2f64:
221; X86-AVX:       # %bb.0:
222; X86-AVX-NEXT:    vmovaps {{.*#+}} xmm0 = <4.2E+1,u>
223; X86-AVX-NEXT:    vmovhps {{.*#+}} xmm0 = xmm0[0,1],mem[0,1]
224; X86-AVX-NEXT:    retl
225;
226; X64-AVX-LABEL: elt1_v2f64:
227; X64-AVX:       # %bb.0:
228; X64-AVX-NEXT:    vmovaps {{.*#+}} xmm1 = <4.2E+1,u>
229; X64-AVX-NEXT:    vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
230; X64-AVX-NEXT:    retq
231   %ins = insertelement <2 x double> <double 42.0, double 1.0>, double %x, i32 1
232   ret <2 x double> %ins
233}
234
235define <8 x i32> @elt7_v8i32(i32 %x) {
236; X86-SSE2-LABEL: elt7_v8i32:
237; X86-SSE2:       # %bb.0:
238; X86-SSE2-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
239; X86-SSE2-NEXT:    movaps {{.*#+}} xmm1 = <4,5,6,u>
240; X86-SSE2-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
241; X86-SSE2-NEXT:    shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
242; X86-SSE2-NEXT:    movaps {{.*#+}} xmm0 = [42,1,2,3]
243; X86-SSE2-NEXT:    retl
244;
245; X64-SSE2-LABEL: elt7_v8i32:
246; X64-SSE2:       # %bb.0:
247; X64-SSE2-NEXT:    movd %edi, %xmm0
248; X64-SSE2-NEXT:    movaps {{.*#+}} xmm1 = <4,5,6,u>
249; X64-SSE2-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
250; X64-SSE2-NEXT:    shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
251; X64-SSE2-NEXT:    movaps {{.*#+}} xmm0 = [42,1,2,3]
252; X64-SSE2-NEXT:    retq
253;
254; X86-SSE4-LABEL: elt7_v8i32:
255; X86-SSE4:       # %bb.0:
256; X86-SSE4-NEXT:    movdqa {{.*#+}} xmm1 = <4,5,6,u>
257; X86-SSE4-NEXT:    pinsrd $3, {{[0-9]+}}(%esp), %xmm1
258; X86-SSE4-NEXT:    movaps {{.*#+}} xmm0 = [42,1,2,3]
259; X86-SSE4-NEXT:    retl
260;
261; X64-SSE4-LABEL: elt7_v8i32:
262; X64-SSE4:       # %bb.0:
263; X64-SSE4-NEXT:    movdqa {{.*#+}} xmm1 = <4,5,6,u>
264; X64-SSE4-NEXT:    pinsrd $3, %edi, %xmm1
265; X64-SSE4-NEXT:    movaps {{.*#+}} xmm0 = [42,1,2,3]
266; X64-SSE4-NEXT:    retq
267;
268; X86-AVX-LABEL: elt7_v8i32:
269; X86-AVX:       # %bb.0:
270; X86-AVX-NEXT:    vbroadcastss {{[0-9]+}}(%esp), %ymm0
271; X86-AVX-NEXT:    vblendps {{.*#+}} ymm0 = mem[0,1,2,3,4,5,6],ymm0[7]
272; X86-AVX-NEXT:    retl
273;
274; X64-AVX1-LABEL: elt7_v8i32:
275; X64-AVX1:       # %bb.0:
276; X64-AVX1-NEXT:    vmovd %edi, %xmm0
277; X64-AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
278; X64-AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm0, %ymm0
279; X64-AVX1-NEXT:    vblendps {{.*#+}} ymm0 = mem[0,1,2,3,4,5,6],ymm0[7]
280; X64-AVX1-NEXT:    retq
281;
282; X64-AVX2-LABEL: elt7_v8i32:
283; X64-AVX2:       # %bb.0:
284; X64-AVX2-NEXT:    vmovd %edi, %xmm0
285; X64-AVX2-NEXT:    vpbroadcastd %xmm0, %ymm0
286; X64-AVX2-NEXT:    vpblendd {{.*#+}} ymm0 = mem[0,1,2,3,4,5,6],ymm0[7]
287; X64-AVX2-NEXT:    retq
288;
289; X64-AVX512F-LABEL: elt7_v8i32:
290; X64-AVX512F:       # %bb.0:
291; X64-AVX512F-NEXT:    vmovd %edi, %xmm0
292; X64-AVX512F-NEXT:    vpbroadcastd %xmm0, %ymm0
293; X64-AVX512F-NEXT:    vpblendd {{.*#+}} ymm0 = mem[0,1,2,3,4,5,6],ymm0[7]
294; X64-AVX512F-NEXT:    retq
295   %ins = insertelement <8 x i32> <i32 42, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, i32 %x, i32 7
296   ret <8 x i32> %ins
297}
298
299define <8 x float> @elt6_v8f32(float %x) {
300; X86-SSE2-LABEL: elt6_v8f32:
301; X86-SSE2:       # %bb.0:
302; X86-SSE2-NEXT:    movaps {{.*#+}} xmm1 = <4.0E+0,5.0E+0,u,7.0E+0>
303; X86-SSE2-NEXT:    movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
304; X86-SSE2-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
305; X86-SSE2-NEXT:    shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,2]
306; X86-SSE2-NEXT:    movaps {{.*#+}} xmm0 = [4.2E+1,1.0E+0,2.0E+0,3.0E+0]
307; X86-SSE2-NEXT:    retl
308;
309; X64-SSE2-LABEL: elt6_v8f32:
310; X64-SSE2:       # %bb.0:
311; X64-SSE2-NEXT:    movaps {{.*#+}} xmm1 = <4.0E+0,5.0E+0,u,7.0E+0>
312; X64-SSE2-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
313; X64-SSE2-NEXT:    shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,2]
314; X64-SSE2-NEXT:    movaps {{.*#+}} xmm0 = [4.2E+1,1.0E+0,2.0E+0,3.0E+0]
315; X64-SSE2-NEXT:    retq
316;
317; X86-SSE4-LABEL: elt6_v8f32:
318; X86-SSE4:       # %bb.0:
319; X86-SSE4-NEXT:    movaps {{.*#+}} xmm1 = <4.0E+0,5.0E+0,u,7.0E+0>
320; X86-SSE4-NEXT:    insertps {{.*#+}} xmm1 = xmm1[0,1],mem[0],xmm1[3]
321; X86-SSE4-NEXT:    movaps {{.*#+}} xmm0 = [4.2E+1,1.0E+0,2.0E+0,3.0E+0]
322; X86-SSE4-NEXT:    retl
323;
324; X64-SSE4-LABEL: elt6_v8f32:
325; X64-SSE4:       # %bb.0:
326; X64-SSE4-NEXT:    movaps {{.*#+}} xmm1 = <4.0E+0,5.0E+0,u,7.0E+0>
327; X64-SSE4-NEXT:    insertps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0],xmm1[3]
328; X64-SSE4-NEXT:    movaps {{.*#+}} xmm0 = [4.2E+1,1.0E+0,2.0E+0,3.0E+0]
329; X64-SSE4-NEXT:    retq
330;
331; X86-AVX-LABEL: elt6_v8f32:
332; X86-AVX:       # %bb.0:
333; X86-AVX-NEXT:    vbroadcastss {{[0-9]+}}(%esp), %ymm0
334; X86-AVX-NEXT:    vblendps {{.*#+}} ymm0 = mem[0,1,2,3,4,5],ymm0[6],mem[7]
335; X86-AVX-NEXT:    retl
336;
337; X64-AVX1-LABEL: elt6_v8f32:
338; X64-AVX1:       # %bb.0:
339; X64-AVX1-NEXT:    vmovddup {{.*#+}} xmm0 = xmm0[0,0]
340; X64-AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm0, %ymm0
341; X64-AVX1-NEXT:    vblendps {{.*#+}} ymm0 = mem[0,1,2,3,4,5],ymm0[6],mem[7]
342; X64-AVX1-NEXT:    retq
343;
344; X64-AVX2-LABEL: elt6_v8f32:
345; X64-AVX2:       # %bb.0:
346; X64-AVX2-NEXT:    vbroadcastss %xmm0, %ymm0
347; X64-AVX2-NEXT:    vblendps {{.*#+}} ymm0 = mem[0,1,2,3,4,5],ymm0[6],mem[7]
348; X64-AVX2-NEXT:    retq
349;
350; X64-AVX512F-LABEL: elt6_v8f32:
351; X64-AVX512F:       # %bb.0:
352; X64-AVX512F-NEXT:    vbroadcastss %xmm0, %ymm0
353; X64-AVX512F-NEXT:    vblendps {{.*#+}} ymm0 = mem[0,1,2,3,4,5],ymm0[6],mem[7]
354; X64-AVX512F-NEXT:    retq
355   %ins = insertelement <8 x float> <float 42.0, float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0>, float %x, i32 6
356   ret <8 x float> %ins
357}
358
359define <8 x i64> @elt5_v8i64(i64 %x) {
360; X86-SSE-LABEL: elt5_v8i64:
361; X86-SSE:       # %bb.0:
362; X86-SSE-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
363; X86-SSE-NEXT:    movaps {{.*#+}} xmm2 = [4,0,0,0]
364; X86-SSE-NEXT:    movlhps {{.*#+}} xmm2 = xmm2[0],xmm0[0]
365; X86-SSE-NEXT:    movaps {{.*#+}} xmm0 = [42,0,1,0]
366; X86-SSE-NEXT:    movaps {{.*#+}} xmm1 = [2,0,3,0]
367; X86-SSE-NEXT:    movaps {{.*#+}} xmm3 = [6,0,7,0]
368; X86-SSE-NEXT:    retl
369;
370; X64-SSE2-LABEL: elt5_v8i64:
371; X64-SSE2:       # %bb.0:
372; X64-SSE2-NEXT:    movq %rdi, %xmm0
373; X64-SSE2-NEXT:    movdqa {{.*#+}} xmm2 = <4,u>
374; X64-SSE2-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm0[0]
375; X64-SSE2-NEXT:    movaps {{.*#+}} xmm0 = [42,1]
376; X64-SSE2-NEXT:    movaps {{.*#+}} xmm1 = [2,3]
377; X64-SSE2-NEXT:    movaps {{.*#+}} xmm3 = [6,7]
378; X64-SSE2-NEXT:    retq
379;
380; X64-SSE4-LABEL: elt5_v8i64:
381; X64-SSE4:       # %bb.0:
382; X64-SSE4-NEXT:    movdqa {{.*#+}} xmm2 = <4,u>
383; X64-SSE4-NEXT:    pinsrq $1, %rdi, %xmm2
384; X64-SSE4-NEXT:    movaps {{.*#+}} xmm0 = [42,1]
385; X64-SSE4-NEXT:    movaps {{.*#+}} xmm1 = [2,3]
386; X64-SSE4-NEXT:    movaps {{.*#+}} xmm3 = [6,7]
387; X64-SSE4-NEXT:    retq
388;
389; X86-AVX1-LABEL: elt5_v8i64:
390; X86-AVX1:       # %bb.0:
391; X86-AVX1-NEXT:    vmovsd {{.*#+}} xmm0 = mem[0],zero
392; X86-AVX1-NEXT:    vmovaps {{.*#+}} xmm1 = [4,0,0,0]
393; X86-AVX1-NEXT:    vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
394; X86-AVX1-NEXT:    vinsertf128 $1, {{\.?LCPI[0-9]+_[0-9]+}}, %ymm0, %ymm1
395; X86-AVX1-NEXT:    vmovaps {{.*#+}} ymm0 = [42,0,1,0,2,0,3,0]
396; X86-AVX1-NEXT:    retl
397;
398; X64-AVX1-LABEL: elt5_v8i64:
399; X64-AVX1:       # %bb.0:
400; X64-AVX1-NEXT:    vmovdqa {{.*#+}} xmm0 = <4,u,6,7>
401; X64-AVX1-NEXT:    vpinsrq $1, %rdi, %xmm0, %xmm0
402; X64-AVX1-NEXT:    vblendps {{.*#+}} ymm1 = ymm0[0,1,2,3],mem[4,5,6,7]
403; X64-AVX1-NEXT:    vmovaps {{.*#+}} ymm0 = [42,1,2,3]
404; X64-AVX1-NEXT:    retq
405;
406; X86-AVX2-LABEL: elt5_v8i64:
407; X86-AVX2:       # %bb.0:
408; X86-AVX2-NEXT:    vmovsd {{.*#+}} xmm0 = mem[0],zero
409; X86-AVX2-NEXT:    vmovaps {{.*#+}} xmm1 = [4,0,0,0]
410; X86-AVX2-NEXT:    vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
411; X86-AVX2-NEXT:    vinsertf128 $1, {{\.?LCPI[0-9]+_[0-9]+}}, %ymm0, %ymm1
412; X86-AVX2-NEXT:    vmovaps {{.*#+}} ymm0 = [42,0,1,0,2,0,3,0]
413; X86-AVX2-NEXT:    retl
414;
415; X64-AVX2-LABEL: elt5_v8i64:
416; X64-AVX2:       # %bb.0:
417; X64-AVX2-NEXT:    vmovdqa {{.*#+}} xmm0 = <4,u,6,7>
418; X64-AVX2-NEXT:    vpinsrq $1, %rdi, %xmm0, %xmm0
419; X64-AVX2-NEXT:    vpblendd {{.*#+}} ymm1 = ymm0[0,1,2,3],mem[4,5,6,7]
420; X64-AVX2-NEXT:    vmovaps {{.*#+}} ymm0 = [42,1,2,3]
421; X64-AVX2-NEXT:    retq
422;
423; X86-AVX512F-LABEL: elt5_v8i64:
424; X86-AVX512F:       # %bb.0:
425; X86-AVX512F-NEXT:    vmovaps {{.*#+}} ymm0 = [42,0,1,0,2,0,3,0]
426; X86-AVX512F-NEXT:    vmovsd {{.*#+}} xmm1 = mem[0],zero
427; X86-AVX512F-NEXT:    vmovaps {{.*#+}} xmm2 = [4,0,0,0]
428; X86-AVX512F-NEXT:    vmovlhps {{.*#+}} xmm1 = xmm2[0],xmm1[0]
429; X86-AVX512F-NEXT:    vinsertf128 $1, {{\.?LCPI[0-9]+_[0-9]+}}, %ymm1, %ymm1
430; X86-AVX512F-NEXT:    vinsertf64x4 $1, %ymm1, %zmm0, %zmm0
431; X86-AVX512F-NEXT:    retl
432;
433; X64-AVX512F-LABEL: elt5_v8i64:
434; X64-AVX512F:       # %bb.0:
435; X64-AVX512F-NEXT:    vmovq %rdi, %xmm1
436; X64-AVX512F-NEXT:    vmovdqa64 {{.*#+}} zmm2 = [0,1,2,3,4,8,6,7]
437; X64-AVX512F-NEXT:    vmovdqa64 {{.*#+}} zmm0 = <42,1,2,3,4,u,6,7>
438; X64-AVX512F-NEXT:    vpermt2q %zmm1, %zmm2, %zmm0
439; X64-AVX512F-NEXT:    retq
440   %ins = insertelement <8 x i64> <i64 42, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7>, i64 %x, i32 5
441   ret <8 x i64> %ins
442}
443
444define <8 x double> @elt1_v8f64(double %x) {
445; X86-SSE-LABEL: elt1_v8f64:
446; X86-SSE:       # %bb.0:
447; X86-SSE-NEXT:    movaps {{.*#+}} xmm0 = <4.2E+1,u>
448; X86-SSE-NEXT:    movhps {{.*#+}} xmm0 = xmm0[0,1],mem[0,1]
449; X86-SSE-NEXT:    movaps {{.*#+}} xmm1 = [2.0E+0,3.0E+0]
450; X86-SSE-NEXT:    movaps {{.*#+}} xmm2 = [4.0E+0,5.0E+0]
451; X86-SSE-NEXT:    movaps {{.*#+}} xmm3 = [6.0E+0,7.0E+0]
452; X86-SSE-NEXT:    retl
453;
454; X64-SSE-LABEL: elt1_v8f64:
455; X64-SSE:       # %bb.0:
456; X64-SSE-NEXT:    movaps {{.*#+}} xmm4 = <4.2E+1,u>
457; X64-SSE-NEXT:    movlhps {{.*#+}} xmm4 = xmm4[0],xmm0[0]
458; X64-SSE-NEXT:    movaps {{.*#+}} xmm1 = [2.0E+0,3.0E+0]
459; X64-SSE-NEXT:    movaps {{.*#+}} xmm2 = [4.0E+0,5.0E+0]
460; X64-SSE-NEXT:    movaps {{.*#+}} xmm3 = [6.0E+0,7.0E+0]
461; X64-SSE-NEXT:    movaps %xmm4, %xmm0
462; X64-SSE-NEXT:    retq
463;
464; X86-AVX1-LABEL: elt1_v8f64:
465; X86-AVX1:       # %bb.0:
466; X86-AVX1-NEXT:    vmovaps {{.*#+}} xmm0 = <4.2E+1,u,2.0E+0,3.0E+0>
467; X86-AVX1-NEXT:    vmovhps {{.*#+}} xmm0 = xmm0[0,1],mem[0,1]
468; X86-AVX1-NEXT:    vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3],mem[4,5,6,7]
469; X86-AVX1-NEXT:    vmovaps {{.*#+}} ymm1 = [4.0E+0,5.0E+0,6.0E+0,7.0E+0]
470; X86-AVX1-NEXT:    retl
471;
472; X64-AVX1-LABEL: elt1_v8f64:
473; X64-AVX1:       # %bb.0:
474; X64-AVX1-NEXT:    vmovaps {{.*#+}} xmm1 = <4.2E+1,u,2.0E+0,3.0E+0>
475; X64-AVX1-NEXT:    vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
476; X64-AVX1-NEXT:    vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3],mem[4,5,6,7]
477; X64-AVX1-NEXT:    vmovaps {{.*#+}} ymm1 = [4.0E+0,5.0E+0,6.0E+0,7.0E+0]
478; X64-AVX1-NEXT:    retq
479;
480; X86-AVX2-LABEL: elt1_v8f64:
481; X86-AVX2:       # %bb.0:
482; X86-AVX2-NEXT:    vmovaps {{.*#+}} xmm0 = <4.2E+1,u,2.0E+0,3.0E+0>
483; X86-AVX2-NEXT:    vmovhps {{.*#+}} xmm0 = xmm0[0,1],mem[0,1]
484; X86-AVX2-NEXT:    vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3],mem[4,5,6,7]
485; X86-AVX2-NEXT:    vmovaps {{.*#+}} ymm1 = [4.0E+0,5.0E+0,6.0E+0,7.0E+0]
486; X86-AVX2-NEXT:    retl
487;
488; X64-AVX2-LABEL: elt1_v8f64:
489; X64-AVX2:       # %bb.0:
490; X64-AVX2-NEXT:    vmovaps {{.*#+}} xmm1 = <4.2E+1,u,2.0E+0,3.0E+0>
491; X64-AVX2-NEXT:    vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
492; X64-AVX2-NEXT:    vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3],mem[4,5,6,7]
493; X64-AVX2-NEXT:    vmovaps {{.*#+}} ymm1 = [4.0E+0,5.0E+0,6.0E+0,7.0E+0]
494; X64-AVX2-NEXT:    retq
495;
496; X86-AVX512F-LABEL: elt1_v8f64:
497; X86-AVX512F:       # %bb.0:
498; X86-AVX512F-NEXT:    vmovaps {{.*#+}} xmm0 = <4.2E+1,u,2.0E+0,3.0E+0,4.0E+0,5.0E+0,6.0E+0,7.0E+0>
499; X86-AVX512F-NEXT:    vmovhps {{.*#+}} xmm0 = xmm0[0,1],mem[0,1]
500; X86-AVX512F-NEXT:    vmovaps {{.*#+}} zmm1 = <4.2E+1,u,2.0E+0,3.0E+0,4.0E+0,5.0E+0,6.0E+0,7.0E+0>
501; X86-AVX512F-NEXT:    vinsertf32x4 $0, %xmm0, %zmm1, %zmm0
502; X86-AVX512F-NEXT:    retl
503;
504; X64-AVX512F-LABEL: elt1_v8f64:
505; X64-AVX512F:       # %bb.0:
506; X64-AVX512F-NEXT:    vmovaps {{.*#+}} xmm1 = <4.2E+1,u,2.0E+0,3.0E+0,4.0E+0,5.0E+0,6.0E+0,7.0E+0>
507; X64-AVX512F-NEXT:    vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
508; X64-AVX512F-NEXT:    vmovaps {{.*#+}} zmm1 = <4.2E+1,u,2.0E+0,3.0E+0,4.0E+0,5.0E+0,6.0E+0,7.0E+0>
509; X64-AVX512F-NEXT:    vinsertf32x4 $0, %xmm0, %zmm1, %zmm0
510; X64-AVX512F-NEXT:    retq
511   %ins = insertelement <8 x double> <double 42.0, double 1.0, double 2.0, double 3.0, double 4.0, double 5.0, double 6.0, double 7.0>, double %x, i32 1
512   ret <8 x double> %ins
513}
514
515