1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mcpu=generic -mtriple=i386-apple-darwin -verify-machineinstrs -no-integrated-as | FileCheck %s 3 4; There should be no stack manipulations between the inline asm and ret. 5define x86_fp80 @test1() { 6; CHECK-LABEL: test1: 7; CHECK: ## %bb.0: 8; CHECK-NEXT: ## InlineAsm Start 9; CHECK-NEXT: fld0 10; CHECK-NEXT: ## InlineAsm End 11; CHECK-NEXT: retl 12 %tmp85 = call x86_fp80 asm sideeffect "fld0", "={st(0)}"() 13 ret x86_fp80 %tmp85 14} 15 16define double @test2() { 17; CHECK-LABEL: test2: 18; CHECK: ## %bb.0: 19; CHECK-NEXT: ## InlineAsm Start 20; CHECK-NEXT: fld0 21; CHECK-NEXT: ## InlineAsm End 22; CHECK-NEXT: retl 23 %tmp85 = call double asm sideeffect "fld0", "={st(0)}"() 24 ret double %tmp85 25} 26 27; Setting up argument in st(0) should be a single fld. 28; Asm consumes stack, nothing should be popped. 29define void @test3(x86_fp80 %X) { 30; CHECK-LABEL: test3: 31; CHECK: ## %bb.0: 32; CHECK-NEXT: fldt {{[0-9]+}}(%esp) 33; CHECK-NEXT: ## InlineAsm Start 34; CHECK-NEXT: frob 35; CHECK-NEXT: ## InlineAsm End 36; CHECK-NEXT: retl 37 call void asm sideeffect "frob ", "{st(0)},~{st},~{dirflag},~{fpsr},~{flags}"( x86_fp80 %X) 38 ret void 39} 40 41define void @test4(double %X) { 42; CHECK-LABEL: test4: 43; CHECK: ## %bb.0: 44; CHECK-NEXT: fldl {{[0-9]+}}(%esp) 45; CHECK-NEXT: ## InlineAsm Start 46; CHECK-NEXT: frob 47; CHECK-NEXT: ## InlineAsm End 48; CHECK-NEXT: retl 49 call void asm sideeffect "frob ", "{st(0)},~{st},~{dirflag},~{fpsr},~{flags}"( double %X) 50 ret void 51} 52 53; Same as test3/4, but using value from fadd. 54; The fadd can be done in xmm or x87 regs - we don't test that. 55define void @test5(double %X) { 56; CHECK-LABEL: test5: 57; CHECK: ## %bb.0: 58; CHECK-NEXT: fldl {{[0-9]+}}(%esp) 59; CHECK-NEXT: fadds LCPI4_0 60; CHECK-NEXT: ## InlineAsm Start 61; CHECK-NEXT: frob 62; CHECK-NEXT: ## InlineAsm End 63; CHECK-NEXT: retl 64 %Y = fadd double %X, 123.0 65 call void asm sideeffect "frob ", "{st(0)},~{st},~{dirflag},~{fpsr},~{flags}"( double %Y) 66 ret void 67} 68 69define void @test6(double %A, double %B, double %C, double %D, double %E) nounwind { 70; CHECK-LABEL: test6: 71; CHECK: ## %bb.0: ## %entry 72; CHECK-NEXT: fldl {{[0-9]+}}(%esp) 73; CHECK-NEXT: fldl {{[0-9]+}}(%esp) 74; CHECK-NEXT: fldl {{[0-9]+}}(%esp) 75; CHECK-NEXT: fldl {{[0-9]+}}(%esp) 76; CHECK-NEXT: fldl {{[0-9]+}}(%esp) 77; CHECK-NEXT: ## InlineAsm Start 78; CHECK-NEXT: foo %st(0) %st(0) 79; CHECK-NEXT: ## InlineAsm End 80; CHECK-NEXT: fstp %st(0) 81; CHECK-NEXT: ## InlineAsm Start 82; CHECK-NEXT: bar %st(1) %st(0) 83; CHECK-NEXT: ## InlineAsm End 84; CHECK-NEXT: fstp %st(1) 85; CHECK-NEXT: fstp %st(0) 86; CHECK-NEXT: ## InlineAsm Start 87; CHECK-NEXT: baz %st(1) %st(0) 88; CHECK-NEXT: ## InlineAsm End 89; CHECK-NEXT: fstp %st(0) 90; CHECK-NEXT: ## InlineAsm Start 91; CHECK-NEXT: baz %st(0) 92; CHECK-NEXT: ## InlineAsm End 93; CHECK-NEXT: fstp %st(0) 94; CHECK-NEXT: retl 95; CHECK-NEXT: ## -- End function 96entry: 97; Uses the same value twice, should have one fstp after the asm. 98 tail call void asm sideeffect "foo $0 $1", "f,f,~{dirflag},~{fpsr},~{flags}"( double %A, double %A ) nounwind 99; Uses two different values, should be in st(0)/st(1) and both be popped. 100 tail call void asm sideeffect "bar $0 $1", "f,f,~{dirflag},~{fpsr},~{flags}"( double %B, double %C ) nounwind 101; Uses two different values, one of which isn't killed in this asm, it should not be popped after the asm. 102 tail call void asm sideeffect "baz $0 $1", "f,f,~{dirflag},~{fpsr},~{flags}"( double %D, double %E ) nounwind 103; This is the last use of %D, so it should be popped after. 104 tail call void asm sideeffect "baz $0", "f,~{dirflag},~{fpsr},~{flags}"( double %D ) nounwind 105 ret void 106} 107 108; PR4185 109; Passing a non-killed value to asm in {st}. 110; Make sure it is duped before. 111; asm kills st(0), so we shouldn't pop anything 112; A valid alternative would be to remat the constant pool load before each 113; inline asm. 114define void @testPR4185() { 115; CHECK-LABEL: testPR4185: 116; CHECK: ## %bb.0: ## %return 117; CHECK-NEXT: flds LCPI6_0 118; CHECK-NEXT: fld %st(0) 119; CHECK-NEXT: ## InlineAsm Start 120; CHECK-NEXT: fistpl %st(0) 121; CHECK-NEXT: ## InlineAsm End 122; CHECK-NEXT: ## InlineAsm Start 123; CHECK-NEXT: fistpl %st(0) 124; CHECK-NEXT: ## InlineAsm End 125; CHECK-NEXT: retl 126return: 127 call void asm sideeffect "fistpl $0", "{st},~{st}"(double 1.000000e+06) 128 call void asm sideeffect "fistpl $0", "{st},~{st}"(double 1.000000e+06) 129 ret void 130} 131 132; Passing a non-killed value through asm in {st}. 133; Make sure it is not duped before. 134; Second asm kills st(0), so we shouldn't pop anything 135; A valid alternative would be to remat the constant pool load before each inline asm. 136define void @testPR4185b() { 137; CHECK-LABEL: testPR4185b: 138; CHECK: ## %bb.0: ## %return 139; CHECK-NEXT: flds LCPI7_0 140; CHECK-NEXT: ## InlineAsm Start 141; CHECK-NEXT: fistl %st(0) 142; CHECK-NEXT: ## InlineAsm End 143; CHECK-NEXT: ## InlineAsm Start 144; CHECK-NEXT: fistpl %st(0) 145; CHECK-NEXT: ## InlineAsm End 146; CHECK-NEXT: retl 147return: 148 call void asm sideeffect "fistl $0", "{st}"(double 1.000000e+06) 149 call void asm sideeffect "fistpl $0", "{st},~{st}"(double 1.000000e+06) 150 ret void 151} 152 153; PR4459 154; The return value from ceil must be duped before being consumed by asm. 155define void @testPR4459(x86_fp80 %a) { 156; CHECK-LABEL: testPR4459: 157; CHECK: ## %bb.0: ## %entry 158; CHECK-NEXT: subl $28, %esp 159; CHECK-NEXT: .cfi_def_cfa_offset 32 160; CHECK-NEXT: fldt {{[0-9]+}}(%esp) 161; CHECK-NEXT: fstpt (%esp) 162; CHECK-NEXT: calll _ceil 163; CHECK-NEXT: fld %st(0) 164; CHECK-NEXT: ## InlineAsm Start 165; CHECK-NEXT: fistpl %st(0) 166; CHECK-NEXT: ## InlineAsm End 167; CHECK-NEXT: fstpt (%esp) 168; CHECK-NEXT: calll _test3 169; CHECK-NEXT: addl $28, %esp 170; CHECK-NEXT: retl 171entry: 172 %0 = call x86_fp80 @ceil(x86_fp80 %a) 173 call void asm sideeffect "fistpl $0", "{st},~{st}"( x86_fp80 %0) 174 call void @test3(x86_fp80 %0 ) 175 ret void 176} 177declare x86_fp80 @ceil(x86_fp80) 178 179; PR4484 180; test1 leaves a value on the stack that is needed after the asm. 181; Load %a from stack after ceil 182; Set up call to test. 183define void @testPR4484(x86_fp80 %a) { 184; CHECK-LABEL: testPR4484: 185; CHECK: ## %bb.0: ## %entry 186; CHECK-NEXT: subl $28, %esp 187; CHECK-NEXT: .cfi_def_cfa_offset 32 188; CHECK-NEXT: fldt {{[0-9]+}}(%esp) 189; CHECK-NEXT: fstpt {{[0-9]+}}(%esp) ## 10-byte Folded Spill 190; CHECK-NEXT: calll _test1 191; CHECK-NEXT: fldt {{[0-9]+}}(%esp) ## 10-byte Folded Reload 192; CHECK-NEXT: ## InlineAsm Start 193; CHECK-NEXT: fistpl %st(0) 194; CHECK-NEXT: ## InlineAsm End 195; CHECK-NEXT: fstpt (%esp) 196; CHECK-NEXT: calll _test3 197; CHECK-NEXT: addl $28, %esp 198; CHECK-NEXT: retl 199entry: 200 %0 = call x86_fp80 @test1() 201 call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %a) 202 call void @test3(x86_fp80 %0) 203 ret void 204} 205 206; PR4485 207define void @testPR4485(x86_fp80* %a) { 208; CHECK-LABEL: testPR4485: 209; CHECK: ## %bb.0: ## %entry 210; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 211; CHECK-NEXT: fldt (%eax) 212; CHECK-NEXT: flds LCPI10_0 213; CHECK-NEXT: fmul %st(0), %st(1) 214; CHECK-NEXT: flds LCPI10_1 215; CHECK-NEXT: fmul %st(0), %st(2) 216; CHECK-NEXT: fxch %st(2) 217; CHECK-NEXT: ## InlineAsm Start 218; CHECK-NEXT: fistpl %st(0) 219; CHECK-NEXT: ## InlineAsm End 220; CHECK-NEXT: fldt (%eax) 221; CHECK-NEXT: fmulp %st(1) 222; CHECK-NEXT: fmulp %st(1) 223; CHECK-NEXT: ## InlineAsm Start 224; CHECK-NEXT: fistpl %st(0) 225; CHECK-NEXT: ## InlineAsm End 226; CHECK-NEXT: retl 227entry: 228 %0 = load x86_fp80, x86_fp80* %a, align 16 229 %1 = fmul x86_fp80 %0, 0xK4006B400000000000000 230 %2 = fmul x86_fp80 %1, 0xK4012F424000000000000 231 tail call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %2) 232 %3 = load x86_fp80, x86_fp80* %a, align 16 233 %4 = fmul x86_fp80 %3, 0xK4006B400000000000000 234 %5 = fmul x86_fp80 %4, 0xK4012F424000000000000 235 tail call void asm sideeffect "fistpl $0", "{st},~{st}"(x86_fp80 %5) 236 ret void 237} 238 239; An input argument in a fixed position is implicitly popped by the asm only if 240; the input argument is tied to an output register, or it is in the clobber list. 241; The clobber list case is tested above. 242; 243; This doesn't implicitly pop the stack: 244; 245; void fist1(long double x, int *p) { 246; asm volatile ("fistl %1" : : "t"(x), "m"(*p)); 247; } 248define void @fist1(x86_fp80 %x, i32* %p) nounwind ssp { 249; CHECK-LABEL: fist1: 250; CHECK: ## %bb.0: ## %entry 251; CHECK-NEXT: fldt {{[0-9]+}}(%esp) 252; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 253; CHECK-NEXT: ## InlineAsm Start 254; CHECK-NEXT: fistl (%eax) 255; CHECK-NEXT: ## InlineAsm End 256; CHECK-NEXT: fstp %st(0) 257; CHECK-NEXT: retl 258; CHECK-NEXT: ## -- End function 259entry: 260 tail call void asm sideeffect "fistl $1", "{st},*m,~{memory},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %x, i32* %p) nounwind 261 ret void 262} 263 264; Here, the input operand is tied to an output which means that is is 265; implicitly popped (and then the output is implicitly pushed). 266; 267; long double fist2(long double x, int *p) { 268; long double y; 269; asm ("fistl %1" : "=&t"(y) : "0"(x), "m"(*p) : "memory"); 270; return y; 271; } 272define x86_fp80 @fist2(x86_fp80 %x, i32* %p) nounwind ssp { 273; CHECK-LABEL: fist2: 274; CHECK: ## %bb.0: ## %entry 275; CHECK-NEXT: fldt {{[0-9]+}}(%esp) 276; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 277; CHECK-NEXT: ## InlineAsm Start 278; CHECK-NEXT: fistl (%eax) 279; CHECK-NEXT: ## InlineAsm End 280; CHECK-NEXT: retl 281; CHECK-NEXT: ## -- End function 282entry: 283 %0 = tail call x86_fp80 asm "fistl $2", "=&{st},0,*m,~{memory},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %x, i32* %p) nounwind 284 ret x86_fp80 %0 285} 286 287; An 'f' constraint is never implicitly popped: 288; 289; void fucomp1(long double x, long double y) { 290; asm volatile ("fucomp %1" : : "t"(x), "f"(y) : "st"); 291; } 292define void @fucomp1(x86_fp80 %x, x86_fp80 %y) nounwind ssp { 293; CHECK-LABEL: fucomp1: 294; CHECK: ## %bb.0: ## %entry 295; CHECK-NEXT: fldt {{[0-9]+}}(%esp) 296; CHECK-NEXT: fldt {{[0-9]+}}(%esp) 297; CHECK-NEXT: fxch %st(1) 298; CHECK-NEXT: ## InlineAsm Start 299; CHECK-NEXT: fucomp %st(1) 300; CHECK-NEXT: ## InlineAsm End 301; CHECK-NEXT: fstp %st(0) 302; CHECK-NEXT: retl 303; CHECK-NEXT: ## -- End function 304entry: 305 tail call void asm sideeffect "fucomp $1", "{st},f,~{st},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %x, x86_fp80 %y) nounwind 306 ret void 307} 308 309; The 'u' constraint is only popped implicitly when clobbered: 310; 311; void fucomp2(long double x, long double y) { 312; asm volatile ("fucomp %1" : : "t"(x), "u"(y) : "st"); 313; } 314; 315; void fucomp3(long double x, long double y) { 316; asm volatile ("fucompp %1" : : "t"(x), "u"(y) : "st", "st(1)"); 317; } 318; 319define void @fucomp2(x86_fp80 %x, x86_fp80 %y) nounwind ssp { 320; CHECK-LABEL: fucomp2: 321; CHECK: ## %bb.0: ## %entry 322; CHECK-NEXT: fldt {{[0-9]+}}(%esp) 323; CHECK-NEXT: fldt {{[0-9]+}}(%esp) 324; CHECK-NEXT: fxch %st(1) 325; CHECK-NEXT: ## InlineAsm Start 326; CHECK-NEXT: fucomp %st(1) 327; CHECK-NEXT: ## InlineAsm End 328; CHECK-NEXT: fstp %st(0) 329; CHECK-NEXT: retl 330; CHECK-NEXT: ## -- End function 331entry: 332 tail call void asm sideeffect "fucomp $1", "{st},{st(1)},~{st},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %x, x86_fp80 %y) nounwind 333 ret void 334} 335 336define void @fucomp3(x86_fp80 %x, x86_fp80 %y) nounwind ssp { 337; CHECK-LABEL: fucomp3: 338; CHECK: ## %bb.0: ## %entry 339; CHECK-NEXT: fldt {{[0-9]+}}(%esp) 340; CHECK-NEXT: fldt {{[0-9]+}}(%esp) 341; CHECK-NEXT: fxch %st(1) 342; CHECK-NEXT: ## InlineAsm Start 343; CHECK-NEXT: fucompp %st(1) 344; CHECK-NEXT: ## InlineAsm End 345; CHECK-NEXT: retl 346; CHECK-NEXT: ## -- End function 347entry: 348 tail call void asm sideeffect "fucompp $1", "{st},{st(1)},~{st},~{st(1)},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %x, x86_fp80 %y) nounwind 349 ret void 350} 351 352; One input, two outputs, one dead output. 353%complex = type { float, float } 354define float @sincos1(float %x) nounwind ssp { 355; CHECK-LABEL: sincos1: 356; CHECK: ## %bb.0: ## %entry 357; CHECK-NEXT: flds {{[0-9]+}}(%esp) 358; CHECK-NEXT: ## InlineAsm Start 359; CHECK-NEXT: sincos 360; CHECK-NEXT: ## InlineAsm End 361; CHECK-NEXT: fstp %st(1) 362; CHECK-NEXT: retl 363; CHECK-NEXT: ## -- End function 364entry: 365 %0 = tail call %complex asm "sincos", "={st},={st(1)},0,~{dirflag},~{fpsr},~{flags}"(float %x) nounwind 366 %asmresult = extractvalue %complex %0, 0 367 ret float %asmresult 368} 369 370; Same thing, swapped output operands. 371define float @sincos2(float %x) nounwind ssp { 372; CHECK-LABEL: sincos2: 373; CHECK: ## %bb.0: ## %entry 374; CHECK-NEXT: flds {{[0-9]+}}(%esp) 375; CHECK-NEXT: ## InlineAsm Start 376; CHECK-NEXT: sincos 377; CHECK-NEXT: ## InlineAsm End 378; CHECK-NEXT: fstp %st(1) 379; CHECK-NEXT: retl 380; CHECK-NEXT: ## -- End function 381entry: 382 %0 = tail call %complex asm "sincos", "={st(1)},={st},1,~{dirflag},~{fpsr},~{flags}"(float %x) nounwind 383 %asmresult = extractvalue %complex %0, 1 384 ret float %asmresult 385} 386 387; Clobber st(0) after it was live-out/dead from the previous asm. 388; Load x, make a copy for the second asm. 389; Discard dead result in st(0), bring x to the top. 390; x is now in st(0) for the second asm 391; Discard both results. 392define float @sincos3(float %x) nounwind ssp { 393; CHECK-LABEL: sincos3: 394; CHECK: ## %bb.0: ## %entry 395; CHECK-NEXT: flds {{[0-9]+}}(%esp) 396; CHECK-NEXT: fld %st(0) 397; CHECK-NEXT: ## InlineAsm Start 398; CHECK-NEXT: sincos 399; CHECK-NEXT: ## InlineAsm End 400; CHECK-NEXT: fstp %st(0) 401; CHECK-NEXT: fxch %st(1) 402; CHECK-NEXT: ## InlineAsm Start 403; CHECK-NEXT: sincos 404; CHECK-NEXT: ## InlineAsm End 405; CHECK-NEXT: fstp %st(1) 406; CHECK-NEXT: fstp %st(0) 407; CHECK-NEXT: retl 408; CHECK-NEXT: ## -- End function 409entry: 410 %0 = tail call %complex asm sideeffect "sincos", "={st(1)},={st},1,~{dirflag},~{fpsr},~{flags}"(float %x) nounwind 411 %1 = tail call %complex asm sideeffect "sincos", "={st(1)},={st},1,~{dirflag},~{fpsr},~{flags}"(float %x) nounwind 412 %asmresult = extractvalue %complex %0, 0 413 ret float %asmresult 414} 415 416; Pass the same value in two fixed stack slots. 417define i32 @PR10602() nounwind ssp { 418; CHECK-LABEL: PR10602: 419; CHECK: ## %bb.0: ## %entry 420; CHECK-NEXT: flds LCPI19_0 421; CHECK-NEXT: fld %st(0) 422; CHECK-NEXT: fxch %st(1) 423; CHECK-NEXT: ## InlineAsm Start 424; CHECK-NEXT: fcomi %st(1), %st(0); pushf; pop %eax 425; CHECK-NEXT: ## InlineAsm End 426; CHECK-NEXT: fstp %st(0) 427; CHECK-NEXT: fstp %st(0) 428; CHECK-NEXT: retl 429; CHECK-NEXT: ## -- End function 430entry: 431 %0 = tail call i32 asm "fcomi $2, $1; pushf; pop $0", "=r,{st},{st(1)},~{dirflag},~{fpsr},~{flags}"(double 2.000000e+00, double 2.000000e+00) nounwind 432 ret i32 %0 433} 434 435; <rdar://problem/16952634> 436; X87 stackifier asserted when there was an ST register defined by an 437; inline-asm instruction and the ST register was live across another 438; inline-asm instruction. 439; 440; INLINEASM $frndint [sideeffect] [attdialect], $0:[regdef], %st0<imp-def,tied5>, $1:[reguse tiedto:$0], %st0<tied3>, $2:[clobber], early-clobber implicit dead %eflags 441; INLINEASM $fldcw $0 [sideeffect] [mayload] [attdialect], $0:[mem], undef %eax, 1, %noreg, 0, %noreg, $1:[clobber], early-clobber implicit dead %eflags 442; %fp0 = COPY %st0 443 444%struct.fpu_t = type { [8 x x86_fp80], x86_fp80, %struct.anon1, %struct.anon2, i32, i8, [15 x i8] } 445%struct.anon1 = type { i32, i32, i32 } 446%struct.anon2 = type { i32, i32, i32, i32 } 447 448@fpu = external global %struct.fpu_t, align 16 449 450; Function Attrs: ssp 451define void @test_live_st(i32 %a1) { 452; CHECK-LABEL: test_live_st: 453; CHECK: ## %bb.0: ## %entry 454; CHECK-NEXT: subl $12, %esp 455; CHECK-NEXT: .cfi_def_cfa_offset 16 456; CHECK-NEXT: fldt (%eax) 457; CHECK-NEXT: cmpl $1, {{[0-9]+}}(%esp) 458; CHECK-NEXT: jne LBB20_2 459; CHECK-NEXT: ## %bb.1: ## %sw.bb4.i 460; CHECK-NEXT: ## InlineAsm Start 461; CHECK-NEXT: frndint 462; CHECK-NEXT: ## InlineAsm End 463; CHECK-NEXT: ## InlineAsm Start 464; CHECK-NEXT: fldcw (%eax) 465; CHECK-NEXT: ## InlineAsm End 466; CHECK-NEXT: LBB20_2: ## %_Z5tointRKe.exit 467; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp) 468; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax 469; CHECK-NEXT: movw $3199, {{[0-9]+}}(%esp) ## imm = 0xC7F 470; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 471; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp) 472; CHECK-NEXT: fistpl {{[0-9]+}}(%esp) 473; CHECK-NEXT: fldcw {{[0-9]+}}(%esp) 474; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax 475; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp) 476; CHECK-NEXT: fildl {{[0-9]+}}(%esp) 477; CHECK-NEXT: movl L_fpu$non_lazy_ptr, %eax 478; CHECK-NEXT: fstpt 128(%eax) 479; CHECK-NEXT: addl $12, %esp 480; CHECK-NEXT: retl 481entry: 482 %0 = load x86_fp80, x86_fp80* undef, align 16 483 %cond = icmp eq i32 %a1, 1 484 br i1 %cond, label %sw.bb4.i, label %_Z5tointRKe.exit 485 486sw.bb4.i: 487 %1 = call x86_fp80 asm sideeffect "frndint", "={st},0,~{dirflag},~{fpsr},~{flags}"(x86_fp80 %0) 488 call void asm sideeffect "fldcw $0", "*m,~{dirflag},~{fpsr},~{flags}"(i32* undef) 489 br label %_Z5tointRKe.exit 490 491_Z5tointRKe.exit: 492 %result.0.i = phi x86_fp80 [ %1, %sw.bb4.i ], [ %0, %entry ] 493 %conv.i1814 = fptosi x86_fp80 %result.0.i to i32 494 %conv626 = sitofp i32 %conv.i1814 to x86_fp80 495 store x86_fp80 %conv626, x86_fp80* getelementptr inbounds (%struct.fpu_t, %struct.fpu_t* @fpu, i32 0, i32 1) 496 br label %return 497 498return: 499 ret void 500} 501 502; Check that x87 stackifier is correctly rewriting FP registers to ST registers. 503define double @test_operand_rewrite() { 504; CHECK-LABEL: test_operand_rewrite: 505; CHECK: ## %bb.0: ## %entry 506; CHECK-NEXT: ## InlineAsm Start 507; CHECK-NEXT: foo %st(0), %st(1) 508; CHECK-NEXT: ## InlineAsm End 509; CHECK-NEXT: fsubp %st(1) 510; CHECK-NEXT: retl 511entry: 512 %0 = tail call { double, double } asm sideeffect "foo $0, $1", "={st},={st(1)},~{dirflag},~{fpsr},~{flags}"() 513 %asmresult = extractvalue { double, double } %0, 0 514 %asmresult1 = extractvalue { double, double } %0, 1 515 %sub = fsub double %asmresult, %asmresult1 516 ret double %sub 517} 518