1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown                                          | FileCheck %s --check-prefix=SSE
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -fast-isel -fast-isel-abort=1            | FileCheck %s --check-prefix=SSE
4; RUN: llc < %s -mtriple=x86_64-unknown-unknown                               -mattr=avx | FileCheck %s --check-prefix=AVX
5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -fast-isel -fast-isel-abort=1 -mattr=avx | FileCheck %s --check-prefix=AVX
6; RUN: llc < %s -mtriple=x86_64-unknown-unknown                               -mattr=avx512f | FileCheck %s --check-prefix=AVX512
7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -fast-isel -fast-isel-abort=1 -mattr=avx512f | FileCheck %s --check-prefix=AVX512
8
9; Test all cmp predicates that can be used with SSE.
10
11define float @select_fcmp_oeq_f32(float %a, float %b, float %c, float %d) {
12; SSE-LABEL: select_fcmp_oeq_f32:
13; SSE:       # BB#0:
14; SSE-NEXT:    cmpeqss %xmm1, %xmm0
15; SSE-NEXT:    andps %xmm0, %xmm2
16; SSE-NEXT:    andnps %xmm3, %xmm0
17; SSE-NEXT:    orps %xmm2, %xmm0
18; SSE-NEXT:    retq
19;
20; AVX-LABEL: select_fcmp_oeq_f32:
21; AVX:       # BB#0:
22; AVX-NEXT:    vcmpeqss %xmm1, %xmm0, %xmm0
23; AVX-NEXT:    vblendvps %xmm0, %xmm2, %xmm3, %xmm0
24; AVX-NEXT:    retq
25;
26; AVX512-LABEL: select_fcmp_oeq_f32:
27; AVX512:       # BB#0:
28; AVX512-NEXT:    vcmpeqss %xmm1, %xmm0, %k1
29; AVX512-NEXT:    vmovss %xmm2, %xmm0, %xmm3 {%k1}
30; AVX512-NEXT:    vmovaps %xmm3, %xmm0
31; AVX512-NEXT:    retq
32;
33  %1 = fcmp oeq float %a, %b
34  %2 = select i1 %1, float %c, float %d
35  ret float %2
36}
37
38define double @select_fcmp_oeq_f64(double %a, double %b, double %c, double %d) {
39; SSE-LABEL: select_fcmp_oeq_f64:
40; SSE:       # BB#0:
41; SSE-NEXT:    cmpeqsd %xmm1, %xmm0
42; SSE-NEXT:    andps %xmm0, %xmm2
43; SSE-NEXT:    andnps %xmm3, %xmm0
44; SSE-NEXT:    orps %xmm2, %xmm0
45; SSE-NEXT:    retq
46;
47; AVX-LABEL: select_fcmp_oeq_f64:
48; AVX:       # BB#0:
49; AVX-NEXT:    vcmpeqsd %xmm1, %xmm0, %xmm0
50; AVX-NEXT:    vblendvpd %xmm0, %xmm2, %xmm3, %xmm0
51; AVX-NEXT:    retq
52;
53; AVX512-LABEL: select_fcmp_oeq_f64:
54; AVX512:       # BB#0:
55; AVX512-NEXT:    vcmpeqsd %xmm1, %xmm0, %k1
56; AVX512-NEXT:    vmovsd %xmm2, %xmm0, %xmm3 {%k1}
57; AVX512-NEXT:    vmovapd %xmm3, %xmm0
58; AVX512-NEXT:    retq
59;
60  %1 = fcmp oeq double %a, %b
61  %2 = select i1 %1, double %c, double %d
62  ret double %2
63}
64
65define float @select_fcmp_ogt_f32(float %a, float %b, float %c, float %d) {
66; SSE-LABEL: select_fcmp_ogt_f32:
67; SSE:       # BB#0:
68; SSE-NEXT:    cmpltss %xmm0, %xmm1
69; SSE-NEXT:    andps %xmm1, %xmm2
70; SSE-NEXT:    andnps %xmm3, %xmm1
71; SSE-NEXT:    orps %xmm2, %xmm1
72; SSE-NEXT:    movaps %xmm1, %xmm0
73; SSE-NEXT:    retq
74;
75; AVX-LABEL: select_fcmp_ogt_f32:
76; AVX:       # BB#0:
77; AVX-NEXT:    vcmpltss %xmm0, %xmm1, %xmm0
78; AVX-NEXT:    vblendvps %xmm0, %xmm2, %xmm3, %xmm0
79; AVX-NEXT:    retq
80;
81; AVX512-LABEL: select_fcmp_ogt_f32:
82; AVX512:       # BB#0:
83; AVX512-NEXT:    vcmpltss %xmm0, %xmm1, %k1
84; AVX512-NEXT:    vmovss %xmm2, %xmm0, %xmm3 {%k1}
85; AVX512-NEXT:    vmovaps %xmm3, %xmm0
86; AVX512-NEXT:    retq
87;
88  %1 = fcmp ogt float %a, %b
89  %2 = select i1 %1, float %c, float %d
90  ret float %2
91}
92
93define double @select_fcmp_ogt_f64(double %a, double %b, double %c, double %d) {
94; SSE-LABEL: select_fcmp_ogt_f64:
95; SSE:       # BB#0:
96; SSE-NEXT:    cmpltsd %xmm0, %xmm1
97; SSE-NEXT:    andps %xmm1, %xmm2
98; SSE-NEXT:    andnps %xmm3, %xmm1
99; SSE-NEXT:    orps %xmm2, %xmm1
100; SSE-NEXT:    movaps %xmm1, %xmm0
101; SSE-NEXT:    retq
102;
103; AVX-LABEL: select_fcmp_ogt_f64:
104; AVX:       # BB#0:
105; AVX-NEXT:    vcmpltsd %xmm0, %xmm1, %xmm0
106; AVX-NEXT:    vblendvpd %xmm0, %xmm2, %xmm3, %xmm0
107; AVX-NEXT:    retq
108;
109; AVX512-LABEL: select_fcmp_ogt_f64:
110; AVX512:       # BB#0:
111; AVX512-NEXT:    vcmpltsd %xmm0, %xmm1, %k1
112; AVX512-NEXT:    vmovsd %xmm2, %xmm0, %xmm3 {%k1}
113; AVX512-NEXT:    vmovapd %xmm3, %xmm0
114; AVX512-NEXT:    retq
115;
116  %1 = fcmp ogt double %a, %b
117  %2 = select i1 %1, double %c, double %d
118  ret double %2
119}
120
121define float @select_fcmp_oge_f32(float %a, float %b, float %c, float %d) {
122; SSE-LABEL: select_fcmp_oge_f32:
123; SSE:       # BB#0:
124; SSE-NEXT:    cmpless %xmm0, %xmm1
125; SSE-NEXT:    andps %xmm1, %xmm2
126; SSE-NEXT:    andnps %xmm3, %xmm1
127; SSE-NEXT:    orps %xmm2, %xmm1
128; SSE-NEXT:    movaps %xmm1, %xmm0
129; SSE-NEXT:    retq
130;
131; AVX-LABEL: select_fcmp_oge_f32:
132; AVX:       # BB#0:
133; AVX-NEXT:    vcmpless %xmm0, %xmm1, %xmm0
134; AVX-NEXT:    vblendvps %xmm0, %xmm2, %xmm3, %xmm0
135; AVX-NEXT:    retq
136;
137; AVX512-LABEL: select_fcmp_oge_f32:
138; AVX512:       # BB#0:
139; AVX512-NEXT:    vcmpless %xmm0, %xmm1, %k1
140; AVX512-NEXT:    vmovss %xmm2, %xmm0, %xmm3 {%k1}
141; AVX512-NEXT:    vmovaps %xmm3, %xmm0
142; AVX512-NEXT:    retq
143;
144  %1 = fcmp oge float %a, %b
145  %2 = select i1 %1, float %c, float %d
146  ret float %2
147}
148
149define double @select_fcmp_oge_f64(double %a, double %b, double %c, double %d) {
150; SSE-LABEL: select_fcmp_oge_f64:
151; SSE:       # BB#0:
152; SSE-NEXT:    cmplesd %xmm0, %xmm1
153; SSE-NEXT:    andps %xmm1, %xmm2
154; SSE-NEXT:    andnps %xmm3, %xmm1
155; SSE-NEXT:    orps %xmm2, %xmm1
156; SSE-NEXT:    movaps %xmm1, %xmm0
157; SSE-NEXT:    retq
158;
159; AVX-LABEL: select_fcmp_oge_f64:
160; AVX:       # BB#0:
161; AVX-NEXT:    vcmplesd %xmm0, %xmm1, %xmm0
162; AVX-NEXT:    vblendvpd %xmm0, %xmm2, %xmm3, %xmm0
163; AVX-NEXT:    retq
164;
165; AVX512-LABEL: select_fcmp_oge_f64:
166; AVX512:       # BB#0:
167; AVX512-NEXT:    vcmplesd %xmm0, %xmm1, %k1
168; AVX512-NEXT:    vmovsd %xmm2, %xmm0, %xmm3 {%k1}
169; AVX512-NEXT:    vmovapd %xmm3, %xmm0
170; AVX512-NEXT:    retq
171;
172  %1 = fcmp oge double %a, %b
173  %2 = select i1 %1, double %c, double %d
174  ret double %2
175}
176
177define float @select_fcmp_olt_f32(float %a, float %b, float %c, float %d) {
178; SSE-LABEL: select_fcmp_olt_f32:
179; SSE:       # BB#0:
180; SSE-NEXT:    cmpltss %xmm1, %xmm0
181; SSE-NEXT:    andps %xmm0, %xmm2
182; SSE-NEXT:    andnps %xmm3, %xmm0
183; SSE-NEXT:    orps %xmm2, %xmm0
184; SSE-NEXT:    retq
185;
186; AVX-LABEL: select_fcmp_olt_f32:
187; AVX:       # BB#0:
188; AVX-NEXT:    vcmpltss %xmm1, %xmm0, %xmm0
189; AVX-NEXT:    vblendvps %xmm0, %xmm2, %xmm3, %xmm0
190; AVX-NEXT:    retq
191;
192; AVX512-LABEL: select_fcmp_olt_f32:
193; AVX512:       # BB#0:
194; AVX512-NEXT:    vcmpltss %xmm1, %xmm0, %k1
195; AVX512-NEXT:    vmovss %xmm2, %xmm0, %xmm3 {%k1}
196; AVX512-NEXT:    vmovaps %xmm3, %xmm0
197; AVX512-NEXT:    retq
198;
199  %1 = fcmp olt float %a, %b
200  %2 = select i1 %1, float %c, float %d
201  ret float %2
202}
203
204define double @select_fcmp_olt_f64(double %a, double %b, double %c, double %d) {
205; SSE-LABEL: select_fcmp_olt_f64:
206; SSE:       # BB#0:
207; SSE-NEXT:    cmpltsd %xmm1, %xmm0
208; SSE-NEXT:    andps %xmm0, %xmm2
209; SSE-NEXT:    andnps %xmm3, %xmm0
210; SSE-NEXT:    orps %xmm2, %xmm0
211; SSE-NEXT:    retq
212;
213; AVX-LABEL: select_fcmp_olt_f64:
214; AVX:       # BB#0:
215; AVX-NEXT:    vcmpltsd %xmm1, %xmm0, %xmm0
216; AVX-NEXT:    vblendvpd %xmm0, %xmm2, %xmm3, %xmm0
217; AVX-NEXT:    retq
218;
219; AVX512-LABEL: select_fcmp_olt_f64:
220; AVX512:       # BB#0:
221; AVX512-NEXT:    vcmpltsd %xmm1, %xmm0, %k1
222; AVX512-NEXT:    vmovsd %xmm2, %xmm0, %xmm3 {%k1}
223; AVX512-NEXT:    vmovapd %xmm3, %xmm0
224; AVX512-NEXT:    retq
225;
226  %1 = fcmp olt double %a, %b
227  %2 = select i1 %1, double %c, double %d
228  ret double %2
229}
230
231define float @select_fcmp_ole_f32(float %a, float %b, float %c, float %d) {
232; SSE-LABEL: select_fcmp_ole_f32:
233; SSE:       # BB#0:
234; SSE-NEXT:    cmpless %xmm1, %xmm0
235; SSE-NEXT:    andps %xmm0, %xmm2
236; SSE-NEXT:    andnps %xmm3, %xmm0
237; SSE-NEXT:    orps %xmm2, %xmm0
238; SSE-NEXT:    retq
239;
240; AVX-LABEL: select_fcmp_ole_f32:
241; AVX:       # BB#0:
242; AVX-NEXT:    vcmpless %xmm1, %xmm0, %xmm0
243; AVX-NEXT:    vblendvps %xmm0, %xmm2, %xmm3, %xmm0
244; AVX-NEXT:    retq
245;
246; AVX512-LABEL: select_fcmp_ole_f32:
247; AVX512:       # BB#0:
248; AVX512-NEXT:    vcmpless %xmm1, %xmm0, %k1
249; AVX512-NEXT:    vmovss %xmm2, %xmm0, %xmm3 {%k1}
250; AVX512-NEXT:    vmovaps %xmm3, %xmm0
251; AVX512-NEXT:    retq
252;
253  %1 = fcmp ole float %a, %b
254  %2 = select i1 %1, float %c, float %d
255  ret float %2
256}
257
258define double @select_fcmp_ole_f64(double %a, double %b, double %c, double %d) {
259; SSE-LABEL: select_fcmp_ole_f64:
260; SSE:       # BB#0:
261; SSE-NEXT:    cmplesd %xmm1, %xmm0
262; SSE-NEXT:    andps %xmm0, %xmm2
263; SSE-NEXT:    andnps %xmm3, %xmm0
264; SSE-NEXT:    orps %xmm2, %xmm0
265; SSE-NEXT:    retq
266;
267; AVX-LABEL: select_fcmp_ole_f64:
268; AVX:       # BB#0:
269; AVX-NEXT:    vcmplesd %xmm1, %xmm0, %xmm0
270; AVX-NEXT:    vblendvpd %xmm0, %xmm2, %xmm3, %xmm0
271; AVX-NEXT:    retq
272;
273; AVX512-LABEL: select_fcmp_ole_f64:
274; AVX512:       # BB#0:
275; AVX512-NEXT:    vcmplesd %xmm1, %xmm0, %k1
276; AVX512-NEXT:    vmovsd %xmm2, %xmm0, %xmm3 {%k1}
277; AVX512-NEXT:    vmovapd %xmm3, %xmm0
278; AVX512-NEXT:    retq
279;
280  %1 = fcmp ole double %a, %b
281  %2 = select i1 %1, double %c, double %d
282  ret double %2
283}
284
285define float @select_fcmp_ord_f32(float %a, float %b, float %c, float %d) {
286; SSE-LABEL: select_fcmp_ord_f32:
287; SSE:       # BB#0:
288; SSE-NEXT:    cmpordss %xmm1, %xmm0
289; SSE-NEXT:    andps %xmm0, %xmm2
290; SSE-NEXT:    andnps %xmm3, %xmm0
291; SSE-NEXT:    orps %xmm2, %xmm0
292; SSE-NEXT:    retq
293;
294; AVX-LABEL: select_fcmp_ord_f32:
295; AVX:       # BB#0:
296; AVX-NEXT:    vcmpordss %xmm1, %xmm0, %xmm0
297; AVX-NEXT:    vblendvps %xmm0, %xmm2, %xmm3, %xmm0
298; AVX-NEXT:    retq
299;
300; AVX512-LABEL: select_fcmp_ord_f32:
301; AVX512:       # BB#0:
302; AVX512-NEXT:    vcmpordss %xmm1, %xmm0, %k1
303; AVX512-NEXT:    vmovss %xmm2, %xmm0, %xmm3 {%k1}
304; AVX512-NEXT:    vmovaps %xmm3, %xmm0
305; AVX512-NEXT:    retq
306;
307  %1 = fcmp ord float %a, %b
308  %2 = select i1 %1, float %c, float %d
309  ret float %2
310}
311
312define double @select_fcmp_ord_f64(double %a, double %b, double %c, double %d) {
313; SSE-LABEL: select_fcmp_ord_f64:
314; SSE:       # BB#0:
315; SSE-NEXT:    cmpordsd %xmm1, %xmm0
316; SSE-NEXT:    andps %xmm0, %xmm2
317; SSE-NEXT:    andnps %xmm3, %xmm0
318; SSE-NEXT:    orps %xmm2, %xmm0
319; SSE-NEXT:    retq
320;
321; AVX-LABEL: select_fcmp_ord_f64:
322; AVX:       # BB#0:
323; AVX-NEXT:    vcmpordsd %xmm1, %xmm0, %xmm0
324; AVX-NEXT:    vblendvpd %xmm0, %xmm2, %xmm3, %xmm0
325; AVX-NEXT:    retq
326;
327; AVX512-LABEL: select_fcmp_ord_f64:
328; AVX512:       # BB#0:
329; AVX512-NEXT:    vcmpordsd %xmm1, %xmm0, %k1
330; AVX512-NEXT:    vmovsd %xmm2, %xmm0, %xmm3 {%k1}
331; AVX512-NEXT:    vmovapd %xmm3, %xmm0
332; AVX512-NEXT:    retq
333;
334  %1 = fcmp ord double %a, %b
335  %2 = select i1 %1, double %c, double %d
336  ret double %2
337}
338
339define float @select_fcmp_uno_f32(float %a, float %b, float %c, float %d) {
340; SSE-LABEL: select_fcmp_uno_f32:
341; SSE:       # BB#0:
342; SSE-NEXT:    cmpunordss %xmm1, %xmm0
343; SSE-NEXT:    andps %xmm0, %xmm2
344; SSE-NEXT:    andnps %xmm3, %xmm0
345; SSE-NEXT:    orps %xmm2, %xmm0
346; SSE-NEXT:    retq
347;
348; AVX-LABEL: select_fcmp_uno_f32:
349; AVX:       # BB#0:
350; AVX-NEXT:    vcmpunordss %xmm1, %xmm0, %xmm0
351; AVX-NEXT:    vblendvps %xmm0, %xmm2, %xmm3, %xmm0
352; AVX-NEXT:    retq
353;
354; AVX512-LABEL: select_fcmp_uno_f32:
355; AVX512:       # BB#0:
356; AVX512-NEXT:    vcmpunordss %xmm1, %xmm0, %k1
357; AVX512-NEXT:    vmovss %xmm2, %xmm0, %xmm3 {%k1}
358; AVX512-NEXT:    vmovaps %xmm3, %xmm0
359; AVX512-NEXT:    retq
360;
361  %1 = fcmp uno float %a, %b
362  %2 = select i1 %1, float %c, float %d
363  ret float %2
364}
365
366define double @select_fcmp_uno_f64(double %a, double %b, double %c, double %d) {
367; SSE-LABEL: select_fcmp_uno_f64:
368; SSE:       # BB#0:
369; SSE-NEXT:    cmpunordsd %xmm1, %xmm0
370; SSE-NEXT:    andps %xmm0, %xmm2
371; SSE-NEXT:    andnps %xmm3, %xmm0
372; SSE-NEXT:    orps %xmm2, %xmm0
373; SSE-NEXT:    retq
374;
375; AVX-LABEL: select_fcmp_uno_f64:
376; AVX:       # BB#0:
377; AVX-NEXT:    vcmpunordsd %xmm1, %xmm0, %xmm0
378; AVX-NEXT:    vblendvpd %xmm0, %xmm2, %xmm3, %xmm0
379; AVX-NEXT:    retq
380;
381; AVX512-LABEL: select_fcmp_uno_f64:
382; AVX512:       # BB#0:
383; AVX512-NEXT:    vcmpunordsd %xmm1, %xmm0, %k1
384; AVX512-NEXT:    vmovsd %xmm2, %xmm0, %xmm3 {%k1}
385; AVX512-NEXT:    vmovapd %xmm3, %xmm0
386; AVX512-NEXT:    retq
387;
388  %1 = fcmp uno double %a, %b
389  %2 = select i1 %1, double %c, double %d
390  ret double %2
391}
392
393define float @select_fcmp_ugt_f32(float %a, float %b, float %c, float %d) {
394; SSE-LABEL: select_fcmp_ugt_f32:
395; SSE:       # BB#0:
396; SSE-NEXT:    cmpnless %xmm1, %xmm0
397; SSE-NEXT:    andps %xmm0, %xmm2
398; SSE-NEXT:    andnps %xmm3, %xmm0
399; SSE-NEXT:    orps %xmm2, %xmm0
400; SSE-NEXT:    retq
401;
402; AVX-LABEL: select_fcmp_ugt_f32:
403; AVX:       # BB#0:
404; AVX-NEXT:    vcmpnless %xmm1, %xmm0, %xmm0
405; AVX-NEXT:    vblendvps %xmm0, %xmm2, %xmm3, %xmm0
406; AVX-NEXT:    retq
407;
408; AVX512-LABEL: select_fcmp_ugt_f32:
409; AVX512:       # BB#0:
410; AVX512-NEXT:    vcmpnless %xmm1, %xmm0, %k1
411; AVX512-NEXT:    vmovss %xmm2, %xmm0, %xmm3 {%k1}
412; AVX512-NEXT:    vmovaps %xmm3, %xmm0
413; AVX512-NEXT:    retq
414;
415  %1 = fcmp ugt float %a, %b
416  %2 = select i1 %1, float %c, float %d
417  ret float %2
418}
419
420define double @select_fcmp_ugt_f64(double %a, double %b, double %c, double %d) {
421; SSE-LABEL: select_fcmp_ugt_f64:
422; SSE:       # BB#0:
423; SSE-NEXT:    cmpnlesd %xmm1, %xmm0
424; SSE-NEXT:    andps %xmm0, %xmm2
425; SSE-NEXT:    andnps %xmm3, %xmm0
426; SSE-NEXT:    orps %xmm2, %xmm0
427; SSE-NEXT:    retq
428;
429; AVX-LABEL: select_fcmp_ugt_f64:
430; AVX:       # BB#0:
431; AVX-NEXT:    vcmpnlesd %xmm1, %xmm0, %xmm0
432; AVX-NEXT:    vblendvpd %xmm0, %xmm2, %xmm3, %xmm0
433; AVX-NEXT:    retq
434;
435; AVX512-LABEL: select_fcmp_ugt_f64:
436; AVX512:       # BB#0:
437; AVX512-NEXT:    vcmpnlesd %xmm1, %xmm0, %k1
438; AVX512-NEXT:    vmovsd %xmm2, %xmm0, %xmm3 {%k1}
439; AVX512-NEXT:    vmovapd %xmm3, %xmm0
440; AVX512-NEXT:    retq
441;
442  %1 = fcmp ugt double %a, %b
443  %2 = select i1 %1, double %c, double %d
444  ret double %2
445}
446
447define float @select_fcmp_uge_f32(float %a, float %b, float %c, float %d) {
448; SSE-LABEL: select_fcmp_uge_f32:
449; SSE:       # BB#0:
450; SSE-NEXT:    cmpnltss %xmm1, %xmm0
451; SSE-NEXT:    andps %xmm0, %xmm2
452; SSE-NEXT:    andnps %xmm3, %xmm0
453; SSE-NEXT:    orps %xmm2, %xmm0
454; SSE-NEXT:    retq
455;
456; AVX-LABEL: select_fcmp_uge_f32:
457; AVX:       # BB#0:
458; AVX-NEXT:    vcmpnltss %xmm1, %xmm0, %xmm0
459; AVX-NEXT:    vblendvps %xmm0, %xmm2, %xmm3, %xmm0
460; AVX-NEXT:    retq
461;
462; AVX512-LABEL: select_fcmp_uge_f32:
463; AVX512:       # BB#0:
464; AVX512-NEXT:    vcmpnltss %xmm1, %xmm0, %k1
465; AVX512-NEXT:    vmovss %xmm2, %xmm0, %xmm3 {%k1}
466; AVX512-NEXT:    vmovaps %xmm3, %xmm0
467; AVX512-NEXT:    retq
468;
469  %1 = fcmp uge float %a, %b
470  %2 = select i1 %1, float %c, float %d
471  ret float %2
472}
473
474define double @select_fcmp_uge_f64(double %a, double %b, double %c, double %d) {
475; SSE-LABEL: select_fcmp_uge_f64:
476; SSE:       # BB#0:
477; SSE-NEXT:    cmpnltsd %xmm1, %xmm0
478; SSE-NEXT:    andps %xmm0, %xmm2
479; SSE-NEXT:    andnps %xmm3, %xmm0
480; SSE-NEXT:    orps %xmm2, %xmm0
481; SSE-NEXT:    retq
482;
483; AVX-LABEL: select_fcmp_uge_f64:
484; AVX:       # BB#0:
485; AVX-NEXT:    vcmpnltsd %xmm1, %xmm0, %xmm0
486; AVX-NEXT:    vblendvpd %xmm0, %xmm2, %xmm3, %xmm0
487; AVX-NEXT:    retq
488;
489; AVX512-LABEL: select_fcmp_uge_f64:
490; AVX512:       # BB#0:
491; AVX512-NEXT:    vcmpnltsd %xmm1, %xmm0, %k1
492; AVX512-NEXT:    vmovsd %xmm2, %xmm0, %xmm3 {%k1}
493; AVX512-NEXT:    vmovapd %xmm3, %xmm0
494; AVX512-NEXT:    retq
495;
496  %1 = fcmp uge double %a, %b
497  %2 = select i1 %1, double %c, double %d
498  ret double %2
499}
500
501define float @select_fcmp_ult_f32(float %a, float %b, float %c, float %d) {
502; SSE-LABEL: select_fcmp_ult_f32:
503; SSE:       # BB#0:
504; SSE-NEXT:    cmpnless %xmm0, %xmm1
505; SSE-NEXT:    andps %xmm1, %xmm2
506; SSE-NEXT:    andnps %xmm3, %xmm1
507; SSE-NEXT:    orps %xmm2, %xmm1
508; SSE-NEXT:    movaps %xmm1, %xmm0
509; SSE-NEXT:    retq
510;
511; AVX-LABEL: select_fcmp_ult_f32:
512; AVX:       # BB#0:
513; AVX-NEXT:    vcmpnless %xmm0, %xmm1, %xmm0
514; AVX-NEXT:    vblendvps %xmm0, %xmm2, %xmm3, %xmm0
515; AVX-NEXT:    retq
516;
517; AVX512-LABEL: select_fcmp_ult_f32:
518; AVX512:       # BB#0:
519; AVX512-NEXT:    vcmpnless %xmm0, %xmm1, %k1
520; AVX512-NEXT:    vmovss %xmm2, %xmm0, %xmm3 {%k1}
521; AVX512-NEXT:    vmovaps %xmm3, %xmm0
522; AVX512-NEXT:    retq
523;
524  %1 = fcmp ult float %a, %b
525  %2 = select i1 %1, float %c, float %d
526  ret float %2
527}
528
529define double @select_fcmp_ult_f64(double %a, double %b, double %c, double %d) {
530; SSE-LABEL: select_fcmp_ult_f64:
531; SSE:       # BB#0:
532; SSE-NEXT:    cmpnlesd %xmm0, %xmm1
533; SSE-NEXT:    andps %xmm1, %xmm2
534; SSE-NEXT:    andnps %xmm3, %xmm1
535; SSE-NEXT:    orps %xmm2, %xmm1
536; SSE-NEXT:    movaps %xmm1, %xmm0
537; SSE-NEXT:    retq
538;
539; AVX-LABEL: select_fcmp_ult_f64:
540; AVX:       # BB#0:
541; AVX-NEXT:    vcmpnlesd %xmm0, %xmm1, %xmm0
542; AVX-NEXT:    vblendvpd %xmm0, %xmm2, %xmm3, %xmm0
543; AVX-NEXT:    retq
544;
545; AVX512-LABEL: select_fcmp_ult_f64:
546; AVX512:       # BB#0:
547; AVX512-NEXT:    vcmpnlesd %xmm0, %xmm1, %k1
548; AVX512-NEXT:    vmovsd %xmm2, %xmm0, %xmm3 {%k1}
549; AVX512-NEXT:    vmovapd %xmm3, %xmm0
550; AVX512-NEXT:    retq
551;
552  %1 = fcmp ult double %a, %b
553  %2 = select i1 %1, double %c, double %d
554  ret double %2
555}
556
557define float @select_fcmp_ule_f32(float %a, float %b, float %c, float %d) {
558; SSE-LABEL: select_fcmp_ule_f32:
559; SSE:       # BB#0:
560; SSE-NEXT:    cmpnltss %xmm0, %xmm1
561; SSE-NEXT:    andps %xmm1, %xmm2
562; SSE-NEXT:    andnps %xmm3, %xmm1
563; SSE-NEXT:    orps %xmm2, %xmm1
564; SSE-NEXT:    movaps %xmm1, %xmm0
565; SSE-NEXT:    retq
566;
567; AVX-LABEL: select_fcmp_ule_f32:
568; AVX:       # BB#0:
569; AVX-NEXT:    vcmpnltss %xmm0, %xmm1, %xmm0
570; AVX-NEXT:    vblendvps %xmm0, %xmm2, %xmm3, %xmm0
571; AVX-NEXT:    retq
572;
573; AVX512-LABEL: select_fcmp_ule_f32:
574; AVX512:       # BB#0:
575; AVX512-NEXT:    vcmpnltss %xmm0, %xmm1, %k1
576; AVX512-NEXT:    vmovss %xmm2, %xmm0, %xmm3 {%k1}
577; AVX512-NEXT:    vmovaps %xmm3, %xmm0
578; AVX512-NEXT:    retq
579;
580  %1 = fcmp ule float %a, %b
581  %2 = select i1 %1, float %c, float %d
582  ret float %2
583}
584
585define double @select_fcmp_ule_f64(double %a, double %b, double %c, double %d) {
586; SSE-LABEL: select_fcmp_ule_f64:
587; SSE:       # BB#0:
588; SSE-NEXT:    cmpnltsd %xmm0, %xmm1
589; SSE-NEXT:    andps %xmm1, %xmm2
590; SSE-NEXT:    andnps %xmm3, %xmm1
591; SSE-NEXT:    orps %xmm2, %xmm1
592; SSE-NEXT:    movaps %xmm1, %xmm0
593; SSE-NEXT:    retq
594;
595; AVX-LABEL: select_fcmp_ule_f64:
596; AVX:       # BB#0:
597; AVX-NEXT:    vcmpnltsd %xmm0, %xmm1, %xmm0
598; AVX-NEXT:    vblendvpd %xmm0, %xmm2, %xmm3, %xmm0
599; AVX-NEXT:    retq
600;
601; AVX512-LABEL: select_fcmp_ule_f64:
602; AVX512:       # BB#0:
603; AVX512-NEXT:    vcmpnltsd %xmm0, %xmm1, %k1
604; AVX512-NEXT:    vmovsd %xmm2, %xmm0, %xmm3 {%k1}
605; AVX512-NEXT:    vmovapd %xmm3, %xmm0
606; AVX512-NEXT:    retq
607;
608  %1 = fcmp ule double %a, %b
609  %2 = select i1 %1, double %c, double %d
610  ret double %2
611}
612
613define float @select_fcmp_une_f32(float %a, float %b, float %c, float %d) {
614; SSE-LABEL: select_fcmp_une_f32:
615; SSE:       # BB#0:
616; SSE-NEXT:    cmpneqss %xmm1, %xmm0
617; SSE-NEXT:    andps %xmm0, %xmm2
618; SSE-NEXT:    andnps %xmm3, %xmm0
619; SSE-NEXT:    orps %xmm2, %xmm0
620; SSE-NEXT:    retq
621;
622; AVX-LABEL: select_fcmp_une_f32:
623; AVX:       # BB#0:
624; AVX-NEXT:    vcmpneqss %xmm1, %xmm0, %xmm0
625; AVX-NEXT:    vblendvps %xmm0, %xmm2, %xmm3, %xmm0
626; AVX-NEXT:    retq
627;
628; AVX512-LABEL: select_fcmp_une_f32:
629; AVX512:       # BB#0:
630; AVX512-NEXT:    vcmpneqss %xmm1, %xmm0, %k1
631; AVX512-NEXT:    vmovss %xmm2, %xmm0, %xmm3 {%k1}
632; AVX512-NEXT:    vmovaps %xmm3, %xmm0
633; AVX512-NEXT:    retq
634;
635  %1 = fcmp une float %a, %b
636  %2 = select i1 %1, float %c, float %d
637  ret float %2
638}
639
640define double @select_fcmp_une_f64(double %a, double %b, double %c, double %d) {
641; SSE-LABEL: select_fcmp_une_f64:
642; SSE:       # BB#0:
643; SSE-NEXT:    cmpneqsd %xmm1, %xmm0
644; SSE-NEXT:    andps %xmm0, %xmm2
645; SSE-NEXT:    andnps %xmm3, %xmm0
646; SSE-NEXT:    orps %xmm2, %xmm0
647; SSE-NEXT:    retq
648;
649; AVX-LABEL: select_fcmp_une_f64:
650; AVX:       # BB#0:
651; AVX-NEXT:    vcmpneqsd %xmm1, %xmm0, %xmm0
652; AVX-NEXT:    vblendvpd %xmm0, %xmm2, %xmm3, %xmm0
653; AVX-NEXT:    retq
654;
655; AVX512-LABEL: select_fcmp_une_f64:
656; AVX512:       # BB#0:
657; AVX512-NEXT:    vcmpneqsd %xmm1, %xmm0, %k1
658; AVX512-NEXT:    vmovsd %xmm2, %xmm0, %xmm3 {%k1}
659; AVX512-NEXT:    vmovapd %xmm3, %xmm0
660; AVX512-NEXT:    retq
661;
662  %1 = fcmp une double %a, %b
663  %2 = select i1 %1, double %c, double %d
664  ret double %2
665}
666
667