1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2 3; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41 4; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1 5; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2 6 7; 8; ExtractElement - Constant Index 9; 10 11define i8 @extractelement_v16i8_1(<16 x i8> %a) nounwind { 12; SSE2-LABEL: extractelement_v16i8_1: 13; SSE2: # BB#0: 14; SSE2-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) 15; SSE2-NEXT: movb -{{[0-9]+}}(%rsp), %al 16; SSE2-NEXT: retq 17; 18; SSE41-LABEL: extractelement_v16i8_1: 19; SSE41: # BB#0: 20; SSE41-NEXT: pextrb $1, %xmm0, %eax 21; SSE41-NEXT: retq 22; 23; AVX-LABEL: extractelement_v16i8_1: 24; AVX: # BB#0: 25; AVX-NEXT: vpextrb $1, %xmm0, %eax 26; AVX-NEXT: retq 27 %b = extractelement <16 x i8> %a, i256 1 28 ret i8 %b 29} 30 31define i8 @extractelement_v16i8_11(<16 x i8> %a) nounwind { 32; SSE2-LABEL: extractelement_v16i8_11: 33; SSE2: # BB#0: 34; SSE2-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) 35; SSE2-NEXT: movb -{{[0-9]+}}(%rsp), %al 36; SSE2-NEXT: retq 37; 38; SSE41-LABEL: extractelement_v16i8_11: 39; SSE41: # BB#0: 40; SSE41-NEXT: pextrb $11, %xmm0, %eax 41; SSE41-NEXT: retq 42; 43; AVX-LABEL: extractelement_v16i8_11: 44; AVX: # BB#0: 45; AVX-NEXT: vpextrb $11, %xmm0, %eax 46; AVX-NEXT: retq 47 %b = extractelement <16 x i8> %a, i256 11 48 ret i8 %b 49} 50 51define i8 @extractelement_v16i8_14(<16 x i8> %a) nounwind { 52; SSE2-LABEL: extractelement_v16i8_14: 53; SSE2: # BB#0: 54; SSE2-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) 55; SSE2-NEXT: movb -{{[0-9]+}}(%rsp), %al 56; SSE2-NEXT: retq 57; 58; SSE41-LABEL: extractelement_v16i8_14: 59; SSE41: # BB#0: 60; SSE41-NEXT: pextrb $14, %xmm0, %eax 61; SSE41-NEXT: retq 62; 63; AVX-LABEL: extractelement_v16i8_14: 64; AVX: # BB#0: 65; AVX-NEXT: vpextrb $14, %xmm0, %eax 66; AVX-NEXT: retq 67 %b = extractelement <16 x i8> %a, i256 14 68 ret i8 %b 69} 70 71define i8 @extractelement_v32i8_1(<32 x i8> %a) nounwind { 72; SSE2-LABEL: extractelement_v32i8_1: 73; SSE2: # BB#0: 74; SSE2-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) 75; SSE2-NEXT: movb -{{[0-9]+}}(%rsp), %al 76; SSE2-NEXT: retq 77; 78; SSE41-LABEL: extractelement_v32i8_1: 79; SSE41: # BB#0: 80; SSE41-NEXT: pextrb $1, %xmm0, %eax 81; SSE41-NEXT: retq 82; 83; AVX-LABEL: extractelement_v32i8_1: 84; AVX: # BB#0: 85; AVX-NEXT: vpextrb $1, %xmm0, %eax 86; AVX-NEXT: vzeroupper 87; AVX-NEXT: retq 88 %b = extractelement <32 x i8> %a, i256 1 89 ret i8 %b 90} 91 92define i8 @extractelement_v32i8_17(<32 x i8> %a) nounwind { 93; SSE2-LABEL: extractelement_v32i8_17: 94; SSE2: # BB#0: 95; SSE2-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp) 96; SSE2-NEXT: movb -{{[0-9]+}}(%rsp), %al 97; SSE2-NEXT: retq 98; 99; SSE41-LABEL: extractelement_v32i8_17: 100; SSE41: # BB#0: 101; SSE41-NEXT: pextrb $1, %xmm1, %eax 102; SSE41-NEXT: retq 103; 104; AVX1-LABEL: extractelement_v32i8_17: 105; AVX1: # BB#0: 106; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 107; AVX1-NEXT: vpextrb $1, %xmm0, %eax 108; AVX1-NEXT: vzeroupper 109; AVX1-NEXT: retq 110; 111; AVX2-LABEL: extractelement_v32i8_17: 112; AVX2: # BB#0: 113; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 114; AVX2-NEXT: vpextrb $1, %xmm0, %eax 115; AVX2-NEXT: vzeroupper 116; AVX2-NEXT: retq 117 %b = extractelement <32 x i8> %a, i256 17 118 ret i8 %b 119} 120 121define i16 @extractelement_v8i16_0(<8 x i16> %a, i256 %i) nounwind { 122; SSE-LABEL: extractelement_v8i16_0: 123; SSE: # BB#0: 124; SSE-NEXT: movd %xmm0, %eax 125; SSE-NEXT: retq 126; 127; AVX-LABEL: extractelement_v8i16_0: 128; AVX: # BB#0: 129; AVX-NEXT: vmovd %xmm0, %eax 130; AVX-NEXT: retq 131 %b = extractelement <8 x i16> %a, i256 0 132 ret i16 %b 133} 134 135define i16 @extractelement_v8i16_3(<8 x i16> %a, i256 %i) nounwind { 136; SSE-LABEL: extractelement_v8i16_3: 137; SSE: # BB#0: 138; SSE-NEXT: pextrw $3, %xmm0, %eax 139; SSE-NEXT: retq 140; 141; AVX-LABEL: extractelement_v8i16_3: 142; AVX: # BB#0: 143; AVX-NEXT: vpextrw $3, %xmm0, %eax 144; AVX-NEXT: retq 145 %b = extractelement <8 x i16> %a, i256 3 146 ret i16 %b 147} 148 149define i16 @extractelement_v16i16_0(<16 x i16> %a, i256 %i) nounwind { 150; SSE-LABEL: extractelement_v16i16_0: 151; SSE: # BB#0: 152; SSE-NEXT: movd %xmm0, %eax 153; SSE-NEXT: retq 154; 155; AVX-LABEL: extractelement_v16i16_0: 156; AVX: # BB#0: 157; AVX-NEXT: vmovd %xmm0, %eax 158; AVX-NEXT: vzeroupper 159; AVX-NEXT: retq 160 %b = extractelement <16 x i16> %a, i256 0 161 ret i16 %b 162} 163 164define i16 @extractelement_v16i16_13(<16 x i16> %a, i256 %i) nounwind { 165; SSE-LABEL: extractelement_v16i16_13: 166; SSE: # BB#0: 167; SSE-NEXT: pextrw $5, %xmm1, %eax 168; SSE-NEXT: retq 169; 170; AVX1-LABEL: extractelement_v16i16_13: 171; AVX1: # BB#0: 172; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 173; AVX1-NEXT: vpextrw $5, %xmm0, %eax 174; AVX1-NEXT: vzeroupper 175; AVX1-NEXT: retq 176; 177; AVX2-LABEL: extractelement_v16i16_13: 178; AVX2: # BB#0: 179; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 180; AVX2-NEXT: vpextrw $5, %xmm0, %eax 181; AVX2-NEXT: vzeroupper 182; AVX2-NEXT: retq 183 %b = extractelement <16 x i16> %a, i256 13 184 ret i16 %b 185} 186 187define i32 @extractelement_v4i32_0(<4 x i32> %a) nounwind { 188; SSE-LABEL: extractelement_v4i32_0: 189; SSE: # BB#0: 190; SSE-NEXT: movd %xmm0, %eax 191; SSE-NEXT: retq 192; 193; AVX-LABEL: extractelement_v4i32_0: 194; AVX: # BB#0: 195; AVX-NEXT: vmovd %xmm0, %eax 196; AVX-NEXT: retq 197 %b = extractelement <4 x i32> %a, i256 0 198 ret i32 %b 199} 200 201define i32 @extractelement_v4i32_3(<4 x i32> %a) nounwind { 202; SSE2-LABEL: extractelement_v4i32_3: 203; SSE2: # BB#0: 204; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3] 205; SSE2-NEXT: movd %xmm0, %eax 206; SSE2-NEXT: retq 207; 208; SSE41-LABEL: extractelement_v4i32_3: 209; SSE41: # BB#0: 210; SSE41-NEXT: pextrd $3, %xmm0, %eax 211; SSE41-NEXT: retq 212; 213; AVX-LABEL: extractelement_v4i32_3: 214; AVX: # BB#0: 215; AVX-NEXT: vpextrd $3, %xmm0, %eax 216; AVX-NEXT: retq 217 %b = extractelement <4 x i32> %a, i256 3 218 ret i32 %b 219} 220 221define i32 @extractelement_v8i32_0(<8 x i32> %a) nounwind { 222; SSE-LABEL: extractelement_v8i32_0: 223; SSE: # BB#0: 224; SSE-NEXT: movd %xmm1, %eax 225; SSE-NEXT: retq 226; 227; AVX-LABEL: extractelement_v8i32_0: 228; AVX: # BB#0: 229; AVX-NEXT: vextractf128 $1, %ymm0, %xmm0 230; AVX-NEXT: vmovd %xmm0, %eax 231; AVX-NEXT: vzeroupper 232; AVX-NEXT: retq 233 %b = extractelement <8 x i32> %a, i256 4 234 ret i32 %b 235} 236 237define i32 @extractelement_v8i32_4(<8 x i32> %a) nounwind { 238; SSE-LABEL: extractelement_v8i32_4: 239; SSE: # BB#0: 240; SSE-NEXT: movd %xmm1, %eax 241; SSE-NEXT: retq 242; 243; AVX-LABEL: extractelement_v8i32_4: 244; AVX: # BB#0: 245; AVX-NEXT: vextractf128 $1, %ymm0, %xmm0 246; AVX-NEXT: vmovd %xmm0, %eax 247; AVX-NEXT: vzeroupper 248; AVX-NEXT: retq 249 %b = extractelement <8 x i32> %a, i256 4 250 ret i32 %b 251} 252 253define i32 @extractelement_v8i32_7(<8 x i32> %a) nounwind { 254; SSE2-LABEL: extractelement_v8i32_7: 255; SSE2: # BB#0: 256; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[3,1,2,3] 257; SSE2-NEXT: movd %xmm0, %eax 258; SSE2-NEXT: retq 259; 260; SSE41-LABEL: extractelement_v8i32_7: 261; SSE41: # BB#0: 262; SSE41-NEXT: pextrd $3, %xmm1, %eax 263; SSE41-NEXT: retq 264; 265; AVX1-LABEL: extractelement_v8i32_7: 266; AVX1: # BB#0: 267; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 268; AVX1-NEXT: vpextrd $3, %xmm0, %eax 269; AVX1-NEXT: vzeroupper 270; AVX1-NEXT: retq 271; 272; AVX2-LABEL: extractelement_v8i32_7: 273; AVX2: # BB#0: 274; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 275; AVX2-NEXT: vpextrd $3, %xmm0, %eax 276; AVX2-NEXT: vzeroupper 277; AVX2-NEXT: retq 278 %b = extractelement <8 x i32> %a, i64 7 279 ret i32 %b 280} 281 282define i64 @extractelement_v2i64_0(<2 x i64> %a, i256 %i) nounwind { 283; SSE-LABEL: extractelement_v2i64_0: 284; SSE: # BB#0: 285; SSE-NEXT: movd %xmm0, %rax 286; SSE-NEXT: retq 287; 288; AVX-LABEL: extractelement_v2i64_0: 289; AVX: # BB#0: 290; AVX-NEXT: vmovq %xmm0, %rax 291; AVX-NEXT: retq 292 %b = extractelement <2 x i64> %a, i256 0 293 ret i64 %b 294} 295 296define i64 @extractelement_v2i64_1(<2 x i64> %a, i256 %i) nounwind { 297; SSE2-LABEL: extractelement_v2i64_1: 298; SSE2: # BB#0: 299; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 300; SSE2-NEXT: movd %xmm0, %rax 301; SSE2-NEXT: retq 302; 303; SSE41-LABEL: extractelement_v2i64_1: 304; SSE41: # BB#0: 305; SSE41-NEXT: pextrq $1, %xmm0, %rax 306; SSE41-NEXT: retq 307; 308; AVX-LABEL: extractelement_v2i64_1: 309; AVX: # BB#0: 310; AVX-NEXT: vpextrq $1, %xmm0, %rax 311; AVX-NEXT: retq 312 %b = extractelement <2 x i64> %a, i256 1 313 ret i64 %b 314} 315 316define i64 @extractelement_v4i64_1(<4 x i64> %a, i256 %i) nounwind { 317; SSE2-LABEL: extractelement_v4i64_1: 318; SSE2: # BB#0: 319; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 320; SSE2-NEXT: movd %xmm0, %rax 321; SSE2-NEXT: retq 322; 323; SSE41-LABEL: extractelement_v4i64_1: 324; SSE41: # BB#0: 325; SSE41-NEXT: pextrq $1, %xmm0, %rax 326; SSE41-NEXT: retq 327; 328; AVX-LABEL: extractelement_v4i64_1: 329; AVX: # BB#0: 330; AVX-NEXT: vpextrq $1, %xmm0, %rax 331; AVX-NEXT: vzeroupper 332; AVX-NEXT: retq 333 %b = extractelement <4 x i64> %a, i256 1 334 ret i64 %b 335} 336 337define i64 @extractelement_v4i64_3(<4 x i64> %a, i256 %i) nounwind { 338; SSE2-LABEL: extractelement_v4i64_3: 339; SSE2: # BB#0: 340; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1] 341; SSE2-NEXT: movd %xmm0, %rax 342; SSE2-NEXT: retq 343; 344; SSE41-LABEL: extractelement_v4i64_3: 345; SSE41: # BB#0: 346; SSE41-NEXT: pextrq $1, %xmm1, %rax 347; SSE41-NEXT: retq 348; 349; AVX1-LABEL: extractelement_v4i64_3: 350; AVX1: # BB#0: 351; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 352; AVX1-NEXT: vpextrq $1, %xmm0, %rax 353; AVX1-NEXT: vzeroupper 354; AVX1-NEXT: retq 355; 356; AVX2-LABEL: extractelement_v4i64_3: 357; AVX2: # BB#0: 358; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 359; AVX2-NEXT: vpextrq $1, %xmm0, %rax 360; AVX2-NEXT: vzeroupper 361; AVX2-NEXT: retq 362 %b = extractelement <4 x i64> %a, i256 3 363 ret i64 %b 364} 365 366; 367; ExtractElement - Variable Index 368; 369 370define i8 @extractelement_v16i8_var(<16 x i8> %a, i256 %i) nounwind { 371; SSE-LABEL: extractelement_v16i8_var: 372; SSE: # BB#0: 373; SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) 374; SSE-NEXT: leaq -{{[0-9]+}}(%rsp), %rax 375; SSE-NEXT: movb (%rdi,%rax), %al 376; SSE-NEXT: retq 377; 378; AVX-LABEL: extractelement_v16i8_var: 379; AVX: # BB#0: 380; AVX-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp) 381; AVX-NEXT: leaq -{{[0-9]+}}(%rsp), %rax 382; AVX-NEXT: movb (%rdi,%rax), %al 383; AVX-NEXT: retq 384 %b = extractelement <16 x i8> %a, i256 %i 385 ret i8 %b 386} 387 388define i8 @extractelement_v32i8_var(<32 x i8> %a, i256 %i) nounwind { 389; SSE-LABEL: extractelement_v32i8_var: 390; SSE: # BB#0: 391; SSE-NEXT: pushq %rbp 392; SSE-NEXT: movq %rsp, %rbp 393; SSE-NEXT: andq $-32, %rsp 394; SSE-NEXT: subq $64, %rsp 395; SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp) 396; SSE-NEXT: movaps %xmm0, (%rsp) 397; SSE-NEXT: leaq (%rsp), %rax 398; SSE-NEXT: movb (%rdi,%rax), %al 399; SSE-NEXT: movq %rbp, %rsp 400; SSE-NEXT: popq %rbp 401; SSE-NEXT: retq 402; 403; AVX-LABEL: extractelement_v32i8_var: 404; AVX: # BB#0: 405; AVX-NEXT: pushq %rbp 406; AVX-NEXT: movq %rsp, %rbp 407; AVX-NEXT: andq $-32, %rsp 408; AVX-NEXT: subq $64, %rsp 409; AVX-NEXT: vmovaps %ymm0, (%rsp) 410; AVX-NEXT: leaq (%rsp), %rax 411; AVX-NEXT: movb (%rdi,%rax), %al 412; AVX-NEXT: movq %rbp, %rsp 413; AVX-NEXT: popq %rbp 414; AVX-NEXT: vzeroupper 415; AVX-NEXT: retq 416 %b = extractelement <32 x i8> %a, i256 %i 417 ret i8 %b 418} 419 420define i16 @extractelement_v8i16_var(<8 x i16> %a, i256 %i) nounwind { 421; SSE-LABEL: extractelement_v8i16_var: 422; SSE: # BB#0: 423; SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) 424; SSE-NEXT: movzwl -24(%rsp,%rdi,2), %eax 425; SSE-NEXT: retq 426; 427; AVX-LABEL: extractelement_v8i16_var: 428; AVX: # BB#0: 429; AVX-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp) 430; AVX-NEXT: movzwl -24(%rsp,%rdi,2), %eax 431; AVX-NEXT: retq 432 %b = extractelement <8 x i16> %a, i256 %i 433 ret i16 %b 434} 435 436define i16 @extractelement_v16i16_var(<16 x i16> %a, i256 %i) nounwind { 437; SSE-LABEL: extractelement_v16i16_var: 438; SSE: # BB#0: 439; SSE-NEXT: pushq %rbp 440; SSE-NEXT: movq %rsp, %rbp 441; SSE-NEXT: andq $-32, %rsp 442; SSE-NEXT: subq $64, %rsp 443; SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp) 444; SSE-NEXT: movaps %xmm0, (%rsp) 445; SSE-NEXT: movzwl (%rsp,%rdi,2), %eax 446; SSE-NEXT: movq %rbp, %rsp 447; SSE-NEXT: popq %rbp 448; SSE-NEXT: retq 449; 450; AVX-LABEL: extractelement_v16i16_var: 451; AVX: # BB#0: 452; AVX-NEXT: pushq %rbp 453; AVX-NEXT: movq %rsp, %rbp 454; AVX-NEXT: andq $-32, %rsp 455; AVX-NEXT: subq $64, %rsp 456; AVX-NEXT: vmovaps %ymm0, (%rsp) 457; AVX-NEXT: movzwl (%rsp,%rdi,2), %eax 458; AVX-NEXT: movq %rbp, %rsp 459; AVX-NEXT: popq %rbp 460; AVX-NEXT: vzeroupper 461; AVX-NEXT: retq 462 %b = extractelement <16 x i16> %a, i256 %i 463 ret i16 %b 464} 465 466define i32 @extractelement_v4i32_var(<4 x i32> %a, i256 %i) nounwind { 467; SSE-LABEL: extractelement_v4i32_var: 468; SSE: # BB#0: 469; SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) 470; SSE-NEXT: movl -24(%rsp,%rdi,4), %eax 471; SSE-NEXT: retq 472; 473; AVX-LABEL: extractelement_v4i32_var: 474; AVX: # BB#0: 475; AVX-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp) 476; AVX-NEXT: movl -24(%rsp,%rdi,4), %eax 477; AVX-NEXT: retq 478 %b = extractelement <4 x i32> %a, i256 %i 479 ret i32 %b 480} 481 482define i32 @extractelement_v8i32_var(<8 x i32> %a, i256 %i) nounwind { 483; SSE-LABEL: extractelement_v8i32_var: 484; SSE: # BB#0: 485; SSE-NEXT: pushq %rbp 486; SSE-NEXT: movq %rsp, %rbp 487; SSE-NEXT: andq $-32, %rsp 488; SSE-NEXT: subq $64, %rsp 489; SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp) 490; SSE-NEXT: movaps %xmm0, (%rsp) 491; SSE-NEXT: movl (%rsp,%rdi,4), %eax 492; SSE-NEXT: movq %rbp, %rsp 493; SSE-NEXT: popq %rbp 494; SSE-NEXT: retq 495; 496; AVX1-LABEL: extractelement_v8i32_var: 497; AVX1: # BB#0: 498; AVX1-NEXT: pushq %rbp 499; AVX1-NEXT: movq %rsp, %rbp 500; AVX1-NEXT: andq $-32, %rsp 501; AVX1-NEXT: subq $64, %rsp 502; AVX1-NEXT: vmovaps %ymm0, (%rsp) 503; AVX1-NEXT: movl (%rsp,%rdi,4), %eax 504; AVX1-NEXT: movq %rbp, %rsp 505; AVX1-NEXT: popq %rbp 506; AVX1-NEXT: vzeroupper 507; AVX1-NEXT: retq 508; 509; AVX2-LABEL: extractelement_v8i32_var: 510; AVX2: # BB#0: 511; AVX2-NEXT: vmovd %edi, %xmm1 512; AVX2-NEXT: vpermd %ymm0, %ymm1, %ymm0 513; AVX2-NEXT: vmovd %xmm0, %eax 514; AVX2-NEXT: vzeroupper 515; AVX2-NEXT: retq 516 %b = extractelement <8 x i32> %a, i256 %i 517 ret i32 %b 518} 519 520define i64 @extractelement_v2i64_var(<2 x i64> %a, i256 %i) nounwind { 521; SSE-LABEL: extractelement_v2i64_var: 522; SSE: # BB#0: 523; SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) 524; SSE-NEXT: movq -24(%rsp,%rdi,8), %rax 525; SSE-NEXT: retq 526; 527; AVX-LABEL: extractelement_v2i64_var: 528; AVX: # BB#0: 529; AVX-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp) 530; AVX-NEXT: movq -24(%rsp,%rdi,8), %rax 531; AVX-NEXT: retq 532 %b = extractelement <2 x i64> %a, i256 %i 533 ret i64 %b 534} 535 536define i64 @extractelement_v4i64_var(<4 x i64> %a, i256 %i) nounwind { 537; SSE-LABEL: extractelement_v4i64_var: 538; SSE: # BB#0: 539; SSE-NEXT: pushq %rbp 540; SSE-NEXT: movq %rsp, %rbp 541; SSE-NEXT: andq $-32, %rsp 542; SSE-NEXT: subq $64, %rsp 543; SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%rsp) 544; SSE-NEXT: movaps %xmm0, (%rsp) 545; SSE-NEXT: movq (%rsp,%rdi,8), %rax 546; SSE-NEXT: movq %rbp, %rsp 547; SSE-NEXT: popq %rbp 548; SSE-NEXT: retq 549; 550; AVX-LABEL: extractelement_v4i64_var: 551; AVX: # BB#0: 552; AVX-NEXT: pushq %rbp 553; AVX-NEXT: movq %rsp, %rbp 554; AVX-NEXT: andq $-32, %rsp 555; AVX-NEXT: subq $64, %rsp 556; AVX-NEXT: vmovaps %ymm0, (%rsp) 557; AVX-NEXT: movq (%rsp,%rdi,8), %rax 558; AVX-NEXT: movq %rbp, %rsp 559; AVX-NEXT: popq %rbp 560; AVX-NEXT: vzeroupper 561; AVX-NEXT: retq 562 %b = extractelement <4 x i64> %a, i256 %i 563 ret i64 %b 564} 565 566; 567; ExtractElement - Constant (Out Of Range) Index 568; 569 570define i8 @extractelement_32i8_m1(<32 x i8> %a) nounwind { 571; SSE-LABEL: extractelement_32i8_m1: 572; SSE: # BB#0: 573; SSE-NEXT: retq 574; 575; AVX-LABEL: extractelement_32i8_m1: 576; AVX: # BB#0: 577; AVX-NEXT: retq 578 %b = extractelement <32 x i8> %a, i256 -1 579 ret i8 %b 580} 581 582define i16 @extractelement_v16i16_m4(<16 x i16> %a, i256 %i) nounwind { 583; SSE-LABEL: extractelement_v16i16_m4: 584; SSE: # BB#0: 585; SSE-NEXT: retq 586; 587; AVX-LABEL: extractelement_v16i16_m4: 588; AVX: # BB#0: 589; AVX-NEXT: retq 590 %b = extractelement <16 x i16> %a, i256 -4 591 ret i16 %b 592} 593 594define i32 @extractelement_v8i32_15(<8 x i32> %a) nounwind { 595; SSE-LABEL: extractelement_v8i32_15: 596; SSE: # BB#0: 597; SSE-NEXT: retq 598; 599; AVX-LABEL: extractelement_v8i32_15: 600; AVX: # BB#0: 601; AVX-NEXT: retq 602 %b = extractelement <8 x i32> %a, i64 15 603 ret i32 %b 604} 605 606define i64 @extractelement_v4i64_4(<4 x i64> %a, i256 %i) nounwind { 607; SSE-LABEL: extractelement_v4i64_4: 608; SSE: # BB#0: 609; SSE-NEXT: retq 610; 611; AVX-LABEL: extractelement_v4i64_4: 612; AVX: # BB#0: 613; AVX-NEXT: retq 614 %b = extractelement <4 x i64> %a, i256 4 615 ret i64 %b 616} 617