1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X32
3; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
4
5define zeroext i8 @test_udivrem_zext_ah(i8 %x, i8 %y) {
6; X32-LABEL: test_udivrem_zext_ah:
7; X32:       # BB#0:
8; X32-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
9; X32-NEXT:    # kill: %EAX<def> %EAX<kill> %AX<def>
10; X32-NEXT:    divb {{[0-9]+}}(%esp)
11; X32-NEXT:    movzbl %ah, %ecx # NOREX
12; X32-NEXT:    movb %al, z
13; X32-NEXT:    movl %ecx, %eax
14; X32-NEXT:    retl
15;
16; X64-LABEL: test_udivrem_zext_ah:
17; X64:       # BB#0:
18; X64-NEXT:    movzbl %dil, %eax
19; X64-NEXT:    # kill: %EAX<def> %EAX<kill> %AX<def>
20; X64-NEXT:    divb %sil
21; X64-NEXT:    movzbl %ah, %ecx # NOREX
22; X64-NEXT:    movb %al, {{.*}}(%rip)
23; X64-NEXT:    movl %ecx, %eax
24; X64-NEXT:    retq
25  %div = udiv i8 %x, %y
26  store i8 %div, i8* @z
27  %1 = urem i8 %x, %y
28  ret i8 %1
29}
30
31define zeroext i8 @test_urem_zext_ah(i8 %x, i8 %y) {
32; X32-LABEL: test_urem_zext_ah:
33; X32:       # BB#0:
34; X32-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
35; X32-NEXT:    # kill: %EAX<def> %EAX<kill> %AX<def>
36; X32-NEXT:    divb {{[0-9]+}}(%esp)
37; X32-NEXT:    movzbl %ah, %eax # NOREX
38; X32-NEXT:    # kill: %AL<def> %AL<kill> %EAX<kill>
39; X32-NEXT:    retl
40;
41; X64-LABEL: test_urem_zext_ah:
42; X64:       # BB#0:
43; X64-NEXT:    movzbl %dil, %eax
44; X64-NEXT:    # kill: %EAX<def> %EAX<kill> %AX<def>
45; X64-NEXT:    divb %sil
46; X64-NEXT:    movzbl %ah, %eax # NOREX
47; X64-NEXT:    # kill: %AL<def> %AL<kill> %EAX<kill>
48; X64-NEXT:    retq
49  %1 = urem i8 %x, %y
50  ret i8 %1
51}
52
53define i8 @test_urem_noext_ah(i8 %x, i8 %y) {
54; X32-LABEL: test_urem_noext_ah:
55; X32:       # BB#0:
56; X32-NEXT:    movb {{[0-9]+}}(%esp), %cl
57; X32-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
58; X32-NEXT:    # kill: %EAX<def> %EAX<kill> %AX<def>
59; X32-NEXT:    divb %cl
60; X32-NEXT:    movzbl %ah, %eax # NOREX
61; X32-NEXT:    addb %cl, %al
62; X32-NEXT:    # kill: %AL<def> %AL<kill> %EAX<kill>
63; X32-NEXT:    retl
64;
65; X64-LABEL: test_urem_noext_ah:
66; X64:       # BB#0:
67; X64-NEXT:    movzbl %dil, %eax
68; X64-NEXT:    # kill: %EAX<def> %EAX<kill> %AX<def>
69; X64-NEXT:    divb %sil
70; X64-NEXT:    movzbl %ah, %eax # NOREX
71; X64-NEXT:    addb %sil, %al
72; X64-NEXT:    # kill: %AL<def> %AL<kill> %EAX<kill>
73; X64-NEXT:    retq
74  %1 = urem i8 %x, %y
75  %2 = add i8 %1, %y
76  ret i8 %2
77}
78
79define i64 @test_urem_zext64_ah(i8 %x, i8 %y) {
80; X32-LABEL: test_urem_zext64_ah:
81; X32:       # BB#0:
82; X32-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
83; X32-NEXT:    # kill: %EAX<def> %EAX<kill> %AX<def>
84; X32-NEXT:    divb {{[0-9]+}}(%esp)
85; X32-NEXT:    movzbl %ah, %eax # NOREX
86; X32-NEXT:    xorl %edx, %edx
87; X32-NEXT:    retl
88;
89; X64-LABEL: test_urem_zext64_ah:
90; X64:       # BB#0:
91; X64-NEXT:    movzbl %dil, %eax
92; X64-NEXT:    # kill: %EAX<def> %EAX<kill> %AX<def>
93; X64-NEXT:    divb %sil
94; X64-NEXT:    movzbl %ah, %eax # NOREX
95; X64-NEXT:    movzbl %al, %eax
96; X64-NEXT:    retq
97  %1 = urem i8 %x, %y
98  %2 = zext i8 %1 to i64
99  ret i64 %2
100}
101
102define signext i8 @test_sdivrem_sext_ah(i8 %x, i8 %y) {
103; X32-LABEL: test_sdivrem_sext_ah:
104; X32:       # BB#0:
105; X32-NEXT:    movb {{[0-9]+}}(%esp), %al
106; X32-NEXT:    cbtw
107; X32-NEXT:    idivb {{[0-9]+}}(%esp)
108; X32-NEXT:    movsbl %ah, %ecx # NOREX
109; X32-NEXT:    movb %al, z
110; X32-NEXT:    movl %ecx, %eax
111; X32-NEXT:    retl
112;
113; X64-LABEL: test_sdivrem_sext_ah:
114; X64:       # BB#0:
115; X64-NEXT:    movl %edi, %eax
116; X64-NEXT:    cbtw
117; X64-NEXT:    idivb %sil
118; X64-NEXT:    movsbl %ah, %ecx # NOREX
119; X64-NEXT:    movb %al, {{.*}}(%rip)
120; X64-NEXT:    movl %ecx, %eax
121; X64-NEXT:    retq
122  %div = sdiv i8 %x, %y
123  store i8 %div, i8* @z
124  %1 = srem i8 %x, %y
125  ret i8 %1
126}
127
128define signext i8 @test_srem_sext_ah(i8 %x, i8 %y) {
129; X32-LABEL: test_srem_sext_ah:
130; X32:       # BB#0:
131; X32-NEXT:    movb {{[0-9]+}}(%esp), %al
132; X32-NEXT:    cbtw
133; X32-NEXT:    idivb {{[0-9]+}}(%esp)
134; X32-NEXT:    movsbl %ah, %eax # NOREX
135; X32-NEXT:    # kill: %AL<def> %AL<kill> %EAX<kill>
136; X32-NEXT:    retl
137;
138; X64-LABEL: test_srem_sext_ah:
139; X64:       # BB#0:
140; X64-NEXT:    movl %edi, %eax
141; X64-NEXT:    cbtw
142; X64-NEXT:    idivb %sil
143; X64-NEXT:    movsbl %ah, %eax # NOREX
144; X64-NEXT:    # kill: %AL<def> %AL<kill> %EAX<kill>
145; X64-NEXT:    retq
146  %1 = srem i8 %x, %y
147  ret i8 %1
148}
149
150define i8 @test_srem_noext_ah(i8 %x, i8 %y) {
151; X32-LABEL: test_srem_noext_ah:
152; X32:       # BB#0:
153; X32-NEXT:    movb {{[0-9]+}}(%esp), %al
154; X32-NEXT:    movb {{[0-9]+}}(%esp), %cl
155; X32-NEXT:    cbtw
156; X32-NEXT:    idivb %cl
157; X32-NEXT:    movsbl %ah, %eax # NOREX
158; X32-NEXT:    addb %cl, %al
159; X32-NEXT:    # kill: %AL<def> %AL<kill> %EAX<kill>
160; X32-NEXT:    retl
161;
162; X64-LABEL: test_srem_noext_ah:
163; X64:       # BB#0:
164; X64-NEXT:    movl %edi, %eax
165; X64-NEXT:    cbtw
166; X64-NEXT:    idivb %sil
167; X64-NEXT:    movsbl %ah, %eax # NOREX
168; X64-NEXT:    addb %sil, %al
169; X64-NEXT:    # kill: %AL<def> %AL<kill> %EAX<kill>
170; X64-NEXT:    retq
171  %1 = srem i8 %x, %y
172  %2 = add i8 %1, %y
173  ret i8 %2
174}
175
176define i64 @test_srem_sext64_ah(i8 %x, i8 %y) {
177; X32-LABEL: test_srem_sext64_ah:
178; X32:       # BB#0:
179; X32-NEXT:    movb {{[0-9]+}}(%esp), %al
180; X32-NEXT:    cbtw
181; X32-NEXT:    idivb {{[0-9]+}}(%esp)
182; X32-NEXT:    movsbl %ah, %eax # NOREX
183; X32-NEXT:    movl %eax, %edx
184; X32-NEXT:    sarl $31, %edx
185; X32-NEXT:    retl
186;
187; X64-LABEL: test_srem_sext64_ah:
188; X64:       # BB#0:
189; X64-NEXT:    movl %edi, %eax
190; X64-NEXT:    cbtw
191; X64-NEXT:    idivb %sil
192; X64-NEXT:    movsbl %ah, %eax # NOREX
193; X64-NEXT:    movsbq %al, %rax
194; X64-NEXT:    retq
195  %1 = srem i8 %x, %y
196  %2 = sext i8 %1 to i64
197  ret i64 %2
198}
199
200define i64 @pr25754(i8 %a, i8 %c) {
201; X32-LABEL: pr25754:
202; X32:       # BB#0:
203; X32-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
204; X32-NEXT:    # kill: %EAX<def> %EAX<kill> %AX<def>
205; X32-NEXT:    divb {{[0-9]+}}(%esp)
206; X32-NEXT:    movzbl %ah, %ecx # NOREX
207; X32-NEXT:    movzbl %al, %eax
208; X32-NEXT:    addl %ecx, %eax
209; X32-NEXT:    sbbl %edx, %edx
210; X32-NEXT:    andl $1, %edx
211; X32-NEXT:    retl
212;
213; X64-LABEL: pr25754:
214; X64:       # BB#0:
215; X64-NEXT:    movzbl %dil, %eax
216; X64-NEXT:    # kill: %EAX<def> %EAX<kill> %AX<def>
217; X64-NEXT:    divb %sil
218; X64-NEXT:    movzbl %ah, %ecx # NOREX
219; X64-NEXT:    movzbl %cl, %ecx
220; X64-NEXT:    movzbl %al, %eax
221; X64-NEXT:    addq %rcx, %rax
222; X64-NEXT:    retq
223  %r1 = urem i8 %a, %c
224  %d1 = udiv i8 %a, %c
225  %r2 = zext i8 %r1 to i64
226  %d2 = zext i8 %d1 to i64
227  %ret = add i64 %r2, %d2
228  ret i64 %ret
229}
230
231@z = external global i8
232