1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop  | FileCheck %s --check-prefixes=XOP
4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx  | FileCheck %s --check-prefixes=AVX,AVX1
5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512F
7
8;
9; 128-bit vectors
10;
11
12define <2 x i64> @bitselect_v2i64_rr(<2 x i64>, <2 x i64>) {
13; SSE-LABEL: bitselect_v2i64_rr:
14; SSE:       # %bb.0:
15; SSE-NEXT:    andps {{.*}}(%rip), %xmm0
16; SSE-NEXT:    andps {{.*}}(%rip), %xmm1
17; SSE-NEXT:    orps %xmm1, %xmm0
18; SSE-NEXT:    retq
19;
20; XOP-LABEL: bitselect_v2i64_rr:
21; XOP:       # %bb.0:
22; XOP-NEXT:    vpcmov {{.*}}(%rip), %xmm0, %xmm1, %xmm0
23; XOP-NEXT:    retq
24;
25; AVX-LABEL: bitselect_v2i64_rr:
26; AVX:       # %bb.0:
27; AVX-NEXT:    vandps {{.*}}(%rip), %xmm0, %xmm0
28; AVX-NEXT:    vandps {{.*}}(%rip), %xmm1, %xmm1
29; AVX-NEXT:    vorps %xmm0, %xmm1, %xmm0
30; AVX-NEXT:    retq
31  %3 = and <2 x i64> %0, <i64 4294967296, i64 12884901890>
32  %4 = and <2 x i64> %1, <i64 -4294967297, i64 -12884901891>
33  %5 = or <2 x i64> %4, %3
34  ret <2 x i64> %5
35}
36
37define <2 x i64> @bitselect_v2i64_rm(<2 x i64>, <2 x i64>* nocapture readonly) {
38; SSE-LABEL: bitselect_v2i64_rm:
39; SSE:       # %bb.0:
40; SSE-NEXT:    movaps (%rdi), %xmm1
41; SSE-NEXT:    andps {{.*}}(%rip), %xmm0
42; SSE-NEXT:    andps {{.*}}(%rip), %xmm1
43; SSE-NEXT:    orps %xmm1, %xmm0
44; SSE-NEXT:    retq
45;
46; XOP-LABEL: bitselect_v2i64_rm:
47; XOP:       # %bb.0:
48; XOP-NEXT:    vmovdqa (%rdi), %xmm1
49; XOP-NEXT:    vpcmov {{.*}}(%rip), %xmm0, %xmm1, %xmm0
50; XOP-NEXT:    retq
51;
52; AVX-LABEL: bitselect_v2i64_rm:
53; AVX:       # %bb.0:
54; AVX-NEXT:    vmovaps (%rdi), %xmm1
55; AVX-NEXT:    vandps {{.*}}(%rip), %xmm0, %xmm0
56; AVX-NEXT:    vandps {{.*}}(%rip), %xmm1, %xmm1
57; AVX-NEXT:    vorps %xmm0, %xmm1, %xmm0
58; AVX-NEXT:    retq
59  %3 = load <2 x i64>, <2 x i64>* %1
60  %4 = and <2 x i64> %0, <i64 8589934593, i64 3>
61  %5 = and <2 x i64> %3, <i64 -8589934594, i64 -4>
62  %6 = or <2 x i64> %5, %4
63  ret <2 x i64> %6
64}
65
66define <2 x i64> @bitselect_v2i64_mr(<2 x i64>* nocapture readonly, <2 x i64>) {
67; SSE-LABEL: bitselect_v2i64_mr:
68; SSE:       # %bb.0:
69; SSE-NEXT:    movaps (%rdi), %xmm1
70; SSE-NEXT:    andps {{.*}}(%rip), %xmm1
71; SSE-NEXT:    andps {{.*}}(%rip), %xmm0
72; SSE-NEXT:    orps %xmm1, %xmm0
73; SSE-NEXT:    retq
74;
75; XOP-LABEL: bitselect_v2i64_mr:
76; XOP:       # %bb.0:
77; XOP-NEXT:    vmovdqa (%rdi), %xmm1
78; XOP-NEXT:    vpcmov {{.*}}(%rip), %xmm0, %xmm1, %xmm0
79; XOP-NEXT:    retq
80;
81; AVX-LABEL: bitselect_v2i64_mr:
82; AVX:       # %bb.0:
83; AVX-NEXT:    vmovaps (%rdi), %xmm1
84; AVX-NEXT:    vandps {{.*}}(%rip), %xmm1, %xmm1
85; AVX-NEXT:    vandps {{.*}}(%rip), %xmm0, %xmm0
86; AVX-NEXT:    vorps %xmm0, %xmm1, %xmm0
87; AVX-NEXT:    retq
88  %3 = load <2 x i64>, <2 x i64>* %0
89  %4 = and <2 x i64> %3, <i64 12884901890, i64 4294967296>
90  %5 = and <2 x i64> %1, <i64 -12884901891, i64 -4294967297>
91  %6 = or <2 x i64> %4, %5
92  ret <2 x i64> %6
93}
94
95define <2 x i64> @bitselect_v2i64_mm(<2 x i64>* nocapture readonly, <2 x i64>* nocapture readonly) {
96; SSE-LABEL: bitselect_v2i64_mm:
97; SSE:       # %bb.0:
98; SSE-NEXT:    movaps (%rdi), %xmm1
99; SSE-NEXT:    movaps (%rsi), %xmm0
100; SSE-NEXT:    andps {{.*}}(%rip), %xmm1
101; SSE-NEXT:    andps {{.*}}(%rip), %xmm0
102; SSE-NEXT:    orps %xmm1, %xmm0
103; SSE-NEXT:    retq
104;
105; XOP-LABEL: bitselect_v2i64_mm:
106; XOP:       # %bb.0:
107; XOP-NEXT:    vmovdqa (%rsi), %xmm0
108; XOP-NEXT:    vmovdqa {{.*#+}} xmm1 = [18446744073709551612,18446744065119617022]
109; XOP-NEXT:    vpcmov %xmm1, (%rdi), %xmm0, %xmm0
110; XOP-NEXT:    retq
111;
112; AVX-LABEL: bitselect_v2i64_mm:
113; AVX:       # %bb.0:
114; AVX-NEXT:    vmovaps (%rdi), %xmm0
115; AVX-NEXT:    vmovaps (%rsi), %xmm1
116; AVX-NEXT:    vandps {{.*}}(%rip), %xmm0, %xmm0
117; AVX-NEXT:    vandps {{.*}}(%rip), %xmm1, %xmm1
118; AVX-NEXT:    vorps %xmm0, %xmm1, %xmm0
119; AVX-NEXT:    retq
120  %3 = load <2 x i64>, <2 x i64>* %0
121  %4 = load <2 x i64>, <2 x i64>* %1
122  %5 = and <2 x i64> %3, <i64 3, i64 8589934593>
123  %6 = and <2 x i64> %4, <i64 -4, i64 -8589934594>
124  %7 = or <2 x i64> %6, %5
125  ret <2 x i64> %7
126}
127
128;
129; 256-bit vectors
130;
131
132define <4 x i64> @bitselect_v4i64_rr(<4 x i64>, <4 x i64>) {
133; SSE-LABEL: bitselect_v4i64_rr:
134; SSE:       # %bb.0:
135; SSE-NEXT:    andps {{.*}}(%rip), %xmm1
136; SSE-NEXT:    andps {{.*}}(%rip), %xmm0
137; SSE-NEXT:    andps {{.*}}(%rip), %xmm3
138; SSE-NEXT:    orps %xmm3, %xmm1
139; SSE-NEXT:    andps {{.*}}(%rip), %xmm2
140; SSE-NEXT:    orps %xmm2, %xmm0
141; SSE-NEXT:    retq
142;
143; XOP-LABEL: bitselect_v4i64_rr:
144; XOP:       # %bb.0:
145; XOP-NEXT:    vpcmov {{.*}}(%rip), %ymm0, %ymm1, %ymm0
146; XOP-NEXT:    retq
147;
148; AVX-LABEL: bitselect_v4i64_rr:
149; AVX:       # %bb.0:
150; AVX-NEXT:    vandps {{.*}}(%rip), %ymm0, %ymm0
151; AVX-NEXT:    vandps {{.*}}(%rip), %ymm1, %ymm1
152; AVX-NEXT:    vorps %ymm0, %ymm1, %ymm0
153; AVX-NEXT:    retq
154  %3 = and <4 x i64> %0, <i64 4294967296, i64 12884901890, i64 12884901890, i64 12884901890>
155  %4 = and <4 x i64> %1, <i64 -4294967297, i64 -12884901891, i64 -12884901891, i64 -12884901891>
156  %5 = or <4 x i64> %4, %3
157  ret <4 x i64> %5
158}
159
160define <4 x i64> @bitselect_v4i64_rm(<4 x i64>, <4 x i64>* nocapture readonly) {
161; SSE-LABEL: bitselect_v4i64_rm:
162; SSE:       # %bb.0:
163; SSE-NEXT:    movaps {{.*#+}} xmm2 = [18446744065119617022,18446744073709551612]
164; SSE-NEXT:    movaps 16(%rdi), %xmm4
165; SSE-NEXT:    andps %xmm2, %xmm4
166; SSE-NEXT:    movaps (%rdi), %xmm5
167; SSE-NEXT:    andps %xmm2, %xmm5
168; SSE-NEXT:    movaps %xmm2, %xmm3
169; SSE-NEXT:    andnps %xmm0, %xmm3
170; SSE-NEXT:    orps %xmm5, %xmm3
171; SSE-NEXT:    andnps %xmm1, %xmm2
172; SSE-NEXT:    orps %xmm4, %xmm2
173; SSE-NEXT:    movaps %xmm3, %xmm0
174; SSE-NEXT:    movaps %xmm2, %xmm1
175; SSE-NEXT:    retq
176;
177; XOP-LABEL: bitselect_v4i64_rm:
178; XOP:       # %bb.0:
179; XOP-NEXT:    vmovdqa (%rdi), %ymm1
180; XOP-NEXT:    vpcmov {{.*}}(%rip), %ymm0, %ymm1, %ymm0
181; XOP-NEXT:    retq
182;
183; AVX-LABEL: bitselect_v4i64_rm:
184; AVX:       # %bb.0:
185; AVX-NEXT:    vmovaps (%rdi), %ymm1
186; AVX-NEXT:    vandps {{.*}}(%rip), %ymm0, %ymm0
187; AVX-NEXT:    vandps {{.*}}(%rip), %ymm1, %ymm1
188; AVX-NEXT:    vorps %ymm0, %ymm1, %ymm0
189; AVX-NEXT:    retq
190  %3 = load <4 x i64>, <4 x i64>* %1
191  %4 = and <4 x i64> %0, <i64 8589934593, i64 3, i64 8589934593, i64 3>
192  %5 = and <4 x i64> %3, <i64 -8589934594, i64 -4, i64 -8589934594, i64 -4>
193  %6 = or <4 x i64> %5, %4
194  ret <4 x i64> %6
195}
196
197define <4 x i64> @bitselect_v4i64_mr(<4 x i64>* nocapture readonly, <4 x i64>) {
198; SSE-LABEL: bitselect_v4i64_mr:
199; SSE:       # %bb.0:
200; SSE-NEXT:    movaps {{.*#+}} xmm2 = [12884901890,4294967296]
201; SSE-NEXT:    movaps 16(%rdi), %xmm4
202; SSE-NEXT:    andps %xmm2, %xmm4
203; SSE-NEXT:    movaps (%rdi), %xmm5
204; SSE-NEXT:    andps %xmm2, %xmm5
205; SSE-NEXT:    movaps %xmm2, %xmm3
206; SSE-NEXT:    andnps %xmm0, %xmm3
207; SSE-NEXT:    orps %xmm5, %xmm3
208; SSE-NEXT:    andnps %xmm1, %xmm2
209; SSE-NEXT:    orps %xmm4, %xmm2
210; SSE-NEXT:    movaps %xmm3, %xmm0
211; SSE-NEXT:    movaps %xmm2, %xmm1
212; SSE-NEXT:    retq
213;
214; XOP-LABEL: bitselect_v4i64_mr:
215; XOP:       # %bb.0:
216; XOP-NEXT:    vmovdqa (%rdi), %ymm1
217; XOP-NEXT:    vpcmov {{.*}}(%rip), %ymm0, %ymm1, %ymm0
218; XOP-NEXT:    retq
219;
220; AVX-LABEL: bitselect_v4i64_mr:
221; AVX:       # %bb.0:
222; AVX-NEXT:    vmovaps (%rdi), %ymm1
223; AVX-NEXT:    vandps {{.*}}(%rip), %ymm1, %ymm1
224; AVX-NEXT:    vandps {{.*}}(%rip), %ymm0, %ymm0
225; AVX-NEXT:    vorps %ymm0, %ymm1, %ymm0
226; AVX-NEXT:    retq
227  %3 = load <4 x i64>, <4 x i64>* %0
228  %4 = and <4 x i64> %3, <i64 12884901890, i64 4294967296, i64 12884901890, i64 4294967296>
229  %5 = and <4 x i64> %1, <i64 -12884901891, i64 -4294967297, i64 -12884901891, i64 -4294967297>
230  %6 = or <4 x i64> %4, %5
231  ret <4 x i64> %6
232}
233
234define <4 x i64> @bitselect_v4i64_mm(<4 x i64>* nocapture readonly, <4 x i64>* nocapture readonly) {
235; SSE-LABEL: bitselect_v4i64_mm:
236; SSE:       # %bb.0:
237; SSE-NEXT:    movaps {{.*#+}} xmm1 = [18446744073709551612,18446744065119617022]
238; SSE-NEXT:    movaps 16(%rsi), %xmm2
239; SSE-NEXT:    andps %xmm1, %xmm2
240; SSE-NEXT:    movaps (%rsi), %xmm3
241; SSE-NEXT:    andps %xmm1, %xmm3
242; SSE-NEXT:    movaps %xmm1, %xmm0
243; SSE-NEXT:    andnps (%rdi), %xmm0
244; SSE-NEXT:    orps %xmm3, %xmm0
245; SSE-NEXT:    andnps 16(%rdi), %xmm1
246; SSE-NEXT:    orps %xmm2, %xmm1
247; SSE-NEXT:    retq
248;
249; XOP-LABEL: bitselect_v4i64_mm:
250; XOP:       # %bb.0:
251; XOP-NEXT:    vmovdqa (%rsi), %ymm0
252; XOP-NEXT:    vmovdqa {{.*#+}} ymm1 = [18446744073709551612,18446744065119617022,18446744073709551612,18446744065119617022]
253; XOP-NEXT:    vpcmov %ymm1, (%rdi), %ymm0, %ymm0
254; XOP-NEXT:    retq
255;
256; AVX-LABEL: bitselect_v4i64_mm:
257; AVX:       # %bb.0:
258; AVX-NEXT:    vmovaps (%rdi), %ymm0
259; AVX-NEXT:    vmovaps (%rsi), %ymm1
260; AVX-NEXT:    vandps {{.*}}(%rip), %ymm0, %ymm0
261; AVX-NEXT:    vandps {{.*}}(%rip), %ymm1, %ymm1
262; AVX-NEXT:    vorps %ymm0, %ymm1, %ymm0
263; AVX-NEXT:    retq
264  %3 = load <4 x i64>, <4 x i64>* %0
265  %4 = load <4 x i64>, <4 x i64>* %1
266  %5 = and <4 x i64> %3, <i64 3, i64 8589934593, i64 3, i64 8589934593>
267  %6 = and <4 x i64> %4, <i64 -4, i64 -8589934594, i64 -4, i64 -8589934594>
268  %7 = or <4 x i64> %6, %5
269  ret <4 x i64> %7
270}
271
272;
273; 512-bit vectors
274;
275
276define <8 x i64> @bitselect_v8i64_rr(<8 x i64>, <8 x i64>) {
277; SSE-LABEL: bitselect_v8i64_rr:
278; SSE:       # %bb.0:
279; SSE-NEXT:    movaps {{.*#+}} xmm8 = [18446744060824649725,18446744060824649725]
280; SSE-NEXT:    andps %xmm8, %xmm7
281; SSE-NEXT:    movaps {{.*#+}} xmm9 = [18446744069414584319,18446744060824649725]
282; SSE-NEXT:    andps %xmm9, %xmm6
283; SSE-NEXT:    andps %xmm8, %xmm5
284; SSE-NEXT:    andps %xmm9, %xmm4
285; SSE-NEXT:    movaps %xmm9, %xmm10
286; SSE-NEXT:    andnps %xmm0, %xmm10
287; SSE-NEXT:    orps %xmm4, %xmm10
288; SSE-NEXT:    movaps %xmm8, %xmm4
289; SSE-NEXT:    andnps %xmm1, %xmm4
290; SSE-NEXT:    orps %xmm5, %xmm4
291; SSE-NEXT:    andnps %xmm2, %xmm9
292; SSE-NEXT:    orps %xmm6, %xmm9
293; SSE-NEXT:    andnps %xmm3, %xmm8
294; SSE-NEXT:    orps %xmm7, %xmm8
295; SSE-NEXT:    movaps %xmm10, %xmm0
296; SSE-NEXT:    movaps %xmm4, %xmm1
297; SSE-NEXT:    movaps %xmm9, %xmm2
298; SSE-NEXT:    movaps %xmm8, %xmm3
299; SSE-NEXT:    retq
300;
301; XOP-LABEL: bitselect_v8i64_rr:
302; XOP:       # %bb.0:
303; XOP-NEXT:    vmovdqa {{.*#+}} ymm4 = [18446744069414584319,18446744060824649725,18446744060824649725,18446744060824649725]
304; XOP-NEXT:    vpcmov %ymm4, %ymm0, %ymm2, %ymm0
305; XOP-NEXT:    vpcmov %ymm4, %ymm1, %ymm3, %ymm1
306; XOP-NEXT:    retq
307;
308; AVX1-LABEL: bitselect_v8i64_rr:
309; AVX1:       # %bb.0:
310; AVX1-NEXT:    vmovaps {{.*#+}} ymm4 = [18446744069414584319,18446744060824649725,18446744060824649725,18446744060824649725]
311; AVX1-NEXT:    vandps %ymm4, %ymm3, %ymm3
312; AVX1-NEXT:    vandps %ymm4, %ymm2, %ymm2
313; AVX1-NEXT:    vandnps %ymm0, %ymm4, %ymm0
314; AVX1-NEXT:    vorps %ymm0, %ymm2, %ymm0
315; AVX1-NEXT:    vandnps %ymm1, %ymm4, %ymm1
316; AVX1-NEXT:    vorps %ymm1, %ymm3, %ymm1
317; AVX1-NEXT:    retq
318;
319; AVX2-LABEL: bitselect_v8i64_rr:
320; AVX2:       # %bb.0:
321; AVX2-NEXT:    vmovaps {{.*#+}} ymm4 = [18446744069414584319,18446744060824649725,18446744060824649725,18446744060824649725]
322; AVX2-NEXT:    vandps %ymm4, %ymm3, %ymm3
323; AVX2-NEXT:    vandps %ymm4, %ymm2, %ymm2
324; AVX2-NEXT:    vandnps %ymm0, %ymm4, %ymm0
325; AVX2-NEXT:    vorps %ymm0, %ymm2, %ymm0
326; AVX2-NEXT:    vandnps %ymm1, %ymm4, %ymm1
327; AVX2-NEXT:    vorps %ymm1, %ymm3, %ymm1
328; AVX2-NEXT:    retq
329;
330; AVX512F-LABEL: bitselect_v8i64_rr:
331; AVX512F:       # %bb.0:
332; AVX512F-NEXT:    vpandq {{.*}}(%rip), %zmm0, %zmm0
333; AVX512F-NEXT:    vpandq {{.*}}(%rip), %zmm1, %zmm1
334; AVX512F-NEXT:    vporq %zmm0, %zmm1, %zmm0
335; AVX512F-NEXT:    retq
336  %3 = and <8 x i64> %0, <i64 4294967296, i64 12884901890, i64 12884901890, i64 12884901890, i64 4294967296, i64 12884901890, i64 12884901890, i64 12884901890>
337  %4 = and <8 x i64> %1, <i64 -4294967297, i64 -12884901891, i64 -12884901891, i64 -12884901891, i64 -4294967297, i64 -12884901891, i64 -12884901891, i64 -12884901891>
338  %5 = or <8 x i64> %4, %3
339  ret <8 x i64> %5
340}
341
342define <8 x i64> @bitselect_v8i64_rm(<8 x i64>, <8 x i64>* nocapture readonly) {
343; SSE-LABEL: bitselect_v8i64_rm:
344; SSE:       # %bb.0:
345; SSE-NEXT:    movaps {{.*#+}} xmm4 = [18446744065119617022,18446744073709551612]
346; SSE-NEXT:    movaps 48(%rdi), %xmm8
347; SSE-NEXT:    andps %xmm4, %xmm8
348; SSE-NEXT:    movaps 32(%rdi), %xmm9
349; SSE-NEXT:    andps %xmm4, %xmm9
350; SSE-NEXT:    movaps 16(%rdi), %xmm7
351; SSE-NEXT:    andps %xmm4, %xmm7
352; SSE-NEXT:    movaps (%rdi), %xmm6
353; SSE-NEXT:    andps %xmm4, %xmm6
354; SSE-NEXT:    movaps %xmm4, %xmm5
355; SSE-NEXT:    andnps %xmm0, %xmm5
356; SSE-NEXT:    orps %xmm6, %xmm5
357; SSE-NEXT:    movaps %xmm4, %xmm6
358; SSE-NEXT:    andnps %xmm1, %xmm6
359; SSE-NEXT:    orps %xmm7, %xmm6
360; SSE-NEXT:    movaps %xmm4, %xmm7
361; SSE-NEXT:    andnps %xmm2, %xmm7
362; SSE-NEXT:    orps %xmm9, %xmm7
363; SSE-NEXT:    andnps %xmm3, %xmm4
364; SSE-NEXT:    orps %xmm8, %xmm4
365; SSE-NEXT:    movaps %xmm5, %xmm0
366; SSE-NEXT:    movaps %xmm6, %xmm1
367; SSE-NEXT:    movaps %xmm7, %xmm2
368; SSE-NEXT:    movaps %xmm4, %xmm3
369; SSE-NEXT:    retq
370;
371; XOP-LABEL: bitselect_v8i64_rm:
372; XOP:       # %bb.0:
373; XOP-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [8589934593,3,8589934593,3]
374; XOP-NEXT:    # ymm2 = mem[0,1,0,1]
375; XOP-NEXT:    vandps %ymm2, %ymm1, %ymm1
376; XOP-NEXT:    vandps %ymm2, %ymm0, %ymm0
377; XOP-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [18446744065119617022,18446744073709551612,18446744065119617022,18446744073709551612]
378; XOP-NEXT:    # ymm2 = mem[0,1,0,1]
379; XOP-NEXT:    vandps 32(%rdi), %ymm2, %ymm3
380; XOP-NEXT:    vorps %ymm1, %ymm3, %ymm1
381; XOP-NEXT:    vandps (%rdi), %ymm2, %ymm2
382; XOP-NEXT:    vorps %ymm0, %ymm2, %ymm0
383; XOP-NEXT:    retq
384;
385; AVX1-LABEL: bitselect_v8i64_rm:
386; AVX1:       # %bb.0:
387; AVX1-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [8589934593,3,8589934593,3]
388; AVX1-NEXT:    # ymm2 = mem[0,1,0,1]
389; AVX1-NEXT:    vandps %ymm2, %ymm1, %ymm1
390; AVX1-NEXT:    vandps %ymm2, %ymm0, %ymm0
391; AVX1-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [18446744065119617022,18446744073709551612,18446744065119617022,18446744073709551612]
392; AVX1-NEXT:    # ymm2 = mem[0,1,0,1]
393; AVX1-NEXT:    vandps 32(%rdi), %ymm2, %ymm3
394; AVX1-NEXT:    vorps %ymm1, %ymm3, %ymm1
395; AVX1-NEXT:    vandps (%rdi), %ymm2, %ymm2
396; AVX1-NEXT:    vorps %ymm0, %ymm2, %ymm0
397; AVX1-NEXT:    retq
398;
399; AVX2-LABEL: bitselect_v8i64_rm:
400; AVX2:       # %bb.0:
401; AVX2-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [8589934593,3,8589934593,3]
402; AVX2-NEXT:    # ymm2 = mem[0,1,0,1]
403; AVX2-NEXT:    vandps %ymm2, %ymm1, %ymm1
404; AVX2-NEXT:    vandps %ymm2, %ymm0, %ymm0
405; AVX2-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [18446744065119617022,18446744073709551612,18446744065119617022,18446744073709551612]
406; AVX2-NEXT:    # ymm2 = mem[0,1,0,1]
407; AVX2-NEXT:    vandps 32(%rdi), %ymm2, %ymm3
408; AVX2-NEXT:    vorps %ymm1, %ymm3, %ymm1
409; AVX2-NEXT:    vandps (%rdi), %ymm2, %ymm2
410; AVX2-NEXT:    vorps %ymm0, %ymm2, %ymm0
411; AVX2-NEXT:    retq
412;
413; AVX512F-LABEL: bitselect_v8i64_rm:
414; AVX512F:       # %bb.0:
415; AVX512F-NEXT:    vmovdqa64 (%rdi), %zmm1
416; AVX512F-NEXT:    vpandq {{.*}}(%rip), %zmm0, %zmm0
417; AVX512F-NEXT:    vpandq {{.*}}(%rip), %zmm1, %zmm1
418; AVX512F-NEXT:    vporq %zmm0, %zmm1, %zmm0
419; AVX512F-NEXT:    retq
420  %3 = load <8 x i64>, <8 x i64>* %1
421  %4 = and <8 x i64> %0, <i64 8589934593, i64 3, i64 8589934593, i64 3, i64 8589934593, i64 3, i64 8589934593, i64 3>
422  %5 = and <8 x i64> %3, <i64 -8589934594, i64 -4, i64 -8589934594, i64 -4, i64 -8589934594, i64 -4, i64 -8589934594, i64 -4>
423  %6 = or <8 x i64> %5, %4
424  ret <8 x i64> %6
425}
426
427define <8 x i64> @bitselect_v8i64_mr(<8 x i64>* nocapture readonly, <8 x i64>) {
428; SSE-LABEL: bitselect_v8i64_mr:
429; SSE:       # %bb.0:
430; SSE-NEXT:    movaps {{.*#+}} xmm4 = [12884901890,4294967296]
431; SSE-NEXT:    movaps 48(%rdi), %xmm8
432; SSE-NEXT:    andps %xmm4, %xmm8
433; SSE-NEXT:    movaps 32(%rdi), %xmm9
434; SSE-NEXT:    andps %xmm4, %xmm9
435; SSE-NEXT:    movaps 16(%rdi), %xmm7
436; SSE-NEXT:    andps %xmm4, %xmm7
437; SSE-NEXT:    movaps (%rdi), %xmm6
438; SSE-NEXT:    andps %xmm4, %xmm6
439; SSE-NEXT:    movaps %xmm4, %xmm5
440; SSE-NEXT:    andnps %xmm0, %xmm5
441; SSE-NEXT:    orps %xmm6, %xmm5
442; SSE-NEXT:    movaps %xmm4, %xmm6
443; SSE-NEXT:    andnps %xmm1, %xmm6
444; SSE-NEXT:    orps %xmm7, %xmm6
445; SSE-NEXT:    movaps %xmm4, %xmm7
446; SSE-NEXT:    andnps %xmm2, %xmm7
447; SSE-NEXT:    orps %xmm9, %xmm7
448; SSE-NEXT:    andnps %xmm3, %xmm4
449; SSE-NEXT:    orps %xmm8, %xmm4
450; SSE-NEXT:    movaps %xmm5, %xmm0
451; SSE-NEXT:    movaps %xmm6, %xmm1
452; SSE-NEXT:    movaps %xmm7, %xmm2
453; SSE-NEXT:    movaps %xmm4, %xmm3
454; SSE-NEXT:    retq
455;
456; XOP-LABEL: bitselect_v8i64_mr:
457; XOP:       # %bb.0:
458; XOP-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [12884901890,4294967296,12884901890,4294967296]
459; XOP-NEXT:    # ymm2 = mem[0,1,0,1]
460; XOP-NEXT:    vandps 32(%rdi), %ymm2, %ymm3
461; XOP-NEXT:    vandps (%rdi), %ymm2, %ymm2
462; XOP-NEXT:    vbroadcastf128 {{.*#+}} ymm4 = [18446744060824649725,18446744069414584319,18446744060824649725,18446744069414584319]
463; XOP-NEXT:    # ymm4 = mem[0,1,0,1]
464; XOP-NEXT:    vandps %ymm4, %ymm1, %ymm1
465; XOP-NEXT:    vorps %ymm1, %ymm3, %ymm1
466; XOP-NEXT:    vandps %ymm4, %ymm0, %ymm0
467; XOP-NEXT:    vorps %ymm0, %ymm2, %ymm0
468; XOP-NEXT:    retq
469;
470; AVX1-LABEL: bitselect_v8i64_mr:
471; AVX1:       # %bb.0:
472; AVX1-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [12884901890,4294967296,12884901890,4294967296]
473; AVX1-NEXT:    # ymm2 = mem[0,1,0,1]
474; AVX1-NEXT:    vandps 32(%rdi), %ymm2, %ymm3
475; AVX1-NEXT:    vandps (%rdi), %ymm2, %ymm2
476; AVX1-NEXT:    vbroadcastf128 {{.*#+}} ymm4 = [18446744060824649725,18446744069414584319,18446744060824649725,18446744069414584319]
477; AVX1-NEXT:    # ymm4 = mem[0,1,0,1]
478; AVX1-NEXT:    vandps %ymm4, %ymm1, %ymm1
479; AVX1-NEXT:    vorps %ymm1, %ymm3, %ymm1
480; AVX1-NEXT:    vandps %ymm4, %ymm0, %ymm0
481; AVX1-NEXT:    vorps %ymm0, %ymm2, %ymm0
482; AVX1-NEXT:    retq
483;
484; AVX2-LABEL: bitselect_v8i64_mr:
485; AVX2:       # %bb.0:
486; AVX2-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [12884901890,4294967296,12884901890,4294967296]
487; AVX2-NEXT:    # ymm2 = mem[0,1,0,1]
488; AVX2-NEXT:    vandps 32(%rdi), %ymm2, %ymm3
489; AVX2-NEXT:    vandps (%rdi), %ymm2, %ymm2
490; AVX2-NEXT:    vbroadcastf128 {{.*#+}} ymm4 = [18446744060824649725,18446744069414584319,18446744060824649725,18446744069414584319]
491; AVX2-NEXT:    # ymm4 = mem[0,1,0,1]
492; AVX2-NEXT:    vandps %ymm4, %ymm1, %ymm1
493; AVX2-NEXT:    vorps %ymm1, %ymm3, %ymm1
494; AVX2-NEXT:    vandps %ymm4, %ymm0, %ymm0
495; AVX2-NEXT:    vorps %ymm0, %ymm2, %ymm0
496; AVX2-NEXT:    retq
497;
498; AVX512F-LABEL: bitselect_v8i64_mr:
499; AVX512F:       # %bb.0:
500; AVX512F-NEXT:    vmovdqa64 (%rdi), %zmm1
501; AVX512F-NEXT:    vpandq {{.*}}(%rip), %zmm1, %zmm1
502; AVX512F-NEXT:    vpandq {{.*}}(%rip), %zmm0, %zmm0
503; AVX512F-NEXT:    vporq %zmm0, %zmm1, %zmm0
504; AVX512F-NEXT:    retq
505  %3 = load <8 x i64>, <8 x i64>* %0
506  %4 = and <8 x i64> %3, <i64 12884901890, i64 4294967296, i64 12884901890, i64 4294967296, i64 12884901890, i64 4294967296, i64 12884901890, i64 4294967296>
507  %5 = and <8 x i64> %1, <i64 -12884901891, i64 -4294967297, i64 -12884901891, i64 -4294967297, i64 -12884901891, i64 -4294967297, i64 -12884901891, i64 -4294967297>
508  %6 = or <8 x i64> %4, %5
509  ret <8 x i64> %6
510}
511
512define <8 x i64> @bitselect_v8i64_mm(<8 x i64>* nocapture readonly, <8 x i64>* nocapture readonly) {
513; SSE-LABEL: bitselect_v8i64_mm:
514; SSE:       # %bb.0:
515; SSE-NEXT:    movaps {{.*#+}} xmm3 = [18446744073709551612,18446744065119617022]
516; SSE-NEXT:    movaps 48(%rsi), %xmm4
517; SSE-NEXT:    andps %xmm3, %xmm4
518; SSE-NEXT:    movaps 32(%rsi), %xmm5
519; SSE-NEXT:    andps %xmm3, %xmm5
520; SSE-NEXT:    movaps 16(%rsi), %xmm2
521; SSE-NEXT:    andps %xmm3, %xmm2
522; SSE-NEXT:    movaps (%rsi), %xmm1
523; SSE-NEXT:    andps %xmm3, %xmm1
524; SSE-NEXT:    movaps %xmm3, %xmm0
525; SSE-NEXT:    andnps (%rdi), %xmm0
526; SSE-NEXT:    orps %xmm1, %xmm0
527; SSE-NEXT:    movaps %xmm3, %xmm1
528; SSE-NEXT:    andnps 16(%rdi), %xmm1
529; SSE-NEXT:    orps %xmm2, %xmm1
530; SSE-NEXT:    movaps %xmm3, %xmm2
531; SSE-NEXT:    andnps 32(%rdi), %xmm2
532; SSE-NEXT:    orps %xmm5, %xmm2
533; SSE-NEXT:    andnps 48(%rdi), %xmm3
534; SSE-NEXT:    orps %xmm4, %xmm3
535; SSE-NEXT:    retq
536;
537; XOP-LABEL: bitselect_v8i64_mm:
538; XOP:       # %bb.0:
539; XOP-NEXT:    vbroadcastf128 {{.*#+}} ymm0 = [3,8589934593,3,8589934593]
540; XOP-NEXT:    # ymm0 = mem[0,1,0,1]
541; XOP-NEXT:    vandps 32(%rdi), %ymm0, %ymm1
542; XOP-NEXT:    vandps (%rdi), %ymm0, %ymm0
543; XOP-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [18446744073709551612,18446744065119617022,18446744073709551612,18446744065119617022]
544; XOP-NEXT:    # ymm2 = mem[0,1,0,1]
545; XOP-NEXT:    vandps 32(%rsi), %ymm2, %ymm3
546; XOP-NEXT:    vorps %ymm1, %ymm3, %ymm1
547; XOP-NEXT:    vandps (%rsi), %ymm2, %ymm2
548; XOP-NEXT:    vorps %ymm0, %ymm2, %ymm0
549; XOP-NEXT:    retq
550;
551; AVX1-LABEL: bitselect_v8i64_mm:
552; AVX1:       # %bb.0:
553; AVX1-NEXT:    vbroadcastf128 {{.*#+}} ymm0 = [3,8589934593,3,8589934593]
554; AVX1-NEXT:    # ymm0 = mem[0,1,0,1]
555; AVX1-NEXT:    vandps 32(%rdi), %ymm0, %ymm1
556; AVX1-NEXT:    vandps (%rdi), %ymm0, %ymm0
557; AVX1-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [18446744073709551612,18446744065119617022,18446744073709551612,18446744065119617022]
558; AVX1-NEXT:    # ymm2 = mem[0,1,0,1]
559; AVX1-NEXT:    vandps 32(%rsi), %ymm2, %ymm3
560; AVX1-NEXT:    vorps %ymm1, %ymm3, %ymm1
561; AVX1-NEXT:    vandps (%rsi), %ymm2, %ymm2
562; AVX1-NEXT:    vorps %ymm0, %ymm2, %ymm0
563; AVX1-NEXT:    retq
564;
565; AVX2-LABEL: bitselect_v8i64_mm:
566; AVX2:       # %bb.0:
567; AVX2-NEXT:    vbroadcastf128 {{.*#+}} ymm0 = [3,8589934593,3,8589934593]
568; AVX2-NEXT:    # ymm0 = mem[0,1,0,1]
569; AVX2-NEXT:    vandps 32(%rdi), %ymm0, %ymm1
570; AVX2-NEXT:    vandps (%rdi), %ymm0, %ymm0
571; AVX2-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [18446744073709551612,18446744065119617022,18446744073709551612,18446744065119617022]
572; AVX2-NEXT:    # ymm2 = mem[0,1,0,1]
573; AVX2-NEXT:    vandps 32(%rsi), %ymm2, %ymm3
574; AVX2-NEXT:    vorps %ymm1, %ymm3, %ymm1
575; AVX2-NEXT:    vandps (%rsi), %ymm2, %ymm2
576; AVX2-NEXT:    vorps %ymm0, %ymm2, %ymm0
577; AVX2-NEXT:    retq
578;
579; AVX512F-LABEL: bitselect_v8i64_mm:
580; AVX512F:       # %bb.0:
581; AVX512F-NEXT:    vmovdqa64 (%rdi), %zmm0
582; AVX512F-NEXT:    vmovdqa64 (%rsi), %zmm1
583; AVX512F-NEXT:    vpandq {{.*}}(%rip), %zmm0, %zmm0
584; AVX512F-NEXT:    vpandq {{.*}}(%rip), %zmm1, %zmm1
585; AVX512F-NEXT:    vporq %zmm0, %zmm1, %zmm0
586; AVX512F-NEXT:    retq
587  %3 = load <8 x i64>, <8 x i64>* %0
588  %4 = load <8 x i64>, <8 x i64>* %1
589  %5 = and <8 x i64> %3, <i64 3, i64 8589934593, i64 3, i64 8589934593, i64 3, i64 8589934593, i64 3, i64 8589934593>
590  %6 = and <8 x i64> %4, <i64 -4, i64 -8589934594, i64 -4, i64 -8589934594, i64 -4, i64 -8589934594, i64 -4, i64 -8589934594>
591  %7 = or <8 x i64> %6, %5
592  ret <8 x i64> %7
593}
594
595; Check that mask registers don't get canonicalized.
596define void @bitselect_v4i1_loop(<4 x i32> %a0) {
597; SSE-LABEL: bitselect_v4i1_loop:
598; SSE:       # %bb.0: # %bb
599; SSE-NEXT:    pxor %xmm1, %xmm1
600; SSE-NEXT:    pcmpeqd %xmm0, %xmm1
601; SSE-NEXT:    pcmpeqd %xmm2, %xmm2
602; SSE-NEXT:    pxor %xmm1, %xmm2
603; SSE-NEXT:    pcmpeqd {{.*}}(%rip), %xmm0
604; SSE-NEXT:    movdqa %xmm1, %xmm3
605; SSE-NEXT:    pandn %xmm0, %xmm3
606; SSE-NEXT:    .p2align 4, 0x90
607; SSE-NEXT:  .LBB12_1: # %bb1
608; SSE-NEXT:    # =>This Inner Loop Header: Depth=1
609; SSE-NEXT:    pand %xmm1, %xmm2
610; SSE-NEXT:    por %xmm3, %xmm2
611; SSE-NEXT:    jmp .LBB12_1
612;
613; XOP-LABEL: bitselect_v4i1_loop:
614; XOP:       # %bb.0: # %bb
615; XOP-NEXT:    vpxor %xmm1, %xmm1, %xmm1
616; XOP-NEXT:    vpcomneqd %xmm1, %xmm0, %xmm1
617; XOP-NEXT:    vpcomeqd {{.*}}(%rip), %xmm0, %xmm0
618; XOP-NEXT:    vmovdqa %xmm1, %xmm2
619; XOP-NEXT:    .p2align 4, 0x90
620; XOP-NEXT:  .LBB12_1: # %bb1
621; XOP-NEXT:    # =>This Inner Loop Header: Depth=1
622; XOP-NEXT:    vblendvps %xmm1, %xmm0, %xmm2, %xmm2
623; XOP-NEXT:    jmp .LBB12_1
624;
625; AVX1-LABEL: bitselect_v4i1_loop:
626; AVX1:       # %bb.0: # %bb
627; AVX1-NEXT:    vpxor %xmm1, %xmm1, %xmm1
628; AVX1-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm1
629; AVX1-NEXT:    vpcmpeqd %xmm2, %xmm2, %xmm2
630; AVX1-NEXT:    vpxor %xmm2, %xmm1, %xmm2
631; AVX1-NEXT:    vpcmpeqd {{.*}}(%rip), %xmm0, %xmm0
632; AVX1-NEXT:    .p2align 4, 0x90
633; AVX1-NEXT:  .LBB12_1: # %bb1
634; AVX1-NEXT:    # =>This Inner Loop Header: Depth=1
635; AVX1-NEXT:    vblendvps %xmm1, %xmm2, %xmm0, %xmm2
636; AVX1-NEXT:    jmp .LBB12_1
637;
638; AVX2-LABEL: bitselect_v4i1_loop:
639; AVX2:       # %bb.0: # %bb
640; AVX2-NEXT:    vpxor %xmm1, %xmm1, %xmm1
641; AVX2-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm1
642; AVX2-NEXT:    vpcmpeqd %xmm2, %xmm2, %xmm2
643; AVX2-NEXT:    vpxor %xmm2, %xmm1, %xmm2
644; AVX2-NEXT:    vpbroadcastd {{.*#+}} xmm3 = [12,12,12,12]
645; AVX2-NEXT:    vpcmpeqd %xmm3, %xmm0, %xmm0
646; AVX2-NEXT:    .p2align 4, 0x90
647; AVX2-NEXT:  .LBB12_1: # %bb1
648; AVX2-NEXT:    # =>This Inner Loop Header: Depth=1
649; AVX2-NEXT:    vblendvps %xmm1, %xmm2, %xmm0, %xmm2
650; AVX2-NEXT:    jmp .LBB12_1
651;
652; AVX512F-LABEL: bitselect_v4i1_loop:
653; AVX512F:       # %bb.0: # %bb
654; AVX512F-NEXT:    # kill: def $xmm0 killed $xmm0 def $zmm0
655; AVX512F-NEXT:    vptestmd %zmm0, %zmm0, %k1
656; AVX512F-NEXT:    vpbroadcastd {{.*#+}} xmm1 = [12,12,12,12]
657; AVX512F-NEXT:    vpcmpeqd %zmm1, %zmm0, %k2
658; AVX512F-NEXT:    vptestmd %zmm0, %zmm0, %k0 {%k2}
659; AVX512F-NEXT:    .p2align 4, 0x90
660; AVX512F-NEXT:  .LBB12_1: # %bb1
661; AVX512F-NEXT:    # =>This Inner Loop Header: Depth=1
662; AVX512F-NEXT:    vptestnmd %zmm0, %zmm0, %k1 {%k1}
663; AVX512F-NEXT:    korw %k1, %k0, %k1
664; AVX512F-NEXT:    jmp .LBB12_1
665bb:
666  %tmp = icmp ne <4 x i32> %a0, zeroinitializer
667  br label %bb1
668
669bb1:                                              ; preds = %bb1, %bb
670  %tmp2 = phi <4 x i1> [ %tmp, %bb ], [ %tmp4, %bb1 ]
671  %tmp3 = icmp eq <4 x i32> %a0, <i32 12, i32 12, i32 12, i32 12>
672  %tmp4 = select <4 x i1> %tmp, <4 x i1> %tmp3, <4 x i1> %tmp2
673  %tmp5 = and <4 x i1> %tmp4, %tmp
674  br label %bb1
675}
676