1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop  | FileCheck %s --check-prefixes=XOP
4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx  | FileCheck %s --check-prefixes=AVX,AVX1
5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512F
7
8;
9; 128-bit vectors
10;
11
12define <2 x i64> @bitselect_v2i64_rr(<2 x i64>, <2 x i64>) {
13; SSE-LABEL: bitselect_v2i64_rr:
14; SSE:       # %bb.0:
15; SSE-NEXT:    andps {{.*}}(%rip), %xmm0
16; SSE-NEXT:    andps {{.*}}(%rip), %xmm1
17; SSE-NEXT:    orps %xmm1, %xmm0
18; SSE-NEXT:    retq
19;
20; XOP-LABEL: bitselect_v2i64_rr:
21; XOP:       # %bb.0:
22; XOP-NEXT:    vandps {{.*}}(%rip), %xmm0, %xmm0
23; XOP-NEXT:    vandps {{.*}}(%rip), %xmm1, %xmm1
24; XOP-NEXT:    vorps %xmm0, %xmm1, %xmm0
25; XOP-NEXT:    retq
26;
27; AVX-LABEL: bitselect_v2i64_rr:
28; AVX:       # %bb.0:
29; AVX-NEXT:    vandps {{.*}}(%rip), %xmm0, %xmm0
30; AVX-NEXT:    vandps {{.*}}(%rip), %xmm1, %xmm1
31; AVX-NEXT:    vorps %xmm0, %xmm1, %xmm0
32; AVX-NEXT:    retq
33  %3 = and <2 x i64> %0, <i64 4294967296, i64 12884901890>
34  %4 = and <2 x i64> %1, <i64 -4294967297, i64 -12884901891>
35  %5 = or <2 x i64> %4, %3
36  ret <2 x i64> %5
37}
38
39define <2 x i64> @bitselect_v2i64_rm(<2 x i64>, <2 x i64>* nocapture readonly) {
40; SSE-LABEL: bitselect_v2i64_rm:
41; SSE:       # %bb.0:
42; SSE-NEXT:    movaps (%rdi), %xmm1
43; SSE-NEXT:    andps {{.*}}(%rip), %xmm0
44; SSE-NEXT:    andps {{.*}}(%rip), %xmm1
45; SSE-NEXT:    orps %xmm1, %xmm0
46; SSE-NEXT:    retq
47;
48; XOP-LABEL: bitselect_v2i64_rm:
49; XOP:       # %bb.0:
50; XOP-NEXT:    vmovaps (%rdi), %xmm1
51; XOP-NEXT:    vandps {{.*}}(%rip), %xmm0, %xmm0
52; XOP-NEXT:    vandps {{.*}}(%rip), %xmm1, %xmm1
53; XOP-NEXT:    vorps %xmm0, %xmm1, %xmm0
54; XOP-NEXT:    retq
55;
56; AVX-LABEL: bitselect_v2i64_rm:
57; AVX:       # %bb.0:
58; AVX-NEXT:    vmovaps (%rdi), %xmm1
59; AVX-NEXT:    vandps {{.*}}(%rip), %xmm0, %xmm0
60; AVX-NEXT:    vandps {{.*}}(%rip), %xmm1, %xmm1
61; AVX-NEXT:    vorps %xmm0, %xmm1, %xmm0
62; AVX-NEXT:    retq
63  %3 = load <2 x i64>, <2 x i64>* %1
64  %4 = and <2 x i64> %0, <i64 8589934593, i64 3>
65  %5 = and <2 x i64> %3, <i64 -8589934594, i64 -4>
66  %6 = or <2 x i64> %5, %4
67  ret <2 x i64> %6
68}
69
70define <2 x i64> @bitselect_v2i64_mr(<2 x i64>* nocapture readonly, <2 x i64>) {
71; SSE-LABEL: bitselect_v2i64_mr:
72; SSE:       # %bb.0:
73; SSE-NEXT:    movaps (%rdi), %xmm1
74; SSE-NEXT:    andps {{.*}}(%rip), %xmm1
75; SSE-NEXT:    andps {{.*}}(%rip), %xmm0
76; SSE-NEXT:    orps %xmm1, %xmm0
77; SSE-NEXT:    retq
78;
79; XOP-LABEL: bitselect_v2i64_mr:
80; XOP:       # %bb.0:
81; XOP-NEXT:    vmovaps (%rdi), %xmm1
82; XOP-NEXT:    vandps {{.*}}(%rip), %xmm1, %xmm1
83; XOP-NEXT:    vandps {{.*}}(%rip), %xmm0, %xmm0
84; XOP-NEXT:    vorps %xmm0, %xmm1, %xmm0
85; XOP-NEXT:    retq
86;
87; AVX-LABEL: bitselect_v2i64_mr:
88; AVX:       # %bb.0:
89; AVX-NEXT:    vmovaps (%rdi), %xmm1
90; AVX-NEXT:    vandps {{.*}}(%rip), %xmm1, %xmm1
91; AVX-NEXT:    vandps {{.*}}(%rip), %xmm0, %xmm0
92; AVX-NEXT:    vorps %xmm0, %xmm1, %xmm0
93; AVX-NEXT:    retq
94  %3 = load <2 x i64>, <2 x i64>* %0
95  %4 = and <2 x i64> %3, <i64 12884901890, i64 4294967296>
96  %5 = and <2 x i64> %1, <i64 -12884901891, i64 -4294967297>
97  %6 = or <2 x i64> %4, %5
98  ret <2 x i64> %6
99}
100
101define <2 x i64> @bitselect_v2i64_mm(<2 x i64>* nocapture readonly, <2 x i64>* nocapture readonly) {
102; SSE-LABEL: bitselect_v2i64_mm:
103; SSE:       # %bb.0:
104; SSE-NEXT:    movaps (%rdi), %xmm1
105; SSE-NEXT:    movaps (%rsi), %xmm0
106; SSE-NEXT:    andps {{.*}}(%rip), %xmm1
107; SSE-NEXT:    andps {{.*}}(%rip), %xmm0
108; SSE-NEXT:    orps %xmm1, %xmm0
109; SSE-NEXT:    retq
110;
111; XOP-LABEL: bitselect_v2i64_mm:
112; XOP:       # %bb.0:
113; XOP-NEXT:    vmovaps (%rdi), %xmm0
114; XOP-NEXT:    vmovaps (%rsi), %xmm1
115; XOP-NEXT:    vandps {{.*}}(%rip), %xmm0, %xmm0
116; XOP-NEXT:    vandps {{.*}}(%rip), %xmm1, %xmm1
117; XOP-NEXT:    vorps %xmm0, %xmm1, %xmm0
118; XOP-NEXT:    retq
119;
120; AVX-LABEL: bitselect_v2i64_mm:
121; AVX:       # %bb.0:
122; AVX-NEXT:    vmovaps (%rdi), %xmm0
123; AVX-NEXT:    vmovaps (%rsi), %xmm1
124; AVX-NEXT:    vandps {{.*}}(%rip), %xmm0, %xmm0
125; AVX-NEXT:    vandps {{.*}}(%rip), %xmm1, %xmm1
126; AVX-NEXT:    vorps %xmm0, %xmm1, %xmm0
127; AVX-NEXT:    retq
128  %3 = load <2 x i64>, <2 x i64>* %0
129  %4 = load <2 x i64>, <2 x i64>* %1
130  %5 = and <2 x i64> %3, <i64 3, i64 8589934593>
131  %6 = and <2 x i64> %4, <i64 -4, i64 -8589934594>
132  %7 = or <2 x i64> %6, %5
133  ret <2 x i64> %7
134}
135
136;
137; 256-bit vectors
138;
139
140define <4 x i64> @bitselect_v4i64_rr(<4 x i64>, <4 x i64>) {
141; SSE-LABEL: bitselect_v4i64_rr:
142; SSE:       # %bb.0:
143; SSE-NEXT:    andps {{.*}}(%rip), %xmm1
144; SSE-NEXT:    andps {{.*}}(%rip), %xmm0
145; SSE-NEXT:    andps {{.*}}(%rip), %xmm3
146; SSE-NEXT:    orps %xmm3, %xmm1
147; SSE-NEXT:    andps {{.*}}(%rip), %xmm2
148; SSE-NEXT:    orps %xmm2, %xmm0
149; SSE-NEXT:    retq
150;
151; XOP-LABEL: bitselect_v4i64_rr:
152; XOP:       # %bb.0:
153; XOP-NEXT:    vandps {{.*}}(%rip), %ymm0, %ymm0
154; XOP-NEXT:    vandps {{.*}}(%rip), %ymm1, %ymm1
155; XOP-NEXT:    vorps %ymm0, %ymm1, %ymm0
156; XOP-NEXT:    retq
157;
158; AVX-LABEL: bitselect_v4i64_rr:
159; AVX:       # %bb.0:
160; AVX-NEXT:    vandps {{.*}}(%rip), %ymm0, %ymm0
161; AVX-NEXT:    vandps {{.*}}(%rip), %ymm1, %ymm1
162; AVX-NEXT:    vorps %ymm0, %ymm1, %ymm0
163; AVX-NEXT:    retq
164  %3 = and <4 x i64> %0, <i64 4294967296, i64 12884901890, i64 12884901890, i64 12884901890>
165  %4 = and <4 x i64> %1, <i64 -4294967297, i64 -12884901891, i64 -12884901891, i64 -12884901891>
166  %5 = or <4 x i64> %4, %3
167  ret <4 x i64> %5
168}
169
170define <4 x i64> @bitselect_v4i64_rm(<4 x i64>, <4 x i64>* nocapture readonly) {
171; SSE-LABEL: bitselect_v4i64_rm:
172; SSE:       # %bb.0:
173; SSE-NEXT:    movaps {{.*#+}} xmm2 = [8589934593,3]
174; SSE-NEXT:    andps %xmm2, %xmm1
175; SSE-NEXT:    andps %xmm2, %xmm0
176; SSE-NEXT:    movaps {{.*#+}} xmm2 = [18446744065119617022,18446744073709551612]
177; SSE-NEXT:    movaps 16(%rdi), %xmm3
178; SSE-NEXT:    andps %xmm2, %xmm3
179; SSE-NEXT:    orps %xmm3, %xmm1
180; SSE-NEXT:    andps (%rdi), %xmm2
181; SSE-NEXT:    orps %xmm2, %xmm0
182; SSE-NEXT:    retq
183;
184; XOP-LABEL: bitselect_v4i64_rm:
185; XOP:       # %bb.0:
186; XOP-NEXT:    vmovaps (%rdi), %ymm1
187; XOP-NEXT:    vandps {{.*}}(%rip), %ymm0, %ymm0
188; XOP-NEXT:    vandps {{.*}}(%rip), %ymm1, %ymm1
189; XOP-NEXT:    vorps %ymm0, %ymm1, %ymm0
190; XOP-NEXT:    retq
191;
192; AVX-LABEL: bitselect_v4i64_rm:
193; AVX:       # %bb.0:
194; AVX-NEXT:    vmovaps (%rdi), %ymm1
195; AVX-NEXT:    vandps {{.*}}(%rip), %ymm0, %ymm0
196; AVX-NEXT:    vandps {{.*}}(%rip), %ymm1, %ymm1
197; AVX-NEXT:    vorps %ymm0, %ymm1, %ymm0
198; AVX-NEXT:    retq
199  %3 = load <4 x i64>, <4 x i64>* %1
200  %4 = and <4 x i64> %0, <i64 8589934593, i64 3, i64 8589934593, i64 3>
201  %5 = and <4 x i64> %3, <i64 -8589934594, i64 -4, i64 -8589934594, i64 -4>
202  %6 = or <4 x i64> %5, %4
203  ret <4 x i64> %6
204}
205
206define <4 x i64> @bitselect_v4i64_mr(<4 x i64>* nocapture readonly, <4 x i64>) {
207; SSE-LABEL: bitselect_v4i64_mr:
208; SSE:       # %bb.0:
209; SSE-NEXT:    movaps {{.*#+}} xmm2 = [12884901890,4294967296]
210; SSE-NEXT:    movaps 16(%rdi), %xmm3
211; SSE-NEXT:    andps %xmm2, %xmm3
212; SSE-NEXT:    andps (%rdi), %xmm2
213; SSE-NEXT:    movaps {{.*#+}} xmm4 = [18446744060824649725,18446744069414584319]
214; SSE-NEXT:    andps %xmm4, %xmm1
215; SSE-NEXT:    orps %xmm3, %xmm1
216; SSE-NEXT:    andps %xmm4, %xmm0
217; SSE-NEXT:    orps %xmm2, %xmm0
218; SSE-NEXT:    retq
219;
220; XOP-LABEL: bitselect_v4i64_mr:
221; XOP:       # %bb.0:
222; XOP-NEXT:    vmovaps (%rdi), %ymm1
223; XOP-NEXT:    vandps {{.*}}(%rip), %ymm1, %ymm1
224; XOP-NEXT:    vandps {{.*}}(%rip), %ymm0, %ymm0
225; XOP-NEXT:    vorps %ymm0, %ymm1, %ymm0
226; XOP-NEXT:    retq
227;
228; AVX-LABEL: bitselect_v4i64_mr:
229; AVX:       # %bb.0:
230; AVX-NEXT:    vmovaps (%rdi), %ymm1
231; AVX-NEXT:    vandps {{.*}}(%rip), %ymm1, %ymm1
232; AVX-NEXT:    vandps {{.*}}(%rip), %ymm0, %ymm0
233; AVX-NEXT:    vorps %ymm0, %ymm1, %ymm0
234; AVX-NEXT:    retq
235  %3 = load <4 x i64>, <4 x i64>* %0
236  %4 = and <4 x i64> %3, <i64 12884901890, i64 4294967296, i64 12884901890, i64 4294967296>
237  %5 = and <4 x i64> %1, <i64 -12884901891, i64 -4294967297, i64 -12884901891, i64 -4294967297>
238  %6 = or <4 x i64> %4, %5
239  ret <4 x i64> %6
240}
241
242define <4 x i64> @bitselect_v4i64_mm(<4 x i64>* nocapture readonly, <4 x i64>* nocapture readonly) {
243; SSE-LABEL: bitselect_v4i64_mm:
244; SSE:       # %bb.0:
245; SSE-NEXT:    movaps {{.*#+}} xmm2 = [3,8589934593]
246; SSE-NEXT:    movaps 16(%rdi), %xmm3
247; SSE-NEXT:    andps %xmm2, %xmm3
248; SSE-NEXT:    andps (%rdi), %xmm2
249; SSE-NEXT:    movaps {{.*#+}} xmm0 = [18446744073709551612,18446744065119617022]
250; SSE-NEXT:    movaps 16(%rsi), %xmm1
251; SSE-NEXT:    andps %xmm0, %xmm1
252; SSE-NEXT:    orps %xmm3, %xmm1
253; SSE-NEXT:    andps (%rsi), %xmm0
254; SSE-NEXT:    orps %xmm2, %xmm0
255; SSE-NEXT:    retq
256;
257; XOP-LABEL: bitselect_v4i64_mm:
258; XOP:       # %bb.0:
259; XOP-NEXT:    vmovaps (%rdi), %ymm0
260; XOP-NEXT:    vmovaps (%rsi), %ymm1
261; XOP-NEXT:    vandps {{.*}}(%rip), %ymm0, %ymm0
262; XOP-NEXT:    vandps {{.*}}(%rip), %ymm1, %ymm1
263; XOP-NEXT:    vorps %ymm0, %ymm1, %ymm0
264; XOP-NEXT:    retq
265;
266; AVX-LABEL: bitselect_v4i64_mm:
267; AVX:       # %bb.0:
268; AVX-NEXT:    vmovaps (%rdi), %ymm0
269; AVX-NEXT:    vmovaps (%rsi), %ymm1
270; AVX-NEXT:    vandps {{.*}}(%rip), %ymm0, %ymm0
271; AVX-NEXT:    vandps {{.*}}(%rip), %ymm1, %ymm1
272; AVX-NEXT:    vorps %ymm0, %ymm1, %ymm0
273; AVX-NEXT:    retq
274  %3 = load <4 x i64>, <4 x i64>* %0
275  %4 = load <4 x i64>, <4 x i64>* %1
276  %5 = and <4 x i64> %3, <i64 3, i64 8589934593, i64 3, i64 8589934593>
277  %6 = and <4 x i64> %4, <i64 -4, i64 -8589934594, i64 -4, i64 -8589934594>
278  %7 = or <4 x i64> %6, %5
279  ret <4 x i64> %7
280}
281
282;
283; 512-bit vectors
284;
285
286define <8 x i64> @bitselect_v8i64_rr(<8 x i64>, <8 x i64>) {
287; SSE-LABEL: bitselect_v8i64_rr:
288; SSE:       # %bb.0:
289; SSE-NEXT:    movaps {{.*#+}} xmm8 = [12884901890,12884901890]
290; SSE-NEXT:    andps %xmm8, %xmm3
291; SSE-NEXT:    movaps {{.*#+}} xmm9 = [4294967296,12884901890]
292; SSE-NEXT:    andps %xmm9, %xmm2
293; SSE-NEXT:    andps %xmm8, %xmm1
294; SSE-NEXT:    andps %xmm9, %xmm0
295; SSE-NEXT:    movaps {{.*#+}} xmm8 = [18446744060824649725,18446744060824649725]
296; SSE-NEXT:    andps %xmm8, %xmm7
297; SSE-NEXT:    orps %xmm7, %xmm3
298; SSE-NEXT:    movaps {{.*#+}} xmm7 = [18446744069414584319,18446744060824649725]
299; SSE-NEXT:    andps %xmm7, %xmm6
300; SSE-NEXT:    orps %xmm6, %xmm2
301; SSE-NEXT:    andps %xmm5, %xmm8
302; SSE-NEXT:    orps %xmm8, %xmm1
303; SSE-NEXT:    andps %xmm4, %xmm7
304; SSE-NEXT:    orps %xmm7, %xmm0
305; SSE-NEXT:    retq
306;
307; XOP-LABEL: bitselect_v8i64_rr:
308; XOP:       # %bb.0:
309; XOP-NEXT:    vmovaps {{.*#+}} ymm4 = [4294967296,12884901890,12884901890,12884901890]
310; XOP-NEXT:    vandps %ymm4, %ymm1, %ymm1
311; XOP-NEXT:    vandps %ymm4, %ymm0, %ymm0
312; XOP-NEXT:    vmovaps {{.*#+}} ymm4 = [18446744069414584319,18446744060824649725,18446744060824649725,18446744060824649725]
313; XOP-NEXT:    vandps %ymm4, %ymm3, %ymm3
314; XOP-NEXT:    vorps %ymm1, %ymm3, %ymm1
315; XOP-NEXT:    vandps %ymm4, %ymm2, %ymm2
316; XOP-NEXT:    vorps %ymm0, %ymm2, %ymm0
317; XOP-NEXT:    retq
318;
319; AVX1-LABEL: bitselect_v8i64_rr:
320; AVX1:       # %bb.0:
321; AVX1-NEXT:    vmovaps {{.*#+}} ymm4 = [4294967296,12884901890,12884901890,12884901890]
322; AVX1-NEXT:    vandps %ymm4, %ymm1, %ymm1
323; AVX1-NEXT:    vandps %ymm4, %ymm0, %ymm0
324; AVX1-NEXT:    vmovaps {{.*#+}} ymm4 = [18446744069414584319,18446744060824649725,18446744060824649725,18446744060824649725]
325; AVX1-NEXT:    vandps %ymm4, %ymm3, %ymm3
326; AVX1-NEXT:    vorps %ymm1, %ymm3, %ymm1
327; AVX1-NEXT:    vandps %ymm4, %ymm2, %ymm2
328; AVX1-NEXT:    vorps %ymm0, %ymm2, %ymm0
329; AVX1-NEXT:    retq
330;
331; AVX2-LABEL: bitselect_v8i64_rr:
332; AVX2:       # %bb.0:
333; AVX2-NEXT:    vmovaps {{.*#+}} ymm4 = [4294967296,12884901890,12884901890,12884901890]
334; AVX2-NEXT:    vandps %ymm4, %ymm1, %ymm1
335; AVX2-NEXT:    vandps %ymm4, %ymm0, %ymm0
336; AVX2-NEXT:    vmovaps {{.*#+}} ymm4 = [18446744069414584319,18446744060824649725,18446744060824649725,18446744060824649725]
337; AVX2-NEXT:    vandps %ymm4, %ymm3, %ymm3
338; AVX2-NEXT:    vorps %ymm1, %ymm3, %ymm1
339; AVX2-NEXT:    vandps %ymm4, %ymm2, %ymm2
340; AVX2-NEXT:    vorps %ymm0, %ymm2, %ymm0
341; AVX2-NEXT:    retq
342;
343; AVX512F-LABEL: bitselect_v8i64_rr:
344; AVX512F:       # %bb.0:
345; AVX512F-NEXT:    vpandq {{.*}}(%rip), %zmm0, %zmm0
346; AVX512F-NEXT:    vpandq {{.*}}(%rip), %zmm1, %zmm1
347; AVX512F-NEXT:    vporq %zmm0, %zmm1, %zmm0
348; AVX512F-NEXT:    retq
349  %3 = and <8 x i64> %0, <i64 4294967296, i64 12884901890, i64 12884901890, i64 12884901890, i64 4294967296, i64 12884901890, i64 12884901890, i64 12884901890>
350  %4 = and <8 x i64> %1, <i64 -4294967297, i64 -12884901891, i64 -12884901891, i64 -12884901891, i64 -4294967297, i64 -12884901891, i64 -12884901891, i64 -12884901891>
351  %5 = or <8 x i64> %4, %3
352  ret <8 x i64> %5
353}
354
355define <8 x i64> @bitselect_v8i64_rm(<8 x i64>, <8 x i64>* nocapture readonly) {
356; SSE-LABEL: bitselect_v8i64_rm:
357; SSE:       # %bb.0:
358; SSE-NEXT:    movaps {{.*#+}} xmm4 = [8589934593,3]
359; SSE-NEXT:    andps %xmm4, %xmm3
360; SSE-NEXT:    andps %xmm4, %xmm2
361; SSE-NEXT:    andps %xmm4, %xmm1
362; SSE-NEXT:    andps %xmm4, %xmm0
363; SSE-NEXT:    movaps {{.*#+}} xmm4 = [18446744065119617022,18446744073709551612]
364; SSE-NEXT:    movaps 48(%rdi), %xmm5
365; SSE-NEXT:    andps %xmm4, %xmm5
366; SSE-NEXT:    orps %xmm5, %xmm3
367; SSE-NEXT:    movaps 32(%rdi), %xmm5
368; SSE-NEXT:    andps %xmm4, %xmm5
369; SSE-NEXT:    orps %xmm5, %xmm2
370; SSE-NEXT:    movaps 16(%rdi), %xmm5
371; SSE-NEXT:    andps %xmm4, %xmm5
372; SSE-NEXT:    orps %xmm5, %xmm1
373; SSE-NEXT:    andps (%rdi), %xmm4
374; SSE-NEXT:    orps %xmm4, %xmm0
375; SSE-NEXT:    retq
376;
377; XOP-LABEL: bitselect_v8i64_rm:
378; XOP:       # %bb.0:
379; XOP-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [8589934593,3,8589934593,3]
380; XOP-NEXT:    # ymm2 = mem[0,1,0,1]
381; XOP-NEXT:    vandps %ymm2, %ymm1, %ymm1
382; XOP-NEXT:    vandps %ymm2, %ymm0, %ymm0
383; XOP-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [18446744065119617022,18446744073709551612,18446744065119617022,18446744073709551612]
384; XOP-NEXT:    # ymm2 = mem[0,1,0,1]
385; XOP-NEXT:    vandps 32(%rdi), %ymm2, %ymm3
386; XOP-NEXT:    vorps %ymm1, %ymm3, %ymm1
387; XOP-NEXT:    vandps (%rdi), %ymm2, %ymm2
388; XOP-NEXT:    vorps %ymm0, %ymm2, %ymm0
389; XOP-NEXT:    retq
390;
391; AVX1-LABEL: bitselect_v8i64_rm:
392; AVX1:       # %bb.0:
393; AVX1-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [8589934593,3,8589934593,3]
394; AVX1-NEXT:    # ymm2 = mem[0,1,0,1]
395; AVX1-NEXT:    vandps %ymm2, %ymm1, %ymm1
396; AVX1-NEXT:    vandps %ymm2, %ymm0, %ymm0
397; AVX1-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [18446744065119617022,18446744073709551612,18446744065119617022,18446744073709551612]
398; AVX1-NEXT:    # ymm2 = mem[0,1,0,1]
399; AVX1-NEXT:    vandps 32(%rdi), %ymm2, %ymm3
400; AVX1-NEXT:    vorps %ymm1, %ymm3, %ymm1
401; AVX1-NEXT:    vandps (%rdi), %ymm2, %ymm2
402; AVX1-NEXT:    vorps %ymm0, %ymm2, %ymm0
403; AVX1-NEXT:    retq
404;
405; AVX2-LABEL: bitselect_v8i64_rm:
406; AVX2:       # %bb.0:
407; AVX2-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [8589934593,3,8589934593,3]
408; AVX2-NEXT:    # ymm2 = mem[0,1,0,1]
409; AVX2-NEXT:    vandps %ymm2, %ymm1, %ymm1
410; AVX2-NEXT:    vandps %ymm2, %ymm0, %ymm0
411; AVX2-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [18446744065119617022,18446744073709551612,18446744065119617022,18446744073709551612]
412; AVX2-NEXT:    # ymm2 = mem[0,1,0,1]
413; AVX2-NEXT:    vandps 32(%rdi), %ymm2, %ymm3
414; AVX2-NEXT:    vorps %ymm1, %ymm3, %ymm1
415; AVX2-NEXT:    vandps (%rdi), %ymm2, %ymm2
416; AVX2-NEXT:    vorps %ymm0, %ymm2, %ymm0
417; AVX2-NEXT:    retq
418;
419; AVX512F-LABEL: bitselect_v8i64_rm:
420; AVX512F:       # %bb.0:
421; AVX512F-NEXT:    vmovdqa64 (%rdi), %zmm1
422; AVX512F-NEXT:    vpandq {{.*}}(%rip), %zmm0, %zmm0
423; AVX512F-NEXT:    vpandq {{.*}}(%rip), %zmm1, %zmm1
424; AVX512F-NEXT:    vporq %zmm0, %zmm1, %zmm0
425; AVX512F-NEXT:    retq
426  %3 = load <8 x i64>, <8 x i64>* %1
427  %4 = and <8 x i64> %0, <i64 8589934593, i64 3, i64 8589934593, i64 3, i64 8589934593, i64 3, i64 8589934593, i64 3>
428  %5 = and <8 x i64> %3, <i64 -8589934594, i64 -4, i64 -8589934594, i64 -4, i64 -8589934594, i64 -4, i64 -8589934594, i64 -4>
429  %6 = or <8 x i64> %5, %4
430  ret <8 x i64> %6
431}
432
433define <8 x i64> @bitselect_v8i64_mr(<8 x i64>* nocapture readonly, <8 x i64>) {
434; SSE-LABEL: bitselect_v8i64_mr:
435; SSE:       # %bb.0:
436; SSE-NEXT:    movaps {{.*#+}} xmm4 = [12884901890,4294967296]
437; SSE-NEXT:    movaps 48(%rdi), %xmm5
438; SSE-NEXT:    andps %xmm4, %xmm5
439; SSE-NEXT:    movaps 32(%rdi), %xmm6
440; SSE-NEXT:    andps %xmm4, %xmm6
441; SSE-NEXT:    movaps 16(%rdi), %xmm7
442; SSE-NEXT:    andps %xmm4, %xmm7
443; SSE-NEXT:    andps (%rdi), %xmm4
444; SSE-NEXT:    movaps {{.*#+}} xmm8 = [18446744060824649725,18446744069414584319]
445; SSE-NEXT:    andps %xmm8, %xmm3
446; SSE-NEXT:    orps %xmm5, %xmm3
447; SSE-NEXT:    andps %xmm8, %xmm2
448; SSE-NEXT:    orps %xmm6, %xmm2
449; SSE-NEXT:    andps %xmm8, %xmm1
450; SSE-NEXT:    orps %xmm7, %xmm1
451; SSE-NEXT:    andps %xmm8, %xmm0
452; SSE-NEXT:    orps %xmm4, %xmm0
453; SSE-NEXT:    retq
454;
455; XOP-LABEL: bitselect_v8i64_mr:
456; XOP:       # %bb.0:
457; XOP-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [12884901890,4294967296,12884901890,4294967296]
458; XOP-NEXT:    # ymm2 = mem[0,1,0,1]
459; XOP-NEXT:    vandps 32(%rdi), %ymm2, %ymm3
460; XOP-NEXT:    vandps (%rdi), %ymm2, %ymm2
461; XOP-NEXT:    vbroadcastf128 {{.*#+}} ymm4 = [18446744060824649725,18446744069414584319,18446744060824649725,18446744069414584319]
462; XOP-NEXT:    # ymm4 = mem[0,1,0,1]
463; XOP-NEXT:    vandps %ymm4, %ymm1, %ymm1
464; XOP-NEXT:    vorps %ymm1, %ymm3, %ymm1
465; XOP-NEXT:    vandps %ymm4, %ymm0, %ymm0
466; XOP-NEXT:    vorps %ymm0, %ymm2, %ymm0
467; XOP-NEXT:    retq
468;
469; AVX1-LABEL: bitselect_v8i64_mr:
470; AVX1:       # %bb.0:
471; AVX1-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [12884901890,4294967296,12884901890,4294967296]
472; AVX1-NEXT:    # ymm2 = mem[0,1,0,1]
473; AVX1-NEXT:    vandps 32(%rdi), %ymm2, %ymm3
474; AVX1-NEXT:    vandps (%rdi), %ymm2, %ymm2
475; AVX1-NEXT:    vbroadcastf128 {{.*#+}} ymm4 = [18446744060824649725,18446744069414584319,18446744060824649725,18446744069414584319]
476; AVX1-NEXT:    # ymm4 = mem[0,1,0,1]
477; AVX1-NEXT:    vandps %ymm4, %ymm1, %ymm1
478; AVX1-NEXT:    vorps %ymm1, %ymm3, %ymm1
479; AVX1-NEXT:    vandps %ymm4, %ymm0, %ymm0
480; AVX1-NEXT:    vorps %ymm0, %ymm2, %ymm0
481; AVX1-NEXT:    retq
482;
483; AVX2-LABEL: bitselect_v8i64_mr:
484; AVX2:       # %bb.0:
485; AVX2-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [12884901890,4294967296,12884901890,4294967296]
486; AVX2-NEXT:    # ymm2 = mem[0,1,0,1]
487; AVX2-NEXT:    vandps 32(%rdi), %ymm2, %ymm3
488; AVX2-NEXT:    vandps (%rdi), %ymm2, %ymm2
489; AVX2-NEXT:    vbroadcastf128 {{.*#+}} ymm4 = [18446744060824649725,18446744069414584319,18446744060824649725,18446744069414584319]
490; AVX2-NEXT:    # ymm4 = mem[0,1,0,1]
491; AVX2-NEXT:    vandps %ymm4, %ymm1, %ymm1
492; AVX2-NEXT:    vorps %ymm1, %ymm3, %ymm1
493; AVX2-NEXT:    vandps %ymm4, %ymm0, %ymm0
494; AVX2-NEXT:    vorps %ymm0, %ymm2, %ymm0
495; AVX2-NEXT:    retq
496;
497; AVX512F-LABEL: bitselect_v8i64_mr:
498; AVX512F:       # %bb.0:
499; AVX512F-NEXT:    vmovdqa64 (%rdi), %zmm1
500; AVX512F-NEXT:    vpandq {{.*}}(%rip), %zmm1, %zmm1
501; AVX512F-NEXT:    vpandq {{.*}}(%rip), %zmm0, %zmm0
502; AVX512F-NEXT:    vporq %zmm0, %zmm1, %zmm0
503; AVX512F-NEXT:    retq
504  %3 = load <8 x i64>, <8 x i64>* %0
505  %4 = and <8 x i64> %3, <i64 12884901890, i64 4294967296, i64 12884901890, i64 4294967296, i64 12884901890, i64 4294967296, i64 12884901890, i64 4294967296>
506  %5 = and <8 x i64> %1, <i64 -12884901891, i64 -4294967297, i64 -12884901891, i64 -4294967297, i64 -12884901891, i64 -4294967297, i64 -12884901891, i64 -4294967297>
507  %6 = or <8 x i64> %4, %5
508  ret <8 x i64> %6
509}
510
511define <8 x i64> @bitselect_v8i64_mm(<8 x i64>* nocapture readonly, <8 x i64>* nocapture readonly) {
512; SSE-LABEL: bitselect_v8i64_mm:
513; SSE:       # %bb.0:
514; SSE-NEXT:    movaps {{.*#+}} xmm4 = [3,8589934593]
515; SSE-NEXT:    movaps 48(%rdi), %xmm1
516; SSE-NEXT:    andps %xmm4, %xmm1
517; SSE-NEXT:    movaps 32(%rdi), %xmm5
518; SSE-NEXT:    andps %xmm4, %xmm5
519; SSE-NEXT:    movaps 16(%rdi), %xmm6
520; SSE-NEXT:    andps %xmm4, %xmm6
521; SSE-NEXT:    andps (%rdi), %xmm4
522; SSE-NEXT:    movaps {{.*#+}} xmm0 = [18446744073709551612,18446744065119617022]
523; SSE-NEXT:    movaps 48(%rsi), %xmm3
524; SSE-NEXT:    andps %xmm0, %xmm3
525; SSE-NEXT:    orps %xmm1, %xmm3
526; SSE-NEXT:    movaps 32(%rsi), %xmm2
527; SSE-NEXT:    andps %xmm0, %xmm2
528; SSE-NEXT:    orps %xmm5, %xmm2
529; SSE-NEXT:    movaps 16(%rsi), %xmm1
530; SSE-NEXT:    andps %xmm0, %xmm1
531; SSE-NEXT:    orps %xmm6, %xmm1
532; SSE-NEXT:    andps (%rsi), %xmm0
533; SSE-NEXT:    orps %xmm4, %xmm0
534; SSE-NEXT:    retq
535;
536; XOP-LABEL: bitselect_v8i64_mm:
537; XOP:       # %bb.0:
538; XOP-NEXT:    vbroadcastf128 {{.*#+}} ymm0 = [3,8589934593,3,8589934593]
539; XOP-NEXT:    # ymm0 = mem[0,1,0,1]
540; XOP-NEXT:    vandps 32(%rdi), %ymm0, %ymm1
541; XOP-NEXT:    vandps (%rdi), %ymm0, %ymm0
542; XOP-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [18446744073709551612,18446744065119617022,18446744073709551612,18446744065119617022]
543; XOP-NEXT:    # ymm2 = mem[0,1,0,1]
544; XOP-NEXT:    vandps 32(%rsi), %ymm2, %ymm3
545; XOP-NEXT:    vorps %ymm1, %ymm3, %ymm1
546; XOP-NEXT:    vandps (%rsi), %ymm2, %ymm2
547; XOP-NEXT:    vorps %ymm0, %ymm2, %ymm0
548; XOP-NEXT:    retq
549;
550; AVX1-LABEL: bitselect_v8i64_mm:
551; AVX1:       # %bb.0:
552; AVX1-NEXT:    vbroadcastf128 {{.*#+}} ymm0 = [3,8589934593,3,8589934593]
553; AVX1-NEXT:    # ymm0 = mem[0,1,0,1]
554; AVX1-NEXT:    vandps 32(%rdi), %ymm0, %ymm1
555; AVX1-NEXT:    vandps (%rdi), %ymm0, %ymm0
556; AVX1-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [18446744073709551612,18446744065119617022,18446744073709551612,18446744065119617022]
557; AVX1-NEXT:    # ymm2 = mem[0,1,0,1]
558; AVX1-NEXT:    vandps 32(%rsi), %ymm2, %ymm3
559; AVX1-NEXT:    vorps %ymm1, %ymm3, %ymm1
560; AVX1-NEXT:    vandps (%rsi), %ymm2, %ymm2
561; AVX1-NEXT:    vorps %ymm0, %ymm2, %ymm0
562; AVX1-NEXT:    retq
563;
564; AVX2-LABEL: bitselect_v8i64_mm:
565; AVX2:       # %bb.0:
566; AVX2-NEXT:    vbroadcastf128 {{.*#+}} ymm0 = [3,8589934593,3,8589934593]
567; AVX2-NEXT:    # ymm0 = mem[0,1,0,1]
568; AVX2-NEXT:    vandps 32(%rdi), %ymm0, %ymm1
569; AVX2-NEXT:    vandps (%rdi), %ymm0, %ymm0
570; AVX2-NEXT:    vbroadcastf128 {{.*#+}} ymm2 = [18446744073709551612,18446744065119617022,18446744073709551612,18446744065119617022]
571; AVX2-NEXT:    # ymm2 = mem[0,1,0,1]
572; AVX2-NEXT:    vandps 32(%rsi), %ymm2, %ymm3
573; AVX2-NEXT:    vorps %ymm1, %ymm3, %ymm1
574; AVX2-NEXT:    vandps (%rsi), %ymm2, %ymm2
575; AVX2-NEXT:    vorps %ymm0, %ymm2, %ymm0
576; AVX2-NEXT:    retq
577;
578; AVX512F-LABEL: bitselect_v8i64_mm:
579; AVX512F:       # %bb.0:
580; AVX512F-NEXT:    vmovdqa64 (%rdi), %zmm0
581; AVX512F-NEXT:    vmovdqa64 (%rsi), %zmm1
582; AVX512F-NEXT:    vpandq {{.*}}(%rip), %zmm0, %zmm0
583; AVX512F-NEXT:    vpandq {{.*}}(%rip), %zmm1, %zmm1
584; AVX512F-NEXT:    vporq %zmm0, %zmm1, %zmm0
585; AVX512F-NEXT:    retq
586  %3 = load <8 x i64>, <8 x i64>* %0
587  %4 = load <8 x i64>, <8 x i64>* %1
588  %5 = and <8 x i64> %3, <i64 3, i64 8589934593, i64 3, i64 8589934593, i64 3, i64 8589934593, i64 3, i64 8589934593>
589  %6 = and <8 x i64> %4, <i64 -4, i64 -8589934594, i64 -4, i64 -8589934594, i64 -4, i64 -8589934594, i64 -4, i64 -8589934594>
590  %7 = or <8 x i64> %6, %5
591  ret <8 x i64> %7
592}
593