1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -show-mc-encoding | FileCheck %s
3
4@d = dso_local global i8 0, align 1
5@d64 = dso_local global i64 0
6
7define i32 @test1(i32 %X, i32* %y) nounwind {
8; CHECK-LABEL: test1:
9; CHECK:       # %bb.0: # %entry
10; CHECK-NEXT:    cmpl $0, (%rsi) # encoding: [0x83,0x3e,0x00]
11; CHECK-NEXT:    je .LBB0_2 # encoding: [0x74,A]
12; CHECK-NEXT:    # fixup A - offset: 1, value: .LBB0_2-1, kind: FK_PCRel_1
13; CHECK-NEXT:  # %bb.1: # %cond_true
14; CHECK-NEXT:    movl $1, %eax # encoding: [0xb8,0x01,0x00,0x00,0x00]
15; CHECK-NEXT:    retq # encoding: [0xc3]
16; CHECK-NEXT:  .LBB0_2: # %ReturnBlock
17; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
18; CHECK-NEXT:    retq # encoding: [0xc3]
19entry:
20  %tmp = load i32, i32* %y
21  %tmp.upgrd.1 = icmp eq i32 %tmp, 0
22  br i1 %tmp.upgrd.1, label %ReturnBlock, label %cond_true
23
24cond_true:
25  ret i32 1
26
27ReturnBlock:
28  ret i32 0
29}
30
31define i32 @test2(i32 %X, i32* %y) nounwind {
32; CHECK-LABEL: test2:
33; CHECK:       # %bb.0: # %entry
34; CHECK-NEXT:    testl $536870911, (%rsi) # encoding: [0xf7,0x06,0xff,0xff,0xff,0x1f]
35; CHECK-NEXT:    # imm = 0x1FFFFFFF
36; CHECK-NEXT:    je .LBB1_2 # encoding: [0x74,A]
37; CHECK-NEXT:    # fixup A - offset: 1, value: .LBB1_2-1, kind: FK_PCRel_1
38; CHECK-NEXT:  # %bb.1: # %cond_true
39; CHECK-NEXT:    movl $1, %eax # encoding: [0xb8,0x01,0x00,0x00,0x00]
40; CHECK-NEXT:    retq # encoding: [0xc3]
41; CHECK-NEXT:  .LBB1_2: # %ReturnBlock
42; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
43; CHECK-NEXT:    retq # encoding: [0xc3]
44entry:
45  %tmp = load i32, i32* %y
46  %tmp1 = shl i32 %tmp, 3
47  %tmp1.upgrd.2 = icmp eq i32 %tmp1, 0
48  br i1 %tmp1.upgrd.2, label %ReturnBlock, label %cond_true
49
50cond_true:
51  ret i32 1
52
53ReturnBlock:
54  ret i32 0
55}
56
57define i8 @test2b(i8 %X, i8* %y) nounwind {
58; CHECK-LABEL: test2b:
59; CHECK:       # %bb.0: # %entry
60; CHECK-NEXT:    testb $31, (%rsi) # encoding: [0xf6,0x06,0x1f]
61; CHECK-NEXT:    je .LBB2_2 # encoding: [0x74,A]
62; CHECK-NEXT:    # fixup A - offset: 1, value: .LBB2_2-1, kind: FK_PCRel_1
63; CHECK-NEXT:  # %bb.1: # %cond_true
64; CHECK-NEXT:    movb $1, %al # encoding: [0xb0,0x01]
65; CHECK-NEXT:    retq # encoding: [0xc3]
66; CHECK-NEXT:  .LBB2_2: # %ReturnBlock
67; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
68; CHECK-NEXT:    retq # encoding: [0xc3]
69entry:
70  %tmp = load i8, i8* %y
71  %tmp1 = shl i8 %tmp, 3
72  %tmp1.upgrd.2 = icmp eq i8 %tmp1, 0
73  br i1 %tmp1.upgrd.2, label %ReturnBlock, label %cond_true
74
75cond_true:
76  ret i8 1
77
78ReturnBlock:
79  ret i8 0
80}
81
82define i64 @test3(i64 %x) nounwind {
83; CHECK-LABEL: test3:
84; CHECK:       # %bb.0: # %entry
85; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
86; CHECK-NEXT:    testq %rdi, %rdi # encoding: [0x48,0x85,0xff]
87; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
88; CHECK-NEXT:    retq # encoding: [0xc3]
89entry:
90  %t = icmp eq i64 %x, 0
91  %r = zext i1 %t to i64
92  ret i64 %r
93}
94
95define i64 @test4(i64 %x) nounwind {
96; CHECK-LABEL: test4:
97; CHECK:       # %bb.0:
98; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
99; CHECK-NEXT:    testq %rdi, %rdi # encoding: [0x48,0x85,0xff]
100; CHECK-NEXT:    setle %al # encoding: [0x0f,0x9e,0xc0]
101; CHECK-NEXT:    retq # encoding: [0xc3]
102  %t = icmp slt i64 %x, 1
103  %r = zext i1 %t to i64
104  ret i64 %r
105}
106
107define i32 @test5(double %A) nounwind {
108; CHECK-LABEL: test5:
109; CHECK:       # %bb.0: # %entry
110; CHECK-NEXT:    ucomisd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # encoding: [0x66,0x0f,0x2e,0x05,A,A,A,A]
111; CHECK-NEXT:    # fixup A - offset: 4, value: {{\.?LCPI[0-9]+_[0-9]+}}-4, kind: reloc_riprel_4byte
112; CHECK-NEXT:    ja .LBB5_3 # encoding: [0x77,A]
113; CHECK-NEXT:    # fixup A - offset: 1, value: .LBB5_3-1, kind: FK_PCRel_1
114; CHECK-NEXT:  # %bb.1: # %entry
115; CHECK-NEXT:    ucomisd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 # encoding: [0x66,0x0f,0x2e,0x05,A,A,A,A]
116; CHECK-NEXT:    # fixup A - offset: 4, value: {{\.?LCPI[0-9]+_[0-9]+}}-4, kind: reloc_riprel_4byte
117; CHECK-NEXT:    jb .LBB5_3 # encoding: [0x72,A]
118; CHECK-NEXT:    # fixup A - offset: 1, value: .LBB5_3-1, kind: FK_PCRel_1
119; CHECK-NEXT:  # %bb.2: # %bb12
120; CHECK-NEXT:    movl $32, %eax # encoding: [0xb8,0x20,0x00,0x00,0x00]
121; CHECK-NEXT:    retq # encoding: [0xc3]
122; CHECK-NEXT:  .LBB5_3: # %bb8
123; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
124; CHECK-NEXT:    jmp foo@PLT # TAILCALL
125; CHECK-NEXT:    # encoding: [0xeb,A]
126; CHECK-NEXT:    # fixup A - offset: 1, value: foo@PLT-1, kind: FK_PCRel_1
127entry:
128  %tmp2 = fcmp ogt double %A, 1.500000e+02
129  %tmp5 = fcmp ult double %A, 7.500000e+01
130  %bothcond = or i1 %tmp2, %tmp5
131  br i1 %bothcond, label %bb8, label %bb12
132
133bb8:
134  %tmp9 = tail call i32 (...) @foo() nounwind
135  ret i32 %tmp9
136
137bb12:
138  ret i32 32
139}
140
141declare i32 @foo(...)
142
143define i32 @test6() nounwind align 2 {
144; CHECK-LABEL: test6:
145; CHECK:       # %bb.0: # %entry
146; CHECK-NEXT:    cmpq $0, -{{[0-9]+}}(%rsp) # encoding: [0x48,0x83,0x7c,0x24,0xf8,0x00]
147; CHECK-NEXT:    je .LBB6_1 # encoding: [0x74,A]
148; CHECK-NEXT:    # fixup A - offset: 1, value: .LBB6_1-1, kind: FK_PCRel_1
149; CHECK-NEXT:  # %bb.2: # %F
150; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
151; CHECK-NEXT:    retq # encoding: [0xc3]
152; CHECK-NEXT:  .LBB6_1: # %T
153; CHECK-NEXT:    movl $1, %eax # encoding: [0xb8,0x01,0x00,0x00,0x00]
154; CHECK-NEXT:    retq # encoding: [0xc3]
155entry:
156  %A = alloca { i64, i64 }, align 8
157  %B = getelementptr inbounds { i64, i64 }, { i64, i64 }* %A, i64 0, i32 1
158  %C = load i64, i64* %B
159  %D = icmp eq i64 %C, 0
160  br i1 %D, label %T, label %F
161
162T:
163  ret i32 1
164
165F:
166  ret i32 0
167}
168
169define i32 @test7(i64 %res) nounwind {
170; CHECK-LABEL: test7:
171; CHECK:       # %bb.0: # %entry
172; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
173; CHECK-NEXT:    shrq $32, %rdi # encoding: [0x48,0xc1,0xef,0x20]
174; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
175; CHECK-NEXT:    retq # encoding: [0xc3]
176entry:
177  %lnot = icmp ult i64 %res, 4294967296
178  %lnot.ext = zext i1 %lnot to i32
179  ret i32 %lnot.ext
180}
181
182define i32 @test8(i64 %res) nounwind {
183; CHECK-LABEL: test8:
184; CHECK:       # %bb.0:
185; CHECK-NEXT:    shrq $32, %rdi # encoding: [0x48,0xc1,0xef,0x20]
186; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
187; CHECK-NEXT:    cmpl $3, %edi # encoding: [0x83,0xff,0x03]
188; CHECK-NEXT:    setb %al # encoding: [0x0f,0x92,0xc0]
189; CHECK-NEXT:    retq # encoding: [0xc3]
190  %lnot = icmp ult i64 %res, 12884901888
191  %lnot.ext = zext i1 %lnot to i32
192  ret i32 %lnot.ext
193}
194
195define i32 @test9(i64 %res) nounwind {
196; CHECK-LABEL: test9:
197; CHECK:       # %bb.0:
198; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
199; CHECK-NEXT:    shrq $33, %rdi # encoding: [0x48,0xc1,0xef,0x21]
200; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
201; CHECK-NEXT:    retq # encoding: [0xc3]
202  %lnot = icmp ult i64 %res, 8589934592
203  %lnot.ext = zext i1 %lnot to i32
204  ret i32 %lnot.ext
205}
206
207define i32 @test10(i64 %res) nounwind {
208; CHECK-LABEL: test10:
209; CHECK:       # %bb.0:
210; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
211; CHECK-NEXT:    shrq $32, %rdi # encoding: [0x48,0xc1,0xef,0x20]
212; CHECK-NEXT:    setne %al # encoding: [0x0f,0x95,0xc0]
213; CHECK-NEXT:    retq # encoding: [0xc3]
214  %lnot = icmp uge i64 %res, 4294967296
215  %lnot.ext = zext i1 %lnot to i32
216  ret i32 %lnot.ext
217}
218
219define i32 @test11(i64 %l) nounwind {
220; CHECK-LABEL: test11:
221; CHECK:       # %bb.0:
222; CHECK-NEXT:    shrq $47, %rdi # encoding: [0x48,0xc1,0xef,0x2f]
223; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
224; CHECK-NEXT:    cmpl $1, %edi # encoding: [0x83,0xff,0x01]
225; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
226; CHECK-NEXT:    retq # encoding: [0xc3]
227  %shr.mask = and i64 %l, -140737488355328
228  %cmp = icmp eq i64 %shr.mask, 140737488355328
229  %conv = zext i1 %cmp to i32
230  ret i32 %conv
231}
232
233define i32 @test12() ssp uwtable {
234; CHECK-LABEL: test12:
235; CHECK:       # %bb.0: # %entry
236; CHECK-NEXT:    pushq %rax # encoding: [0x50]
237; CHECK-NEXT:    .cfi_def_cfa_offset 16
238; CHECK-NEXT:    callq test12b@PLT # encoding: [0xe8,A,A,A,A]
239; CHECK-NEXT:    # fixup A - offset: 1, value: test12b@PLT-4, kind: FK_PCRel_4
240; CHECK-NEXT:    testb %al, %al # encoding: [0x84,0xc0]
241; CHECK-NEXT:    je .LBB12_2 # encoding: [0x74,A]
242; CHECK-NEXT:    # fixup A - offset: 1, value: .LBB12_2-1, kind: FK_PCRel_1
243; CHECK-NEXT:  # %bb.1: # %T
244; CHECK-NEXT:    movl $1, %eax # encoding: [0xb8,0x01,0x00,0x00,0x00]
245; CHECK-NEXT:    popq %rcx # encoding: [0x59]
246; CHECK-NEXT:    .cfi_def_cfa_offset 8
247; CHECK-NEXT:    retq # encoding: [0xc3]
248; CHECK-NEXT:  .LBB12_2: # %F
249; CHECK-NEXT:    .cfi_def_cfa_offset 16
250; CHECK-NEXT:    movl $2, %eax # encoding: [0xb8,0x02,0x00,0x00,0x00]
251; CHECK-NEXT:    popq %rcx # encoding: [0x59]
252; CHECK-NEXT:    .cfi_def_cfa_offset 8
253; CHECK-NEXT:    retq # encoding: [0xc3]
254entry:
255  %tmp1 = call zeroext i1 @test12b()
256  br i1 %tmp1, label %T, label %F
257
258T:
259  ret i32 1
260
261F:
262  ret i32 2
263}
264
265declare zeroext i1 @test12b()
266
267define i32 @test13(i32 %mask, i32 %base, i32 %intra) {
268; CHECK-LABEL: test13:
269; CHECK:       # %bb.0:
270; CHECK-NEXT:    movl %esi, %eax # encoding: [0x89,0xf0]
271; CHECK-NEXT:    testb $8, %dil # encoding: [0x40,0xf6,0xc7,0x08]
272; CHECK-NEXT:    cmovnel %edx, %eax # encoding: [0x0f,0x45,0xc2]
273; CHECK-NEXT:    retq # encoding: [0xc3]
274  %and = and i32 %mask, 8
275  %tobool = icmp ne i32 %and, 0
276  %cond = select i1 %tobool, i32 %intra, i32 %base
277  ret i32 %cond
278}
279
280define i32 @test14(i32 %mask, i32 %base, i32 %intra) {
281; CHECK-LABEL: test14:
282; CHECK:       # %bb.0:
283; CHECK-NEXT:    movl %esi, %eax # encoding: [0x89,0xf0]
284; CHECK-NEXT:    shrl $7, %edi # encoding: [0xc1,0xef,0x07]
285; CHECK-NEXT:    cmovnsl %edx, %eax # encoding: [0x0f,0x49,0xc2]
286; CHECK-NEXT:    retq # encoding: [0xc3]
287  %s = lshr i32 %mask, 7
288  %tobool = icmp sgt i32 %s, -1
289  %cond = select i1 %tobool, i32 %intra, i32 %base
290  ret i32 %cond
291}
292
293; PR19964
294define zeroext i1 @test15(i32 %bf.load, i32 %n) {
295; CHECK-LABEL: test15:
296; CHECK:       # %bb.0:
297; CHECK-NEXT:    shrl $16, %edi # encoding: [0xc1,0xef,0x10]
298; CHECK-NEXT:    sete %cl # encoding: [0x0f,0x94,0xc1]
299; CHECK-NEXT:    cmpl %esi, %edi # encoding: [0x39,0xf7]
300; CHECK-NEXT:    setae %al # encoding: [0x0f,0x93,0xc0]
301; CHECK-NEXT:    orb %cl, %al # encoding: [0x08,0xc8]
302; CHECK-NEXT:    retq # encoding: [0xc3]
303  %bf.lshr = lshr i32 %bf.load, 16
304  %cmp2 = icmp eq i32 %bf.lshr, 0
305  %cmp5 = icmp uge i32 %bf.lshr, %n
306  %.cmp5 = or i1 %cmp2, %cmp5
307  ret i1 %.cmp5
308}
309
310define i8 @signbit_i16(i16 signext %L) {
311; CHECK-LABEL: signbit_i16:
312; CHECK:       # %bb.0:
313; CHECK-NEXT:    testw %di, %di # encoding: [0x66,0x85,0xff]
314; CHECK-NEXT:    setns %al # encoding: [0x0f,0x99,0xc0]
315; CHECK-NEXT:    retq # encoding: [0xc3]
316  %lshr = lshr i16 %L, 15
317  %trunc = trunc i16 %lshr to i8
318  %not = xor i8 %trunc, 1
319  ret i8 %not
320}
321
322define i8 @signbit_i32(i32 %L) {
323; CHECK-LABEL: signbit_i32:
324; CHECK:       # %bb.0:
325; CHECK-NEXT:    testl %edi, %edi # encoding: [0x85,0xff]
326; CHECK-NEXT:    setns %al # encoding: [0x0f,0x99,0xc0]
327; CHECK-NEXT:    retq # encoding: [0xc3]
328  %lshr = lshr i32 %L, 31
329  %trunc = trunc i32 %lshr to i8
330  %not = xor i8 %trunc, 1
331  ret i8 %not
332}
333
334define i8 @signbit_i64(i64 %L) {
335; CHECK-LABEL: signbit_i64:
336; CHECK:       # %bb.0:
337; CHECK-NEXT:    testq %rdi, %rdi # encoding: [0x48,0x85,0xff]
338; CHECK-NEXT:    setns %al # encoding: [0x0f,0x99,0xc0]
339; CHECK-NEXT:    retq # encoding: [0xc3]
340  %lshr = lshr i64 %L, 63
341  %trunc = trunc i64 %lshr to i8
342  %not = xor i8 %trunc, 1
343  ret i8 %not
344}
345
346define zeroext i1 @signbit_i32_i1(i32 %L) {
347; CHECK-LABEL: signbit_i32_i1:
348; CHECK:       # %bb.0:
349; CHECK-NEXT:    testl %edi, %edi # encoding: [0x85,0xff]
350; CHECK-NEXT:    setns %al # encoding: [0x0f,0x99,0xc0]
351; CHECK-NEXT:    retq # encoding: [0xc3]
352  %lshr = lshr i32 %L, 31
353  %trunc = trunc i32 %lshr to i1
354  %not = xor i1 %trunc, true
355  ret i1 %not
356}
357
358; This test failed due to incorrect handling of "shift + icmp" sequence
359define void @test20(i32 %bf.load, i8 %x1, i8* %b_addr) {
360; CHECK-LABEL: test20:
361; CHECK:       # %bb.0:
362; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
363; CHECK-NEXT:    testl $16777215, %edi # encoding: [0xf7,0xc7,0xff,0xff,0xff,0x00]
364; CHECK-NEXT:    # imm = 0xFFFFFF
365; CHECK-NEXT:    setne %al # encoding: [0x0f,0x95,0xc0]
366; CHECK-NEXT:    movzbl %sil, %ecx # encoding: [0x40,0x0f,0xb6,0xce]
367; CHECK-NEXT:    addl %eax, %ecx # encoding: [0x01,0xc1]
368; CHECK-NEXT:    setne (%rdx) # encoding: [0x0f,0x95,0x02]
369; CHECK-NEXT:    testl $16777215, %edi # encoding: [0xf7,0xc7,0xff,0xff,0xff,0x00]
370; CHECK-NEXT:    # imm = 0xFFFFFF
371; CHECK-NEXT:    setne d(%rip) # encoding: [0x0f,0x95,0x05,A,A,A,A]
372; CHECK-NEXT:    # fixup A - offset: 3, value: d-4, kind: reloc_riprel_4byte
373; CHECK-NEXT:    retq # encoding: [0xc3]
374  %bf.shl = shl i32 %bf.load, 8
375  %bf.ashr = ashr exact i32 %bf.shl, 8
376  %tobool4 = icmp ne i32 %bf.ashr, 0
377  %conv = zext i1 %tobool4 to i32
378  %conv6 = zext i8 %x1 to i32
379  %add = add nuw nsw i32 %conv, %conv6
380  %tobool7 = icmp ne i32 %add, 0
381  %frombool = zext i1 %tobool7 to i8
382  store i8 %frombool, i8* %b_addr, align 1
383  %tobool14 = icmp ne i32 %bf.shl, 0
384  %frombool15 = zext i1 %tobool14 to i8
385  store i8 %frombool15, i8* @d, align 1
386  ret void
387}
388
389define i32 @highmask_i64_simplify(i64 %val) {
390; CHECK-LABEL: highmask_i64_simplify:
391; CHECK:       # %bb.0:
392; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
393; CHECK-NEXT:    retq # encoding: [0xc3]
394  %and = and i64 %val, -2199023255552
395  %cmp = icmp ult i64 %and, 0
396  %ret = zext i1 %cmp to i32
397  ret i32 %ret
398}
399
400define i32 @highmask_i64_mask64(i64 %val) {
401; CHECK-LABEL: highmask_i64_mask64:
402; CHECK:       # %bb.0:
403; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
404; CHECK-NEXT:    shrq $41, %rdi # encoding: [0x48,0xc1,0xef,0x29]
405; CHECK-NEXT:    setne %al # encoding: [0x0f,0x95,0xc0]
406; CHECK-NEXT:    retq # encoding: [0xc3]
407  %and = and i64 %val, -2199023255552
408  %cmp = icmp ne i64 %and, 0
409  %ret = zext i1 %cmp to i32
410  ret i32 %ret
411}
412
413define i64 @highmask_i64_mask64_extra_use(i64 %val) nounwind {
414; CHECK-LABEL: highmask_i64_mask64_extra_use:
415; CHECK:       # %bb.0:
416; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
417; CHECK-NEXT:    movq %rdi, %rcx # encoding: [0x48,0x89,0xf9]
418; CHECK-NEXT:    shrq $41, %rcx # encoding: [0x48,0xc1,0xe9,0x29]
419; CHECK-NEXT:    setne %al # encoding: [0x0f,0x95,0xc0]
420; CHECK-NEXT:    imulq %rdi, %rax # encoding: [0x48,0x0f,0xaf,0xc7]
421; CHECK-NEXT:    retq # encoding: [0xc3]
422  %and = and i64 %val, -2199023255552
423  %cmp = icmp ne i64 %and, 0
424  %z = zext i1 %cmp to i64
425  %ret = mul i64 %z, %val
426  ret i64 %ret
427}
428
429define i32 @highmask_i64_mask32(i64 %val) {
430; CHECK-LABEL: highmask_i64_mask32:
431; CHECK:       # %bb.0:
432; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
433; CHECK-NEXT:    testq $-1048576, %rdi # encoding: [0x48,0xf7,0xc7,0x00,0x00,0xf0,0xff]
434; CHECK-NEXT:    # imm = 0xFFF00000
435; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
436; CHECK-NEXT:    retq # encoding: [0xc3]
437  %and = and i64 %val, -1048576
438  %cmp = icmp eq i64 %and, 0
439  %ret = zext i1 %cmp to i32
440  ret i32 %ret
441}
442
443define i64 @highmask_i64_mask32_extra_use(i64 %val) nounwind {
444; CHECK-LABEL: highmask_i64_mask32_extra_use:
445; CHECK:       # %bb.0:
446; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
447; CHECK-NEXT:    testq $-1048576, %rdi # encoding: [0x48,0xf7,0xc7,0x00,0x00,0xf0,0xff]
448; CHECK-NEXT:    # imm = 0xFFF00000
449; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
450; CHECK-NEXT:    imulq %rdi, %rax # encoding: [0x48,0x0f,0xaf,0xc7]
451; CHECK-NEXT:    retq # encoding: [0xc3]
452  %and = and i64 %val, -1048576
453  %cmp = icmp eq i64 %and, 0
454  %z = zext i1 %cmp to i64
455  %ret = mul i64 %z, %val
456  ret i64 %ret
457}
458
459define i32 @highmask_i64_mask8(i64 %val) {
460; CHECK-LABEL: highmask_i64_mask8:
461; CHECK:       # %bb.0:
462; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
463; CHECK-NEXT:    testq $-16, %rdi # encoding: [0x48,0xf7,0xc7,0xf0,0xff,0xff,0xff]
464; CHECK-NEXT:    setne %al # encoding: [0x0f,0x95,0xc0]
465; CHECK-NEXT:    retq # encoding: [0xc3]
466  %and = and i64 %val, -16
467  %cmp = icmp ne i64 %and, 0
468  %ret = zext i1 %cmp to i32
469  ret i32 %ret
470}
471
472define i32 @lowmask_i64_mask64(i64 %val) {
473; CHECK-LABEL: lowmask_i64_mask64:
474; CHECK:       # %bb.0:
475; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
476; CHECK-NEXT:    shlq $16, %rdi # encoding: [0x48,0xc1,0xe7,0x10]
477; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
478; CHECK-NEXT:    retq # encoding: [0xc3]
479  %and = and i64 %val, 281474976710655
480  %cmp = icmp eq i64 %and, 0
481  %ret = zext i1 %cmp to i32
482  ret i32 %ret
483}
484
485define i64 @lowmask_i64_mask64_extra_use(i64 %val) nounwind {
486; CHECK-LABEL: lowmask_i64_mask64_extra_use:
487; CHECK:       # %bb.0:
488; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
489; CHECK-NEXT:    movq %rdi, %rcx # encoding: [0x48,0x89,0xf9]
490; CHECK-NEXT:    shlq $16, %rcx # encoding: [0x48,0xc1,0xe1,0x10]
491; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
492; CHECK-NEXT:    imulq %rdi, %rax # encoding: [0x48,0x0f,0xaf,0xc7]
493; CHECK-NEXT:    retq # encoding: [0xc3]
494  %and = and i64 %val, 281474976710655
495  %cmp = icmp eq i64 %and, 0
496  %z = zext i1 %cmp to i64
497  %ret = mul i64 %z, %val
498  ret i64 %ret
499}
500
501define i32 @lowmask_i64_mask32(i64 %val) {
502; CHECK-LABEL: lowmask_i64_mask32:
503; CHECK:       # %bb.0:
504; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
505; CHECK-NEXT:    testl $1048575, %edi # encoding: [0xf7,0xc7,0xff,0xff,0x0f,0x00]
506; CHECK-NEXT:    # imm = 0xFFFFF
507; CHECK-NEXT:    setne %al # encoding: [0x0f,0x95,0xc0]
508; CHECK-NEXT:    retq # encoding: [0xc3]
509  %and = and i64 %val, 1048575
510  %cmp = icmp ne i64 %and, 0
511  %ret = zext i1 %cmp to i32
512  ret i32 %ret
513}
514
515define i64 @lowmask_i64_mask32_extra_use(i64 %val) nounwind {
516; CHECK-LABEL: lowmask_i64_mask32_extra_use:
517; CHECK:       # %bb.0:
518; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
519; CHECK-NEXT:    testl $1048575, %edi # encoding: [0xf7,0xc7,0xff,0xff,0x0f,0x00]
520; CHECK-NEXT:    # imm = 0xFFFFF
521; CHECK-NEXT:    setne %al # encoding: [0x0f,0x95,0xc0]
522; CHECK-NEXT:    imulq %rdi, %rax # encoding: [0x48,0x0f,0xaf,0xc7]
523; CHECK-NEXT:    retq # encoding: [0xc3]
524  %and = and i64 %val, 1048575
525  %cmp = icmp ne i64 %and, 0
526  %z = zext i1 %cmp to i64
527  %ret = mul i64 %z, %val
528  ret i64 %ret
529}
530
531define i32 @lowmask_i64_mask8(i64 %val) {
532; CHECK-LABEL: lowmask_i64_mask8:
533; CHECK:       # %bb.0:
534; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
535; CHECK-NEXT:    testb $31, %dil # encoding: [0x40,0xf6,0xc7,0x1f]
536; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
537; CHECK-NEXT:    retq # encoding: [0xc3]
538  %and = and i64 %val, 31
539  %cmp = icmp eq i64 %and, 0
540  %ret = zext i1 %cmp to i32
541  ret i32 %ret
542}
543
544define i32 @highmask_i32_mask32(i32 %val) {
545; CHECK-LABEL: highmask_i32_mask32:
546; CHECK:       # %bb.0:
547; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
548; CHECK-NEXT:    testl $-1048576, %edi # encoding: [0xf7,0xc7,0x00,0x00,0xf0,0xff]
549; CHECK-NEXT:    # imm = 0xFFF00000
550; CHECK-NEXT:    setne %al # encoding: [0x0f,0x95,0xc0]
551; CHECK-NEXT:    retq # encoding: [0xc3]
552  %and = and i32 %val, -1048576
553  %cmp = icmp ne i32 %and, 0
554  %ret = zext i1 %cmp to i32
555  ret i32 %ret
556}
557
558define i32 @highmask_i32_mask8(i32 %val) {
559; CHECK-LABEL: highmask_i32_mask8:
560; CHECK:       # %bb.0:
561; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
562; CHECK-NEXT:    testl $-16, %edi # encoding: [0xf7,0xc7,0xf0,0xff,0xff,0xff]
563; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
564; CHECK-NEXT:    retq # encoding: [0xc3]
565  %and = and i32 %val, -16
566  %cmp = icmp eq i32 %and, 0
567  %ret = zext i1 %cmp to i32
568  ret i32 %ret
569}
570
571define i32 @lowmask_i32_mask32(i32 %val) {
572; CHECK-LABEL: lowmask_i32_mask32:
573; CHECK:       # %bb.0:
574; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
575; CHECK-NEXT:    testl $1048575, %edi # encoding: [0xf7,0xc7,0xff,0xff,0x0f,0x00]
576; CHECK-NEXT:    # imm = 0xFFFFF
577; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
578; CHECK-NEXT:    retq # encoding: [0xc3]
579  %and = and i32 %val, 1048575
580  %cmp = icmp eq i32 %and, 0
581  %ret = zext i1 %cmp to i32
582  ret i32 %ret
583}
584
585define i32 @lowmask_i32_mask8(i32 %val) {
586; CHECK-LABEL: lowmask_i32_mask8:
587; CHECK:       # %bb.0:
588; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
589; CHECK-NEXT:    testb $31, %dil # encoding: [0x40,0xf6,0xc7,0x1f]
590; CHECK-NEXT:    setne %al # encoding: [0x0f,0x95,0xc0]
591; CHECK-NEXT:    retq # encoding: [0xc3]
592  %and = and i32 %val, 31
593  %cmp = icmp ne i32 %and, 0
594  %ret = zext i1 %cmp to i32
595  ret i32 %ret
596}
597
598define i1 @shifted_mask64_testb(i64 %a) {
599; CHECK-LABEL: shifted_mask64_testb:
600; CHECK:       # %bb.0:
601; CHECK-NEXT:    shrq $50, %rdi # encoding: [0x48,0xc1,0xef,0x32]
602; CHECK-NEXT:    testb %dil, %dil # encoding: [0x40,0x84,0xff]
603; CHECK-NEXT:    setne %al # encoding: [0x0f,0x95,0xc0]
604; CHECK-NEXT:    retq # encoding: [0xc3]
605  %v0 = and i64 %a, 287104476244869120  ; 0xff << 50
606  %v1 = icmp ne i64 %v0, 0
607  ret i1 %v1
608}
609
610define i1 @shifted_mask64_testw(i64 %a) {
611; CHECK-LABEL: shifted_mask64_testw:
612; CHECK:       # %bb.0:
613; CHECK-NEXT:    shrq $33, %rdi # encoding: [0x48,0xc1,0xef,0x21]
614; CHECK-NEXT:    testw %di, %di # encoding: [0x66,0x85,0xff]
615; CHECK-NEXT:    setne %al # encoding: [0x0f,0x95,0xc0]
616; CHECK-NEXT:    retq # encoding: [0xc3]
617  %v0 = and i64 %a, 562941363486720  ; 0xffff << 33
618  %v1 = icmp ne i64 %v0, 0
619  ret i1 %v1
620}
621
622define i1 @shifted_mask64_testl(i64 %a) {
623; CHECK-LABEL: shifted_mask64_testl:
624; CHECK:       # %bb.0:
625; CHECK-NEXT:    shrq $7, %rdi # encoding: [0x48,0xc1,0xef,0x07]
626; CHECK-NEXT:    testl %edi, %edi # encoding: [0x85,0xff]
627; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
628; CHECK-NEXT:    retq # encoding: [0xc3]
629  %v0 = and i64 %a, 549755813760  ; 0xffffffff << 7
630  %v1 = icmp eq i64 %v0, 0
631  ret i1 %v1
632}
633
634define i1 @shifted_mask64_extra_use_const(i64 %a) {
635; CHECK-LABEL: shifted_mask64_extra_use_const:
636; CHECK:       # %bb.0:
637; CHECK-NEXT:    movabsq $287104476244869120, %rcx # encoding: [0x48,0xb9,0x00,0x00,0x00,0x00,0x00,0x00,0xfc,0x03]
638; CHECK-NEXT:    # imm = 0x3FC000000000000
639; CHECK-NEXT:    testq %rcx, %rdi # encoding: [0x48,0x85,0xcf]
640; CHECK-NEXT:    setne %al # encoding: [0x0f,0x95,0xc0]
641; CHECK-NEXT:    movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
642; CHECK-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
643; CHECK-NEXT:    retq # encoding: [0xc3]
644  %v0 = and i64 %a, 287104476244869120  ; 0xff << 50
645  %v1 = icmp ne i64 %v0, 0
646  store i64 287104476244869120, i64* @d64
647  ret i1 %v1
648}
649
650define i1 @shifted_mask64_extra_use_and(i64 %a) {
651; CHECK-LABEL: shifted_mask64_extra_use_and:
652; CHECK:       # %bb.0:
653; CHECK-NEXT:    movabsq $287104476244869120, %rcx # encoding: [0x48,0xb9,0x00,0x00,0x00,0x00,0x00,0x00,0xfc,0x03]
654; CHECK-NEXT:    # imm = 0x3FC000000000000
655; CHECK-NEXT:    andq %rdi, %rcx # encoding: [0x48,0x21,0xf9]
656; CHECK-NEXT:    setne %al # encoding: [0x0f,0x95,0xc0]
657; CHECK-NEXT:    movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
658; CHECK-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
659; CHECK-NEXT:    retq # encoding: [0xc3]
660  %v0 = and i64 %a, 287104476244869120  ; 0xff << 50
661  %v1 = icmp ne i64 %v0, 0
662  store i64 %v0, i64* @d64
663  ret i1 %v1
664}
665
666define i1 @shifted_mask32_testl_immediate(i64 %a) {
667; CHECK-LABEL: shifted_mask32_testl_immediate:
668; CHECK:       # %bb.0:
669; CHECK-NEXT:    testl $66846720, %edi # encoding: [0xf7,0xc7,0x00,0x00,0xfc,0x03]
670; CHECK-NEXT:    # imm = 0x3FC0000
671; CHECK-NEXT:    setne %al # encoding: [0x0f,0x95,0xc0]
672; CHECK-NEXT:    retq # encoding: [0xc3]
673  %v0 = and i64 %a, 66846720  ; 0xff << 18
674  %v1 = icmp ne i64 %v0, 0
675  ret i1 %v1
676}
677
678define i1 @shifted_mask32_extra_use_const(i64 %a) {
679; CHECK-LABEL: shifted_mask32_extra_use_const:
680; CHECK:       # %bb.0:
681; CHECK-NEXT:    testl $66846720, %edi # encoding: [0xf7,0xc7,0x00,0x00,0xfc,0x03]
682; CHECK-NEXT:    # imm = 0x3FC0000
683; CHECK-NEXT:    setne %al # encoding: [0x0f,0x95,0xc0]
684; CHECK-NEXT:    movq $66846720, d64(%rip) # encoding: [0x48,0xc7,0x05,A,A,A,A,0x00,0x00,0xfc,0x03]
685; CHECK-NEXT:    # fixup A - offset: 3, value: d64-8, kind: reloc_riprel_4byte
686; CHECK-NEXT:    # imm = 0x3FC0000
687; CHECK-NEXT:    retq # encoding: [0xc3]
688  %v0 = and i64 %a, 66846720  ; 0xff << 18
689  %v1 = icmp ne i64 %v0, 0
690  store i64 66846720, i64* @d64
691  ret i1 %v1
692}
693
694define i1 @shifted_mask32_extra_use_and(i64 %a) {
695; CHECK-LABEL: shifted_mask32_extra_use_and:
696; CHECK:       # %bb.0:
697; CHECK-NEXT:    andq $66846720, %rdi # encoding: [0x48,0x81,0xe7,0x00,0x00,0xfc,0x03]
698; CHECK-NEXT:    # imm = 0x3FC0000
699; CHECK-NEXT:    setne %al # encoding: [0x0f,0x95,0xc0]
700; CHECK-NEXT:    movq %rdi, d64(%rip) # encoding: [0x48,0x89,0x3d,A,A,A,A]
701; CHECK-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
702; CHECK-NEXT:    retq # encoding: [0xc3]
703  %v0 = and i64 %a, 66846720  ; 0xff << 50
704  %v1 = icmp ne i64 %v0, 0
705  store i64 %v0, i64* @d64
706  ret i1 %v1
707}
708
709define { i64, i64 } @pr39968(i64, i64, i32) {
710; CHECK-LABEL: pr39968:
711; CHECK:       # %bb.0:
712; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
713; CHECK-NEXT:    testb $64, %dl # encoding: [0xf6,0xc2,0x40]
714; CHECK-NEXT:    cmovneq %rdi, %rsi # encoding: [0x48,0x0f,0x45,0xf7]
715; CHECK-NEXT:    cmovneq %rdi, %rax # encoding: [0x48,0x0f,0x45,0xc7]
716; CHECK-NEXT:    movq %rsi, %rdx # encoding: [0x48,0x89,0xf2]
717; CHECK-NEXT:    retq # encoding: [0xc3]
718  %4 = and i32 %2, 64
719  %5 = icmp ne i32 %4, 0
720  %6 = select i1 %5, i64 %0, i64 %1
721  %7 = select i1 %5, i64 %0, i64 0
722  %8 = insertvalue { i64, i64 } undef, i64 %7, 0
723  %9 = insertvalue { i64, i64 } %8, i64 %6, 1
724  ret { i64, i64 } %9
725}
726
727; Make sure we use a 32-bit comparison without an extend based on the input
728; being pre-sign extended by caller.
729define i32 @pr42189(i16 signext %c) {
730; CHECK-LABEL: pr42189:
731; CHECK:       # %bb.0: # %entry
732; CHECK-NEXT:    cmpl $32767, %edi # encoding: [0x81,0xff,0xff,0x7f,0x00,0x00]
733; CHECK-NEXT:    # imm = 0x7FFF
734; CHECK-NEXT:    jne .LBB45_2 # encoding: [0x75,A]
735; CHECK-NEXT:    # fixup A - offset: 1, value: .LBB45_2-1, kind: FK_PCRel_1
736; CHECK-NEXT:  # %bb.1: # %if.then
737; CHECK-NEXT:    jmp g@PLT # TAILCALL
738; CHECK-NEXT:    # encoding: [0xeb,A]
739; CHECK-NEXT:    # fixup A - offset: 1, value: g@PLT-1, kind: FK_PCRel_1
740; CHECK-NEXT:  .LBB45_2: # %if.end
741; CHECK-NEXT:    jmp f@PLT # TAILCALL
742; CHECK-NEXT:    # encoding: [0xeb,A]
743; CHECK-NEXT:    # fixup A - offset: 1, value: f@PLT-1, kind: FK_PCRel_1
744entry:
745  %cmp = icmp eq i16 %c, 32767
746  br i1 %cmp, label %if.then, label %if.end
747
748if.then:                                          ; preds = %entry
749  %call = tail call i32 @g()
750  br label %return
751
752if.end:                                           ; preds = %entry
753  %call2 = tail call i32 @f()
754  br label %return
755
756return:                                           ; preds = %if.end, %if.then
757  %retval.0 = phi i32 [ %call, %if.then ], [ %call2, %if.end ]
758  ret i32 %retval.0
759}
760
761declare i32 @g()
762declare i32 @f()
763