1; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-apple-darwin10 -disable-cgp-select2branch | FileCheck %s
2target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
3
4define i32 @test1(i32 %x, i32 %n, i32 %w, i32* %vp) nounwind readnone {
5entry:
6; CHECK-LABEL: test1:
7; CHECK: btl
8; CHECK-NEXT: movl	$12, %eax
9; CHECK-NEXT: cmovael	(%rcx), %eax
10; CHECK-NEXT: ret
11
12	%0 = lshr i32 %x, %n		; <i32> [#uses=1]
13	%1 = and i32 %0, 1		; <i32> [#uses=1]
14	%toBool = icmp eq i32 %1, 0		; <i1> [#uses=1]
15        %v = load i32, i32* %vp
16	%.0 = select i1 %toBool, i32 %v, i32 12		; <i32> [#uses=1]
17	ret i32 %.0
18}
19define i32 @test2(i32 %x, i32 %n, i32 %w, i32* %vp) nounwind readnone {
20entry:
21; CHECK-LABEL: test2:
22; CHECK: btl
23; CHECK-NEXT: movl	$12, %eax
24; CHECK-NEXT: cmovbl	(%rcx), %eax
25; CHECK-NEXT: ret
26
27	%0 = lshr i32 %x, %n		; <i32> [#uses=1]
28	%1 = and i32 %0, 1		; <i32> [#uses=1]
29	%toBool = icmp eq i32 %1, 0		; <i1> [#uses=1]
30        %v = load i32, i32* %vp
31	%.0 = select i1 %toBool, i32 12, i32 %v		; <i32> [#uses=1]
32	ret i32 %.0
33}
34
35
36; x86's 32-bit cmov zeroes the high 32 bits of the destination. Make
37; sure CodeGen takes advantage of that to avoid an unnecessary
38; zero-extend (movl) after the cmov.
39
40declare void @bar(i64) nounwind
41
42define void @test3(i64 %a, i64 %b, i1 %p) nounwind {
43; CHECK-LABEL: test3:
44; CHECK:      cmov{{n?}}el %[[R1:e..]], %[[R2:e..]]
45; CHECK-NOT:  movl
46; CHECK:      call
47
48  %c = trunc i64 %a to i32
49  %d = trunc i64 %b to i32
50  %e = select i1 %p, i32 %c, i32 %d
51  %f = zext i32 %e to i64
52  call void @bar(i64 %f)
53  ret void
54}
55
56
57
58; CodeGen shouldn't try to do a setne after an expanded 8-bit conditional
59; move without recomputing EFLAGS, because the expansion of the conditional
60; move with control flow may clobber EFLAGS (e.g., with xor, to set the
61; register to zero).
62
63; The test is a little awkward; the important part is that there's a test before the
64; setne.
65; PR4814
66
67
68@g_3 = external global i8                         ; <i8*> [#uses=1]
69@g_96 = external global i8                        ; <i8*> [#uses=2]
70@g_100 = external global i8                       ; <i8*> [#uses=2]
71@_2E_str = external constant [15 x i8], align 1   ; <[15 x i8]*> [#uses=1]
72
73define i32 @test4() nounwind {
74entry:
75  %0 = load i8, i8* @g_3, align 1                     ; <i8> [#uses=2]
76  %1 = sext i8 %0 to i32                          ; <i32> [#uses=1]
77  %.lobit.i = lshr i8 %0, 7                       ; <i8> [#uses=1]
78  %tmp.i = zext i8 %.lobit.i to i32               ; <i32> [#uses=1]
79  %tmp.not.i = xor i32 %tmp.i, 1                  ; <i32> [#uses=1]
80  %iftmp.17.0.i.i = ashr i32 %1, %tmp.not.i       ; <i32> [#uses=1]
81  %retval56.i.i = trunc i32 %iftmp.17.0.i.i to i8 ; <i8> [#uses=1]
82  %2 = icmp eq i8 %retval56.i.i, 0                ; <i1> [#uses=2]
83  %g_96.promoted.i = load i8, i8* @g_96               ; <i8> [#uses=3]
84  %3 = icmp eq i8 %g_96.promoted.i, 0             ; <i1> [#uses=2]
85  br i1 %3, label %func_4.exit.i, label %bb.i.i.i
86
87bb.i.i.i:                                         ; preds = %entry
88  %4 = load volatile i8, i8* @g_100, align 1          ; <i8> [#uses=0]
89  br label %func_4.exit.i
90
91; CHECK-LABEL: test4:
92; CHECK: g_100
93; CHECK: testb
94; CHECK-NOT: xor
95; CHECK: setne
96; CHECK: testb
97
98func_4.exit.i:                                    ; preds = %bb.i.i.i, %entry
99  %.not.i = xor i1 %2, true                       ; <i1> [#uses=1]
100  %brmerge.i = or i1 %3, %.not.i                  ; <i1> [#uses=1]
101  %.mux.i = select i1 %2, i8 %g_96.promoted.i, i8 0 ; <i8> [#uses=1]
102  br i1 %brmerge.i, label %func_1.exit, label %bb.i.i
103
104bb.i.i:                                           ; preds = %func_4.exit.i
105  %5 = load volatile i8, i8* @g_100, align 1          ; <i8> [#uses=0]
106  br label %func_1.exit
107
108func_1.exit:                                      ; preds = %bb.i.i, %func_4.exit.i
109  %g_96.tmp.0.i = phi i8 [ %g_96.promoted.i, %bb.i.i ], [ %.mux.i, %func_4.exit.i ] ; <i8> [#uses=2]
110  store i8 %g_96.tmp.0.i, i8* @g_96
111  %6 = zext i8 %g_96.tmp.0.i to i32               ; <i32> [#uses=1]
112  %7 = tail call i32 (i8*, ...) @printf(i8* noalias getelementptr ([15 x i8], [15 x i8]* @_2E_str, i64 0, i64 0), i32 %6) nounwind ; <i32> [#uses=0]
113  ret i32 0
114}
115
116declare i32 @printf(i8* nocapture, ...) nounwind
117
118
119; Should compile to setcc | -2.
120; rdar://6668608
121define i32 @test5(i32* nocapture %P) nounwind readonly {
122entry:
123; CHECK-LABEL: test5:
124; CHECK:  xorl %eax, %eax
125; CHECK: 	setg	%al
126; CHECK:	orl	$-2, %eax
127; CHECK:	ret
128
129	%0 = load i32, i32* %P, align 4		; <i32> [#uses=1]
130	%1 = icmp sgt i32 %0, 41		; <i1> [#uses=1]
131	%iftmp.0.0 = select i1 %1, i32 -1, i32 -2		; <i32> [#uses=1]
132	ret i32 %iftmp.0.0
133}
134
135define i32 @test6(i32* nocapture %P) nounwind readonly {
136entry:
137; CHECK-LABEL: test6:
138; CHECK:  xorl %eax, %eax
139; CHECK: 	setl	%al
140; CHECK:	leal	4(%rax,%rax,8), %eax
141; CHECK:        ret
142	%0 = load i32, i32* %P, align 4		; <i32> [#uses=1]
143	%1 = icmp sgt i32 %0, 41		; <i1> [#uses=1]
144	%iftmp.0.0 = select i1 %1, i32 4, i32 13		; <i32> [#uses=1]
145	ret i32 %iftmp.0.0
146}
147
148
149; Don't try to use a 16-bit conditional move to do an 8-bit select,
150; because it isn't worth it. Just use a branch instead.
151define i8 @test7(i1 inreg %c, i8 inreg %a, i8 inreg %b) nounwind {
152; CHECK-LABEL: test7:
153; CHECK:     testb	$1, %dil
154; CHECK-NEXT:     jne	LBB
155
156  %d = select i1 %c, i8 %a, i8 %b
157  ret i8 %d
158}
159
160define i32 @smin(i32 %x) {
161; CHECK-LABEL: smin:
162; CHECK:       ## BB#0:
163; CHECK-NEXT:    xorl $-1, %edi
164; CHECK-NEXT:    movl $-1, %eax
165; CHECK-NEXT:    cmovsl %edi, %eax
166; CHECK-NEXT:    retq
167  %not_x = xor i32 %x, -1
168  %1 = icmp slt i32 %not_x, -1
169  %sel = select i1 %1, i32 %not_x, i32 -1
170  ret i32 %sel
171}
172
173