1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=SSE --check-prefix=SSE2 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1 4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2 5 6; 7; PR6455 'Clear Upper Bits' Patterns 8; 9 10define <2 x i64> @_clearupper2xi64a(<2 x i64>) nounwind { 11; SSE-LABEL: _clearupper2xi64a: 12; SSE: # BB#0: 13; SSE-NEXT: andps {{.*}}(%rip), %xmm0 14; SSE-NEXT: retq 15; 16; AVX1-LABEL: _clearupper2xi64a: 17; AVX1: # BB#0: 18; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 19; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7] 20; AVX1-NEXT: retq 21; 22; AVX2-LABEL: _clearupper2xi64a: 23; AVX2: # BB#0: 24; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1 25; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3] 26; AVX2-NEXT: retq 27 %x0 = extractelement <2 x i64> %0, i32 0 28 %x1 = extractelement <2 x i64> %0, i32 1 29 %trunc0 = trunc i64 %x0 to i32 30 %trunc1 = trunc i64 %x1 to i32 31 %ext0 = zext i32 %trunc0 to i64 32 %ext1 = zext i32 %trunc1 to i64 33 %v0 = insertelement <2 x i64> undef, i64 %ext0, i32 0 34 %v1 = insertelement <2 x i64> %v0, i64 %ext1, i32 1 35 ret <2 x i64> %v1 36} 37 38; FIXME: Unnecessary vblendps/vpblendd on AVX targets 39define <4 x i64> @_clearupper4xi64a(<4 x i64>) nounwind { 40; SSE-LABEL: _clearupper4xi64a: 41; SSE: # BB#0: 42; SSE-NEXT: movaps {{.*#+}} xmm2 = [4294967295,4294967295] 43; SSE-NEXT: andps %xmm2, %xmm0 44; SSE-NEXT: andps %xmm2, %xmm1 45; SSE-NEXT: retq 46; 47; AVX1-LABEL: _clearupper4xi64a: 48; AVX1: # BB#0: 49; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5,6,7] 50; AVX1-NEXT: vxorps %ymm1, %ymm1, %ymm1 51; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] 52; AVX1-NEXT: retq 53; 54; AVX2-LABEL: _clearupper4xi64a: 55; AVX2: # BB#0: 56; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5,6,7] 57; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1 58; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] 59; AVX2-NEXT: retq 60 %x0 = extractelement <4 x i64> %0, i32 0 61 %x1 = extractelement <4 x i64> %0, i32 1 62 %x2 = extractelement <4 x i64> %0, i32 2 63 %x3 = extractelement <4 x i64> %0, i32 3 64 %trunc0 = trunc i64 %x0 to i32 65 %trunc1 = trunc i64 %x1 to i32 66 %trunc2 = trunc i64 %x2 to i32 67 %trunc3 = trunc i64 %x3 to i32 68 %ext0 = zext i32 %trunc0 to i64 69 %ext1 = zext i32 %trunc1 to i64 70 %ext2 = zext i32 %trunc2 to i64 71 %ext3 = zext i32 %trunc3 to i64 72 %v0 = insertelement <4 x i64> undef, i64 %ext0, i32 0 73 %v1 = insertelement <4 x i64> %v0, i64 %ext1, i32 1 74 %v2 = insertelement <4 x i64> %v1, i64 %ext2, i32 2 75 %v3 = insertelement <4 x i64> %v2, i64 %ext3, i32 3 76 ret <4 x i64> %v3 77} 78 79define <4 x i32> @_clearupper4xi32a(<4 x i32>) nounwind { 80; SSE-LABEL: _clearupper4xi32a: 81; SSE: # BB#0: 82; SSE-NEXT: andps {{.*}}(%rip), %xmm0 83; SSE-NEXT: retq 84; 85; AVX-LABEL: _clearupper4xi32a: 86; AVX: # BB#0: 87; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1 88; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 89; AVX-NEXT: retq 90 %x0 = extractelement <4 x i32> %0, i32 0 91 %x1 = extractelement <4 x i32> %0, i32 1 92 %x2 = extractelement <4 x i32> %0, i32 2 93 %x3 = extractelement <4 x i32> %0, i32 3 94 %trunc0 = trunc i32 %x0 to i16 95 %trunc1 = trunc i32 %x1 to i16 96 %trunc2 = trunc i32 %x2 to i16 97 %trunc3 = trunc i32 %x3 to i16 98 %ext0 = zext i16 %trunc0 to i32 99 %ext1 = zext i16 %trunc1 to i32 100 %ext2 = zext i16 %trunc2 to i32 101 %ext3 = zext i16 %trunc3 to i32 102 %v0 = insertelement <4 x i32> undef, i32 %ext0, i32 0 103 %v1 = insertelement <4 x i32> %v0, i32 %ext1, i32 1 104 %v2 = insertelement <4 x i32> %v1, i32 %ext2, i32 2 105 %v3 = insertelement <4 x i32> %v2, i32 %ext3, i32 3 106 ret <4 x i32> %v3 107} 108 109; FIXME: Unnecessary vblendps on AVX1 target 110; FIXME: Missed vpblendw on AVX2 target 111define <8 x i32> @_clearupper8xi32a(<8 x i32>) nounwind { 112; SSE-LABEL: _clearupper8xi32a: 113; SSE: # BB#0: 114; SSE-NEXT: movaps {{.*#+}} xmm2 = [65535,65535,65535,65535] 115; SSE-NEXT: andps %xmm2, %xmm0 116; SSE-NEXT: andps %xmm2, %xmm1 117; SSE-NEXT: retq 118; 119; AVX1-LABEL: _clearupper8xi32a: 120; AVX1: # BB#0: 121; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5,6,7] 122; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 123; AVX1-NEXT: retq 124; 125; AVX2-LABEL: _clearupper8xi32a: 126; AVX2: # BB#0: 127; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5,6,7] 128; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm1 129; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0 130; AVX2-NEXT: retq 131 %x0 = extractelement <8 x i32> %0, i32 0 132 %x1 = extractelement <8 x i32> %0, i32 1 133 %x2 = extractelement <8 x i32> %0, i32 2 134 %x3 = extractelement <8 x i32> %0, i32 3 135 %x4 = extractelement <8 x i32> %0, i32 4 136 %x5 = extractelement <8 x i32> %0, i32 5 137 %x6 = extractelement <8 x i32> %0, i32 6 138 %x7 = extractelement <8 x i32> %0, i32 7 139 %trunc0 = trunc i32 %x0 to i16 140 %trunc1 = trunc i32 %x1 to i16 141 %trunc2 = trunc i32 %x2 to i16 142 %trunc3 = trunc i32 %x3 to i16 143 %trunc4 = trunc i32 %x4 to i16 144 %trunc5 = trunc i32 %x5 to i16 145 %trunc6 = trunc i32 %x6 to i16 146 %trunc7 = trunc i32 %x7 to i16 147 %ext0 = zext i16 %trunc0 to i32 148 %ext1 = zext i16 %trunc1 to i32 149 %ext2 = zext i16 %trunc2 to i32 150 %ext3 = zext i16 %trunc3 to i32 151 %ext4 = zext i16 %trunc4 to i32 152 %ext5 = zext i16 %trunc5 to i32 153 %ext6 = zext i16 %trunc6 to i32 154 %ext7 = zext i16 %trunc7 to i32 155 %v0 = insertelement <8 x i32> undef, i32 %ext0, i32 0 156 %v1 = insertelement <8 x i32> %v0, i32 %ext1, i32 1 157 %v2 = insertelement <8 x i32> %v1, i32 %ext2, i32 2 158 %v3 = insertelement <8 x i32> %v2, i32 %ext3, i32 3 159 %v4 = insertelement <8 x i32> %v3, i32 %ext4, i32 4 160 %v5 = insertelement <8 x i32> %v4, i32 %ext5, i32 5 161 %v6 = insertelement <8 x i32> %v5, i32 %ext6, i32 6 162 %v7 = insertelement <8 x i32> %v6, i32 %ext7, i32 7 163 ret <8 x i32> %v7 164} 165 166define <8 x i16> @_clearupper8xi16a(<8 x i16>) nounwind { 167; SSE-LABEL: _clearupper8xi16a: 168; SSE: # BB#0: 169; SSE-NEXT: pextrw $1, %xmm0, %eax 170; SSE-NEXT: pextrw $2, %xmm0, %r9d 171; SSE-NEXT: pextrw $3, %xmm0, %edx 172; SSE-NEXT: pextrw $4, %xmm0, %r8d 173; SSE-NEXT: pextrw $5, %xmm0, %edi 174; SSE-NEXT: pextrw $6, %xmm0, %esi 175; SSE-NEXT: pextrw $7, %xmm0, %ecx 176; SSE-NEXT: movd %ecx, %xmm1 177; SSE-NEXT: movd %edx, %xmm2 178; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 179; SSE-NEXT: movd %edi, %xmm1 180; SSE-NEXT: movd %eax, %xmm3 181; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3] 182; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3] 183; SSE-NEXT: movd %esi, %xmm1 184; SSE-NEXT: movd %r9d, %xmm2 185; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 186; SSE-NEXT: movd %r8d, %xmm1 187; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 188; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 189; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3] 190; SSE-NEXT: pand {{.*}}(%rip), %xmm0 191; SSE-NEXT: retq 192; 193; AVX-LABEL: _clearupper8xi16a: 194; AVX: # BB#0: 195; AVX-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0 196; AVX-NEXT: retq 197 %x0 = extractelement <8 x i16> %0, i32 0 198 %x1 = extractelement <8 x i16> %0, i32 1 199 %x2 = extractelement <8 x i16> %0, i32 2 200 %x3 = extractelement <8 x i16> %0, i32 3 201 %x4 = extractelement <8 x i16> %0, i32 4 202 %x5 = extractelement <8 x i16> %0, i32 5 203 %x6 = extractelement <8 x i16> %0, i32 6 204 %x7 = extractelement <8 x i16> %0, i32 7 205 %trunc0 = trunc i16 %x0 to i8 206 %trunc1 = trunc i16 %x1 to i8 207 %trunc2 = trunc i16 %x2 to i8 208 %trunc3 = trunc i16 %x3 to i8 209 %trunc4 = trunc i16 %x4 to i8 210 %trunc5 = trunc i16 %x5 to i8 211 %trunc6 = trunc i16 %x6 to i8 212 %trunc7 = trunc i16 %x7 to i8 213 %ext0 = zext i8 %trunc0 to i16 214 %ext1 = zext i8 %trunc1 to i16 215 %ext2 = zext i8 %trunc2 to i16 216 %ext3 = zext i8 %trunc3 to i16 217 %ext4 = zext i8 %trunc4 to i16 218 %ext5 = zext i8 %trunc5 to i16 219 %ext6 = zext i8 %trunc6 to i16 220 %ext7 = zext i8 %trunc7 to i16 221 %v0 = insertelement <8 x i16> undef, i16 %ext0, i32 0 222 %v1 = insertelement <8 x i16> %v0, i16 %ext1, i32 1 223 %v2 = insertelement <8 x i16> %v1, i16 %ext2, i32 2 224 %v3 = insertelement <8 x i16> %v2, i16 %ext3, i32 3 225 %v4 = insertelement <8 x i16> %v3, i16 %ext4, i32 4 226 %v5 = insertelement <8 x i16> %v4, i16 %ext5, i32 5 227 %v6 = insertelement <8 x i16> %v5, i16 %ext6, i32 6 228 %v7 = insertelement <8 x i16> %v6, i16 %ext7, i32 7 229 ret <8 x i16> %v7 230} 231 232; FIXME: Unnecessary vblendps/vpblendd on AVX targets 233define <16 x i16> @_clearupper16xi16a(<16 x i16>) nounwind { 234; SSE-LABEL: _clearupper16xi16a: 235; SSE: # BB#0: 236; SSE-NEXT: pushq %rbp 237; SSE-NEXT: pushq %r15 238; SSE-NEXT: pushq %r14 239; SSE-NEXT: pushq %r12 240; SSE-NEXT: pushq %rbx 241; SSE-NEXT: pextrw $1, %xmm0, %edi 242; SSE-NEXT: pextrw $2, %xmm0, %eax 243; SSE-NEXT: pextrw $3, %xmm0, %ecx 244; SSE-NEXT: pextrw $4, %xmm0, %edx 245; SSE-NEXT: pextrw $5, %xmm0, %esi 246; SSE-NEXT: pextrw $6, %xmm0, %ebx 247; SSE-NEXT: pextrw $7, %xmm0, %ebp 248; SSE-NEXT: pextrw $1, %xmm1, %r10d 249; SSE-NEXT: pextrw $2, %xmm1, %r9d 250; SSE-NEXT: pextrw $3, %xmm1, %r14d 251; SSE-NEXT: pextrw $4, %xmm1, %r8d 252; SSE-NEXT: pextrw $5, %xmm1, %r15d 253; SSE-NEXT: pextrw $6, %xmm1, %r11d 254; SSE-NEXT: pextrw $7, %xmm1, %r12d 255; SSE-NEXT: movd %ebp, %xmm2 256; SSE-NEXT: movd %ecx, %xmm3 257; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3] 258; SSE-NEXT: movd %esi, %xmm2 259; SSE-NEXT: movd %edi, %xmm4 260; SSE-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3] 261; SSE-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3] 262; SSE-NEXT: movd %ebx, %xmm2 263; SSE-NEXT: movd %eax, %xmm3 264; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3] 265; SSE-NEXT: movd %edx, %xmm2 266; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 267; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3] 268; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3] 269; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 270; SSE-NEXT: pand %xmm2, %xmm0 271; SSE-NEXT: movd %r12d, %xmm3 272; SSE-NEXT: movd %r14d, %xmm4 273; SSE-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3] 274; SSE-NEXT: movd %r15d, %xmm3 275; SSE-NEXT: movd %r10d, %xmm5 276; SSE-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1],xmm5[2],xmm3[2],xmm5[3],xmm3[3] 277; SSE-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3] 278; SSE-NEXT: movd %r11d, %xmm3 279; SSE-NEXT: movd %r9d, %xmm4 280; SSE-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3] 281; SSE-NEXT: movd %r8d, %xmm3 282; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3] 283; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1],xmm1[2],xmm4[2],xmm1[3],xmm4[3] 284; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm5[0],xmm1[1],xmm5[1],xmm1[2],xmm5[2],xmm1[3],xmm5[3] 285; SSE-NEXT: pand %xmm2, %xmm1 286; SSE-NEXT: popq %rbx 287; SSE-NEXT: popq %r12 288; SSE-NEXT: popq %r14 289; SSE-NEXT: popq %r15 290; SSE-NEXT: popq %rbp 291; SSE-NEXT: retq 292; 293; AVX1-LABEL: _clearupper16xi16a: 294; AVX1: # BB#0: 295; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5,6,7] 296; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 297; AVX1-NEXT: retq 298; 299; AVX2-LABEL: _clearupper16xi16a: 300; AVX2: # BB#0: 301; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5,6,7] 302; AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 303; AVX2-NEXT: retq 304 %x0 = extractelement <16 x i16> %0, i32 0 305 %x1 = extractelement <16 x i16> %0, i32 1 306 %x2 = extractelement <16 x i16> %0, i32 2 307 %x3 = extractelement <16 x i16> %0, i32 3 308 %x4 = extractelement <16 x i16> %0, i32 4 309 %x5 = extractelement <16 x i16> %0, i32 5 310 %x6 = extractelement <16 x i16> %0, i32 6 311 %x7 = extractelement <16 x i16> %0, i32 7 312 %x8 = extractelement <16 x i16> %0, i32 8 313 %x9 = extractelement <16 x i16> %0, i32 9 314 %x10 = extractelement <16 x i16> %0, i32 10 315 %x11 = extractelement <16 x i16> %0, i32 11 316 %x12 = extractelement <16 x i16> %0, i32 12 317 %x13 = extractelement <16 x i16> %0, i32 13 318 %x14 = extractelement <16 x i16> %0, i32 14 319 %x15 = extractelement <16 x i16> %0, i32 15 320 %trunc0 = trunc i16 %x0 to i8 321 %trunc1 = trunc i16 %x1 to i8 322 %trunc2 = trunc i16 %x2 to i8 323 %trunc3 = trunc i16 %x3 to i8 324 %trunc4 = trunc i16 %x4 to i8 325 %trunc5 = trunc i16 %x5 to i8 326 %trunc6 = trunc i16 %x6 to i8 327 %trunc7 = trunc i16 %x7 to i8 328 %trunc8 = trunc i16 %x8 to i8 329 %trunc9 = trunc i16 %x9 to i8 330 %trunc10 = trunc i16 %x10 to i8 331 %trunc11 = trunc i16 %x11 to i8 332 %trunc12 = trunc i16 %x12 to i8 333 %trunc13 = trunc i16 %x13 to i8 334 %trunc14 = trunc i16 %x14 to i8 335 %trunc15 = trunc i16 %x15 to i8 336 %ext0 = zext i8 %trunc0 to i16 337 %ext1 = zext i8 %trunc1 to i16 338 %ext2 = zext i8 %trunc2 to i16 339 %ext3 = zext i8 %trunc3 to i16 340 %ext4 = zext i8 %trunc4 to i16 341 %ext5 = zext i8 %trunc5 to i16 342 %ext6 = zext i8 %trunc6 to i16 343 %ext7 = zext i8 %trunc7 to i16 344 %ext8 = zext i8 %trunc8 to i16 345 %ext9 = zext i8 %trunc9 to i16 346 %ext10 = zext i8 %trunc10 to i16 347 %ext11 = zext i8 %trunc11 to i16 348 %ext12 = zext i8 %trunc12 to i16 349 %ext13 = zext i8 %trunc13 to i16 350 %ext14 = zext i8 %trunc14 to i16 351 %ext15 = zext i8 %trunc15 to i16 352 %v0 = insertelement <16 x i16> undef, i16 %ext0, i32 0 353 %v1 = insertelement <16 x i16> %v0, i16 %ext1, i32 1 354 %v2 = insertelement <16 x i16> %v1, i16 %ext2, i32 2 355 %v3 = insertelement <16 x i16> %v2, i16 %ext3, i32 3 356 %v4 = insertelement <16 x i16> %v3, i16 %ext4, i32 4 357 %v5 = insertelement <16 x i16> %v4, i16 %ext5, i32 5 358 %v6 = insertelement <16 x i16> %v5, i16 %ext6, i32 6 359 %v7 = insertelement <16 x i16> %v6, i16 %ext7, i32 7 360 %v8 = insertelement <16 x i16> %v7, i16 %ext8, i32 8 361 %v9 = insertelement <16 x i16> %v8, i16 %ext9, i32 9 362 %v10 = insertelement <16 x i16> %v9, i16 %ext10, i32 10 363 %v11 = insertelement <16 x i16> %v10, i16 %ext11, i32 11 364 %v12 = insertelement <16 x i16> %v11, i16 %ext12, i32 12 365 %v13 = insertelement <16 x i16> %v12, i16 %ext13, i32 13 366 %v14 = insertelement <16 x i16> %v13, i16 %ext14, i32 14 367 %v15 = insertelement <16 x i16> %v14, i16 %ext15, i32 15 368 ret <16 x i16> %v15 369} 370 371define <16 x i8> @_clearupper16xi8a(<16 x i8>) nounwind { 372; SSE-LABEL: _clearupper16xi8a: 373; SSE: # BB#0: 374; SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) 375; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 376; SSE-NEXT: movd %eax, %xmm0 377; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %r9d 378; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %edx 379; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %esi 380; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %r8d 381; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %edi 382; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 383; SSE-NEXT: movd %eax, %xmm1 384; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 385; SSE-NEXT: movd %esi, %xmm0 386; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 387; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %esi 388; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %ecx 389; SSE-NEXT: movd %ecx, %xmm2 390; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 391; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 392; SSE-NEXT: movd %edx, %xmm0 393; SSE-NEXT: movd %esi, %xmm1 394; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 395; SSE-NEXT: movd %edi, %xmm0 396; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %ecx 397; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %edx 398; SSE-NEXT: movd %edx, %xmm3 399; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3],xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7] 400; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7] 401; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 402; SSE-NEXT: movd %r9d, %xmm0 403; SSE-NEXT: movd %eax, %xmm1 404; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 405; SSE-NEXT: movd %r8d, %xmm0 406; SSE-NEXT: movd %ecx, %xmm2 407; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 408; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 409; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 410; SSE-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 411; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 412; SSE-NEXT: movd {{.*#+}} xmm4 = mem[0],zero,zero,zero 413; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 414; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3],xmm0[4],xmm4[4],xmm0[5],xmm4[5],xmm0[6],xmm4[6],xmm0[7],xmm4[7] 415; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 416; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7] 417; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 418; SSE-NEXT: pand {{.*}}(%rip), %xmm0 419; SSE-NEXT: retq 420; 421; AVX-LABEL: _clearupper16xi8a: 422; AVX: # BB#0: 423; AVX-NEXT: vpextrb $0, %xmm0, %eax 424; AVX-NEXT: vpextrb $1, %xmm0, %ecx 425; AVX-NEXT: vmovd %eax, %xmm1 426; AVX-NEXT: vpinsrb $1, %ecx, %xmm1, %xmm1 427; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3,4,5,6,7] 428; AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 429; AVX-NEXT: retq 430 %x0 = extractelement <16 x i8> %0, i32 0 431 %x1 = extractelement <16 x i8> %0, i32 1 432 %x2 = extractelement <16 x i8> %0, i32 2 433 %x3 = extractelement <16 x i8> %0, i32 3 434 %x4 = extractelement <16 x i8> %0, i32 4 435 %x5 = extractelement <16 x i8> %0, i32 5 436 %x6 = extractelement <16 x i8> %0, i32 6 437 %x7 = extractelement <16 x i8> %0, i32 7 438 %x8 = extractelement <16 x i8> %0, i32 8 439 %x9 = extractelement <16 x i8> %0, i32 9 440 %x10 = extractelement <16 x i8> %0, i32 10 441 %x11 = extractelement <16 x i8> %0, i32 11 442 %x12 = extractelement <16 x i8> %0, i32 12 443 %x13 = extractelement <16 x i8> %0, i32 13 444 %x14 = extractelement <16 x i8> %0, i32 14 445 %x15 = extractelement <16 x i8> %0, i32 15 446 %trunc0 = trunc i8 %x0 to i4 447 %trunc1 = trunc i8 %x1 to i4 448 %trunc2 = trunc i8 %x2 to i4 449 %trunc3 = trunc i8 %x3 to i4 450 %trunc4 = trunc i8 %x4 to i4 451 %trunc5 = trunc i8 %x5 to i4 452 %trunc6 = trunc i8 %x6 to i4 453 %trunc7 = trunc i8 %x7 to i4 454 %trunc8 = trunc i8 %x8 to i4 455 %trunc9 = trunc i8 %x9 to i4 456 %trunc10 = trunc i8 %x10 to i4 457 %trunc11 = trunc i8 %x11 to i4 458 %trunc12 = trunc i8 %x12 to i4 459 %trunc13 = trunc i8 %x13 to i4 460 %trunc14 = trunc i8 %x14 to i4 461 %trunc15 = trunc i8 %x15 to i4 462 %ext0 = zext i4 %trunc0 to i8 463 %ext1 = zext i4 %trunc1 to i8 464 %ext2 = zext i4 %trunc2 to i8 465 %ext3 = zext i4 %trunc3 to i8 466 %ext4 = zext i4 %trunc4 to i8 467 %ext5 = zext i4 %trunc5 to i8 468 %ext6 = zext i4 %trunc6 to i8 469 %ext7 = zext i4 %trunc7 to i8 470 %ext8 = zext i4 %trunc8 to i8 471 %ext9 = zext i4 %trunc9 to i8 472 %ext10 = zext i4 %trunc10 to i8 473 %ext11 = zext i4 %trunc11 to i8 474 %ext12 = zext i4 %trunc12 to i8 475 %ext13 = zext i4 %trunc13 to i8 476 %ext14 = zext i4 %trunc14 to i8 477 %ext15 = zext i4 %trunc15 to i8 478 %v0 = insertelement <16 x i8> undef, i8 %ext0, i32 0 479 %v1 = insertelement <16 x i8> %v0, i8 %ext1, i32 1 480 %v2 = insertelement <16 x i8> %v1, i8 %ext2, i32 2 481 %v3 = insertelement <16 x i8> %v2, i8 %ext3, i32 3 482 %v4 = insertelement <16 x i8> %v3, i8 %ext4, i32 4 483 %v5 = insertelement <16 x i8> %v4, i8 %ext5, i32 5 484 %v6 = insertelement <16 x i8> %v5, i8 %ext6, i32 6 485 %v7 = insertelement <16 x i8> %v6, i8 %ext7, i32 7 486 %v8 = insertelement <16 x i8> %v7, i8 %ext8, i32 8 487 %v9 = insertelement <16 x i8> %v8, i8 %ext9, i32 9 488 %v10 = insertelement <16 x i8> %v9, i8 %ext10, i32 10 489 %v11 = insertelement <16 x i8> %v10, i8 %ext11, i32 11 490 %v12 = insertelement <16 x i8> %v11, i8 %ext12, i32 12 491 %v13 = insertelement <16 x i8> %v12, i8 %ext13, i32 13 492 %v14 = insertelement <16 x i8> %v13, i8 %ext14, i32 14 493 %v15 = insertelement <16 x i8> %v14, i8 %ext15, i32 15 494 ret <16 x i8> %v15 495} 496 497define <32 x i8> @_clearupper32xi8a(<32 x i8>) nounwind { 498; SSE-LABEL: _clearupper32xi8a: 499; SSE: # BB#0: 500; SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) 501; SSE-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp) 502; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 503; SSE-NEXT: movd %eax, %xmm0 504; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %r9d 505; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %edx 506; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %esi 507; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %r8d 508; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %edi 509; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 510; SSE-NEXT: movd %eax, %xmm1 511; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 512; SSE-NEXT: movd %esi, %xmm0 513; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 514; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %esi 515; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %ecx 516; SSE-NEXT: movd %ecx, %xmm2 517; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 518; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 519; SSE-NEXT: movd %edx, %xmm0 520; SSE-NEXT: movd %esi, %xmm1 521; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 522; SSE-NEXT: movd %edi, %xmm0 523; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %ecx 524; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %edx 525; SSE-NEXT: movd %edx, %xmm3 526; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3],xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7] 527; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7] 528; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 529; SSE-NEXT: movd %r9d, %xmm0 530; SSE-NEXT: movd %eax, %xmm1 531; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 532; SSE-NEXT: movd %r8d, %xmm0 533; SSE-NEXT: movd %ecx, %xmm2 534; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 535; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 536; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 537; SSE-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 538; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 539; SSE-NEXT: movd {{.*#+}} xmm4 = mem[0],zero,zero,zero 540; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 541; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3],xmm0[4],xmm4[4],xmm0[5],xmm4[5],xmm0[6],xmm4[6],xmm0[7],xmm4[7] 542; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 543; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7] 544; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 545; SSE-NEXT: movdqa {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15] 546; SSE-NEXT: pand %xmm2, %xmm0 547; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 548; SSE-NEXT: movd %eax, %xmm1 549; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %r9d 550; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %edx 551; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %esi 552; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %r8d 553; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %edi 554; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 555; SSE-NEXT: movd %eax, %xmm3 556; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7] 557; SSE-NEXT: movd %esi, %xmm1 558; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 559; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %esi 560; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %ecx 561; SSE-NEXT: movd %ecx, %xmm4 562; SSE-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3],xmm4[4],xmm1[4],xmm4[5],xmm1[5],xmm4[6],xmm1[6],xmm4[7],xmm1[7] 563; SSE-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 564; SSE-NEXT: movd %edx, %xmm1 565; SSE-NEXT: movd %esi, %xmm3 566; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7] 567; SSE-NEXT: movd %edi, %xmm1 568; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %ecx 569; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %edx 570; SSE-NEXT: movd %edx, %xmm5 571; SSE-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm1[0],xmm5[1],xmm1[1],xmm5[2],xmm1[2],xmm5[3],xmm1[3],xmm5[4],xmm1[4],xmm5[5],xmm1[5],xmm5[6],xmm1[6],xmm5[7],xmm1[7] 572; SSE-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1],xmm5[2],xmm3[2],xmm5[3],xmm3[3],xmm5[4],xmm3[4],xmm5[5],xmm3[5],xmm5[6],xmm3[6],xmm5[7],xmm3[7] 573; SSE-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3],xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7] 574; SSE-NEXT: movd %r9d, %xmm1 575; SSE-NEXT: movd %eax, %xmm3 576; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7] 577; SSE-NEXT: movd %r8d, %xmm1 578; SSE-NEXT: movd %ecx, %xmm4 579; SSE-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3],xmm4[4],xmm1[4],xmm4[5],xmm1[5],xmm4[6],xmm1[6],xmm4[7],xmm1[7] 580; SSE-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 581; SSE-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 582; SSE-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero 583; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7] 584; SSE-NEXT: movd {{.*#+}} xmm6 = mem[0],zero,zero,zero 585; SSE-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 586; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm6[0],xmm1[1],xmm6[1],xmm1[2],xmm6[2],xmm1[3],xmm6[3],xmm1[4],xmm6[4],xmm1[5],xmm6[5],xmm1[6],xmm6[6],xmm1[7],xmm6[7] 587; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7] 588; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1],xmm1[2],xmm4[2],xmm1[3],xmm4[3],xmm1[4],xmm4[4],xmm1[5],xmm4[5],xmm1[6],xmm4[6],xmm1[7],xmm4[7] 589; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm5[0],xmm1[1],xmm5[1],xmm1[2],xmm5[2],xmm1[3],xmm5[3],xmm1[4],xmm5[4],xmm1[5],xmm5[5],xmm1[6],xmm5[6],xmm1[7],xmm5[7] 590; SSE-NEXT: pand %xmm2, %xmm1 591; SSE-NEXT: retq 592; 593; AVX1-LABEL: _clearupper32xi8a: 594; AVX1: # BB#0: 595; AVX1-NEXT: vpextrb $0, %xmm0, %eax 596; AVX1-NEXT: vpextrb $1, %xmm0, %ecx 597; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 598; AVX1-NEXT: vpextrb $0, %xmm1, %edx 599; AVX1-NEXT: vpextrb $1, %xmm1, %esi 600; AVX1-NEXT: vmovd %edx, %xmm2 601; AVX1-NEXT: vpinsrb $1, %esi, %xmm2, %xmm2 602; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0],xmm1[1,2,3,4,5,6,7] 603; AVX1-NEXT: vmovd %eax, %xmm2 604; AVX1-NEXT: vpinsrb $1, %ecx, %xmm2, %xmm2 605; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0],xmm0[1,2,3,4,5,6,7] 606; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 607; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 608; AVX1-NEXT: retq 609; 610; AVX2-LABEL: _clearupper32xi8a: 611; AVX2: # BB#0: 612; AVX2-NEXT: vpextrb $0, %xmm0, %eax 613; AVX2-NEXT: vpextrb $1, %xmm0, %ecx 614; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 615; AVX2-NEXT: vpextrb $0, %xmm1, %edx 616; AVX2-NEXT: vpextrb $1, %xmm1, %esi 617; AVX2-NEXT: vmovd %edx, %xmm2 618; AVX2-NEXT: vpinsrb $1, %esi, %xmm2, %xmm2 619; AVX2-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0],xmm1[1,2,3,4,5,6,7] 620; AVX2-NEXT: vmovd %eax, %xmm2 621; AVX2-NEXT: vpinsrb $1, %ecx, %xmm2, %xmm2 622; AVX2-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0],xmm0[1,2,3,4,5,6,7] 623; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 624; AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 625; AVX2-NEXT: retq 626 %x0 = extractelement <32 x i8> %0, i32 0 627 %x1 = extractelement <32 x i8> %0, i32 1 628 %x2 = extractelement <32 x i8> %0, i32 2 629 %x3 = extractelement <32 x i8> %0, i32 3 630 %x4 = extractelement <32 x i8> %0, i32 4 631 %x5 = extractelement <32 x i8> %0, i32 5 632 %x6 = extractelement <32 x i8> %0, i32 6 633 %x7 = extractelement <32 x i8> %0, i32 7 634 %x8 = extractelement <32 x i8> %0, i32 8 635 %x9 = extractelement <32 x i8> %0, i32 9 636 %x10 = extractelement <32 x i8> %0, i32 10 637 %x11 = extractelement <32 x i8> %0, i32 11 638 %x12 = extractelement <32 x i8> %0, i32 12 639 %x13 = extractelement <32 x i8> %0, i32 13 640 %x14 = extractelement <32 x i8> %0, i32 14 641 %x15 = extractelement <32 x i8> %0, i32 15 642 %x16 = extractelement <32 x i8> %0, i32 16 643 %x17 = extractelement <32 x i8> %0, i32 17 644 %x18 = extractelement <32 x i8> %0, i32 18 645 %x19 = extractelement <32 x i8> %0, i32 19 646 %x20 = extractelement <32 x i8> %0, i32 20 647 %x21 = extractelement <32 x i8> %0, i32 21 648 %x22 = extractelement <32 x i8> %0, i32 22 649 %x23 = extractelement <32 x i8> %0, i32 23 650 %x24 = extractelement <32 x i8> %0, i32 24 651 %x25 = extractelement <32 x i8> %0, i32 25 652 %x26 = extractelement <32 x i8> %0, i32 26 653 %x27 = extractelement <32 x i8> %0, i32 27 654 %x28 = extractelement <32 x i8> %0, i32 28 655 %x29 = extractelement <32 x i8> %0, i32 29 656 %x30 = extractelement <32 x i8> %0, i32 30 657 %x31 = extractelement <32 x i8> %0, i32 31 658 %trunc0 = trunc i8 %x0 to i4 659 %trunc1 = trunc i8 %x1 to i4 660 %trunc2 = trunc i8 %x2 to i4 661 %trunc3 = trunc i8 %x3 to i4 662 %trunc4 = trunc i8 %x4 to i4 663 %trunc5 = trunc i8 %x5 to i4 664 %trunc6 = trunc i8 %x6 to i4 665 %trunc7 = trunc i8 %x7 to i4 666 %trunc8 = trunc i8 %x8 to i4 667 %trunc9 = trunc i8 %x9 to i4 668 %trunc10 = trunc i8 %x10 to i4 669 %trunc11 = trunc i8 %x11 to i4 670 %trunc12 = trunc i8 %x12 to i4 671 %trunc13 = trunc i8 %x13 to i4 672 %trunc14 = trunc i8 %x14 to i4 673 %trunc15 = trunc i8 %x15 to i4 674 %trunc16 = trunc i8 %x16 to i4 675 %trunc17 = trunc i8 %x17 to i4 676 %trunc18 = trunc i8 %x18 to i4 677 %trunc19 = trunc i8 %x19 to i4 678 %trunc20 = trunc i8 %x20 to i4 679 %trunc21 = trunc i8 %x21 to i4 680 %trunc22 = trunc i8 %x22 to i4 681 %trunc23 = trunc i8 %x23 to i4 682 %trunc24 = trunc i8 %x24 to i4 683 %trunc25 = trunc i8 %x25 to i4 684 %trunc26 = trunc i8 %x26 to i4 685 %trunc27 = trunc i8 %x27 to i4 686 %trunc28 = trunc i8 %x28 to i4 687 %trunc29 = trunc i8 %x29 to i4 688 %trunc30 = trunc i8 %x30 to i4 689 %trunc31 = trunc i8 %x31 to i4 690 %ext0 = zext i4 %trunc0 to i8 691 %ext1 = zext i4 %trunc1 to i8 692 %ext2 = zext i4 %trunc2 to i8 693 %ext3 = zext i4 %trunc3 to i8 694 %ext4 = zext i4 %trunc4 to i8 695 %ext5 = zext i4 %trunc5 to i8 696 %ext6 = zext i4 %trunc6 to i8 697 %ext7 = zext i4 %trunc7 to i8 698 %ext8 = zext i4 %trunc8 to i8 699 %ext9 = zext i4 %trunc9 to i8 700 %ext10 = zext i4 %trunc10 to i8 701 %ext11 = zext i4 %trunc11 to i8 702 %ext12 = zext i4 %trunc12 to i8 703 %ext13 = zext i4 %trunc13 to i8 704 %ext14 = zext i4 %trunc14 to i8 705 %ext15 = zext i4 %trunc15 to i8 706 %ext16 = zext i4 %trunc16 to i8 707 %ext17 = zext i4 %trunc17 to i8 708 %ext18 = zext i4 %trunc18 to i8 709 %ext19 = zext i4 %trunc19 to i8 710 %ext20 = zext i4 %trunc20 to i8 711 %ext21 = zext i4 %trunc21 to i8 712 %ext22 = zext i4 %trunc22 to i8 713 %ext23 = zext i4 %trunc23 to i8 714 %ext24 = zext i4 %trunc24 to i8 715 %ext25 = zext i4 %trunc25 to i8 716 %ext26 = zext i4 %trunc26 to i8 717 %ext27 = zext i4 %trunc27 to i8 718 %ext28 = zext i4 %trunc28 to i8 719 %ext29 = zext i4 %trunc29 to i8 720 %ext30 = zext i4 %trunc30 to i8 721 %ext31 = zext i4 %trunc31 to i8 722 %v0 = insertelement <32 x i8> undef, i8 %ext0, i32 0 723 %v1 = insertelement <32 x i8> %v0, i8 %ext1, i32 1 724 %v2 = insertelement <32 x i8> %v1, i8 %ext2, i32 2 725 %v3 = insertelement <32 x i8> %v2, i8 %ext3, i32 3 726 %v4 = insertelement <32 x i8> %v3, i8 %ext4, i32 4 727 %v5 = insertelement <32 x i8> %v4, i8 %ext5, i32 5 728 %v6 = insertelement <32 x i8> %v5, i8 %ext6, i32 6 729 %v7 = insertelement <32 x i8> %v6, i8 %ext7, i32 7 730 %v8 = insertelement <32 x i8> %v7, i8 %ext8, i32 8 731 %v9 = insertelement <32 x i8> %v8, i8 %ext9, i32 9 732 %v10 = insertelement <32 x i8> %v9, i8 %ext10, i32 10 733 %v11 = insertelement <32 x i8> %v10, i8 %ext11, i32 11 734 %v12 = insertelement <32 x i8> %v11, i8 %ext12, i32 12 735 %v13 = insertelement <32 x i8> %v12, i8 %ext13, i32 13 736 %v14 = insertelement <32 x i8> %v13, i8 %ext14, i32 14 737 %v15 = insertelement <32 x i8> %v14, i8 %ext15, i32 15 738 %v16 = insertelement <32 x i8> %v15, i8 %ext16, i32 16 739 %v17 = insertelement <32 x i8> %v16, i8 %ext17, i32 17 740 %v18 = insertelement <32 x i8> %v17, i8 %ext18, i32 18 741 %v19 = insertelement <32 x i8> %v18, i8 %ext19, i32 19 742 %v20 = insertelement <32 x i8> %v19, i8 %ext20, i32 20 743 %v21 = insertelement <32 x i8> %v20, i8 %ext21, i32 21 744 %v22 = insertelement <32 x i8> %v21, i8 %ext22, i32 22 745 %v23 = insertelement <32 x i8> %v22, i8 %ext23, i32 23 746 %v24 = insertelement <32 x i8> %v23, i8 %ext24, i32 24 747 %v25 = insertelement <32 x i8> %v24, i8 %ext25, i32 25 748 %v26 = insertelement <32 x i8> %v25, i8 %ext26, i32 26 749 %v27 = insertelement <32 x i8> %v26, i8 %ext27, i32 27 750 %v28 = insertelement <32 x i8> %v27, i8 %ext28, i32 28 751 %v29 = insertelement <32 x i8> %v28, i8 %ext29, i32 29 752 %v30 = insertelement <32 x i8> %v29, i8 %ext30, i32 30 753 %v31 = insertelement <32 x i8> %v30, i8 %ext31, i32 31 754 ret <32 x i8> %v31 755} 756 757define <2 x i64> @_clearupper2xi64b(<2 x i64>) nounwind { 758; SSE-LABEL: _clearupper2xi64b: 759; SSE: # BB#0: 760; SSE-NEXT: andps {{.*}}(%rip), %xmm0 761; SSE-NEXT: retq 762; 763; AVX1-LABEL: _clearupper2xi64b: 764; AVX1: # BB#0: 765; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 766; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7] 767; AVX1-NEXT: retq 768; 769; AVX2-LABEL: _clearupper2xi64b: 770; AVX2: # BB#0: 771; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1 772; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3] 773; AVX2-NEXT: retq 774 %x32 = bitcast <2 x i64> %0 to <4 x i32> 775 %r0 = insertelement <4 x i32> %x32, i32 zeroinitializer, i32 1 776 %r1 = insertelement <4 x i32> %r0, i32 zeroinitializer, i32 3 777 %r = bitcast <4 x i32> %r1 to <2 x i64> 778 ret <2 x i64> %r 779} 780 781define <4 x i64> @_clearupper4xi64b(<4 x i64>) nounwind { 782; SSE-LABEL: _clearupper4xi64b: 783; SSE: # BB#0: 784; SSE-NEXT: movaps {{.*#+}} xmm2 = [4294967295,0,4294967295,0] 785; SSE-NEXT: andps %xmm2, %xmm0 786; SSE-NEXT: andps %xmm2, %xmm1 787; SSE-NEXT: retq 788; 789; AVX1-LABEL: _clearupper4xi64b: 790; AVX1: # BB#0: 791; AVX1-NEXT: vxorps %ymm1, %ymm1, %ymm1 792; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] 793; AVX1-NEXT: retq 794; 795; AVX2-LABEL: _clearupper4xi64b: 796; AVX2: # BB#0: 797; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1 798; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] 799; AVX2-NEXT: retq 800 %x32 = bitcast <4 x i64> %0 to <8 x i32> 801 %r0 = insertelement <8 x i32> %x32, i32 zeroinitializer, i32 1 802 %r1 = insertelement <8 x i32> %r0, i32 zeroinitializer, i32 3 803 %r2 = insertelement <8 x i32> %r1, i32 zeroinitializer, i32 5 804 %r3 = insertelement <8 x i32> %r2, i32 zeroinitializer, i32 7 805 %r = bitcast <8 x i32> %r3 to <4 x i64> 806 ret <4 x i64> %r 807} 808 809define <4 x i32> @_clearupper4xi32b(<4 x i32>) nounwind { 810; SSE-LABEL: _clearupper4xi32b: 811; SSE: # BB#0: 812; SSE-NEXT: andps {{.*}}(%rip), %xmm0 813; SSE-NEXT: retq 814; 815; AVX-LABEL: _clearupper4xi32b: 816; AVX: # BB#0: 817; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1 818; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 819; AVX-NEXT: retq 820 %x16 = bitcast <4 x i32> %0 to <8 x i16> 821 %r0 = insertelement <8 x i16> %x16, i16 zeroinitializer, i32 1 822 %r1 = insertelement <8 x i16> %r0, i16 zeroinitializer, i32 3 823 %r2 = insertelement <8 x i16> %r1, i16 zeroinitializer, i32 5 824 %r3 = insertelement <8 x i16> %r2, i16 zeroinitializer, i32 7 825 %r = bitcast <8 x i16> %r3 to <4 x i32> 826 ret <4 x i32> %r 827} 828 829define <8 x i32> @_clearupper8xi32b(<8 x i32>) nounwind { 830; SSE-LABEL: _clearupper8xi32b: 831; SSE: # BB#0: 832; SSE-NEXT: movaps {{.*#+}} xmm2 = [65535,0,65535,0,65535,0,65535,0] 833; SSE-NEXT: andps %xmm2, %xmm0 834; SSE-NEXT: andps %xmm2, %xmm1 835; SSE-NEXT: retq 836; 837; AVX1-LABEL: _clearupper8xi32b: 838; AVX1: # BB#0: 839; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 840; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 841; AVX1-NEXT: vblendps {{.*#+}} ymm2 = ymm2[0,1,2,3],ymm0[4,5,6,7] 842; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 843; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 844; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0 845; AVX1-NEXT: retq 846; 847; AVX2-LABEL: _clearupper8xi32b: 848; AVX2: # BB#0: 849; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1 850; AVX2-NEXT: vpblendw {{.*#+}} xmm2 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 851; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2,3],ymm0[4,5,6,7] 852; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 853; AVX2-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 854; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm2, %ymm0 855; AVX2-NEXT: retq 856 %x16 = bitcast <8 x i32> %0 to <16 x i16> 857 %r0 = insertelement <16 x i16> %x16, i16 zeroinitializer, i32 1 858 %r1 = insertelement <16 x i16> %r0, i16 zeroinitializer, i32 3 859 %r2 = insertelement <16 x i16> %r1, i16 zeroinitializer, i32 5 860 %r3 = insertelement <16 x i16> %r2, i16 zeroinitializer, i32 7 861 %r4 = insertelement <16 x i16> %r3, i16 zeroinitializer, i32 9 862 %r5 = insertelement <16 x i16> %r4, i16 zeroinitializer, i32 11 863 %r6 = insertelement <16 x i16> %r5, i16 zeroinitializer, i32 13 864 %r7 = insertelement <16 x i16> %r6, i16 zeroinitializer, i32 15 865 %r = bitcast <16 x i16> %r7 to <8 x i32> 866 ret <8 x i32> %r 867} 868 869define <8 x i16> @_clearupper8xi16b(<8 x i16>) nounwind { 870; SSE-LABEL: _clearupper8xi16b: 871; SSE: # BB#0: 872; SSE-NEXT: andps {{.*}}(%rip), %xmm0 873; SSE-NEXT: retq 874; 875; AVX-LABEL: _clearupper8xi16b: 876; AVX: # BB#0: 877; AVX-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0 878; AVX-NEXT: retq 879 %x8 = bitcast <8 x i16> %0 to <16 x i8> 880 %r0 = insertelement <16 x i8> %x8, i8 zeroinitializer, i32 1 881 %r1 = insertelement <16 x i8> %r0, i8 zeroinitializer, i32 3 882 %r2 = insertelement <16 x i8> %r1, i8 zeroinitializer, i32 5 883 %r3 = insertelement <16 x i8> %r2, i8 zeroinitializer, i32 7 884 %r4 = insertelement <16 x i8> %r3, i8 zeroinitializer, i32 9 885 %r5 = insertelement <16 x i8> %r4, i8 zeroinitializer, i32 11 886 %r6 = insertelement <16 x i8> %r5, i8 zeroinitializer, i32 13 887 %r7 = insertelement <16 x i8> %r6, i8 zeroinitializer, i32 15 888 %r = bitcast <16 x i8> %r7 to <8 x i16> 889 ret <8 x i16> %r 890} 891 892define <16 x i16> @_clearupper16xi16b(<16 x i16>) nounwind { 893; SSE-LABEL: _clearupper16xi16b: 894; SSE: # BB#0: 895; SSE-NEXT: movaps {{.*#+}} xmm2 = [255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0] 896; SSE-NEXT: andps %xmm2, %xmm0 897; SSE-NEXT: andps %xmm2, %xmm1 898; SSE-NEXT: retq 899; 900; AVX1-LABEL: _clearupper16xi16b: 901; AVX1: # BB#0: 902; AVX1-NEXT: vmovaps {{.*#+}} xmm1 = [255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0] 903; AVX1-NEXT: vandps %xmm1, %xmm0, %xmm2 904; AVX1-NEXT: vblendps {{.*#+}} ymm2 = ymm2[0,1,2,3],ymm0[4,5,6,7] 905; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 906; AVX1-NEXT: vandps %xmm1, %xmm0, %xmm0 907; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0 908; AVX1-NEXT: retq 909; 910; AVX2-LABEL: _clearupper16xi16b: 911; AVX2: # BB#0: 912; AVX2-NEXT: vmovdqa {{.*#+}} xmm1 = [255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0] 913; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm2 914; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2,3],ymm0[4,5,6,7] 915; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 916; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0 917; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm2, %ymm0 918; AVX2-NEXT: retq 919 %x8 = bitcast <16 x i16> %0 to <32 x i8> 920 %r0 = insertelement <32 x i8> %x8, i8 zeroinitializer, i32 1 921 %r1 = insertelement <32 x i8> %r0, i8 zeroinitializer, i32 3 922 %r2 = insertelement <32 x i8> %r1, i8 zeroinitializer, i32 5 923 %r3 = insertelement <32 x i8> %r2, i8 zeroinitializer, i32 7 924 %r4 = insertelement <32 x i8> %r3, i8 zeroinitializer, i32 9 925 %r5 = insertelement <32 x i8> %r4, i8 zeroinitializer, i32 11 926 %r6 = insertelement <32 x i8> %r5, i8 zeroinitializer, i32 13 927 %r7 = insertelement <32 x i8> %r6, i8 zeroinitializer, i32 15 928 %r8 = insertelement <32 x i8> %r7, i8 zeroinitializer, i32 17 929 %r9 = insertelement <32 x i8> %r8, i8 zeroinitializer, i32 19 930 %r10 = insertelement <32 x i8> %r9, i8 zeroinitializer, i32 21 931 %r11 = insertelement <32 x i8> %r10, i8 zeroinitializer, i32 23 932 %r12 = insertelement <32 x i8> %r11, i8 zeroinitializer, i32 25 933 %r13 = insertelement <32 x i8> %r12, i8 zeroinitializer, i32 27 934 %r14 = insertelement <32 x i8> %r13, i8 zeroinitializer, i32 29 935 %r15 = insertelement <32 x i8> %r14, i8 zeroinitializer, i32 31 936 %r = bitcast <32 x i8> %r15 to <16 x i16> 937 ret <16 x i16> %r 938} 939 940define <16 x i8> @_clearupper16xi8b(<16 x i8>) nounwind { 941; SSE-LABEL: _clearupper16xi8b: 942; SSE: # BB#0: 943; SSE-NEXT: pushq %r14 944; SSE-NEXT: pushq %rbx 945; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 946; SSE-NEXT: movd %xmm0, %rcx 947; SSE-NEXT: movq %rcx, %r8 948; SSE-NEXT: movq %rcx, %r9 949; SSE-NEXT: movq %rcx, %r10 950; SSE-NEXT: movq %rcx, %rax 951; SSE-NEXT: movq %rcx, %rdx 952; SSE-NEXT: movq %rcx, %rsi 953; SSE-NEXT: movq %rcx, %rdi 954; SSE-NEXT: andb $15, %cl 955; SSE-NEXT: movb %cl, -{{[0-9]+}}(%rsp) 956; SSE-NEXT: movd %xmm1, %rcx 957; SSE-NEXT: shrq $56, %rdi 958; SSE-NEXT: andb $15, %dil 959; SSE-NEXT: movb %dil, -{{[0-9]+}}(%rsp) 960; SSE-NEXT: movq %rcx, %r11 961; SSE-NEXT: shrq $48, %rsi 962; SSE-NEXT: andb $15, %sil 963; SSE-NEXT: movb %sil, -{{[0-9]+}}(%rsp) 964; SSE-NEXT: movq %rcx, %r14 965; SSE-NEXT: shrq $40, %rdx 966; SSE-NEXT: andb $15, %dl 967; SSE-NEXT: movb %dl, -{{[0-9]+}}(%rsp) 968; SSE-NEXT: movq %rcx, %rdx 969; SSE-NEXT: shrq $32, %rax 970; SSE-NEXT: andb $15, %al 971; SSE-NEXT: movb %al, -{{[0-9]+}}(%rsp) 972; SSE-NEXT: movq %rcx, %rax 973; SSE-NEXT: shrq $24, %r10 974; SSE-NEXT: andb $15, %r10b 975; SSE-NEXT: movb %r10b, -{{[0-9]+}}(%rsp) 976; SSE-NEXT: movq %rcx, %rdi 977; SSE-NEXT: shrq $16, %r9 978; SSE-NEXT: andb $15, %r9b 979; SSE-NEXT: movb %r9b, -{{[0-9]+}}(%rsp) 980; SSE-NEXT: movq %rcx, %rsi 981; SSE-NEXT: shrq $8, %r8 982; SSE-NEXT: andb $15, %r8b 983; SSE-NEXT: movb %r8b, -{{[0-9]+}}(%rsp) 984; SSE-NEXT: movq %rcx, %rbx 985; SSE-NEXT: movb $0, -{{[0-9]+}}(%rsp) 986; SSE-NEXT: andb $15, %cl 987; SSE-NEXT: movb %cl, -{{[0-9]+}}(%rsp) 988; SSE-NEXT: shrq $56, %rbx 989; SSE-NEXT: andb $15, %bl 990; SSE-NEXT: movb %bl, -{{[0-9]+}}(%rsp) 991; SSE-NEXT: shrq $48, %rsi 992; SSE-NEXT: andb $15, %sil 993; SSE-NEXT: movb %sil, -{{[0-9]+}}(%rsp) 994; SSE-NEXT: shrq $40, %rdi 995; SSE-NEXT: andb $15, %dil 996; SSE-NEXT: movb %dil, -{{[0-9]+}}(%rsp) 997; SSE-NEXT: shrq $32, %rax 998; SSE-NEXT: andb $15, %al 999; SSE-NEXT: movb %al, -{{[0-9]+}}(%rsp) 1000; SSE-NEXT: shrq $24, %rdx 1001; SSE-NEXT: andb $15, %dl 1002; SSE-NEXT: movb %dl, -{{[0-9]+}}(%rsp) 1003; SSE-NEXT: shrq $16, %r14 1004; SSE-NEXT: andb $15, %r14b 1005; SSE-NEXT: movb %r14b, -{{[0-9]+}}(%rsp) 1006; SSE-NEXT: shrq $8, %r11 1007; SSE-NEXT: andb $15, %r11b 1008; SSE-NEXT: movb %r11b, -{{[0-9]+}}(%rsp) 1009; SSE-NEXT: movb $0, -{{[0-9]+}}(%rsp) 1010; SSE-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 1011; SSE-NEXT: movq {{.*#+}} xmm1 = mem[0],zero 1012; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1013; SSE-NEXT: popq %rbx 1014; SSE-NEXT: popq %r14 1015; SSE-NEXT: retq 1016; 1017; AVX-LABEL: _clearupper16xi8b: 1018; AVX: # BB#0: 1019; AVX-NEXT: pushq %rbp 1020; AVX-NEXT: pushq %r15 1021; AVX-NEXT: pushq %r14 1022; AVX-NEXT: pushq %r13 1023; AVX-NEXT: pushq %r12 1024; AVX-NEXT: pushq %rbx 1025; AVX-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp) 1026; AVX-NEXT: movq -{{[0-9]+}}(%rsp), %rcx 1027; AVX-NEXT: movq -{{[0-9]+}}(%rsp), %rdx 1028; AVX-NEXT: movq %rcx, %r8 1029; AVX-NEXT: movq %rcx, %r9 1030; AVX-NEXT: movq %rcx, %r10 1031; AVX-NEXT: movq %rcx, %r11 1032; AVX-NEXT: movq %rcx, %r14 1033; AVX-NEXT: movq %rcx, %r15 1034; AVX-NEXT: movq %rdx, %r12 1035; AVX-NEXT: movq %rdx, %r13 1036; AVX-NEXT: movq %rdx, %rdi 1037; AVX-NEXT: movq %rdx, %rax 1038; AVX-NEXT: movq %rdx, %rsi 1039; AVX-NEXT: movq %rdx, %rbx 1040; AVX-NEXT: movq %rdx, %rbp 1041; AVX-NEXT: andb $15, %dl 1042; AVX-NEXT: movb %dl, -{{[0-9]+}}(%rsp) 1043; AVX-NEXT: movq %rcx, %rdx 1044; AVX-NEXT: andb $15, %cl 1045; AVX-NEXT: movb %cl, -{{[0-9]+}}(%rsp) 1046; AVX-NEXT: shrq $56, %rbp 1047; AVX-NEXT: andb $15, %bpl 1048; AVX-NEXT: movb %bpl, -{{[0-9]+}}(%rsp) 1049; AVX-NEXT: shrq $48, %rbx 1050; AVX-NEXT: andb $15, %bl 1051; AVX-NEXT: movb %bl, -{{[0-9]+}}(%rsp) 1052; AVX-NEXT: shrq $40, %rsi 1053; AVX-NEXT: andb $15, %sil 1054; AVX-NEXT: movb %sil, -{{[0-9]+}}(%rsp) 1055; AVX-NEXT: shrq $32, %rax 1056; AVX-NEXT: andb $15, %al 1057; AVX-NEXT: movb %al, -{{[0-9]+}}(%rsp) 1058; AVX-NEXT: shrq $24, %rdi 1059; AVX-NEXT: andb $15, %dil 1060; AVX-NEXT: movb %dil, -{{[0-9]+}}(%rsp) 1061; AVX-NEXT: shrq $16, %r13 1062; AVX-NEXT: andb $15, %r13b 1063; AVX-NEXT: movb %r13b, -{{[0-9]+}}(%rsp) 1064; AVX-NEXT: shrq $8, %r12 1065; AVX-NEXT: andb $15, %r12b 1066; AVX-NEXT: movb %r12b, -{{[0-9]+}}(%rsp) 1067; AVX-NEXT: shrq $56, %rdx 1068; AVX-NEXT: andb $15, %dl 1069; AVX-NEXT: movb %dl, -{{[0-9]+}}(%rsp) 1070; AVX-NEXT: shrq $48, %r15 1071; AVX-NEXT: andb $15, %r15b 1072; AVX-NEXT: movb %r15b, -{{[0-9]+}}(%rsp) 1073; AVX-NEXT: shrq $40, %r14 1074; AVX-NEXT: andb $15, %r14b 1075; AVX-NEXT: movb %r14b, -{{[0-9]+}}(%rsp) 1076; AVX-NEXT: shrq $32, %r11 1077; AVX-NEXT: andb $15, %r11b 1078; AVX-NEXT: movb %r11b, -{{[0-9]+}}(%rsp) 1079; AVX-NEXT: shrq $24, %r10 1080; AVX-NEXT: andb $15, %r10b 1081; AVX-NEXT: movb %r10b, -{{[0-9]+}}(%rsp) 1082; AVX-NEXT: shrq $16, %r9 1083; AVX-NEXT: andb $15, %r9b 1084; AVX-NEXT: movb %r9b, -{{[0-9]+}}(%rsp) 1085; AVX-NEXT: shrq $8, %r8 1086; AVX-NEXT: andb $15, %r8b 1087; AVX-NEXT: movb %r8b, -{{[0-9]+}}(%rsp) 1088; AVX-NEXT: movb $0, -{{[0-9]+}}(%rsp) 1089; AVX-NEXT: vmovaps -{{[0-9]+}}(%rsp), %xmm0 1090; AVX-NEXT: popq %rbx 1091; AVX-NEXT: popq %r12 1092; AVX-NEXT: popq %r13 1093; AVX-NEXT: popq %r14 1094; AVX-NEXT: popq %r15 1095; AVX-NEXT: popq %rbp 1096; AVX-NEXT: retq 1097 %x4 = bitcast <16 x i8> %0 to <32 x i4> 1098 %r0 = insertelement <32 x i4> %x4, i4 zeroinitializer, i32 1 1099 %r1 = insertelement <32 x i4> %r0, i4 zeroinitializer, i32 3 1100 %r2 = insertelement <32 x i4> %r1, i4 zeroinitializer, i32 5 1101 %r3 = insertelement <32 x i4> %r2, i4 zeroinitializer, i32 7 1102 %r4 = insertelement <32 x i4> %r3, i4 zeroinitializer, i32 9 1103 %r5 = insertelement <32 x i4> %r4, i4 zeroinitializer, i32 11 1104 %r6 = insertelement <32 x i4> %r5, i4 zeroinitializer, i32 13 1105 %r7 = insertelement <32 x i4> %r6, i4 zeroinitializer, i32 15 1106 %r8 = insertelement <32 x i4> %r7, i4 zeroinitializer, i32 17 1107 %r9 = insertelement <32 x i4> %r8, i4 zeroinitializer, i32 19 1108 %r10 = insertelement <32 x i4> %r9, i4 zeroinitializer, i32 21 1109 %r11 = insertelement <32 x i4> %r10, i4 zeroinitializer, i32 23 1110 %r12 = insertelement <32 x i4> %r11, i4 zeroinitializer, i32 25 1111 %r13 = insertelement <32 x i4> %r12, i4 zeroinitializer, i32 27 1112 %r14 = insertelement <32 x i4> %r13, i4 zeroinitializer, i32 29 1113 %r15 = insertelement <32 x i4> %r14, i4 zeroinitializer, i32 31 1114 %r = bitcast <32 x i4> %r15 to <16 x i8> 1115 ret <16 x i8> %r 1116} 1117 1118define <32 x i8> @_clearupper32xi8b(<32 x i8>) nounwind { 1119; SSE-LABEL: _clearupper32xi8b: 1120; SSE: # BB#0: 1121; SSE-NEXT: pushq %r14 1122; SSE-NEXT: pushq %rbx 1123; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] 1124; SSE-NEXT: movd %xmm0, %rcx 1125; SSE-NEXT: movq %rcx, %r8 1126; SSE-NEXT: movq %rcx, %r9 1127; SSE-NEXT: movq %rcx, %r10 1128; SSE-NEXT: movq %rcx, %rax 1129; SSE-NEXT: movq %rcx, %rdx 1130; SSE-NEXT: movq %rcx, %rsi 1131; SSE-NEXT: movq %rcx, %rdi 1132; SSE-NEXT: andb $15, %cl 1133; SSE-NEXT: movb %cl, -{{[0-9]+}}(%rsp) 1134; SSE-NEXT: movd %xmm2, %rcx 1135; SSE-NEXT: shrq $56, %rdi 1136; SSE-NEXT: andb $15, %dil 1137; SSE-NEXT: movb %dil, -{{[0-9]+}}(%rsp) 1138; SSE-NEXT: movq %rcx, %r11 1139; SSE-NEXT: shrq $48, %rsi 1140; SSE-NEXT: andb $15, %sil 1141; SSE-NEXT: movb %sil, -{{[0-9]+}}(%rsp) 1142; SSE-NEXT: movq %rcx, %r14 1143; SSE-NEXT: shrq $40, %rdx 1144; SSE-NEXT: andb $15, %dl 1145; SSE-NEXT: movb %dl, -{{[0-9]+}}(%rsp) 1146; SSE-NEXT: movq %rcx, %rdx 1147; SSE-NEXT: shrq $32, %rax 1148; SSE-NEXT: andb $15, %al 1149; SSE-NEXT: movb %al, -{{[0-9]+}}(%rsp) 1150; SSE-NEXT: movq %rcx, %rax 1151; SSE-NEXT: shrq $24, %r10 1152; SSE-NEXT: andb $15, %r10b 1153; SSE-NEXT: movb %r10b, -{{[0-9]+}}(%rsp) 1154; SSE-NEXT: movq %rcx, %rdi 1155; SSE-NEXT: shrq $16, %r9 1156; SSE-NEXT: andb $15, %r9b 1157; SSE-NEXT: movb %r9b, -{{[0-9]+}}(%rsp) 1158; SSE-NEXT: movq %rcx, %rsi 1159; SSE-NEXT: shrq $8, %r8 1160; SSE-NEXT: andb $15, %r8b 1161; SSE-NEXT: movb %r8b, -{{[0-9]+}}(%rsp) 1162; SSE-NEXT: movq %rcx, %rbx 1163; SSE-NEXT: movb $0, -{{[0-9]+}}(%rsp) 1164; SSE-NEXT: andb $15, %cl 1165; SSE-NEXT: movb %cl, -{{[0-9]+}}(%rsp) 1166; SSE-NEXT: shrq $56, %rbx 1167; SSE-NEXT: andb $15, %bl 1168; SSE-NEXT: movb %bl, -{{[0-9]+}}(%rsp) 1169; SSE-NEXT: shrq $48, %rsi 1170; SSE-NEXT: andb $15, %sil 1171; SSE-NEXT: movb %sil, -{{[0-9]+}}(%rsp) 1172; SSE-NEXT: shrq $40, %rdi 1173; SSE-NEXT: andb $15, %dil 1174; SSE-NEXT: movb %dil, -{{[0-9]+}}(%rsp) 1175; SSE-NEXT: shrq $32, %rax 1176; SSE-NEXT: andb $15, %al 1177; SSE-NEXT: movb %al, -{{[0-9]+}}(%rsp) 1178; SSE-NEXT: shrq $24, %rdx 1179; SSE-NEXT: andb $15, %dl 1180; SSE-NEXT: movb %dl, -{{[0-9]+}}(%rsp) 1181; SSE-NEXT: shrq $16, %r14 1182; SSE-NEXT: andb $15, %r14b 1183; SSE-NEXT: movb %r14b, -{{[0-9]+}}(%rsp) 1184; SSE-NEXT: shrq $8, %r11 1185; SSE-NEXT: andb $15, %r11b 1186; SSE-NEXT: movb %r11b, -{{[0-9]+}}(%rsp) 1187; SSE-NEXT: movb $0, -{{[0-9]+}}(%rsp) 1188; SSE-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 1189; SSE-NEXT: movq {{.*#+}} xmm2 = mem[0],zero 1190; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 1191; SSE-NEXT: popq %rbx 1192; SSE-NEXT: popq %r14 1193; SSE-NEXT: retq 1194; 1195; AVX1-LABEL: _clearupper32xi8b: 1196; AVX1: # BB#0: 1197; AVX1-NEXT: pushq %rbp 1198; AVX1-NEXT: pushq %r15 1199; AVX1-NEXT: pushq %r14 1200; AVX1-NEXT: pushq %r13 1201; AVX1-NEXT: pushq %r12 1202; AVX1-NEXT: pushq %rbx 1203; AVX1-NEXT: vpextrq $1, %xmm0, -{{[0-9]+}}(%rsp) 1204; AVX1-NEXT: vmovq %xmm0, -{{[0-9]+}}(%rsp) 1205; AVX1-NEXT: movq -{{[0-9]+}}(%rsp), %rcx 1206; AVX1-NEXT: movq -{{[0-9]+}}(%rsp), %rdx 1207; AVX1-NEXT: movq %rcx, %r8 1208; AVX1-NEXT: movq %rcx, %r9 1209; AVX1-NEXT: movq %rcx, %r10 1210; AVX1-NEXT: movq %rcx, %r11 1211; AVX1-NEXT: movq %rcx, %r14 1212; AVX1-NEXT: movq %rcx, %r15 1213; AVX1-NEXT: movq %rdx, %r12 1214; AVX1-NEXT: movq %rdx, %r13 1215; AVX1-NEXT: movq %rdx, %rdi 1216; AVX1-NEXT: movq %rdx, %rax 1217; AVX1-NEXT: movq %rdx, %rsi 1218; AVX1-NEXT: movq %rdx, %rbx 1219; AVX1-NEXT: movq %rdx, %rbp 1220; AVX1-NEXT: andb $15, %dl 1221; AVX1-NEXT: movb %dl, -{{[0-9]+}}(%rsp) 1222; AVX1-NEXT: movq %rcx, %rdx 1223; AVX1-NEXT: andb $15, %cl 1224; AVX1-NEXT: movb %cl, -{{[0-9]+}}(%rsp) 1225; AVX1-NEXT: shrq $56, %rbp 1226; AVX1-NEXT: andb $15, %bpl 1227; AVX1-NEXT: movb %bpl, -{{[0-9]+}}(%rsp) 1228; AVX1-NEXT: shrq $48, %rbx 1229; AVX1-NEXT: andb $15, %bl 1230; AVX1-NEXT: movb %bl, -{{[0-9]+}}(%rsp) 1231; AVX1-NEXT: shrq $40, %rsi 1232; AVX1-NEXT: andb $15, %sil 1233; AVX1-NEXT: movb %sil, -{{[0-9]+}}(%rsp) 1234; AVX1-NEXT: shrq $32, %rax 1235; AVX1-NEXT: andb $15, %al 1236; AVX1-NEXT: movb %al, -{{[0-9]+}}(%rsp) 1237; AVX1-NEXT: shrq $24, %rdi 1238; AVX1-NEXT: andb $15, %dil 1239; AVX1-NEXT: movb %dil, -{{[0-9]+}}(%rsp) 1240; AVX1-NEXT: shrq $16, %r13 1241; AVX1-NEXT: andb $15, %r13b 1242; AVX1-NEXT: movb %r13b, -{{[0-9]+}}(%rsp) 1243; AVX1-NEXT: shrq $8, %r12 1244; AVX1-NEXT: andb $15, %r12b 1245; AVX1-NEXT: movb %r12b, -{{[0-9]+}}(%rsp) 1246; AVX1-NEXT: shrq $8, %r8 1247; AVX1-NEXT: shrq $16, %r9 1248; AVX1-NEXT: shrq $24, %r10 1249; AVX1-NEXT: shrq $32, %r11 1250; AVX1-NEXT: shrq $40, %r14 1251; AVX1-NEXT: shrq $48, %r15 1252; AVX1-NEXT: shrq $56, %rdx 1253; AVX1-NEXT: andb $15, %dl 1254; AVX1-NEXT: movb %dl, -{{[0-9]+}}(%rsp) 1255; AVX1-NEXT: andb $15, %r15b 1256; AVX1-NEXT: movb %r15b, -{{[0-9]+}}(%rsp) 1257; AVX1-NEXT: andb $15, %r14b 1258; AVX1-NEXT: movb %r14b, -{{[0-9]+}}(%rsp) 1259; AVX1-NEXT: andb $15, %r11b 1260; AVX1-NEXT: movb %r11b, -{{[0-9]+}}(%rsp) 1261; AVX1-NEXT: andb $15, %r10b 1262; AVX1-NEXT: movb %r10b, -{{[0-9]+}}(%rsp) 1263; AVX1-NEXT: andb $15, %r9b 1264; AVX1-NEXT: movb %r9b, -{{[0-9]+}}(%rsp) 1265; AVX1-NEXT: andb $15, %r8b 1266; AVX1-NEXT: movb %r8b, -{{[0-9]+}}(%rsp) 1267; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1268; AVX1-NEXT: vmovq %xmm0, %rax 1269; AVX1-NEXT: movq %rax, %rcx 1270; AVX1-NEXT: movq %rax, %rdx 1271; AVX1-NEXT: movq %rax, %rsi 1272; AVX1-NEXT: movq %rax, %rdi 1273; AVX1-NEXT: movl %eax, %ebp 1274; AVX1-NEXT: movl %eax, %ebx 1275; AVX1-NEXT: vmovd %eax, %xmm1 1276; AVX1-NEXT: shrl $8, %eax 1277; AVX1-NEXT: vpinsrb $1, %eax, %xmm1, %xmm1 1278; AVX1-NEXT: shrl $16, %ebx 1279; AVX1-NEXT: vpinsrb $2, %ebx, %xmm1, %xmm1 1280; AVX1-NEXT: shrl $24, %ebp 1281; AVX1-NEXT: vpinsrb $3, %ebp, %xmm1, %xmm1 1282; AVX1-NEXT: shrq $32, %rdi 1283; AVX1-NEXT: vpinsrb $4, %edi, %xmm1, %xmm1 1284; AVX1-NEXT: shrq $40, %rsi 1285; AVX1-NEXT: vpinsrb $5, %esi, %xmm1, %xmm1 1286; AVX1-NEXT: movb $0, -{{[0-9]+}}(%rsp) 1287; AVX1-NEXT: vmovdqa -{{[0-9]+}}(%rsp), %xmm2 1288; AVX1-NEXT: shrq $48, %rdx 1289; AVX1-NEXT: vpinsrb $6, %edx, %xmm1, %xmm1 1290; AVX1-NEXT: vpextrq $1, %xmm0, %rax 1291; AVX1-NEXT: shrq $56, %rcx 1292; AVX1-NEXT: vpinsrb $7, %ecx, %xmm1, %xmm0 1293; AVX1-NEXT: movl %eax, %ecx 1294; AVX1-NEXT: shrl $8, %ecx 1295; AVX1-NEXT: vpinsrb $8, %eax, %xmm0, %xmm0 1296; AVX1-NEXT: vpinsrb $9, %ecx, %xmm0, %xmm0 1297; AVX1-NEXT: movl %eax, %ecx 1298; AVX1-NEXT: shrl $16, %ecx 1299; AVX1-NEXT: vpinsrb $10, %ecx, %xmm0, %xmm0 1300; AVX1-NEXT: movl %eax, %ecx 1301; AVX1-NEXT: shrl $24, %ecx 1302; AVX1-NEXT: vpinsrb $11, %ecx, %xmm0, %xmm0 1303; AVX1-NEXT: movq %rax, %rcx 1304; AVX1-NEXT: shrq $32, %rcx 1305; AVX1-NEXT: vpinsrb $12, %ecx, %xmm0, %xmm0 1306; AVX1-NEXT: movq %rax, %rcx 1307; AVX1-NEXT: shrq $40, %rcx 1308; AVX1-NEXT: vpinsrb $13, %ecx, %xmm0, %xmm0 1309; AVX1-NEXT: movq %rax, %rcx 1310; AVX1-NEXT: shrq $48, %rcx 1311; AVX1-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0 1312; AVX1-NEXT: vmovq %xmm2, %rcx 1313; AVX1-NEXT: shrq $56, %rax 1314; AVX1-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0 1315; AVX1-NEXT: movl %ecx, %eax 1316; AVX1-NEXT: shrl $8, %eax 1317; AVX1-NEXT: vmovd %ecx, %xmm1 1318; AVX1-NEXT: vpinsrb $1, %eax, %xmm1, %xmm1 1319; AVX1-NEXT: movl %ecx, %eax 1320; AVX1-NEXT: shrl $16, %eax 1321; AVX1-NEXT: vpinsrb $2, %eax, %xmm1, %xmm1 1322; AVX1-NEXT: movl %ecx, %eax 1323; AVX1-NEXT: shrl $24, %eax 1324; AVX1-NEXT: vpinsrb $3, %eax, %xmm1, %xmm1 1325; AVX1-NEXT: movq %rcx, %rax 1326; AVX1-NEXT: shrq $32, %rax 1327; AVX1-NEXT: vpinsrb $4, %eax, %xmm1, %xmm1 1328; AVX1-NEXT: movq %rcx, %rax 1329; AVX1-NEXT: shrq $40, %rax 1330; AVX1-NEXT: vpinsrb $5, %eax, %xmm1, %xmm1 1331; AVX1-NEXT: movq %rcx, %rax 1332; AVX1-NEXT: shrq $48, %rax 1333; AVX1-NEXT: vpinsrb $6, %eax, %xmm1, %xmm1 1334; AVX1-NEXT: vpextrq $1, %xmm2, %rax 1335; AVX1-NEXT: shrq $56, %rcx 1336; AVX1-NEXT: vpinsrb $7, %ecx, %xmm1, %xmm1 1337; AVX1-NEXT: movl %eax, %ecx 1338; AVX1-NEXT: shrl $8, %ecx 1339; AVX1-NEXT: vpinsrb $8, %eax, %xmm1, %xmm1 1340; AVX1-NEXT: vpinsrb $9, %ecx, %xmm1, %xmm1 1341; AVX1-NEXT: movl %eax, %ecx 1342; AVX1-NEXT: shrl $16, %ecx 1343; AVX1-NEXT: vpinsrb $10, %ecx, %xmm1, %xmm1 1344; AVX1-NEXT: movl %eax, %ecx 1345; AVX1-NEXT: shrl $24, %ecx 1346; AVX1-NEXT: vpinsrb $11, %ecx, %xmm1, %xmm1 1347; AVX1-NEXT: movq %rax, %rcx 1348; AVX1-NEXT: shrq $32, %rcx 1349; AVX1-NEXT: vpinsrb $12, %ecx, %xmm1, %xmm1 1350; AVX1-NEXT: movq %rax, %rcx 1351; AVX1-NEXT: shrq $40, %rcx 1352; AVX1-NEXT: vpinsrb $13, %ecx, %xmm1, %xmm1 1353; AVX1-NEXT: movq %rax, %rcx 1354; AVX1-NEXT: shrq $48, %rcx 1355; AVX1-NEXT: vpinsrb $14, %ecx, %xmm1, %xmm1 1356; AVX1-NEXT: shrq $56, %rax 1357; AVX1-NEXT: vpinsrb $15, %eax, %xmm1, %xmm1 1358; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 1359; AVX1-NEXT: popq %rbx 1360; AVX1-NEXT: popq %r12 1361; AVX1-NEXT: popq %r13 1362; AVX1-NEXT: popq %r14 1363; AVX1-NEXT: popq %r15 1364; AVX1-NEXT: popq %rbp 1365; AVX1-NEXT: retq 1366; 1367; AVX2-LABEL: _clearupper32xi8b: 1368; AVX2: # BB#0: 1369; AVX2-NEXT: pushq %rbp 1370; AVX2-NEXT: pushq %r15 1371; AVX2-NEXT: pushq %r14 1372; AVX2-NEXT: pushq %r13 1373; AVX2-NEXT: pushq %r12 1374; AVX2-NEXT: pushq %rbx 1375; AVX2-NEXT: vpextrq $1, %xmm0, -{{[0-9]+}}(%rsp) 1376; AVX2-NEXT: vmovq %xmm0, -{{[0-9]+}}(%rsp) 1377; AVX2-NEXT: movq -{{[0-9]+}}(%rsp), %rcx 1378; AVX2-NEXT: movq -{{[0-9]+}}(%rsp), %rdx 1379; AVX2-NEXT: movq %rcx, %r8 1380; AVX2-NEXT: movq %rcx, %r9 1381; AVX2-NEXT: movq %rcx, %r10 1382; AVX2-NEXT: movq %rcx, %r11 1383; AVX2-NEXT: movq %rcx, %r14 1384; AVX2-NEXT: movq %rcx, %r15 1385; AVX2-NEXT: movq %rdx, %r12 1386; AVX2-NEXT: movq %rdx, %r13 1387; AVX2-NEXT: movq %rdx, %rdi 1388; AVX2-NEXT: movq %rdx, %rax 1389; AVX2-NEXT: movq %rdx, %rsi 1390; AVX2-NEXT: movq %rdx, %rbx 1391; AVX2-NEXT: movq %rdx, %rbp 1392; AVX2-NEXT: andb $15, %dl 1393; AVX2-NEXT: movb %dl, -{{[0-9]+}}(%rsp) 1394; AVX2-NEXT: movq %rcx, %rdx 1395; AVX2-NEXT: andb $15, %cl 1396; AVX2-NEXT: movb %cl, -{{[0-9]+}}(%rsp) 1397; AVX2-NEXT: shrq $56, %rbp 1398; AVX2-NEXT: andb $15, %bpl 1399; AVX2-NEXT: movb %bpl, -{{[0-9]+}}(%rsp) 1400; AVX2-NEXT: shrq $48, %rbx 1401; AVX2-NEXT: andb $15, %bl 1402; AVX2-NEXT: movb %bl, -{{[0-9]+}}(%rsp) 1403; AVX2-NEXT: shrq $40, %rsi 1404; AVX2-NEXT: andb $15, %sil 1405; AVX2-NEXT: movb %sil, -{{[0-9]+}}(%rsp) 1406; AVX2-NEXT: shrq $32, %rax 1407; AVX2-NEXT: andb $15, %al 1408; AVX2-NEXT: movb %al, -{{[0-9]+}}(%rsp) 1409; AVX2-NEXT: shrq $24, %rdi 1410; AVX2-NEXT: andb $15, %dil 1411; AVX2-NEXT: movb %dil, -{{[0-9]+}}(%rsp) 1412; AVX2-NEXT: shrq $16, %r13 1413; AVX2-NEXT: andb $15, %r13b 1414; AVX2-NEXT: movb %r13b, -{{[0-9]+}}(%rsp) 1415; AVX2-NEXT: shrq $8, %r12 1416; AVX2-NEXT: andb $15, %r12b 1417; AVX2-NEXT: movb %r12b, -{{[0-9]+}}(%rsp) 1418; AVX2-NEXT: shrq $8, %r8 1419; AVX2-NEXT: shrq $16, %r9 1420; AVX2-NEXT: shrq $24, %r10 1421; AVX2-NEXT: shrq $32, %r11 1422; AVX2-NEXT: shrq $40, %r14 1423; AVX2-NEXT: shrq $48, %r15 1424; AVX2-NEXT: shrq $56, %rdx 1425; AVX2-NEXT: andb $15, %dl 1426; AVX2-NEXT: movb %dl, -{{[0-9]+}}(%rsp) 1427; AVX2-NEXT: andb $15, %r15b 1428; AVX2-NEXT: movb %r15b, -{{[0-9]+}}(%rsp) 1429; AVX2-NEXT: andb $15, %r14b 1430; AVX2-NEXT: movb %r14b, -{{[0-9]+}}(%rsp) 1431; AVX2-NEXT: andb $15, %r11b 1432; AVX2-NEXT: movb %r11b, -{{[0-9]+}}(%rsp) 1433; AVX2-NEXT: andb $15, %r10b 1434; AVX2-NEXT: movb %r10b, -{{[0-9]+}}(%rsp) 1435; AVX2-NEXT: andb $15, %r9b 1436; AVX2-NEXT: movb %r9b, -{{[0-9]+}}(%rsp) 1437; AVX2-NEXT: andb $15, %r8b 1438; AVX2-NEXT: movb %r8b, -{{[0-9]+}}(%rsp) 1439; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 1440; AVX2-NEXT: vmovq %xmm0, %rax 1441; AVX2-NEXT: movq %rax, %rcx 1442; AVX2-NEXT: movq %rax, %rdx 1443; AVX2-NEXT: movq %rax, %rsi 1444; AVX2-NEXT: movq %rax, %rdi 1445; AVX2-NEXT: movl %eax, %ebp 1446; AVX2-NEXT: movl %eax, %ebx 1447; AVX2-NEXT: vmovd %eax, %xmm1 1448; AVX2-NEXT: shrl $8, %eax 1449; AVX2-NEXT: vpinsrb $1, %eax, %xmm1, %xmm1 1450; AVX2-NEXT: shrl $16, %ebx 1451; AVX2-NEXT: vpinsrb $2, %ebx, %xmm1, %xmm1 1452; AVX2-NEXT: shrl $24, %ebp 1453; AVX2-NEXT: vpinsrb $3, %ebp, %xmm1, %xmm1 1454; AVX2-NEXT: shrq $32, %rdi 1455; AVX2-NEXT: vpinsrb $4, %edi, %xmm1, %xmm1 1456; AVX2-NEXT: shrq $40, %rsi 1457; AVX2-NEXT: vpinsrb $5, %esi, %xmm1, %xmm1 1458; AVX2-NEXT: movb $0, -{{[0-9]+}}(%rsp) 1459; AVX2-NEXT: vmovdqa -{{[0-9]+}}(%rsp), %xmm2 1460; AVX2-NEXT: shrq $48, %rdx 1461; AVX2-NEXT: vpinsrb $6, %edx, %xmm1, %xmm1 1462; AVX2-NEXT: vpextrq $1, %xmm0, %rax 1463; AVX2-NEXT: shrq $56, %rcx 1464; AVX2-NEXT: vpinsrb $7, %ecx, %xmm1, %xmm0 1465; AVX2-NEXT: movl %eax, %ecx 1466; AVX2-NEXT: shrl $8, %ecx 1467; AVX2-NEXT: vpinsrb $8, %eax, %xmm0, %xmm0 1468; AVX2-NEXT: vpinsrb $9, %ecx, %xmm0, %xmm0 1469; AVX2-NEXT: movl %eax, %ecx 1470; AVX2-NEXT: shrl $16, %ecx 1471; AVX2-NEXT: vpinsrb $10, %ecx, %xmm0, %xmm0 1472; AVX2-NEXT: movl %eax, %ecx 1473; AVX2-NEXT: shrl $24, %ecx 1474; AVX2-NEXT: vpinsrb $11, %ecx, %xmm0, %xmm0 1475; AVX2-NEXT: movq %rax, %rcx 1476; AVX2-NEXT: shrq $32, %rcx 1477; AVX2-NEXT: vpinsrb $12, %ecx, %xmm0, %xmm0 1478; AVX2-NEXT: movq %rax, %rcx 1479; AVX2-NEXT: shrq $40, %rcx 1480; AVX2-NEXT: vpinsrb $13, %ecx, %xmm0, %xmm0 1481; AVX2-NEXT: movq %rax, %rcx 1482; AVX2-NEXT: shrq $48, %rcx 1483; AVX2-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0 1484; AVX2-NEXT: vmovq %xmm2, %rcx 1485; AVX2-NEXT: shrq $56, %rax 1486; AVX2-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0 1487; AVX2-NEXT: movl %ecx, %eax 1488; AVX2-NEXT: shrl $8, %eax 1489; AVX2-NEXT: vmovd %ecx, %xmm1 1490; AVX2-NEXT: vpinsrb $1, %eax, %xmm1, %xmm1 1491; AVX2-NEXT: movl %ecx, %eax 1492; AVX2-NEXT: shrl $16, %eax 1493; AVX2-NEXT: vpinsrb $2, %eax, %xmm1, %xmm1 1494; AVX2-NEXT: movl %ecx, %eax 1495; AVX2-NEXT: shrl $24, %eax 1496; AVX2-NEXT: vpinsrb $3, %eax, %xmm1, %xmm1 1497; AVX2-NEXT: movq %rcx, %rax 1498; AVX2-NEXT: shrq $32, %rax 1499; AVX2-NEXT: vpinsrb $4, %eax, %xmm1, %xmm1 1500; AVX2-NEXT: movq %rcx, %rax 1501; AVX2-NEXT: shrq $40, %rax 1502; AVX2-NEXT: vpinsrb $5, %eax, %xmm1, %xmm1 1503; AVX2-NEXT: movq %rcx, %rax 1504; AVX2-NEXT: shrq $48, %rax 1505; AVX2-NEXT: vpinsrb $6, %eax, %xmm1, %xmm1 1506; AVX2-NEXT: vpextrq $1, %xmm2, %rax 1507; AVX2-NEXT: shrq $56, %rcx 1508; AVX2-NEXT: vpinsrb $7, %ecx, %xmm1, %xmm1 1509; AVX2-NEXT: movl %eax, %ecx 1510; AVX2-NEXT: shrl $8, %ecx 1511; AVX2-NEXT: vpinsrb $8, %eax, %xmm1, %xmm1 1512; AVX2-NEXT: vpinsrb $9, %ecx, %xmm1, %xmm1 1513; AVX2-NEXT: movl %eax, %ecx 1514; AVX2-NEXT: shrl $16, %ecx 1515; AVX2-NEXT: vpinsrb $10, %ecx, %xmm1, %xmm1 1516; AVX2-NEXT: movl %eax, %ecx 1517; AVX2-NEXT: shrl $24, %ecx 1518; AVX2-NEXT: vpinsrb $11, %ecx, %xmm1, %xmm1 1519; AVX2-NEXT: movq %rax, %rcx 1520; AVX2-NEXT: shrq $32, %rcx 1521; AVX2-NEXT: vpinsrb $12, %ecx, %xmm1, %xmm1 1522; AVX2-NEXT: movq %rax, %rcx 1523; AVX2-NEXT: shrq $40, %rcx 1524; AVX2-NEXT: vpinsrb $13, %ecx, %xmm1, %xmm1 1525; AVX2-NEXT: movq %rax, %rcx 1526; AVX2-NEXT: shrq $48, %rcx 1527; AVX2-NEXT: vpinsrb $14, %ecx, %xmm1, %xmm1 1528; AVX2-NEXT: shrq $56, %rax 1529; AVX2-NEXT: vpinsrb $15, %eax, %xmm1, %xmm1 1530; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0 1531; AVX2-NEXT: popq %rbx 1532; AVX2-NEXT: popq %r12 1533; AVX2-NEXT: popq %r13 1534; AVX2-NEXT: popq %r14 1535; AVX2-NEXT: popq %r15 1536; AVX2-NEXT: popq %rbp 1537; AVX2-NEXT: retq 1538 %x4 = bitcast <32 x i8> %0 to <64 x i4> 1539 %r0 = insertelement <64 x i4> %x4, i4 zeroinitializer, i32 1 1540 %r1 = insertelement <64 x i4> %r0, i4 zeroinitializer, i32 3 1541 %r2 = insertelement <64 x i4> %r1, i4 zeroinitializer, i32 5 1542 %r3 = insertelement <64 x i4> %r2, i4 zeroinitializer, i32 7 1543 %r4 = insertelement <64 x i4> %r3, i4 zeroinitializer, i32 9 1544 %r5 = insertelement <64 x i4> %r4, i4 zeroinitializer, i32 11 1545 %r6 = insertelement <64 x i4> %r5, i4 zeroinitializer, i32 13 1546 %r7 = insertelement <64 x i4> %r6, i4 zeroinitializer, i32 15 1547 %r8 = insertelement <64 x i4> %r7, i4 zeroinitializer, i32 17 1548 %r9 = insertelement <64 x i4> %r8, i4 zeroinitializer, i32 19 1549 %r10 = insertelement <64 x i4> %r9, i4 zeroinitializer, i32 21 1550 %r11 = insertelement <64 x i4> %r10, i4 zeroinitializer, i32 23 1551 %r12 = insertelement <64 x i4> %r11, i4 zeroinitializer, i32 25 1552 %r13 = insertelement <64 x i4> %r12, i4 zeroinitializer, i32 27 1553 %r14 = insertelement <64 x i4> %r13, i4 zeroinitializer, i32 29 1554 %r15 = insertelement <64 x i4> %r14, i4 zeroinitializer, i32 31 1555 %r16 = insertelement <64 x i4> %r15, i4 zeroinitializer, i32 33 1556 %r17 = insertelement <64 x i4> %r16, i4 zeroinitializer, i32 35 1557 %r18 = insertelement <64 x i4> %r17, i4 zeroinitializer, i32 37 1558 %r19 = insertelement <64 x i4> %r18, i4 zeroinitializer, i32 39 1559 %r20 = insertelement <64 x i4> %r19, i4 zeroinitializer, i32 41 1560 %r21 = insertelement <64 x i4> %r20, i4 zeroinitializer, i32 43 1561 %r22 = insertelement <64 x i4> %r21, i4 zeroinitializer, i32 45 1562 %r23 = insertelement <64 x i4> %r22, i4 zeroinitializer, i32 47 1563 %r24 = insertelement <64 x i4> %r23, i4 zeroinitializer, i32 49 1564 %r25 = insertelement <64 x i4> %r24, i4 zeroinitializer, i32 51 1565 %r26 = insertelement <64 x i4> %r25, i4 zeroinitializer, i32 53 1566 %r27 = insertelement <64 x i4> %r26, i4 zeroinitializer, i32 55 1567 %r28 = insertelement <64 x i4> %r27, i4 zeroinitializer, i32 57 1568 %r29 = insertelement <64 x i4> %r28, i4 zeroinitializer, i32 59 1569 %r30 = insertelement <64 x i4> %r29, i4 zeroinitializer, i32 61 1570 %r31 = insertelement <64 x i4> %r30, i4 zeroinitializer, i32 63 1571 %r = bitcast <64 x i4> %r15 to <32 x i8> 1572 ret <32 x i8> %r 1573} 1574 1575define <2 x i64> @_clearupper2xi64c(<2 x i64>) nounwind { 1576; SSE-LABEL: _clearupper2xi64c: 1577; SSE: # BB#0: 1578; SSE-NEXT: andps {{.*}}(%rip), %xmm0 1579; SSE-NEXT: retq 1580; 1581; AVX1-LABEL: _clearupper2xi64c: 1582; AVX1: # BB#0: 1583; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 1584; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7] 1585; AVX1-NEXT: retq 1586; 1587; AVX2-LABEL: _clearupper2xi64c: 1588; AVX2: # BB#0: 1589; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1 1590; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3] 1591; AVX2-NEXT: retq 1592 %r = and <2 x i64> <i64 4294967295, i64 4294967295>, %0 1593 ret <2 x i64> %r 1594} 1595 1596define <4 x i64> @_clearupper4xi64c(<4 x i64>) nounwind { 1597; SSE-LABEL: _clearupper4xi64c: 1598; SSE: # BB#0: 1599; SSE-NEXT: movaps {{.*#+}} xmm2 = [4294967295,0,4294967295,0] 1600; SSE-NEXT: andps %xmm2, %xmm0 1601; SSE-NEXT: andps %xmm2, %xmm1 1602; SSE-NEXT: retq 1603; 1604; AVX1-LABEL: _clearupper4xi64c: 1605; AVX1: # BB#0: 1606; AVX1-NEXT: vxorps %ymm1, %ymm1, %ymm1 1607; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] 1608; AVX1-NEXT: retq 1609; 1610; AVX2-LABEL: _clearupper4xi64c: 1611; AVX2: # BB#0: 1612; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1 1613; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] 1614; AVX2-NEXT: retq 1615 %r = and <4 x i64> <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>, %0 1616 ret <4 x i64> %r 1617} 1618 1619define <4 x i32> @_clearupper4xi32c(<4 x i32>) nounwind { 1620; SSE-LABEL: _clearupper4xi32c: 1621; SSE: # BB#0: 1622; SSE-NEXT: andps {{.*}}(%rip), %xmm0 1623; SSE-NEXT: retq 1624; 1625; AVX-LABEL: _clearupper4xi32c: 1626; AVX: # BB#0: 1627; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1 1628; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 1629; AVX-NEXT: retq 1630 %r = and <4 x i32> <i32 65535, i32 65535, i32 65535, i32 65535>, %0 1631 ret <4 x i32> %r 1632} 1633 1634define <8 x i32> @_clearupper8xi32c(<8 x i32>) nounwind { 1635; SSE-LABEL: _clearupper8xi32c: 1636; SSE: # BB#0: 1637; SSE-NEXT: movaps {{.*#+}} xmm2 = [65535,0,65535,0,65535,0,65535,0] 1638; SSE-NEXT: andps %xmm2, %xmm0 1639; SSE-NEXT: andps %xmm2, %xmm1 1640; SSE-NEXT: retq 1641; 1642; AVX1-LABEL: _clearupper8xi32c: 1643; AVX1: # BB#0: 1644; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 1645; AVX1-NEXT: retq 1646; 1647; AVX2-LABEL: _clearupper8xi32c: 1648; AVX2: # BB#0: 1649; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1 1650; AVX2-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7],ymm0[8],ymm1[9],ymm0[10],ymm1[11],ymm0[12],ymm1[13],ymm0[14],ymm1[15] 1651; AVX2-NEXT: retq 1652 %r = and <8 x i32> <i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535>, %0 1653 ret <8 x i32> %r 1654} 1655 1656define <8 x i16> @_clearupper8xi16c(<8 x i16>) nounwind { 1657; SSE-LABEL: _clearupper8xi16c: 1658; SSE: # BB#0: 1659; SSE-NEXT: andps {{.*}}(%rip), %xmm0 1660; SSE-NEXT: retq 1661; 1662; AVX-LABEL: _clearupper8xi16c: 1663; AVX: # BB#0: 1664; AVX-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0 1665; AVX-NEXT: retq 1666 %r = and <8 x i16> <i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255>, %0 1667 ret <8 x i16> %r 1668} 1669 1670define <16 x i16> @_clearupper16xi16c(<16 x i16>) nounwind { 1671; SSE-LABEL: _clearupper16xi16c: 1672; SSE: # BB#0: 1673; SSE-NEXT: movaps {{.*#+}} xmm2 = [255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0] 1674; SSE-NEXT: andps %xmm2, %xmm0 1675; SSE-NEXT: andps %xmm2, %xmm1 1676; SSE-NEXT: retq 1677; 1678; AVX-LABEL: _clearupper16xi16c: 1679; AVX: # BB#0: 1680; AVX-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 1681; AVX-NEXT: retq 1682 %r = and <16 x i16> <i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255>, %0 1683 ret <16 x i16> %r 1684} 1685 1686define <16 x i8> @_clearupper16xi8c(<16 x i8>) nounwind { 1687; SSE-LABEL: _clearupper16xi8c: 1688; SSE: # BB#0: 1689; SSE-NEXT: andps {{.*}}(%rip), %xmm0 1690; SSE-NEXT: retq 1691; 1692; AVX-LABEL: _clearupper16xi8c: 1693; AVX: # BB#0: 1694; AVX-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0 1695; AVX-NEXT: retq 1696 %r = and <16 x i8> <i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15>, %0 1697 ret <16 x i8> %r 1698} 1699 1700define <32 x i8> @_clearupper32xi8c(<32 x i8>) nounwind { 1701; SSE-LABEL: _clearupper32xi8c: 1702; SSE: # BB#0: 1703; SSE-NEXT: movaps {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15] 1704; SSE-NEXT: andps %xmm2, %xmm0 1705; SSE-NEXT: andps %xmm2, %xmm1 1706; SSE-NEXT: retq 1707; 1708; AVX-LABEL: _clearupper32xi8c: 1709; AVX: # BB#0: 1710; AVX-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 1711; AVX-NEXT: retq 1712 %r = and <32 x i8> <i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15>, %0 1713 ret <32 x i8> %r 1714} 1715