1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=SSE --check-prefix=SSE2 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1 4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2 5 6; 7; PR6455 'Clear Upper Bits' Patterns 8; 9 10define <2 x i64> @_clearupper2xi64a(<2 x i64>) nounwind { 11; SSE-LABEL: _clearupper2xi64a: 12; SSE: # BB#0: 13; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 14; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 15; SSE-NEXT: pand {{.*}}(%rip), %xmm0 16; SSE-NEXT: retq 17; 18; AVX-LABEL: _clearupper2xi64a: 19; AVX: # BB#0: 20; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 21; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 22; AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 23; AVX-NEXT: retq 24 %x0 = extractelement <2 x i64> %0, i32 0 25 %x1 = extractelement <2 x i64> %0, i32 1 26 %trunc0 = trunc i64 %x0 to i32 27 %trunc1 = trunc i64 %x1 to i32 28 %ext0 = zext i32 %trunc0 to i64 29 %ext1 = zext i32 %trunc1 to i64 30 %v0 = insertelement <2 x i64> undef, i64 %ext0, i32 0 31 %v1 = insertelement <2 x i64> %v0, i64 %ext1, i32 1 32 ret <2 x i64> %v1 33} 34 35define <4 x i32> @_clearupper4xi32a(<4 x i32>) nounwind { 36; SSE-LABEL: _clearupper4xi32a: 37; SSE: # BB#0: 38; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] 39; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] 40; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm0[3,1,2,3] 41; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1] 42; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 43; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 44; SSE-NEXT: pand {{.*}}(%rip), %xmm0 45; SSE-NEXT: retq 46; 47; AVX1-LABEL: _clearupper4xi32a: 48; AVX1: # BB#0: 49; AVX1-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0 50; AVX1-NEXT: retq 51; 52; AVX2-LABEL: _clearupper4xi32a: 53; AVX2: # BB#0: 54; AVX2-NEXT: vbroadcastss {{.*}}(%rip), %xmm1 55; AVX2-NEXT: vandps %xmm1, %xmm0, %xmm0 56; AVX2-NEXT: retq 57 %x0 = extractelement <4 x i32> %0, i32 0 58 %x1 = extractelement <4 x i32> %0, i32 1 59 %x2 = extractelement <4 x i32> %0, i32 2 60 %x3 = extractelement <4 x i32> %0, i32 3 61 %trunc0 = trunc i32 %x0 to i16 62 %trunc1 = trunc i32 %x1 to i16 63 %trunc2 = trunc i32 %x2 to i16 64 %trunc3 = trunc i32 %x3 to i16 65 %ext0 = zext i16 %trunc0 to i32 66 %ext1 = zext i16 %trunc1 to i32 67 %ext2 = zext i16 %trunc2 to i32 68 %ext3 = zext i16 %trunc3 to i32 69 %v0 = insertelement <4 x i32> undef, i32 %ext0, i32 0 70 %v1 = insertelement <4 x i32> %v0, i32 %ext1, i32 1 71 %v2 = insertelement <4 x i32> %v1, i32 %ext2, i32 2 72 %v3 = insertelement <4 x i32> %v2, i32 %ext3, i32 3 73 ret <4 x i32> %v3 74} 75 76define <8 x i16> @_clearupper8xi16a(<8 x i16>) nounwind { 77; SSE-LABEL: _clearupper8xi16a: 78; SSE: # BB#0: 79; SSE-NEXT: pextrw $1, %xmm0, %eax 80; SSE-NEXT: pextrw $2, %xmm0, %r9d 81; SSE-NEXT: pextrw $3, %xmm0, %edx 82; SSE-NEXT: pextrw $4, %xmm0, %r8d 83; SSE-NEXT: pextrw $5, %xmm0, %edi 84; SSE-NEXT: pextrw $6, %xmm0, %esi 85; SSE-NEXT: pextrw $7, %xmm0, %ecx 86; SSE-NEXT: movd %ecx, %xmm1 87; SSE-NEXT: movd %edx, %xmm2 88; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 89; SSE-NEXT: movd %edi, %xmm1 90; SSE-NEXT: movd %eax, %xmm3 91; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3] 92; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3] 93; SSE-NEXT: movd %esi, %xmm1 94; SSE-NEXT: movd %r9d, %xmm2 95; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 96; SSE-NEXT: movd %r8d, %xmm1 97; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 98; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 99; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3] 100; SSE-NEXT: pand {{.*}}(%rip), %xmm0 101; SSE-NEXT: retq 102; 103; AVX-LABEL: _clearupper8xi16a: 104; AVX: # BB#0: 105; AVX-NEXT: vpextrw $1, %xmm0, %eax 106; AVX-NEXT: vpextrw $2, %xmm0, %ecx 107; AVX-NEXT: vpextrw $3, %xmm0, %edx 108; AVX-NEXT: vpextrw $4, %xmm0, %esi 109; AVX-NEXT: vpextrw $5, %xmm0, %edi 110; AVX-NEXT: vpextrw $6, %xmm0, %r8d 111; AVX-NEXT: vpextrw $7, %xmm0, %r9d 112; AVX-NEXT: vpinsrw $1, %eax, %xmm0, %xmm0 113; AVX-NEXT: vpinsrw $2, %ecx, %xmm0, %xmm0 114; AVX-NEXT: vpinsrw $3, %edx, %xmm0, %xmm0 115; AVX-NEXT: vpinsrw $4, %esi, %xmm0, %xmm0 116; AVX-NEXT: vpinsrw $5, %edi, %xmm0, %xmm0 117; AVX-NEXT: vpinsrw $6, %r8d, %xmm0, %xmm0 118; AVX-NEXT: vpinsrw $7, %r9d, %xmm0, %xmm0 119; AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 120; AVX-NEXT: retq 121 %x0 = extractelement <8 x i16> %0, i32 0 122 %x1 = extractelement <8 x i16> %0, i32 1 123 %x2 = extractelement <8 x i16> %0, i32 2 124 %x3 = extractelement <8 x i16> %0, i32 3 125 %x4 = extractelement <8 x i16> %0, i32 4 126 %x5 = extractelement <8 x i16> %0, i32 5 127 %x6 = extractelement <8 x i16> %0, i32 6 128 %x7 = extractelement <8 x i16> %0, i32 7 129 %trunc0 = trunc i16 %x0 to i8 130 %trunc1 = trunc i16 %x1 to i8 131 %trunc2 = trunc i16 %x2 to i8 132 %trunc3 = trunc i16 %x3 to i8 133 %trunc4 = trunc i16 %x4 to i8 134 %trunc5 = trunc i16 %x5 to i8 135 %trunc6 = trunc i16 %x6 to i8 136 %trunc7 = trunc i16 %x7 to i8 137 %ext0 = zext i8 %trunc0 to i16 138 %ext1 = zext i8 %trunc1 to i16 139 %ext2 = zext i8 %trunc2 to i16 140 %ext3 = zext i8 %trunc3 to i16 141 %ext4 = zext i8 %trunc4 to i16 142 %ext5 = zext i8 %trunc5 to i16 143 %ext6 = zext i8 %trunc6 to i16 144 %ext7 = zext i8 %trunc7 to i16 145 %v0 = insertelement <8 x i16> undef, i16 %ext0, i32 0 146 %v1 = insertelement <8 x i16> %v0, i16 %ext1, i32 1 147 %v2 = insertelement <8 x i16> %v1, i16 %ext2, i32 2 148 %v3 = insertelement <8 x i16> %v2, i16 %ext3, i32 3 149 %v4 = insertelement <8 x i16> %v3, i16 %ext4, i32 4 150 %v5 = insertelement <8 x i16> %v4, i16 %ext5, i32 5 151 %v6 = insertelement <8 x i16> %v5, i16 %ext6, i32 6 152 %v7 = insertelement <8 x i16> %v6, i16 %ext7, i32 7 153 ret <8 x i16> %v7 154} 155 156define <16 x i8> @_clearupper16xi8a(<16 x i8>) nounwind { 157; SSE-LABEL: _clearupper16xi8a: 158; SSE: # BB#0: 159; SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) 160; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 161; SSE-NEXT: movd %eax, %xmm0 162; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %r9d 163; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %edx 164; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %esi 165; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %r8d 166; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %edi 167; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 168; SSE-NEXT: movd %eax, %xmm1 169; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 170; SSE-NEXT: movd %esi, %xmm0 171; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 172; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %esi 173; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %ecx 174; SSE-NEXT: movd %ecx, %xmm2 175; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 176; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 177; SSE-NEXT: movd %edx, %xmm0 178; SSE-NEXT: movd %esi, %xmm1 179; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 180; SSE-NEXT: movd %edi, %xmm0 181; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %ecx 182; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %edx 183; SSE-NEXT: movd %edx, %xmm3 184; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3],xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7] 185; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7] 186; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 187; SSE-NEXT: movd %r9d, %xmm0 188; SSE-NEXT: movd %eax, %xmm1 189; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 190; SSE-NEXT: movd %r8d, %xmm0 191; SSE-NEXT: movd %ecx, %xmm2 192; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 193; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 194; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 195; SSE-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 196; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 197; SSE-NEXT: movd {{.*#+}} xmm4 = mem[0],zero,zero,zero 198; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 199; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3],xmm0[4],xmm4[4],xmm0[5],xmm4[5],xmm0[6],xmm4[6],xmm0[7],xmm4[7] 200; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 201; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7] 202; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 203; SSE-NEXT: pand {{.*}}(%rip), %xmm0 204; SSE-NEXT: retq 205; 206; AVX-LABEL: _clearupper16xi8a: 207; AVX: # BB#0: 208; AVX-NEXT: vpextrb $0, %xmm0, %eax 209; AVX-NEXT: vmovd %eax, %xmm1 210; AVX-NEXT: vpextrb $1, %xmm0, %eax 211; AVX-NEXT: vpinsrb $1, %eax, %xmm1, %xmm1 212; AVX-NEXT: vpextrb $2, %xmm0, %eax 213; AVX-NEXT: vpinsrb $2, %eax, %xmm1, %xmm1 214; AVX-NEXT: vpextrb $3, %xmm0, %eax 215; AVX-NEXT: vpinsrb $3, %eax, %xmm1, %xmm1 216; AVX-NEXT: vpextrb $4, %xmm0, %eax 217; AVX-NEXT: vpinsrb $4, %eax, %xmm1, %xmm1 218; AVX-NEXT: vpextrb $5, %xmm0, %eax 219; AVX-NEXT: vpinsrb $5, %eax, %xmm1, %xmm1 220; AVX-NEXT: vpextrb $6, %xmm0, %eax 221; AVX-NEXT: vpinsrb $6, %eax, %xmm1, %xmm1 222; AVX-NEXT: vpextrb $7, %xmm0, %eax 223; AVX-NEXT: vpinsrb $7, %eax, %xmm1, %xmm1 224; AVX-NEXT: vpextrb $8, %xmm0, %eax 225; AVX-NEXT: vpinsrb $8, %eax, %xmm1, %xmm1 226; AVX-NEXT: vpextrb $9, %xmm0, %eax 227; AVX-NEXT: vpinsrb $9, %eax, %xmm1, %xmm1 228; AVX-NEXT: vpextrb $10, %xmm0, %eax 229; AVX-NEXT: vpinsrb $10, %eax, %xmm1, %xmm1 230; AVX-NEXT: vpextrb $11, %xmm0, %eax 231; AVX-NEXT: vpinsrb $11, %eax, %xmm1, %xmm1 232; AVX-NEXT: vpextrb $12, %xmm0, %eax 233; AVX-NEXT: vpinsrb $12, %eax, %xmm1, %xmm1 234; AVX-NEXT: vpextrb $13, %xmm0, %eax 235; AVX-NEXT: vpinsrb $13, %eax, %xmm1, %xmm1 236; AVX-NEXT: vpextrb $14, %xmm0, %eax 237; AVX-NEXT: vpinsrb $14, %eax, %xmm1, %xmm1 238; AVX-NEXT: vpextrb $15, %xmm0, %eax 239; AVX-NEXT: vpinsrb $15, %eax, %xmm1, %xmm0 240; AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 241; AVX-NEXT: retq 242 %x0 = extractelement <16 x i8> %0, i32 0 243 %x1 = extractelement <16 x i8> %0, i32 1 244 %x2 = extractelement <16 x i8> %0, i32 2 245 %x3 = extractelement <16 x i8> %0, i32 3 246 %x4 = extractelement <16 x i8> %0, i32 4 247 %x5 = extractelement <16 x i8> %0, i32 5 248 %x6 = extractelement <16 x i8> %0, i32 6 249 %x7 = extractelement <16 x i8> %0, i32 7 250 %x8 = extractelement <16 x i8> %0, i32 8 251 %x9 = extractelement <16 x i8> %0, i32 9 252 %x10 = extractelement <16 x i8> %0, i32 10 253 %x11 = extractelement <16 x i8> %0, i32 11 254 %x12 = extractelement <16 x i8> %0, i32 12 255 %x13 = extractelement <16 x i8> %0, i32 13 256 %x14 = extractelement <16 x i8> %0, i32 14 257 %x15 = extractelement <16 x i8> %0, i32 15 258 %trunc0 = trunc i8 %x0 to i4 259 %trunc1 = trunc i8 %x1 to i4 260 %trunc2 = trunc i8 %x2 to i4 261 %trunc3 = trunc i8 %x3 to i4 262 %trunc4 = trunc i8 %x4 to i4 263 %trunc5 = trunc i8 %x5 to i4 264 %trunc6 = trunc i8 %x6 to i4 265 %trunc7 = trunc i8 %x7 to i4 266 %trunc8 = trunc i8 %x8 to i4 267 %trunc9 = trunc i8 %x9 to i4 268 %trunc10 = trunc i8 %x10 to i4 269 %trunc11 = trunc i8 %x11 to i4 270 %trunc12 = trunc i8 %x12 to i4 271 %trunc13 = trunc i8 %x13 to i4 272 %trunc14 = trunc i8 %x14 to i4 273 %trunc15 = trunc i8 %x15 to i4 274 %ext0 = zext i4 %trunc0 to i8 275 %ext1 = zext i4 %trunc1 to i8 276 %ext2 = zext i4 %trunc2 to i8 277 %ext3 = zext i4 %trunc3 to i8 278 %ext4 = zext i4 %trunc4 to i8 279 %ext5 = zext i4 %trunc5 to i8 280 %ext6 = zext i4 %trunc6 to i8 281 %ext7 = zext i4 %trunc7 to i8 282 %ext8 = zext i4 %trunc8 to i8 283 %ext9 = zext i4 %trunc9 to i8 284 %ext10 = zext i4 %trunc10 to i8 285 %ext11 = zext i4 %trunc11 to i8 286 %ext12 = zext i4 %trunc12 to i8 287 %ext13 = zext i4 %trunc13 to i8 288 %ext14 = zext i4 %trunc14 to i8 289 %ext15 = zext i4 %trunc15 to i8 290 %v0 = insertelement <16 x i8> undef, i8 %ext0, i32 0 291 %v1 = insertelement <16 x i8> %v0, i8 %ext1, i32 1 292 %v2 = insertelement <16 x i8> %v1, i8 %ext2, i32 2 293 %v3 = insertelement <16 x i8> %v2, i8 %ext3, i32 3 294 %v4 = insertelement <16 x i8> %v3, i8 %ext4, i32 4 295 %v5 = insertelement <16 x i8> %v4, i8 %ext5, i32 5 296 %v6 = insertelement <16 x i8> %v5, i8 %ext6, i32 6 297 %v7 = insertelement <16 x i8> %v6, i8 %ext7, i32 7 298 %v8 = insertelement <16 x i8> %v7, i8 %ext8, i32 8 299 %v9 = insertelement <16 x i8> %v8, i8 %ext9, i32 9 300 %v10 = insertelement <16 x i8> %v9, i8 %ext10, i32 10 301 %v11 = insertelement <16 x i8> %v10, i8 %ext11, i32 11 302 %v12 = insertelement <16 x i8> %v11, i8 %ext12, i32 12 303 %v13 = insertelement <16 x i8> %v12, i8 %ext13, i32 13 304 %v14 = insertelement <16 x i8> %v13, i8 %ext14, i32 14 305 %v15 = insertelement <16 x i8> %v14, i8 %ext15, i32 15 306 ret <16 x i8> %v15 307} 308 309define <2 x i64> @_clearupper2xi64b(<2 x i64>) nounwind { 310; SSE-LABEL: _clearupper2xi64b: 311; SSE: # BB#0: 312; SSE-NEXT: xorl %eax, %eax 313; SSE-NEXT: movd %eax, %xmm2 314; SSE-NEXT: movaps %xmm2, %xmm1 315; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0] 316; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3] 317; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,0],xmm1[2,0] 318; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,0] 319; SSE-NEXT: movaps %xmm1, %xmm0 320; SSE-NEXT: retq 321; 322; AVX1-LABEL: _clearupper2xi64b: 323; AVX1: # BB#0: 324; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 325; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7] 326; AVX1-NEXT: retq 327; 328; AVX2-LABEL: _clearupper2xi64b: 329; AVX2: # BB#0: 330; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1 331; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3] 332; AVX2-NEXT: retq 333 %x32 = bitcast <2 x i64> %0 to <4 x i32> 334 %r0 = insertelement <4 x i32> %x32, i32 zeroinitializer, i32 1 335 %r1 = insertelement <4 x i32> %r0, i32 zeroinitializer, i32 3 336 %r = bitcast <4 x i32> %r1 to <2 x i64> 337 ret <2 x i64> %r 338} 339 340define <4 x i32> @_clearupper4xi32b(<4 x i32>) nounwind { 341; SSE-LABEL: _clearupper4xi32b: 342; SSE: # BB#0: 343; SSE-NEXT: xorl %eax, %eax 344; SSE-NEXT: pinsrw $1, %eax, %xmm0 345; SSE-NEXT: pinsrw $3, %eax, %xmm0 346; SSE-NEXT: pinsrw $5, %eax, %xmm0 347; SSE-NEXT: pinsrw $7, %eax, %xmm0 348; SSE-NEXT: retq 349; 350; AVX1-LABEL: _clearupper4xi32b: 351; AVX1: # BB#0: 352; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 353; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 354; AVX1-NEXT: retq 355; 356; AVX2-LABEL: _clearupper4xi32b: 357; AVX2: # BB#0: 358; AVX2-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1],zero,zero,xmm0[4,5],zero,zero,xmm0[8,9],zero,zero,xmm0[12,13],zero,zero 359; AVX2-NEXT: retq 360 %x16 = bitcast <4 x i32> %0 to <8 x i16> 361 %r0 = insertelement <8 x i16> %x16, i16 zeroinitializer, i32 1 362 %r1 = insertelement <8 x i16> %r0, i16 zeroinitializer, i32 3 363 %r2 = insertelement <8 x i16> %r1, i16 zeroinitializer, i32 5 364 %r3 = insertelement <8 x i16> %r2, i16 zeroinitializer, i32 7 365 %r = bitcast <8 x i16> %r3 to <4 x i32> 366 ret <4 x i32> %r 367} 368 369define <8 x i16> @_clearupper8xi16b(<8 x i16>) nounwind { 370; SSE-LABEL: _clearupper8xi16b: 371; SSE: # BB#0: 372; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,0,255,255,255,255,255,255,255,255,255,255,255,255,255,255] 373; SSE-NEXT: pand %xmm2, %xmm0 374; SSE-NEXT: xorl %eax, %eax 375; SSE-NEXT: movd %eax, %xmm1 376; SSE-NEXT: movdqa %xmm1, %xmm3 377; SSE-NEXT: psllw $8, %xmm3 378; SSE-NEXT: pandn %xmm3, %xmm2 379; SSE-NEXT: por %xmm2, %xmm0 380; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,0,255,255,255,255,255,255,255,255,255,255,255,255] 381; SSE-NEXT: pand %xmm2, %xmm0 382; SSE-NEXT: movdqa %xmm1, %xmm3 383; SSE-NEXT: pslld $24, %xmm3 384; SSE-NEXT: pandn %xmm3, %xmm2 385; SSE-NEXT: por %xmm2, %xmm0 386; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,0,255,255,255,255,255,255,255,255,255,255] 387; SSE-NEXT: pand %xmm2, %xmm0 388; SSE-NEXT: movdqa %xmm1, %xmm3 389; SSE-NEXT: psllq $40, %xmm3 390; SSE-NEXT: pandn %xmm3, %xmm2 391; SSE-NEXT: por %xmm2, %xmm0 392; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,255] 393; SSE-NEXT: pand %xmm2, %xmm0 394; SSE-NEXT: movdqa %xmm1, %xmm3 395; SSE-NEXT: psllq $56, %xmm3 396; SSE-NEXT: pandn %xmm3, %xmm2 397; SSE-NEXT: por %xmm2, %xmm0 398; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255,255,0,255,255,255,255,255,255] 399; SSE-NEXT: pand %xmm2, %xmm0 400; SSE-NEXT: movdqa %xmm1, %xmm3 401; SSE-NEXT: pslldq {{.*#+}} xmm3 = zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm3[0,1,2,3,4,5,6] 402; SSE-NEXT: pandn %xmm3, %xmm2 403; SSE-NEXT: por %xmm2, %xmm0 404; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255,255,255,255,0,255,255,255,255] 405; SSE-NEXT: pand %xmm2, %xmm0 406; SSE-NEXT: movdqa %xmm1, %xmm3 407; SSE-NEXT: pslldq {{.*#+}} xmm3 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm3[0,1,2,3,4] 408; SSE-NEXT: pandn %xmm3, %xmm2 409; SSE-NEXT: por %xmm2, %xmm0 410; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255,255,255,255,255,255,0,255,255] 411; SSE-NEXT: pand %xmm2, %xmm0 412; SSE-NEXT: movdqa %xmm1, %xmm3 413; SSE-NEXT: pslldq {{.*#+}} xmm3 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm3[0,1,2] 414; SSE-NEXT: pandn %xmm3, %xmm2 415; SSE-NEXT: por %xmm2, %xmm0 416; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,0] 417; SSE-NEXT: pand %xmm2, %xmm0 418; SSE-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0] 419; SSE-NEXT: pandn %xmm1, %xmm2 420; SSE-NEXT: por %xmm2, %xmm0 421; SSE-NEXT: retq 422; 423; AVX-LABEL: _clearupper8xi16b: 424; AVX: # BB#0: 425; AVX-NEXT: xorl %eax, %eax 426; AVX-NEXT: vpinsrb $1, %eax, %xmm0, %xmm0 427; AVX-NEXT: vpinsrb $3, %eax, %xmm0, %xmm0 428; AVX-NEXT: vpinsrb $5, %eax, %xmm0, %xmm0 429; AVX-NEXT: vpinsrb $7, %eax, %xmm0, %xmm0 430; AVX-NEXT: vpinsrb $9, %eax, %xmm0, %xmm0 431; AVX-NEXT: vpinsrb $11, %eax, %xmm0, %xmm0 432; AVX-NEXT: vpinsrb $13, %eax, %xmm0, %xmm0 433; AVX-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0 434; AVX-NEXT: retq 435 %x8 = bitcast <8 x i16> %0 to <16 x i8> 436 %r0 = insertelement <16 x i8> %x8, i8 zeroinitializer, i32 1 437 %r1 = insertelement <16 x i8> %r0, i8 zeroinitializer, i32 3 438 %r2 = insertelement <16 x i8> %r1, i8 zeroinitializer, i32 5 439 %r3 = insertelement <16 x i8> %r2, i8 zeroinitializer, i32 7 440 %r4 = insertelement <16 x i8> %r3, i8 zeroinitializer, i32 9 441 %r5 = insertelement <16 x i8> %r4, i8 zeroinitializer, i32 11 442 %r6 = insertelement <16 x i8> %r5, i8 zeroinitializer, i32 13 443 %r7 = insertelement <16 x i8> %r6, i8 zeroinitializer, i32 15 444 %r = bitcast <16 x i8> %r7 to <8 x i16> 445 ret <8 x i16> %r 446} 447 448define <16 x i8> @_clearupper16xi8b(<16 x i8>) nounwind { 449; SSE-LABEL: _clearupper16xi8b: 450; SSE: # BB#0: 451; SSE-NEXT: pushq %r14 452; SSE-NEXT: pushq %rbx 453; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 454; SSE-NEXT: movd %xmm0, %rcx 455; SSE-NEXT: movq %rcx, %r8 456; SSE-NEXT: movq %rcx, %r9 457; SSE-NEXT: movq %rcx, %r10 458; SSE-NEXT: movq %rcx, %rax 459; SSE-NEXT: movq %rcx, %rdx 460; SSE-NEXT: movq %rcx, %rsi 461; SSE-NEXT: movq %rcx, %rdi 462; SSE-NEXT: andb $15, %cl 463; SSE-NEXT: movb %cl, -{{[0-9]+}}(%rsp) 464; SSE-NEXT: movd %xmm1, %rcx 465; SSE-NEXT: shrq $56, %rdi 466; SSE-NEXT: andb $15, %dil 467; SSE-NEXT: movb %dil, -{{[0-9]+}}(%rsp) 468; SSE-NEXT: movq %rcx, %r11 469; SSE-NEXT: shrq $48, %rsi 470; SSE-NEXT: andb $15, %sil 471; SSE-NEXT: movb %sil, -{{[0-9]+}}(%rsp) 472; SSE-NEXT: movq %rcx, %r14 473; SSE-NEXT: shrq $40, %rdx 474; SSE-NEXT: andb $15, %dl 475; SSE-NEXT: movb %dl, -{{[0-9]+}}(%rsp) 476; SSE-NEXT: movq %rcx, %rdx 477; SSE-NEXT: shrq $32, %rax 478; SSE-NEXT: andb $15, %al 479; SSE-NEXT: movb %al, -{{[0-9]+}}(%rsp) 480; SSE-NEXT: movq %rcx, %rax 481; SSE-NEXT: shrq $24, %r10 482; SSE-NEXT: andb $15, %r10b 483; SSE-NEXT: movb %r10b, -{{[0-9]+}}(%rsp) 484; SSE-NEXT: movq %rcx, %rdi 485; SSE-NEXT: shrq $16, %r9 486; SSE-NEXT: andb $15, %r9b 487; SSE-NEXT: movb %r9b, -{{[0-9]+}}(%rsp) 488; SSE-NEXT: movq %rcx, %rsi 489; SSE-NEXT: shrq $8, %r8 490; SSE-NEXT: andb $15, %r8b 491; SSE-NEXT: movb %r8b, -{{[0-9]+}}(%rsp) 492; SSE-NEXT: movq %rcx, %rbx 493; SSE-NEXT: movb $0, -{{[0-9]+}}(%rsp) 494; SSE-NEXT: andb $15, %cl 495; SSE-NEXT: movb %cl, -{{[0-9]+}}(%rsp) 496; SSE-NEXT: shrq $56, %rbx 497; SSE-NEXT: andb $15, %bl 498; SSE-NEXT: movb %bl, -{{[0-9]+}}(%rsp) 499; SSE-NEXT: shrq $48, %rsi 500; SSE-NEXT: andb $15, %sil 501; SSE-NEXT: movb %sil, -{{[0-9]+}}(%rsp) 502; SSE-NEXT: shrq $40, %rdi 503; SSE-NEXT: andb $15, %dil 504; SSE-NEXT: movb %dil, -{{[0-9]+}}(%rsp) 505; SSE-NEXT: shrq $32, %rax 506; SSE-NEXT: andb $15, %al 507; SSE-NEXT: movb %al, -{{[0-9]+}}(%rsp) 508; SSE-NEXT: shrq $24, %rdx 509; SSE-NEXT: andb $15, %dl 510; SSE-NEXT: movb %dl, -{{[0-9]+}}(%rsp) 511; SSE-NEXT: shrq $16, %r14 512; SSE-NEXT: andb $15, %r14b 513; SSE-NEXT: movb %r14b, -{{[0-9]+}}(%rsp) 514; SSE-NEXT: shrq $8, %r11 515; SSE-NEXT: andb $15, %r11b 516; SSE-NEXT: movb %r11b, -{{[0-9]+}}(%rsp) 517; SSE-NEXT: movb $0, -{{[0-9]+}}(%rsp) 518; SSE-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 519; SSE-NEXT: movq {{.*#+}} xmm1 = mem[0],zero 520; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 521; SSE-NEXT: popq %rbx 522; SSE-NEXT: popq %r14 523; SSE-NEXT: retq 524; 525; AVX-LABEL: _clearupper16xi8b: 526; AVX: # BB#0: 527; AVX-NEXT: pushq %rbp 528; AVX-NEXT: pushq %r15 529; AVX-NEXT: pushq %r14 530; AVX-NEXT: pushq %r13 531; AVX-NEXT: pushq %r12 532; AVX-NEXT: pushq %rbx 533; AVX-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp) 534; AVX-NEXT: movq -{{[0-9]+}}(%rsp), %rcx 535; AVX-NEXT: movq -{{[0-9]+}}(%rsp), %rdx 536; AVX-NEXT: movq %rcx, %r8 537; AVX-NEXT: movq %rcx, %r9 538; AVX-NEXT: movq %rcx, %r10 539; AVX-NEXT: movq %rcx, %r11 540; AVX-NEXT: movq %rcx, %r14 541; AVX-NEXT: movq %rcx, %r15 542; AVX-NEXT: movq %rdx, %r12 543; AVX-NEXT: movq %rdx, %r13 544; AVX-NEXT: movq %rdx, %rdi 545; AVX-NEXT: movq %rdx, %rax 546; AVX-NEXT: movq %rdx, %rsi 547; AVX-NEXT: movq %rdx, %rbx 548; AVX-NEXT: movq %rdx, %rbp 549; AVX-NEXT: andb $15, %dl 550; AVX-NEXT: movb %dl, -{{[0-9]+}}(%rsp) 551; AVX-NEXT: movq %rcx, %rdx 552; AVX-NEXT: andb $15, %cl 553; AVX-NEXT: movb %cl, -{{[0-9]+}}(%rsp) 554; AVX-NEXT: shrq $56, %rbp 555; AVX-NEXT: andb $15, %bpl 556; AVX-NEXT: movb %bpl, -{{[0-9]+}}(%rsp) 557; AVX-NEXT: shrq $48, %rbx 558; AVX-NEXT: andb $15, %bl 559; AVX-NEXT: movb %bl, -{{[0-9]+}}(%rsp) 560; AVX-NEXT: shrq $40, %rsi 561; AVX-NEXT: andb $15, %sil 562; AVX-NEXT: movb %sil, -{{[0-9]+}}(%rsp) 563; AVX-NEXT: shrq $32, %rax 564; AVX-NEXT: andb $15, %al 565; AVX-NEXT: movb %al, -{{[0-9]+}}(%rsp) 566; AVX-NEXT: shrq $24, %rdi 567; AVX-NEXT: andb $15, %dil 568; AVX-NEXT: movb %dil, -{{[0-9]+}}(%rsp) 569; AVX-NEXT: shrq $16, %r13 570; AVX-NEXT: andb $15, %r13b 571; AVX-NEXT: movb %r13b, -{{[0-9]+}}(%rsp) 572; AVX-NEXT: shrq $8, %r12 573; AVX-NEXT: andb $15, %r12b 574; AVX-NEXT: movb %r12b, -{{[0-9]+}}(%rsp) 575; AVX-NEXT: shrq $56, %rdx 576; AVX-NEXT: andb $15, %dl 577; AVX-NEXT: movb %dl, -{{[0-9]+}}(%rsp) 578; AVX-NEXT: shrq $48, %r15 579; AVX-NEXT: andb $15, %r15b 580; AVX-NEXT: movb %r15b, -{{[0-9]+}}(%rsp) 581; AVX-NEXT: shrq $40, %r14 582; AVX-NEXT: andb $15, %r14b 583; AVX-NEXT: movb %r14b, -{{[0-9]+}}(%rsp) 584; AVX-NEXT: shrq $32, %r11 585; AVX-NEXT: andb $15, %r11b 586; AVX-NEXT: movb %r11b, -{{[0-9]+}}(%rsp) 587; AVX-NEXT: shrq $24, %r10 588; AVX-NEXT: andb $15, %r10b 589; AVX-NEXT: movb %r10b, -{{[0-9]+}}(%rsp) 590; AVX-NEXT: shrq $16, %r9 591; AVX-NEXT: andb $15, %r9b 592; AVX-NEXT: movb %r9b, -{{[0-9]+}}(%rsp) 593; AVX-NEXT: shrq $8, %r8 594; AVX-NEXT: andb $15, %r8b 595; AVX-NEXT: movb %r8b, -{{[0-9]+}}(%rsp) 596; AVX-NEXT: movb $0, -{{[0-9]+}}(%rsp) 597; AVX-NEXT: vmovaps -{{[0-9]+}}(%rsp), %xmm0 598; AVX-NEXT: popq %rbx 599; AVX-NEXT: popq %r12 600; AVX-NEXT: popq %r13 601; AVX-NEXT: popq %r14 602; AVX-NEXT: popq %r15 603; AVX-NEXT: popq %rbp 604; AVX-NEXT: retq 605 %x4 = bitcast <16 x i8> %0 to <32 x i4> 606 %r0 = insertelement <32 x i4> %x4, i4 zeroinitializer, i32 1 607 %r1 = insertelement <32 x i4> %r0, i4 zeroinitializer, i32 3 608 %r2 = insertelement <32 x i4> %r1, i4 zeroinitializer, i32 5 609 %r3 = insertelement <32 x i4> %r2, i4 zeroinitializer, i32 7 610 %r4 = insertelement <32 x i4> %r3, i4 zeroinitializer, i32 9 611 %r5 = insertelement <32 x i4> %r4, i4 zeroinitializer, i32 11 612 %r6 = insertelement <32 x i4> %r5, i4 zeroinitializer, i32 13 613 %r7 = insertelement <32 x i4> %r6, i4 zeroinitializer, i32 15 614 %r8 = insertelement <32 x i4> %r7, i4 zeroinitializer, i32 17 615 %r9 = insertelement <32 x i4> %r8, i4 zeroinitializer, i32 19 616 %r10 = insertelement <32 x i4> %r9, i4 zeroinitializer, i32 21 617 %r11 = insertelement <32 x i4> %r10, i4 zeroinitializer, i32 23 618 %r12 = insertelement <32 x i4> %r11, i4 zeroinitializer, i32 25 619 %r13 = insertelement <32 x i4> %r12, i4 zeroinitializer, i32 27 620 %r14 = insertelement <32 x i4> %r13, i4 zeroinitializer, i32 29 621 %r15 = insertelement <32 x i4> %r14, i4 zeroinitializer, i32 31 622 %r = bitcast <32 x i4> %r15 to <16 x i8> 623 ret <16 x i8> %r 624} 625 626define <2 x i64> @_clearupper2xi64c(<2 x i64>) nounwind { 627; SSE-LABEL: _clearupper2xi64c: 628; SSE: # BB#0: 629; SSE-NEXT: andps {{.*}}(%rip), %xmm0 630; SSE-NEXT: retq 631; 632; AVX1-LABEL: _clearupper2xi64c: 633; AVX1: # BB#0: 634; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 635; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7] 636; AVX1-NEXT: retq 637; 638; AVX2-LABEL: _clearupper2xi64c: 639; AVX2: # BB#0: 640; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1 641; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3] 642; AVX2-NEXT: retq 643 %r = and <2 x i64> <i64 4294967295, i64 4294967295>, %0 644 ret <2 x i64> %r 645} 646 647define <4 x i32> @_clearupper4xi32c(<4 x i32>) nounwind { 648; SSE-LABEL: _clearupper4xi32c: 649; SSE: # BB#0: 650; SSE-NEXT: andps {{.*}}(%rip), %xmm0 651; SSE-NEXT: retq 652; 653; AVX-LABEL: _clearupper4xi32c: 654; AVX: # BB#0: 655; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1 656; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 657; AVX-NEXT: retq 658 %r = and <4 x i32> <i32 65535, i32 65535, i32 65535, i32 65535>, %0 659 ret <4 x i32> %r 660} 661 662define <8 x i16> @_clearupper8xi16c(<8 x i16>) nounwind { 663; SSE-LABEL: _clearupper8xi16c: 664; SSE: # BB#0: 665; SSE-NEXT: andps {{.*}}(%rip), %xmm0 666; SSE-NEXT: retq 667; 668; AVX-LABEL: _clearupper8xi16c: 669; AVX: # BB#0: 670; AVX-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0 671; AVX-NEXT: retq 672 %r = and <8 x i16> <i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255>, %0 673 ret <8 x i16> %r 674} 675 676define <16 x i8> @_clearupper16xi8c(<16 x i8>) nounwind { 677; SSE-LABEL: _clearupper16xi8c: 678; SSE: # BB#0: 679; SSE-NEXT: andps {{.*}}(%rip), %xmm0 680; SSE-NEXT: retq 681; 682; AVX-LABEL: _clearupper16xi8c: 683; AVX: # BB#0: 684; AVX-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0 685; AVX-NEXT: retq 686 %r = and <16 x i8> <i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15>, %0 687 ret <16 x i8> %r 688} 689