1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=SSE --check-prefix=SSE2 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1 4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2 5 6; 7; PR6455 'Clear Upper Bits' Patterns 8; 9 10define <2 x i64> @_clearupper2xi64a(<2 x i64>) nounwind { 11; SSE-LABEL: _clearupper2xi64a: 12; SSE: # BB#0: 13; SSE-NEXT: andps {{.*}}(%rip), %xmm0 14; SSE-NEXT: retq 15; 16; AVX1-LABEL: _clearupper2xi64a: 17; AVX1: # BB#0: 18; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 19; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7] 20; AVX1-NEXT: retq 21; 22; AVX2-LABEL: _clearupper2xi64a: 23; AVX2: # BB#0: 24; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1 25; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3] 26; AVX2-NEXT: retq 27 %x0 = extractelement <2 x i64> %0, i32 0 28 %x1 = extractelement <2 x i64> %0, i32 1 29 %trunc0 = trunc i64 %x0 to i32 30 %trunc1 = trunc i64 %x1 to i32 31 %ext0 = zext i32 %trunc0 to i64 32 %ext1 = zext i32 %trunc1 to i64 33 %v0 = insertelement <2 x i64> undef, i64 %ext0, i32 0 34 %v1 = insertelement <2 x i64> %v0, i64 %ext1, i32 1 35 ret <2 x i64> %v1 36} 37 38define <4 x i64> @_clearupper4xi64a(<4 x i64>) nounwind { 39; SSE-LABEL: _clearupper4xi64a: 40; SSE: # BB#0: 41; SSE-NEXT: movaps {{.*#+}} xmm2 = [4294967295,4294967295] 42; SSE-NEXT: andps %xmm2, %xmm0 43; SSE-NEXT: andps %xmm2, %xmm1 44; SSE-NEXT: retq 45; 46; AVX1-LABEL: _clearupper4xi64a: 47; AVX1: # BB#0: 48; AVX1-NEXT: vxorps %ymm1, %ymm1, %ymm1 49; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] 50; AVX1-NEXT: retq 51; 52; AVX2-LABEL: _clearupper4xi64a: 53; AVX2: # BB#0: 54; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1 55; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] 56; AVX2-NEXT: retq 57 %x0 = extractelement <4 x i64> %0, i32 0 58 %x1 = extractelement <4 x i64> %0, i32 1 59 %x2 = extractelement <4 x i64> %0, i32 2 60 %x3 = extractelement <4 x i64> %0, i32 3 61 %trunc0 = trunc i64 %x0 to i32 62 %trunc1 = trunc i64 %x1 to i32 63 %trunc2 = trunc i64 %x2 to i32 64 %trunc3 = trunc i64 %x3 to i32 65 %ext0 = zext i32 %trunc0 to i64 66 %ext1 = zext i32 %trunc1 to i64 67 %ext2 = zext i32 %trunc2 to i64 68 %ext3 = zext i32 %trunc3 to i64 69 %v0 = insertelement <4 x i64> undef, i64 %ext0, i32 0 70 %v1 = insertelement <4 x i64> %v0, i64 %ext1, i32 1 71 %v2 = insertelement <4 x i64> %v1, i64 %ext2, i32 2 72 %v3 = insertelement <4 x i64> %v2, i64 %ext3, i32 3 73 ret <4 x i64> %v3 74} 75 76define <4 x i32> @_clearupper4xi32a(<4 x i32>) nounwind { 77; SSE-LABEL: _clearupper4xi32a: 78; SSE: # BB#0: 79; SSE-NEXT: andps {{.*}}(%rip), %xmm0 80; SSE-NEXT: retq 81; 82; AVX-LABEL: _clearupper4xi32a: 83; AVX: # BB#0: 84; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1 85; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 86; AVX-NEXT: retq 87 %x0 = extractelement <4 x i32> %0, i32 0 88 %x1 = extractelement <4 x i32> %0, i32 1 89 %x2 = extractelement <4 x i32> %0, i32 2 90 %x3 = extractelement <4 x i32> %0, i32 3 91 %trunc0 = trunc i32 %x0 to i16 92 %trunc1 = trunc i32 %x1 to i16 93 %trunc2 = trunc i32 %x2 to i16 94 %trunc3 = trunc i32 %x3 to i16 95 %ext0 = zext i16 %trunc0 to i32 96 %ext1 = zext i16 %trunc1 to i32 97 %ext2 = zext i16 %trunc2 to i32 98 %ext3 = zext i16 %trunc3 to i32 99 %v0 = insertelement <4 x i32> undef, i32 %ext0, i32 0 100 %v1 = insertelement <4 x i32> %v0, i32 %ext1, i32 1 101 %v2 = insertelement <4 x i32> %v1, i32 %ext2, i32 2 102 %v3 = insertelement <4 x i32> %v2, i32 %ext3, i32 3 103 ret <4 x i32> %v3 104} 105 106define <8 x i32> @_clearupper8xi32a(<8 x i32>) nounwind { 107; SSE-LABEL: _clearupper8xi32a: 108; SSE: # BB#0: 109; SSE-NEXT: movaps {{.*#+}} xmm2 = [65535,65535,65535,65535] 110; SSE-NEXT: andps %xmm2, %xmm0 111; SSE-NEXT: andps %xmm2, %xmm1 112; SSE-NEXT: retq 113; 114; AVX1-LABEL: _clearupper8xi32a: 115; AVX1: # BB#0: 116; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 117; AVX1-NEXT: retq 118; 119; AVX2-LABEL: _clearupper8xi32a: 120; AVX2: # BB#0: 121; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1 122; AVX2-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7],ymm0[8],ymm1[9],ymm0[10],ymm1[11],ymm0[12],ymm1[13],ymm0[14],ymm1[15] 123; AVX2-NEXT: retq 124 %x0 = extractelement <8 x i32> %0, i32 0 125 %x1 = extractelement <8 x i32> %0, i32 1 126 %x2 = extractelement <8 x i32> %0, i32 2 127 %x3 = extractelement <8 x i32> %0, i32 3 128 %x4 = extractelement <8 x i32> %0, i32 4 129 %x5 = extractelement <8 x i32> %0, i32 5 130 %x6 = extractelement <8 x i32> %0, i32 6 131 %x7 = extractelement <8 x i32> %0, i32 7 132 %trunc0 = trunc i32 %x0 to i16 133 %trunc1 = trunc i32 %x1 to i16 134 %trunc2 = trunc i32 %x2 to i16 135 %trunc3 = trunc i32 %x3 to i16 136 %trunc4 = trunc i32 %x4 to i16 137 %trunc5 = trunc i32 %x5 to i16 138 %trunc6 = trunc i32 %x6 to i16 139 %trunc7 = trunc i32 %x7 to i16 140 %ext0 = zext i16 %trunc0 to i32 141 %ext1 = zext i16 %trunc1 to i32 142 %ext2 = zext i16 %trunc2 to i32 143 %ext3 = zext i16 %trunc3 to i32 144 %ext4 = zext i16 %trunc4 to i32 145 %ext5 = zext i16 %trunc5 to i32 146 %ext6 = zext i16 %trunc6 to i32 147 %ext7 = zext i16 %trunc7 to i32 148 %v0 = insertelement <8 x i32> undef, i32 %ext0, i32 0 149 %v1 = insertelement <8 x i32> %v0, i32 %ext1, i32 1 150 %v2 = insertelement <8 x i32> %v1, i32 %ext2, i32 2 151 %v3 = insertelement <8 x i32> %v2, i32 %ext3, i32 3 152 %v4 = insertelement <8 x i32> %v3, i32 %ext4, i32 4 153 %v5 = insertelement <8 x i32> %v4, i32 %ext5, i32 5 154 %v6 = insertelement <8 x i32> %v5, i32 %ext6, i32 6 155 %v7 = insertelement <8 x i32> %v6, i32 %ext7, i32 7 156 ret <8 x i32> %v7 157} 158 159define <8 x i16> @_clearupper8xi16a(<8 x i16>) nounwind { 160; SSE-LABEL: _clearupper8xi16a: 161; SSE: # BB#0: 162; SSE-NEXT: pextrw $1, %xmm0, %eax 163; SSE-NEXT: pextrw $2, %xmm0, %r9d 164; SSE-NEXT: pextrw $3, %xmm0, %edx 165; SSE-NEXT: pextrw $4, %xmm0, %r8d 166; SSE-NEXT: pextrw $5, %xmm0, %edi 167; SSE-NEXT: pextrw $6, %xmm0, %esi 168; SSE-NEXT: pextrw $7, %xmm0, %ecx 169; SSE-NEXT: movd %ecx, %xmm1 170; SSE-NEXT: movd %edx, %xmm2 171; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 172; SSE-NEXT: movd %edi, %xmm1 173; SSE-NEXT: movd %eax, %xmm3 174; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3] 175; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3] 176; SSE-NEXT: movd %esi, %xmm1 177; SSE-NEXT: movd %r9d, %xmm2 178; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 179; SSE-NEXT: movd %r8d, %xmm1 180; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 181; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 182; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3] 183; SSE-NEXT: pand {{.*}}(%rip), %xmm0 184; SSE-NEXT: retq 185; 186; AVX-LABEL: _clearupper8xi16a: 187; AVX: # BB#0: 188; AVX-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0 189; AVX-NEXT: retq 190 %x0 = extractelement <8 x i16> %0, i32 0 191 %x1 = extractelement <8 x i16> %0, i32 1 192 %x2 = extractelement <8 x i16> %0, i32 2 193 %x3 = extractelement <8 x i16> %0, i32 3 194 %x4 = extractelement <8 x i16> %0, i32 4 195 %x5 = extractelement <8 x i16> %0, i32 5 196 %x6 = extractelement <8 x i16> %0, i32 6 197 %x7 = extractelement <8 x i16> %0, i32 7 198 %trunc0 = trunc i16 %x0 to i8 199 %trunc1 = trunc i16 %x1 to i8 200 %trunc2 = trunc i16 %x2 to i8 201 %trunc3 = trunc i16 %x3 to i8 202 %trunc4 = trunc i16 %x4 to i8 203 %trunc5 = trunc i16 %x5 to i8 204 %trunc6 = trunc i16 %x6 to i8 205 %trunc7 = trunc i16 %x7 to i8 206 %ext0 = zext i8 %trunc0 to i16 207 %ext1 = zext i8 %trunc1 to i16 208 %ext2 = zext i8 %trunc2 to i16 209 %ext3 = zext i8 %trunc3 to i16 210 %ext4 = zext i8 %trunc4 to i16 211 %ext5 = zext i8 %trunc5 to i16 212 %ext6 = zext i8 %trunc6 to i16 213 %ext7 = zext i8 %trunc7 to i16 214 %v0 = insertelement <8 x i16> undef, i16 %ext0, i32 0 215 %v1 = insertelement <8 x i16> %v0, i16 %ext1, i32 1 216 %v2 = insertelement <8 x i16> %v1, i16 %ext2, i32 2 217 %v3 = insertelement <8 x i16> %v2, i16 %ext3, i32 3 218 %v4 = insertelement <8 x i16> %v3, i16 %ext4, i32 4 219 %v5 = insertelement <8 x i16> %v4, i16 %ext5, i32 5 220 %v6 = insertelement <8 x i16> %v5, i16 %ext6, i32 6 221 %v7 = insertelement <8 x i16> %v6, i16 %ext7, i32 7 222 ret <8 x i16> %v7 223} 224 225define <16 x i16> @_clearupper16xi16a(<16 x i16>) nounwind { 226; SSE-LABEL: _clearupper16xi16a: 227; SSE: # BB#0: 228; SSE-NEXT: pushq %rbp 229; SSE-NEXT: pushq %r15 230; SSE-NEXT: pushq %r14 231; SSE-NEXT: pushq %r12 232; SSE-NEXT: pushq %rbx 233; SSE-NEXT: pextrw $1, %xmm0, %edi 234; SSE-NEXT: pextrw $2, %xmm0, %eax 235; SSE-NEXT: pextrw $3, %xmm0, %ecx 236; SSE-NEXT: pextrw $4, %xmm0, %edx 237; SSE-NEXT: pextrw $5, %xmm0, %esi 238; SSE-NEXT: pextrw $6, %xmm0, %ebx 239; SSE-NEXT: pextrw $7, %xmm0, %ebp 240; SSE-NEXT: pextrw $1, %xmm1, %r10d 241; SSE-NEXT: pextrw $2, %xmm1, %r9d 242; SSE-NEXT: pextrw $3, %xmm1, %r14d 243; SSE-NEXT: pextrw $4, %xmm1, %r8d 244; SSE-NEXT: pextrw $5, %xmm1, %r15d 245; SSE-NEXT: pextrw $6, %xmm1, %r11d 246; SSE-NEXT: pextrw $7, %xmm1, %r12d 247; SSE-NEXT: movd %ebp, %xmm2 248; SSE-NEXT: movd %ecx, %xmm3 249; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3] 250; SSE-NEXT: movd %esi, %xmm2 251; SSE-NEXT: movd %edi, %xmm4 252; SSE-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3] 253; SSE-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3] 254; SSE-NEXT: movd %ebx, %xmm2 255; SSE-NEXT: movd %eax, %xmm3 256; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3] 257; SSE-NEXT: movd %edx, %xmm2 258; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 259; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3] 260; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3] 261; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 262; SSE-NEXT: pand %xmm2, %xmm0 263; SSE-NEXT: movd %r12d, %xmm3 264; SSE-NEXT: movd %r14d, %xmm4 265; SSE-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3] 266; SSE-NEXT: movd %r15d, %xmm3 267; SSE-NEXT: movd %r10d, %xmm5 268; SSE-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1],xmm5[2],xmm3[2],xmm5[3],xmm3[3] 269; SSE-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3] 270; SSE-NEXT: movd %r11d, %xmm3 271; SSE-NEXT: movd %r9d, %xmm4 272; SSE-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3] 273; SSE-NEXT: movd %r8d, %xmm3 274; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3] 275; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1],xmm1[2],xmm4[2],xmm1[3],xmm4[3] 276; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm5[0],xmm1[1],xmm5[1],xmm1[2],xmm5[2],xmm1[3],xmm5[3] 277; SSE-NEXT: pand %xmm2, %xmm1 278; SSE-NEXT: popq %rbx 279; SSE-NEXT: popq %r12 280; SSE-NEXT: popq %r14 281; SSE-NEXT: popq %r15 282; SSE-NEXT: popq %rbp 283; SSE-NEXT: retq 284; 285; AVX-LABEL: _clearupper16xi16a: 286; AVX: # BB#0: 287; AVX-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 288; AVX-NEXT: retq 289 %x0 = extractelement <16 x i16> %0, i32 0 290 %x1 = extractelement <16 x i16> %0, i32 1 291 %x2 = extractelement <16 x i16> %0, i32 2 292 %x3 = extractelement <16 x i16> %0, i32 3 293 %x4 = extractelement <16 x i16> %0, i32 4 294 %x5 = extractelement <16 x i16> %0, i32 5 295 %x6 = extractelement <16 x i16> %0, i32 6 296 %x7 = extractelement <16 x i16> %0, i32 7 297 %x8 = extractelement <16 x i16> %0, i32 8 298 %x9 = extractelement <16 x i16> %0, i32 9 299 %x10 = extractelement <16 x i16> %0, i32 10 300 %x11 = extractelement <16 x i16> %0, i32 11 301 %x12 = extractelement <16 x i16> %0, i32 12 302 %x13 = extractelement <16 x i16> %0, i32 13 303 %x14 = extractelement <16 x i16> %0, i32 14 304 %x15 = extractelement <16 x i16> %0, i32 15 305 %trunc0 = trunc i16 %x0 to i8 306 %trunc1 = trunc i16 %x1 to i8 307 %trunc2 = trunc i16 %x2 to i8 308 %trunc3 = trunc i16 %x3 to i8 309 %trunc4 = trunc i16 %x4 to i8 310 %trunc5 = trunc i16 %x5 to i8 311 %trunc6 = trunc i16 %x6 to i8 312 %trunc7 = trunc i16 %x7 to i8 313 %trunc8 = trunc i16 %x8 to i8 314 %trunc9 = trunc i16 %x9 to i8 315 %trunc10 = trunc i16 %x10 to i8 316 %trunc11 = trunc i16 %x11 to i8 317 %trunc12 = trunc i16 %x12 to i8 318 %trunc13 = trunc i16 %x13 to i8 319 %trunc14 = trunc i16 %x14 to i8 320 %trunc15 = trunc i16 %x15 to i8 321 %ext0 = zext i8 %trunc0 to i16 322 %ext1 = zext i8 %trunc1 to i16 323 %ext2 = zext i8 %trunc2 to i16 324 %ext3 = zext i8 %trunc3 to i16 325 %ext4 = zext i8 %trunc4 to i16 326 %ext5 = zext i8 %trunc5 to i16 327 %ext6 = zext i8 %trunc6 to i16 328 %ext7 = zext i8 %trunc7 to i16 329 %ext8 = zext i8 %trunc8 to i16 330 %ext9 = zext i8 %trunc9 to i16 331 %ext10 = zext i8 %trunc10 to i16 332 %ext11 = zext i8 %trunc11 to i16 333 %ext12 = zext i8 %trunc12 to i16 334 %ext13 = zext i8 %trunc13 to i16 335 %ext14 = zext i8 %trunc14 to i16 336 %ext15 = zext i8 %trunc15 to i16 337 %v0 = insertelement <16 x i16> undef, i16 %ext0, i32 0 338 %v1 = insertelement <16 x i16> %v0, i16 %ext1, i32 1 339 %v2 = insertelement <16 x i16> %v1, i16 %ext2, i32 2 340 %v3 = insertelement <16 x i16> %v2, i16 %ext3, i32 3 341 %v4 = insertelement <16 x i16> %v3, i16 %ext4, i32 4 342 %v5 = insertelement <16 x i16> %v4, i16 %ext5, i32 5 343 %v6 = insertelement <16 x i16> %v5, i16 %ext6, i32 6 344 %v7 = insertelement <16 x i16> %v6, i16 %ext7, i32 7 345 %v8 = insertelement <16 x i16> %v7, i16 %ext8, i32 8 346 %v9 = insertelement <16 x i16> %v8, i16 %ext9, i32 9 347 %v10 = insertelement <16 x i16> %v9, i16 %ext10, i32 10 348 %v11 = insertelement <16 x i16> %v10, i16 %ext11, i32 11 349 %v12 = insertelement <16 x i16> %v11, i16 %ext12, i32 12 350 %v13 = insertelement <16 x i16> %v12, i16 %ext13, i32 13 351 %v14 = insertelement <16 x i16> %v13, i16 %ext14, i32 14 352 %v15 = insertelement <16 x i16> %v14, i16 %ext15, i32 15 353 ret <16 x i16> %v15 354} 355 356define <16 x i8> @_clearupper16xi8a(<16 x i8>) nounwind { 357; SSE-LABEL: _clearupper16xi8a: 358; SSE: # BB#0: 359; SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) 360; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 361; SSE-NEXT: movd %eax, %xmm0 362; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 363; SSE-NEXT: movd %eax, %xmm1 364; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 365; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 366; SSE-NEXT: movd %eax, %xmm0 367; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 368; SSE-NEXT: movd %eax, %xmm2 369; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 370; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 371; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 372; SSE-NEXT: movd %eax, %xmm0 373; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 374; SSE-NEXT: movd %eax, %xmm3 375; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3],xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7] 376; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 377; SSE-NEXT: movd %eax, %xmm0 378; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 379; SSE-NEXT: movd %eax, %xmm1 380; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 381; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7] 382; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 383; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 384; SSE-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero 385; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 386; SSE-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero 387; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 388; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 389; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7] 390; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 391; SSE-NEXT: movd %eax, %xmm2 392; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 393; SSE-NEXT: movd %eax, %xmm3 394; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 395; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 396; SSE-NEXT: movd %eax, %xmm2 397; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 398; SSE-NEXT: movd %eax, %xmm4 399; SSE-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3],xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7] 400; SSE-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 401; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3],xmm0[4],xmm4[4],xmm0[5],xmm4[5],xmm0[6],xmm4[6],xmm0[7],xmm4[7] 402; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 403; SSE-NEXT: pand {{.*}}(%rip), %xmm0 404; SSE-NEXT: retq 405; 406; AVX-LABEL: _clearupper16xi8a: 407; AVX: # BB#0: 408; AVX-NEXT: vpextrb $0, %xmm0, %eax 409; AVX-NEXT: vpextrb $1, %xmm0, %ecx 410; AVX-NEXT: vmovd %eax, %xmm1 411; AVX-NEXT: vpinsrb $1, %ecx, %xmm1, %xmm1 412; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3,4,5,6,7] 413; AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 414; AVX-NEXT: retq 415 %x0 = extractelement <16 x i8> %0, i32 0 416 %x1 = extractelement <16 x i8> %0, i32 1 417 %x2 = extractelement <16 x i8> %0, i32 2 418 %x3 = extractelement <16 x i8> %0, i32 3 419 %x4 = extractelement <16 x i8> %0, i32 4 420 %x5 = extractelement <16 x i8> %0, i32 5 421 %x6 = extractelement <16 x i8> %0, i32 6 422 %x7 = extractelement <16 x i8> %0, i32 7 423 %x8 = extractelement <16 x i8> %0, i32 8 424 %x9 = extractelement <16 x i8> %0, i32 9 425 %x10 = extractelement <16 x i8> %0, i32 10 426 %x11 = extractelement <16 x i8> %0, i32 11 427 %x12 = extractelement <16 x i8> %0, i32 12 428 %x13 = extractelement <16 x i8> %0, i32 13 429 %x14 = extractelement <16 x i8> %0, i32 14 430 %x15 = extractelement <16 x i8> %0, i32 15 431 %trunc0 = trunc i8 %x0 to i4 432 %trunc1 = trunc i8 %x1 to i4 433 %trunc2 = trunc i8 %x2 to i4 434 %trunc3 = trunc i8 %x3 to i4 435 %trunc4 = trunc i8 %x4 to i4 436 %trunc5 = trunc i8 %x5 to i4 437 %trunc6 = trunc i8 %x6 to i4 438 %trunc7 = trunc i8 %x7 to i4 439 %trunc8 = trunc i8 %x8 to i4 440 %trunc9 = trunc i8 %x9 to i4 441 %trunc10 = trunc i8 %x10 to i4 442 %trunc11 = trunc i8 %x11 to i4 443 %trunc12 = trunc i8 %x12 to i4 444 %trunc13 = trunc i8 %x13 to i4 445 %trunc14 = trunc i8 %x14 to i4 446 %trunc15 = trunc i8 %x15 to i4 447 %ext0 = zext i4 %trunc0 to i8 448 %ext1 = zext i4 %trunc1 to i8 449 %ext2 = zext i4 %trunc2 to i8 450 %ext3 = zext i4 %trunc3 to i8 451 %ext4 = zext i4 %trunc4 to i8 452 %ext5 = zext i4 %trunc5 to i8 453 %ext6 = zext i4 %trunc6 to i8 454 %ext7 = zext i4 %trunc7 to i8 455 %ext8 = zext i4 %trunc8 to i8 456 %ext9 = zext i4 %trunc9 to i8 457 %ext10 = zext i4 %trunc10 to i8 458 %ext11 = zext i4 %trunc11 to i8 459 %ext12 = zext i4 %trunc12 to i8 460 %ext13 = zext i4 %trunc13 to i8 461 %ext14 = zext i4 %trunc14 to i8 462 %ext15 = zext i4 %trunc15 to i8 463 %v0 = insertelement <16 x i8> undef, i8 %ext0, i32 0 464 %v1 = insertelement <16 x i8> %v0, i8 %ext1, i32 1 465 %v2 = insertelement <16 x i8> %v1, i8 %ext2, i32 2 466 %v3 = insertelement <16 x i8> %v2, i8 %ext3, i32 3 467 %v4 = insertelement <16 x i8> %v3, i8 %ext4, i32 4 468 %v5 = insertelement <16 x i8> %v4, i8 %ext5, i32 5 469 %v6 = insertelement <16 x i8> %v5, i8 %ext6, i32 6 470 %v7 = insertelement <16 x i8> %v6, i8 %ext7, i32 7 471 %v8 = insertelement <16 x i8> %v7, i8 %ext8, i32 8 472 %v9 = insertelement <16 x i8> %v8, i8 %ext9, i32 9 473 %v10 = insertelement <16 x i8> %v9, i8 %ext10, i32 10 474 %v11 = insertelement <16 x i8> %v10, i8 %ext11, i32 11 475 %v12 = insertelement <16 x i8> %v11, i8 %ext12, i32 12 476 %v13 = insertelement <16 x i8> %v12, i8 %ext13, i32 13 477 %v14 = insertelement <16 x i8> %v13, i8 %ext14, i32 14 478 %v15 = insertelement <16 x i8> %v14, i8 %ext15, i32 15 479 ret <16 x i8> %v15 480} 481 482define <32 x i8> @_clearupper32xi8a(<32 x i8>) nounwind { 483; SSE-LABEL: _clearupper32xi8a: 484; SSE: # BB#0: 485; SSE-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) 486; SSE-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp) 487; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 488; SSE-NEXT: movd %eax, %xmm0 489; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 490; SSE-NEXT: movd %eax, %xmm1 491; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 492; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 493; SSE-NEXT: movd %eax, %xmm0 494; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 495; SSE-NEXT: movd %eax, %xmm2 496; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 497; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 498; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 499; SSE-NEXT: movd %eax, %xmm0 500; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 501; SSE-NEXT: movd %eax, %xmm3 502; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3],xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7] 503; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 504; SSE-NEXT: movd %eax, %xmm0 505; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 506; SSE-NEXT: movd %eax, %xmm1 507; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 508; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7] 509; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 510; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 511; SSE-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero 512; SSE-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 513; SSE-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero 514; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 515; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 516; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7] 517; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 518; SSE-NEXT: movd %eax, %xmm2 519; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 520; SSE-NEXT: movd %eax, %xmm3 521; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 522; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 523; SSE-NEXT: movd %eax, %xmm2 524; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 525; SSE-NEXT: movd %eax, %xmm4 526; SSE-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3],xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7] 527; SSE-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 528; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3],xmm0[4],xmm4[4],xmm0[5],xmm4[5],xmm0[6],xmm4[6],xmm0[7],xmm4[7] 529; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 530; SSE-NEXT: movdqa {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15] 531; SSE-NEXT: pand %xmm2, %xmm0 532; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 533; SSE-NEXT: movd %eax, %xmm1 534; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 535; SSE-NEXT: movd %eax, %xmm3 536; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7] 537; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 538; SSE-NEXT: movd %eax, %xmm1 539; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 540; SSE-NEXT: movd %eax, %xmm4 541; SSE-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3],xmm4[4],xmm1[4],xmm4[5],xmm1[5],xmm4[6],xmm1[6],xmm4[7],xmm1[7] 542; SSE-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 543; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 544; SSE-NEXT: movd %eax, %xmm1 545; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 546; SSE-NEXT: movd %eax, %xmm5 547; SSE-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm1[0],xmm5[1],xmm1[1],xmm5[2],xmm1[2],xmm5[3],xmm1[3],xmm5[4],xmm1[4],xmm5[5],xmm1[5],xmm5[6],xmm1[6],xmm5[7],xmm1[7] 548; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 549; SSE-NEXT: movd %eax, %xmm1 550; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 551; SSE-NEXT: movd %eax, %xmm3 552; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7] 553; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm5[0],xmm3[1],xmm5[1],xmm3[2],xmm5[2],xmm3[3],xmm5[3],xmm3[4],xmm5[4],xmm3[5],xmm5[5],xmm3[6],xmm5[6],xmm3[7],xmm5[7] 554; SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7] 555; SSE-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 556; SSE-NEXT: movd {{.*#+}} xmm4 = mem[0],zero,zero,zero 557; SSE-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3],xmm4[4],xmm1[4],xmm4[5],xmm1[5],xmm4[6],xmm1[6],xmm4[7],xmm1[7] 558; SSE-NEXT: movd {{.*#+}} xmm5 = mem[0],zero,zero,zero 559; SSE-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 560; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm5[0],xmm1[1],xmm5[1],xmm1[2],xmm5[2],xmm1[3],xmm5[3],xmm1[4],xmm5[4],xmm1[5],xmm5[5],xmm1[6],xmm5[6],xmm1[7],xmm5[7] 561; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1],xmm1[2],xmm4[2],xmm1[3],xmm4[3],xmm1[4],xmm4[4],xmm1[5],xmm4[5],xmm1[6],xmm4[6],xmm1[7],xmm4[7] 562; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 563; SSE-NEXT: movd %eax, %xmm4 564; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 565; SSE-NEXT: movd %eax, %xmm5 566; SSE-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3],xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7] 567; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 568; SSE-NEXT: movd %eax, %xmm4 569; SSE-NEXT: movzbl -{{[0-9]+}}(%rsp), %eax 570; SSE-NEXT: movd %eax, %xmm6 571; SSE-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm4[0],xmm6[1],xmm4[1],xmm6[2],xmm4[2],xmm6[3],xmm4[3],xmm6[4],xmm4[4],xmm6[5],xmm4[5],xmm6[6],xmm4[6],xmm6[7],xmm4[7] 572; SSE-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm5[0],xmm6[1],xmm5[1],xmm6[2],xmm5[2],xmm6[3],xmm5[3],xmm6[4],xmm5[4],xmm6[5],xmm5[5],xmm6[6],xmm5[6],xmm6[7],xmm5[7] 573; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm6[0],xmm1[1],xmm6[1],xmm1[2],xmm6[2],xmm1[3],xmm6[3],xmm1[4],xmm6[4],xmm1[5],xmm6[5],xmm1[6],xmm6[6],xmm1[7],xmm6[7] 574; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7] 575; SSE-NEXT: pand %xmm2, %xmm1 576; SSE-NEXT: retq 577; 578; AVX1-LABEL: _clearupper32xi8a: 579; AVX1: # BB#0: 580; AVX1-NEXT: vpextrb $0, %xmm0, %eax 581; AVX1-NEXT: vpextrb $1, %xmm0, %ecx 582; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 583; AVX1-NEXT: vpextrb $0, %xmm1, %edx 584; AVX1-NEXT: vpextrb $1, %xmm1, %esi 585; AVX1-NEXT: vmovd %edx, %xmm2 586; AVX1-NEXT: vpinsrb $1, %esi, %xmm2, %xmm2 587; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0],xmm1[1,2,3,4,5,6,7] 588; AVX1-NEXT: vmovd %eax, %xmm2 589; AVX1-NEXT: vpinsrb $1, %ecx, %xmm2, %xmm2 590; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0],xmm0[1,2,3,4,5,6,7] 591; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 592; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 593; AVX1-NEXT: retq 594; 595; AVX2-LABEL: _clearupper32xi8a: 596; AVX2: # BB#0: 597; AVX2-NEXT: vpextrb $0, %xmm0, %eax 598; AVX2-NEXT: vpextrb $1, %xmm0, %ecx 599; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 600; AVX2-NEXT: vpextrb $0, %xmm1, %edx 601; AVX2-NEXT: vpextrb $1, %xmm1, %esi 602; AVX2-NEXT: vmovd %edx, %xmm2 603; AVX2-NEXT: vpinsrb $1, %esi, %xmm2, %xmm2 604; AVX2-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0],xmm1[1,2,3,4,5,6,7] 605; AVX2-NEXT: vmovd %eax, %xmm2 606; AVX2-NEXT: vpinsrb $1, %ecx, %xmm2, %xmm2 607; AVX2-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0],xmm0[1,2,3,4,5,6,7] 608; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 609; AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 610; AVX2-NEXT: retq 611 %x0 = extractelement <32 x i8> %0, i32 0 612 %x1 = extractelement <32 x i8> %0, i32 1 613 %x2 = extractelement <32 x i8> %0, i32 2 614 %x3 = extractelement <32 x i8> %0, i32 3 615 %x4 = extractelement <32 x i8> %0, i32 4 616 %x5 = extractelement <32 x i8> %0, i32 5 617 %x6 = extractelement <32 x i8> %0, i32 6 618 %x7 = extractelement <32 x i8> %0, i32 7 619 %x8 = extractelement <32 x i8> %0, i32 8 620 %x9 = extractelement <32 x i8> %0, i32 9 621 %x10 = extractelement <32 x i8> %0, i32 10 622 %x11 = extractelement <32 x i8> %0, i32 11 623 %x12 = extractelement <32 x i8> %0, i32 12 624 %x13 = extractelement <32 x i8> %0, i32 13 625 %x14 = extractelement <32 x i8> %0, i32 14 626 %x15 = extractelement <32 x i8> %0, i32 15 627 %x16 = extractelement <32 x i8> %0, i32 16 628 %x17 = extractelement <32 x i8> %0, i32 17 629 %x18 = extractelement <32 x i8> %0, i32 18 630 %x19 = extractelement <32 x i8> %0, i32 19 631 %x20 = extractelement <32 x i8> %0, i32 20 632 %x21 = extractelement <32 x i8> %0, i32 21 633 %x22 = extractelement <32 x i8> %0, i32 22 634 %x23 = extractelement <32 x i8> %0, i32 23 635 %x24 = extractelement <32 x i8> %0, i32 24 636 %x25 = extractelement <32 x i8> %0, i32 25 637 %x26 = extractelement <32 x i8> %0, i32 26 638 %x27 = extractelement <32 x i8> %0, i32 27 639 %x28 = extractelement <32 x i8> %0, i32 28 640 %x29 = extractelement <32 x i8> %0, i32 29 641 %x30 = extractelement <32 x i8> %0, i32 30 642 %x31 = extractelement <32 x i8> %0, i32 31 643 %trunc0 = trunc i8 %x0 to i4 644 %trunc1 = trunc i8 %x1 to i4 645 %trunc2 = trunc i8 %x2 to i4 646 %trunc3 = trunc i8 %x3 to i4 647 %trunc4 = trunc i8 %x4 to i4 648 %trunc5 = trunc i8 %x5 to i4 649 %trunc6 = trunc i8 %x6 to i4 650 %trunc7 = trunc i8 %x7 to i4 651 %trunc8 = trunc i8 %x8 to i4 652 %trunc9 = trunc i8 %x9 to i4 653 %trunc10 = trunc i8 %x10 to i4 654 %trunc11 = trunc i8 %x11 to i4 655 %trunc12 = trunc i8 %x12 to i4 656 %trunc13 = trunc i8 %x13 to i4 657 %trunc14 = trunc i8 %x14 to i4 658 %trunc15 = trunc i8 %x15 to i4 659 %trunc16 = trunc i8 %x16 to i4 660 %trunc17 = trunc i8 %x17 to i4 661 %trunc18 = trunc i8 %x18 to i4 662 %trunc19 = trunc i8 %x19 to i4 663 %trunc20 = trunc i8 %x20 to i4 664 %trunc21 = trunc i8 %x21 to i4 665 %trunc22 = trunc i8 %x22 to i4 666 %trunc23 = trunc i8 %x23 to i4 667 %trunc24 = trunc i8 %x24 to i4 668 %trunc25 = trunc i8 %x25 to i4 669 %trunc26 = trunc i8 %x26 to i4 670 %trunc27 = trunc i8 %x27 to i4 671 %trunc28 = trunc i8 %x28 to i4 672 %trunc29 = trunc i8 %x29 to i4 673 %trunc30 = trunc i8 %x30 to i4 674 %trunc31 = trunc i8 %x31 to i4 675 %ext0 = zext i4 %trunc0 to i8 676 %ext1 = zext i4 %trunc1 to i8 677 %ext2 = zext i4 %trunc2 to i8 678 %ext3 = zext i4 %trunc3 to i8 679 %ext4 = zext i4 %trunc4 to i8 680 %ext5 = zext i4 %trunc5 to i8 681 %ext6 = zext i4 %trunc6 to i8 682 %ext7 = zext i4 %trunc7 to i8 683 %ext8 = zext i4 %trunc8 to i8 684 %ext9 = zext i4 %trunc9 to i8 685 %ext10 = zext i4 %trunc10 to i8 686 %ext11 = zext i4 %trunc11 to i8 687 %ext12 = zext i4 %trunc12 to i8 688 %ext13 = zext i4 %trunc13 to i8 689 %ext14 = zext i4 %trunc14 to i8 690 %ext15 = zext i4 %trunc15 to i8 691 %ext16 = zext i4 %trunc16 to i8 692 %ext17 = zext i4 %trunc17 to i8 693 %ext18 = zext i4 %trunc18 to i8 694 %ext19 = zext i4 %trunc19 to i8 695 %ext20 = zext i4 %trunc20 to i8 696 %ext21 = zext i4 %trunc21 to i8 697 %ext22 = zext i4 %trunc22 to i8 698 %ext23 = zext i4 %trunc23 to i8 699 %ext24 = zext i4 %trunc24 to i8 700 %ext25 = zext i4 %trunc25 to i8 701 %ext26 = zext i4 %trunc26 to i8 702 %ext27 = zext i4 %trunc27 to i8 703 %ext28 = zext i4 %trunc28 to i8 704 %ext29 = zext i4 %trunc29 to i8 705 %ext30 = zext i4 %trunc30 to i8 706 %ext31 = zext i4 %trunc31 to i8 707 %v0 = insertelement <32 x i8> undef, i8 %ext0, i32 0 708 %v1 = insertelement <32 x i8> %v0, i8 %ext1, i32 1 709 %v2 = insertelement <32 x i8> %v1, i8 %ext2, i32 2 710 %v3 = insertelement <32 x i8> %v2, i8 %ext3, i32 3 711 %v4 = insertelement <32 x i8> %v3, i8 %ext4, i32 4 712 %v5 = insertelement <32 x i8> %v4, i8 %ext5, i32 5 713 %v6 = insertelement <32 x i8> %v5, i8 %ext6, i32 6 714 %v7 = insertelement <32 x i8> %v6, i8 %ext7, i32 7 715 %v8 = insertelement <32 x i8> %v7, i8 %ext8, i32 8 716 %v9 = insertelement <32 x i8> %v8, i8 %ext9, i32 9 717 %v10 = insertelement <32 x i8> %v9, i8 %ext10, i32 10 718 %v11 = insertelement <32 x i8> %v10, i8 %ext11, i32 11 719 %v12 = insertelement <32 x i8> %v11, i8 %ext12, i32 12 720 %v13 = insertelement <32 x i8> %v12, i8 %ext13, i32 13 721 %v14 = insertelement <32 x i8> %v13, i8 %ext14, i32 14 722 %v15 = insertelement <32 x i8> %v14, i8 %ext15, i32 15 723 %v16 = insertelement <32 x i8> %v15, i8 %ext16, i32 16 724 %v17 = insertelement <32 x i8> %v16, i8 %ext17, i32 17 725 %v18 = insertelement <32 x i8> %v17, i8 %ext18, i32 18 726 %v19 = insertelement <32 x i8> %v18, i8 %ext19, i32 19 727 %v20 = insertelement <32 x i8> %v19, i8 %ext20, i32 20 728 %v21 = insertelement <32 x i8> %v20, i8 %ext21, i32 21 729 %v22 = insertelement <32 x i8> %v21, i8 %ext22, i32 22 730 %v23 = insertelement <32 x i8> %v22, i8 %ext23, i32 23 731 %v24 = insertelement <32 x i8> %v23, i8 %ext24, i32 24 732 %v25 = insertelement <32 x i8> %v24, i8 %ext25, i32 25 733 %v26 = insertelement <32 x i8> %v25, i8 %ext26, i32 26 734 %v27 = insertelement <32 x i8> %v26, i8 %ext27, i32 27 735 %v28 = insertelement <32 x i8> %v27, i8 %ext28, i32 28 736 %v29 = insertelement <32 x i8> %v28, i8 %ext29, i32 29 737 %v30 = insertelement <32 x i8> %v29, i8 %ext30, i32 30 738 %v31 = insertelement <32 x i8> %v30, i8 %ext31, i32 31 739 ret <32 x i8> %v31 740} 741 742define <2 x i64> @_clearupper2xi64b(<2 x i64>) nounwind { 743; SSE-LABEL: _clearupper2xi64b: 744; SSE: # BB#0: 745; SSE-NEXT: andps {{.*}}(%rip), %xmm0 746; SSE-NEXT: retq 747; 748; AVX1-LABEL: _clearupper2xi64b: 749; AVX1: # BB#0: 750; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 751; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7] 752; AVX1-NEXT: retq 753; 754; AVX2-LABEL: _clearupper2xi64b: 755; AVX2: # BB#0: 756; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1 757; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3] 758; AVX2-NEXT: retq 759 %x32 = bitcast <2 x i64> %0 to <4 x i32> 760 %r0 = insertelement <4 x i32> %x32, i32 zeroinitializer, i32 1 761 %r1 = insertelement <4 x i32> %r0, i32 zeroinitializer, i32 3 762 %r = bitcast <4 x i32> %r1 to <2 x i64> 763 ret <2 x i64> %r 764} 765 766define <4 x i64> @_clearupper4xi64b(<4 x i64>) nounwind { 767; SSE-LABEL: _clearupper4xi64b: 768; SSE: # BB#0: 769; SSE-NEXT: movaps {{.*#+}} xmm2 = [4294967295,0,4294967295,0] 770; SSE-NEXT: andps %xmm2, %xmm0 771; SSE-NEXT: andps %xmm2, %xmm1 772; SSE-NEXT: retq 773; 774; AVX1-LABEL: _clearupper4xi64b: 775; AVX1: # BB#0: 776; AVX1-NEXT: vxorps %ymm1, %ymm1, %ymm1 777; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] 778; AVX1-NEXT: retq 779; 780; AVX2-LABEL: _clearupper4xi64b: 781; AVX2: # BB#0: 782; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1 783; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] 784; AVX2-NEXT: retq 785 %x32 = bitcast <4 x i64> %0 to <8 x i32> 786 %r0 = insertelement <8 x i32> %x32, i32 zeroinitializer, i32 1 787 %r1 = insertelement <8 x i32> %r0, i32 zeroinitializer, i32 3 788 %r2 = insertelement <8 x i32> %r1, i32 zeroinitializer, i32 5 789 %r3 = insertelement <8 x i32> %r2, i32 zeroinitializer, i32 7 790 %r = bitcast <8 x i32> %r3 to <4 x i64> 791 ret <4 x i64> %r 792} 793 794define <4 x i32> @_clearupper4xi32b(<4 x i32>) nounwind { 795; SSE-LABEL: _clearupper4xi32b: 796; SSE: # BB#0: 797; SSE-NEXT: andps {{.*}}(%rip), %xmm0 798; SSE-NEXT: retq 799; 800; AVX-LABEL: _clearupper4xi32b: 801; AVX: # BB#0: 802; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1 803; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 804; AVX-NEXT: retq 805 %x16 = bitcast <4 x i32> %0 to <8 x i16> 806 %r0 = insertelement <8 x i16> %x16, i16 zeroinitializer, i32 1 807 %r1 = insertelement <8 x i16> %r0, i16 zeroinitializer, i32 3 808 %r2 = insertelement <8 x i16> %r1, i16 zeroinitializer, i32 5 809 %r3 = insertelement <8 x i16> %r2, i16 zeroinitializer, i32 7 810 %r = bitcast <8 x i16> %r3 to <4 x i32> 811 ret <4 x i32> %r 812} 813 814define <8 x i32> @_clearupper8xi32b(<8 x i32>) nounwind { 815; SSE-LABEL: _clearupper8xi32b: 816; SSE: # BB#0: 817; SSE-NEXT: movaps {{.*#+}} xmm2 = [65535,0,65535,0,65535,0,65535,0] 818; SSE-NEXT: andps %xmm2, %xmm0 819; SSE-NEXT: andps %xmm2, %xmm1 820; SSE-NEXT: retq 821; 822; AVX1-LABEL: _clearupper8xi32b: 823; AVX1: # BB#0: 824; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 825; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 826; AVX1-NEXT: vblendps {{.*#+}} ymm2 = ymm2[0,1,2,3],ymm0[4,5,6,7] 827; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 828; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 829; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0 830; AVX1-NEXT: retq 831; 832; AVX2-LABEL: _clearupper8xi32b: 833; AVX2: # BB#0: 834; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1 835; AVX2-NEXT: vpblendw {{.*#+}} xmm2 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 836; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2,3],ymm0[4,5,6,7] 837; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 838; AVX2-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 839; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm2, %ymm0 840; AVX2-NEXT: retq 841 %x16 = bitcast <8 x i32> %0 to <16 x i16> 842 %r0 = insertelement <16 x i16> %x16, i16 zeroinitializer, i32 1 843 %r1 = insertelement <16 x i16> %r0, i16 zeroinitializer, i32 3 844 %r2 = insertelement <16 x i16> %r1, i16 zeroinitializer, i32 5 845 %r3 = insertelement <16 x i16> %r2, i16 zeroinitializer, i32 7 846 %r4 = insertelement <16 x i16> %r3, i16 zeroinitializer, i32 9 847 %r5 = insertelement <16 x i16> %r4, i16 zeroinitializer, i32 11 848 %r6 = insertelement <16 x i16> %r5, i16 zeroinitializer, i32 13 849 %r7 = insertelement <16 x i16> %r6, i16 zeroinitializer, i32 15 850 %r = bitcast <16 x i16> %r7 to <8 x i32> 851 ret <8 x i32> %r 852} 853 854define <8 x i16> @_clearupper8xi16b(<8 x i16>) nounwind { 855; SSE-LABEL: _clearupper8xi16b: 856; SSE: # BB#0: 857; SSE-NEXT: andps {{.*}}(%rip), %xmm0 858; SSE-NEXT: retq 859; 860; AVX-LABEL: _clearupper8xi16b: 861; AVX: # BB#0: 862; AVX-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0 863; AVX-NEXT: retq 864 %x8 = bitcast <8 x i16> %0 to <16 x i8> 865 %r0 = insertelement <16 x i8> %x8, i8 zeroinitializer, i32 1 866 %r1 = insertelement <16 x i8> %r0, i8 zeroinitializer, i32 3 867 %r2 = insertelement <16 x i8> %r1, i8 zeroinitializer, i32 5 868 %r3 = insertelement <16 x i8> %r2, i8 zeroinitializer, i32 7 869 %r4 = insertelement <16 x i8> %r3, i8 zeroinitializer, i32 9 870 %r5 = insertelement <16 x i8> %r4, i8 zeroinitializer, i32 11 871 %r6 = insertelement <16 x i8> %r5, i8 zeroinitializer, i32 13 872 %r7 = insertelement <16 x i8> %r6, i8 zeroinitializer, i32 15 873 %r = bitcast <16 x i8> %r7 to <8 x i16> 874 ret <8 x i16> %r 875} 876 877define <16 x i16> @_clearupper16xi16b(<16 x i16>) nounwind { 878; SSE-LABEL: _clearupper16xi16b: 879; SSE: # BB#0: 880; SSE-NEXT: movaps {{.*#+}} xmm2 = [255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0] 881; SSE-NEXT: andps %xmm2, %xmm0 882; SSE-NEXT: andps %xmm2, %xmm1 883; SSE-NEXT: retq 884; 885; AVX1-LABEL: _clearupper16xi16b: 886; AVX1: # BB#0: 887; AVX1-NEXT: vmovaps {{.*#+}} xmm1 = [255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0] 888; AVX1-NEXT: vandps %xmm1, %xmm0, %xmm2 889; AVX1-NEXT: vblendps {{.*#+}} ymm2 = ymm2[0,1,2,3],ymm0[4,5,6,7] 890; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 891; AVX1-NEXT: vandps %xmm1, %xmm0, %xmm0 892; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0 893; AVX1-NEXT: retq 894; 895; AVX2-LABEL: _clearupper16xi16b: 896; AVX2: # BB#0: 897; AVX2-NEXT: vmovdqa {{.*#+}} xmm1 = [255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0] 898; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm2 899; AVX2-NEXT: vpblendd {{.*#+}} ymm2 = ymm2[0,1,2,3],ymm0[4,5,6,7] 900; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 901; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0 902; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm2, %ymm0 903; AVX2-NEXT: retq 904 %x8 = bitcast <16 x i16> %0 to <32 x i8> 905 %r0 = insertelement <32 x i8> %x8, i8 zeroinitializer, i32 1 906 %r1 = insertelement <32 x i8> %r0, i8 zeroinitializer, i32 3 907 %r2 = insertelement <32 x i8> %r1, i8 zeroinitializer, i32 5 908 %r3 = insertelement <32 x i8> %r2, i8 zeroinitializer, i32 7 909 %r4 = insertelement <32 x i8> %r3, i8 zeroinitializer, i32 9 910 %r5 = insertelement <32 x i8> %r4, i8 zeroinitializer, i32 11 911 %r6 = insertelement <32 x i8> %r5, i8 zeroinitializer, i32 13 912 %r7 = insertelement <32 x i8> %r6, i8 zeroinitializer, i32 15 913 %r8 = insertelement <32 x i8> %r7, i8 zeroinitializer, i32 17 914 %r9 = insertelement <32 x i8> %r8, i8 zeroinitializer, i32 19 915 %r10 = insertelement <32 x i8> %r9, i8 zeroinitializer, i32 21 916 %r11 = insertelement <32 x i8> %r10, i8 zeroinitializer, i32 23 917 %r12 = insertelement <32 x i8> %r11, i8 zeroinitializer, i32 25 918 %r13 = insertelement <32 x i8> %r12, i8 zeroinitializer, i32 27 919 %r14 = insertelement <32 x i8> %r13, i8 zeroinitializer, i32 29 920 %r15 = insertelement <32 x i8> %r14, i8 zeroinitializer, i32 31 921 %r = bitcast <32 x i8> %r15 to <16 x i16> 922 ret <16 x i16> %r 923} 924 925define <16 x i8> @_clearupper16xi8b(<16 x i8>) nounwind { 926; SSE-LABEL: _clearupper16xi8b: 927; SSE: # BB#0: 928; SSE-NEXT: pushq %r14 929; SSE-NEXT: pushq %rbx 930; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 931; SSE-NEXT: movd %xmm0, %rcx 932; SSE-NEXT: movq %rcx, %r8 933; SSE-NEXT: movq %rcx, %r9 934; SSE-NEXT: movq %rcx, %r10 935; SSE-NEXT: movq %rcx, %rax 936; SSE-NEXT: movq %rcx, %rdx 937; SSE-NEXT: movq %rcx, %rsi 938; SSE-NEXT: movq %rcx, %rdi 939; SSE-NEXT: andb $15, %cl 940; SSE-NEXT: movb %cl, -{{[0-9]+}}(%rsp) 941; SSE-NEXT: movd %xmm1, %rcx 942; SSE-NEXT: shrq $56, %rdi 943; SSE-NEXT: andb $15, %dil 944; SSE-NEXT: movb %dil, -{{[0-9]+}}(%rsp) 945; SSE-NEXT: movq %rcx, %r11 946; SSE-NEXT: shrq $48, %rsi 947; SSE-NEXT: andb $15, %sil 948; SSE-NEXT: movb %sil, -{{[0-9]+}}(%rsp) 949; SSE-NEXT: movq %rcx, %r14 950; SSE-NEXT: shrq $40, %rdx 951; SSE-NEXT: andb $15, %dl 952; SSE-NEXT: movb %dl, -{{[0-9]+}}(%rsp) 953; SSE-NEXT: movq %rcx, %rdx 954; SSE-NEXT: shrq $32, %rax 955; SSE-NEXT: andb $15, %al 956; SSE-NEXT: movb %al, -{{[0-9]+}}(%rsp) 957; SSE-NEXT: movq %rcx, %rax 958; SSE-NEXT: shrq $24, %r10 959; SSE-NEXT: andb $15, %r10b 960; SSE-NEXT: movb %r10b, -{{[0-9]+}}(%rsp) 961; SSE-NEXT: movq %rcx, %rdi 962; SSE-NEXT: shrq $16, %r9 963; SSE-NEXT: andb $15, %r9b 964; SSE-NEXT: movb %r9b, -{{[0-9]+}}(%rsp) 965; SSE-NEXT: movq %rcx, %rsi 966; SSE-NEXT: shrq $8, %r8 967; SSE-NEXT: andb $15, %r8b 968; SSE-NEXT: movb %r8b, -{{[0-9]+}}(%rsp) 969; SSE-NEXT: movq %rcx, %rbx 970; SSE-NEXT: movb $0, -{{[0-9]+}}(%rsp) 971; SSE-NEXT: andb $15, %cl 972; SSE-NEXT: movb %cl, -{{[0-9]+}}(%rsp) 973; SSE-NEXT: shrq $56, %rbx 974; SSE-NEXT: andb $15, %bl 975; SSE-NEXT: movb %bl, -{{[0-9]+}}(%rsp) 976; SSE-NEXT: shrq $48, %rsi 977; SSE-NEXT: andb $15, %sil 978; SSE-NEXT: movb %sil, -{{[0-9]+}}(%rsp) 979; SSE-NEXT: shrq $40, %rdi 980; SSE-NEXT: andb $15, %dil 981; SSE-NEXT: movb %dil, -{{[0-9]+}}(%rsp) 982; SSE-NEXT: shrq $32, %rax 983; SSE-NEXT: andb $15, %al 984; SSE-NEXT: movb %al, -{{[0-9]+}}(%rsp) 985; SSE-NEXT: shrq $24, %rdx 986; SSE-NEXT: andb $15, %dl 987; SSE-NEXT: movb %dl, -{{[0-9]+}}(%rsp) 988; SSE-NEXT: shrq $16, %r14 989; SSE-NEXT: andb $15, %r14b 990; SSE-NEXT: movb %r14b, -{{[0-9]+}}(%rsp) 991; SSE-NEXT: shrq $8, %r11 992; SSE-NEXT: andb $15, %r11b 993; SSE-NEXT: movb %r11b, -{{[0-9]+}}(%rsp) 994; SSE-NEXT: movb $0, -{{[0-9]+}}(%rsp) 995; SSE-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 996; SSE-NEXT: movq {{.*#+}} xmm1 = mem[0],zero 997; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 998; SSE-NEXT: popq %rbx 999; SSE-NEXT: popq %r14 1000; SSE-NEXT: retq 1001; 1002; AVX-LABEL: _clearupper16xi8b: 1003; AVX: # BB#0: 1004; AVX-NEXT: pushq %rbp 1005; AVX-NEXT: pushq %r15 1006; AVX-NEXT: pushq %r14 1007; AVX-NEXT: pushq %r13 1008; AVX-NEXT: pushq %r12 1009; AVX-NEXT: pushq %rbx 1010; AVX-NEXT: vmovaps %xmm0, -{{[0-9]+}}(%rsp) 1011; AVX-NEXT: movq -{{[0-9]+}}(%rsp), %rcx 1012; AVX-NEXT: movq -{{[0-9]+}}(%rsp), %rdx 1013; AVX-NEXT: movq %rcx, %r8 1014; AVX-NEXT: movq %rcx, %r9 1015; AVX-NEXT: movq %rcx, %r10 1016; AVX-NEXT: movq %rcx, %r11 1017; AVX-NEXT: movq %rcx, %r14 1018; AVX-NEXT: movq %rcx, %r15 1019; AVX-NEXT: movq %rdx, %r12 1020; AVX-NEXT: movq %rdx, %r13 1021; AVX-NEXT: movq %rdx, %rdi 1022; AVX-NEXT: movq %rdx, %rax 1023; AVX-NEXT: movq %rdx, %rsi 1024; AVX-NEXT: movq %rdx, %rbx 1025; AVX-NEXT: movq %rdx, %rbp 1026; AVX-NEXT: andb $15, %dl 1027; AVX-NEXT: movb %dl, -{{[0-9]+}}(%rsp) 1028; AVX-NEXT: movq %rcx, %rdx 1029; AVX-NEXT: andb $15, %cl 1030; AVX-NEXT: movb %cl, -{{[0-9]+}}(%rsp) 1031; AVX-NEXT: shrq $56, %rbp 1032; AVX-NEXT: andb $15, %bpl 1033; AVX-NEXT: movb %bpl, -{{[0-9]+}}(%rsp) 1034; AVX-NEXT: shrq $48, %rbx 1035; AVX-NEXT: andb $15, %bl 1036; AVX-NEXT: movb %bl, -{{[0-9]+}}(%rsp) 1037; AVX-NEXT: shrq $40, %rsi 1038; AVX-NEXT: andb $15, %sil 1039; AVX-NEXT: movb %sil, -{{[0-9]+}}(%rsp) 1040; AVX-NEXT: shrq $32, %rax 1041; AVX-NEXT: andb $15, %al 1042; AVX-NEXT: movb %al, -{{[0-9]+}}(%rsp) 1043; AVX-NEXT: shrq $24, %rdi 1044; AVX-NEXT: andb $15, %dil 1045; AVX-NEXT: movb %dil, -{{[0-9]+}}(%rsp) 1046; AVX-NEXT: shrq $16, %r13 1047; AVX-NEXT: andb $15, %r13b 1048; AVX-NEXT: movb %r13b, -{{[0-9]+}}(%rsp) 1049; AVX-NEXT: shrq $8, %r12 1050; AVX-NEXT: andb $15, %r12b 1051; AVX-NEXT: movb %r12b, -{{[0-9]+}}(%rsp) 1052; AVX-NEXT: shrq $56, %rdx 1053; AVX-NEXT: andb $15, %dl 1054; AVX-NEXT: movb %dl, -{{[0-9]+}}(%rsp) 1055; AVX-NEXT: shrq $48, %r15 1056; AVX-NEXT: andb $15, %r15b 1057; AVX-NEXT: movb %r15b, -{{[0-9]+}}(%rsp) 1058; AVX-NEXT: shrq $40, %r14 1059; AVX-NEXT: andb $15, %r14b 1060; AVX-NEXT: movb %r14b, -{{[0-9]+}}(%rsp) 1061; AVX-NEXT: shrq $32, %r11 1062; AVX-NEXT: andb $15, %r11b 1063; AVX-NEXT: movb %r11b, -{{[0-9]+}}(%rsp) 1064; AVX-NEXT: shrq $24, %r10 1065; AVX-NEXT: andb $15, %r10b 1066; AVX-NEXT: movb %r10b, -{{[0-9]+}}(%rsp) 1067; AVX-NEXT: shrq $16, %r9 1068; AVX-NEXT: andb $15, %r9b 1069; AVX-NEXT: movb %r9b, -{{[0-9]+}}(%rsp) 1070; AVX-NEXT: shrq $8, %r8 1071; AVX-NEXT: andb $15, %r8b 1072; AVX-NEXT: movb %r8b, -{{[0-9]+}}(%rsp) 1073; AVX-NEXT: movb $0, -{{[0-9]+}}(%rsp) 1074; AVX-NEXT: vmovaps -{{[0-9]+}}(%rsp), %xmm0 1075; AVX-NEXT: popq %rbx 1076; AVX-NEXT: popq %r12 1077; AVX-NEXT: popq %r13 1078; AVX-NEXT: popq %r14 1079; AVX-NEXT: popq %r15 1080; AVX-NEXT: popq %rbp 1081; AVX-NEXT: retq 1082 %x4 = bitcast <16 x i8> %0 to <32 x i4> 1083 %r0 = insertelement <32 x i4> %x4, i4 zeroinitializer, i32 1 1084 %r1 = insertelement <32 x i4> %r0, i4 zeroinitializer, i32 3 1085 %r2 = insertelement <32 x i4> %r1, i4 zeroinitializer, i32 5 1086 %r3 = insertelement <32 x i4> %r2, i4 zeroinitializer, i32 7 1087 %r4 = insertelement <32 x i4> %r3, i4 zeroinitializer, i32 9 1088 %r5 = insertelement <32 x i4> %r4, i4 zeroinitializer, i32 11 1089 %r6 = insertelement <32 x i4> %r5, i4 zeroinitializer, i32 13 1090 %r7 = insertelement <32 x i4> %r6, i4 zeroinitializer, i32 15 1091 %r8 = insertelement <32 x i4> %r7, i4 zeroinitializer, i32 17 1092 %r9 = insertelement <32 x i4> %r8, i4 zeroinitializer, i32 19 1093 %r10 = insertelement <32 x i4> %r9, i4 zeroinitializer, i32 21 1094 %r11 = insertelement <32 x i4> %r10, i4 zeroinitializer, i32 23 1095 %r12 = insertelement <32 x i4> %r11, i4 zeroinitializer, i32 25 1096 %r13 = insertelement <32 x i4> %r12, i4 zeroinitializer, i32 27 1097 %r14 = insertelement <32 x i4> %r13, i4 zeroinitializer, i32 29 1098 %r15 = insertelement <32 x i4> %r14, i4 zeroinitializer, i32 31 1099 %r = bitcast <32 x i4> %r15 to <16 x i8> 1100 ret <16 x i8> %r 1101} 1102 1103define <32 x i8> @_clearupper32xi8b(<32 x i8>) nounwind { 1104; SSE-LABEL: _clearupper32xi8b: 1105; SSE: # BB#0: 1106; SSE-NEXT: pushq %r14 1107; SSE-NEXT: pushq %rbx 1108; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] 1109; SSE-NEXT: movd %xmm0, %rcx 1110; SSE-NEXT: movq %rcx, %r8 1111; SSE-NEXT: movq %rcx, %r9 1112; SSE-NEXT: movq %rcx, %r10 1113; SSE-NEXT: movq %rcx, %rax 1114; SSE-NEXT: movq %rcx, %rdx 1115; SSE-NEXT: movq %rcx, %rsi 1116; SSE-NEXT: movq %rcx, %rdi 1117; SSE-NEXT: andb $15, %cl 1118; SSE-NEXT: movb %cl, -{{[0-9]+}}(%rsp) 1119; SSE-NEXT: movd %xmm2, %rcx 1120; SSE-NEXT: shrq $56, %rdi 1121; SSE-NEXT: andb $15, %dil 1122; SSE-NEXT: movb %dil, -{{[0-9]+}}(%rsp) 1123; SSE-NEXT: movq %rcx, %r11 1124; SSE-NEXT: shrq $48, %rsi 1125; SSE-NEXT: andb $15, %sil 1126; SSE-NEXT: movb %sil, -{{[0-9]+}}(%rsp) 1127; SSE-NEXT: movq %rcx, %r14 1128; SSE-NEXT: shrq $40, %rdx 1129; SSE-NEXT: andb $15, %dl 1130; SSE-NEXT: movb %dl, -{{[0-9]+}}(%rsp) 1131; SSE-NEXT: movq %rcx, %rdx 1132; SSE-NEXT: shrq $32, %rax 1133; SSE-NEXT: andb $15, %al 1134; SSE-NEXT: movb %al, -{{[0-9]+}}(%rsp) 1135; SSE-NEXT: movq %rcx, %rax 1136; SSE-NEXT: shrq $24, %r10 1137; SSE-NEXT: andb $15, %r10b 1138; SSE-NEXT: movb %r10b, -{{[0-9]+}}(%rsp) 1139; SSE-NEXT: movq %rcx, %rdi 1140; SSE-NEXT: shrq $16, %r9 1141; SSE-NEXT: andb $15, %r9b 1142; SSE-NEXT: movb %r9b, -{{[0-9]+}}(%rsp) 1143; SSE-NEXT: movq %rcx, %rsi 1144; SSE-NEXT: shrq $8, %r8 1145; SSE-NEXT: andb $15, %r8b 1146; SSE-NEXT: movb %r8b, -{{[0-9]+}}(%rsp) 1147; SSE-NEXT: movq %rcx, %rbx 1148; SSE-NEXT: movb $0, -{{[0-9]+}}(%rsp) 1149; SSE-NEXT: andb $15, %cl 1150; SSE-NEXT: movb %cl, -{{[0-9]+}}(%rsp) 1151; SSE-NEXT: shrq $56, %rbx 1152; SSE-NEXT: andb $15, %bl 1153; SSE-NEXT: movb %bl, -{{[0-9]+}}(%rsp) 1154; SSE-NEXT: shrq $48, %rsi 1155; SSE-NEXT: andb $15, %sil 1156; SSE-NEXT: movb %sil, -{{[0-9]+}}(%rsp) 1157; SSE-NEXT: shrq $40, %rdi 1158; SSE-NEXT: andb $15, %dil 1159; SSE-NEXT: movb %dil, -{{[0-9]+}}(%rsp) 1160; SSE-NEXT: shrq $32, %rax 1161; SSE-NEXT: andb $15, %al 1162; SSE-NEXT: movb %al, -{{[0-9]+}}(%rsp) 1163; SSE-NEXT: shrq $24, %rdx 1164; SSE-NEXT: andb $15, %dl 1165; SSE-NEXT: movb %dl, -{{[0-9]+}}(%rsp) 1166; SSE-NEXT: shrq $16, %r14 1167; SSE-NEXT: andb $15, %r14b 1168; SSE-NEXT: movb %r14b, -{{[0-9]+}}(%rsp) 1169; SSE-NEXT: shrq $8, %r11 1170; SSE-NEXT: andb $15, %r11b 1171; SSE-NEXT: movb %r11b, -{{[0-9]+}}(%rsp) 1172; SSE-NEXT: movb $0, -{{[0-9]+}}(%rsp) 1173; SSE-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 1174; SSE-NEXT: movq {{.*#+}} xmm2 = mem[0],zero 1175; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 1176; SSE-NEXT: popq %rbx 1177; SSE-NEXT: popq %r14 1178; SSE-NEXT: retq 1179; 1180; AVX1-LABEL: _clearupper32xi8b: 1181; AVX1: # BB#0: 1182; AVX1-NEXT: pushq %r14 1183; AVX1-NEXT: pushq %rbx 1184; AVX1-NEXT: vpextrq $1, %xmm0, -{{[0-9]+}}(%rsp) 1185; AVX1-NEXT: vmovq %xmm0, -{{[0-9]+}}(%rsp) 1186; AVX1-NEXT: movq -{{[0-9]+}}(%rsp), %r14 1187; AVX1-NEXT: vpextrq $1, %xmm0, %rdx 1188; AVX1-NEXT: movq %rdx, %r8 1189; AVX1-NEXT: movq %rdx, %r9 1190; AVX1-NEXT: movq %rdx, %r11 1191; AVX1-NEXT: movq %rdx, %rsi 1192; AVX1-NEXT: movq %rdx, %rdi 1193; AVX1-NEXT: movq %rdx, %rcx 1194; AVX1-NEXT: movq %rdx, %rax 1195; AVX1-NEXT: andb $15, %dl 1196; AVX1-NEXT: movb %dl, -{{[0-9]+}}(%rsp) 1197; AVX1-NEXT: shrq $56, %rax 1198; AVX1-NEXT: andb $15, %al 1199; AVX1-NEXT: movb %al, -{{[0-9]+}}(%rsp) 1200; AVX1-NEXT: movq %r14, %r10 1201; AVX1-NEXT: shrq $48, %rcx 1202; AVX1-NEXT: andb $15, %cl 1203; AVX1-NEXT: movb %cl, -{{[0-9]+}}(%rsp) 1204; AVX1-NEXT: movq %r14, %rdx 1205; AVX1-NEXT: shrq $40, %rdi 1206; AVX1-NEXT: andb $15, %dil 1207; AVX1-NEXT: movb %dil, -{{[0-9]+}}(%rsp) 1208; AVX1-NEXT: movq %r14, %rax 1209; AVX1-NEXT: shrq $32, %rsi 1210; AVX1-NEXT: andb $15, %sil 1211; AVX1-NEXT: movb %sil, -{{[0-9]+}}(%rsp) 1212; AVX1-NEXT: movq %r14, %rcx 1213; AVX1-NEXT: shrq $24, %r11 1214; AVX1-NEXT: andb $15, %r11b 1215; AVX1-NEXT: movb %r11b, -{{[0-9]+}}(%rsp) 1216; AVX1-NEXT: movq %r14, %rsi 1217; AVX1-NEXT: shrq $16, %r9 1218; AVX1-NEXT: andb $15, %r9b 1219; AVX1-NEXT: movb %r9b, -{{[0-9]+}}(%rsp) 1220; AVX1-NEXT: movq %r14, %rdi 1221; AVX1-NEXT: shrq $8, %r8 1222; AVX1-NEXT: andb $15, %r8b 1223; AVX1-NEXT: movb %r8b, -{{[0-9]+}}(%rsp) 1224; AVX1-NEXT: movq %r14, %rbx 1225; AVX1-NEXT: andb $15, %r14b 1226; AVX1-NEXT: movb %r14b, -{{[0-9]+}}(%rsp) 1227; AVX1-NEXT: shrq $8, %r10 1228; AVX1-NEXT: shrq $16, %rdx 1229; AVX1-NEXT: shrq $24, %rax 1230; AVX1-NEXT: shrq $32, %rcx 1231; AVX1-NEXT: shrq $40, %rsi 1232; AVX1-NEXT: shrq $48, %rdi 1233; AVX1-NEXT: shrq $56, %rbx 1234; AVX1-NEXT: andb $15, %bl 1235; AVX1-NEXT: movb %bl, -{{[0-9]+}}(%rsp) 1236; AVX1-NEXT: andb $15, %dil 1237; AVX1-NEXT: movb %dil, -{{[0-9]+}}(%rsp) 1238; AVX1-NEXT: andb $15, %sil 1239; AVX1-NEXT: movb %sil, -{{[0-9]+}}(%rsp) 1240; AVX1-NEXT: andb $15, %cl 1241; AVX1-NEXT: movb %cl, -{{[0-9]+}}(%rsp) 1242; AVX1-NEXT: andb $15, %al 1243; AVX1-NEXT: movb %al, -{{[0-9]+}}(%rsp) 1244; AVX1-NEXT: andb $15, %dl 1245; AVX1-NEXT: movb %dl, -{{[0-9]+}}(%rsp) 1246; AVX1-NEXT: andb $15, %r10b 1247; AVX1-NEXT: movb %r10b, -{{[0-9]+}}(%rsp) 1248; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1249; AVX1-NEXT: vmovq %xmm0, %rax 1250; AVX1-NEXT: movq %rax, %r8 1251; AVX1-NEXT: movq %rax, %rdx 1252; AVX1-NEXT: movq %rax, %rsi 1253; AVX1-NEXT: movq %rax, %rdi 1254; AVX1-NEXT: movl %eax, %ebx 1255; AVX1-NEXT: movl %eax, %ecx 1256; AVX1-NEXT: vmovd %eax, %xmm1 1257; AVX1-NEXT: shrl $8, %eax 1258; AVX1-NEXT: vpinsrb $1, %eax, %xmm1, %xmm1 1259; AVX1-NEXT: shrl $16, %ecx 1260; AVX1-NEXT: vpinsrb $2, %ecx, %xmm1, %xmm1 1261; AVX1-NEXT: shrl $24, %ebx 1262; AVX1-NEXT: vpinsrb $3, %ebx, %xmm1, %xmm1 1263; AVX1-NEXT: shrq $32, %rdi 1264; AVX1-NEXT: vpinsrb $4, %edi, %xmm1, %xmm1 1265; AVX1-NEXT: shrq $40, %rsi 1266; AVX1-NEXT: vpinsrb $5, %esi, %xmm1, %xmm1 1267; AVX1-NEXT: movb $0, -{{[0-9]+}}(%rsp) 1268; AVX1-NEXT: vmovdqa -{{[0-9]+}}(%rsp), %xmm2 1269; AVX1-NEXT: shrq $48, %rdx 1270; AVX1-NEXT: vpinsrb $6, %edx, %xmm1, %xmm1 1271; AVX1-NEXT: vpextrq $1, %xmm0, %rax 1272; AVX1-NEXT: shrq $56, %r8 1273; AVX1-NEXT: vpinsrb $7, %r8d, %xmm1, %xmm0 1274; AVX1-NEXT: movl %eax, %ecx 1275; AVX1-NEXT: shrl $8, %ecx 1276; AVX1-NEXT: vpinsrb $8, %eax, %xmm0, %xmm0 1277; AVX1-NEXT: vpinsrb $9, %ecx, %xmm0, %xmm0 1278; AVX1-NEXT: movl %eax, %ecx 1279; AVX1-NEXT: shrl $16, %ecx 1280; AVX1-NEXT: vpinsrb $10, %ecx, %xmm0, %xmm0 1281; AVX1-NEXT: movl %eax, %ecx 1282; AVX1-NEXT: shrl $24, %ecx 1283; AVX1-NEXT: vpinsrb $11, %ecx, %xmm0, %xmm0 1284; AVX1-NEXT: movq %rax, %rcx 1285; AVX1-NEXT: shrq $32, %rcx 1286; AVX1-NEXT: vpinsrb $12, %ecx, %xmm0, %xmm0 1287; AVX1-NEXT: movq %rax, %rcx 1288; AVX1-NEXT: shrq $40, %rcx 1289; AVX1-NEXT: vpinsrb $13, %ecx, %xmm0, %xmm0 1290; AVX1-NEXT: movq %rax, %rcx 1291; AVX1-NEXT: shrq $48, %rcx 1292; AVX1-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0 1293; AVX1-NEXT: vmovq %xmm2, %rcx 1294; AVX1-NEXT: shrq $56, %rax 1295; AVX1-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0 1296; AVX1-NEXT: movl %ecx, %eax 1297; AVX1-NEXT: shrl $8, %eax 1298; AVX1-NEXT: vmovd %ecx, %xmm1 1299; AVX1-NEXT: vpinsrb $1, %eax, %xmm1, %xmm1 1300; AVX1-NEXT: movl %ecx, %eax 1301; AVX1-NEXT: shrl $16, %eax 1302; AVX1-NEXT: vpinsrb $2, %eax, %xmm1, %xmm1 1303; AVX1-NEXT: movl %ecx, %eax 1304; AVX1-NEXT: shrl $24, %eax 1305; AVX1-NEXT: vpinsrb $3, %eax, %xmm1, %xmm1 1306; AVX1-NEXT: movq %rcx, %rax 1307; AVX1-NEXT: shrq $32, %rax 1308; AVX1-NEXT: vpinsrb $4, %eax, %xmm1, %xmm1 1309; AVX1-NEXT: movq %rcx, %rax 1310; AVX1-NEXT: shrq $40, %rax 1311; AVX1-NEXT: vpinsrb $5, %eax, %xmm1, %xmm1 1312; AVX1-NEXT: movq %rcx, %rax 1313; AVX1-NEXT: shrq $48, %rax 1314; AVX1-NEXT: vpinsrb $6, %eax, %xmm1, %xmm1 1315; AVX1-NEXT: vpextrq $1, %xmm2, %rax 1316; AVX1-NEXT: shrq $56, %rcx 1317; AVX1-NEXT: vpinsrb $7, %ecx, %xmm1, %xmm1 1318; AVX1-NEXT: movl %eax, %ecx 1319; AVX1-NEXT: shrl $8, %ecx 1320; AVX1-NEXT: vpinsrb $8, %eax, %xmm1, %xmm1 1321; AVX1-NEXT: vpinsrb $9, %ecx, %xmm1, %xmm1 1322; AVX1-NEXT: movl %eax, %ecx 1323; AVX1-NEXT: shrl $16, %ecx 1324; AVX1-NEXT: vpinsrb $10, %ecx, %xmm1, %xmm1 1325; AVX1-NEXT: movl %eax, %ecx 1326; AVX1-NEXT: shrl $24, %ecx 1327; AVX1-NEXT: vpinsrb $11, %ecx, %xmm1, %xmm1 1328; AVX1-NEXT: movq %rax, %rcx 1329; AVX1-NEXT: shrq $32, %rcx 1330; AVX1-NEXT: vpinsrb $12, %ecx, %xmm1, %xmm1 1331; AVX1-NEXT: movq %rax, %rcx 1332; AVX1-NEXT: shrq $40, %rcx 1333; AVX1-NEXT: vpinsrb $13, %ecx, %xmm1, %xmm1 1334; AVX1-NEXT: movq %rax, %rcx 1335; AVX1-NEXT: shrq $48, %rcx 1336; AVX1-NEXT: vpinsrb $14, %ecx, %xmm1, %xmm1 1337; AVX1-NEXT: shrq $56, %rax 1338; AVX1-NEXT: vpinsrb $15, %eax, %xmm1, %xmm1 1339; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 1340; AVX1-NEXT: popq %rbx 1341; AVX1-NEXT: popq %r14 1342; AVX1-NEXT: retq 1343; 1344; AVX2-LABEL: _clearupper32xi8b: 1345; AVX2: # BB#0: 1346; AVX2-NEXT: pushq %r14 1347; AVX2-NEXT: pushq %rbx 1348; AVX2-NEXT: vpextrq $1, %xmm0, -{{[0-9]+}}(%rsp) 1349; AVX2-NEXT: vmovq %xmm0, -{{[0-9]+}}(%rsp) 1350; AVX2-NEXT: movq -{{[0-9]+}}(%rsp), %r14 1351; AVX2-NEXT: vpextrq $1, %xmm0, %rdx 1352; AVX2-NEXT: movq %rdx, %r8 1353; AVX2-NEXT: movq %rdx, %r9 1354; AVX2-NEXT: movq %rdx, %r11 1355; AVX2-NEXT: movq %rdx, %rsi 1356; AVX2-NEXT: movq %rdx, %rdi 1357; AVX2-NEXT: movq %rdx, %rcx 1358; AVX2-NEXT: movq %rdx, %rax 1359; AVX2-NEXT: andb $15, %dl 1360; AVX2-NEXT: movb %dl, -{{[0-9]+}}(%rsp) 1361; AVX2-NEXT: shrq $56, %rax 1362; AVX2-NEXT: andb $15, %al 1363; AVX2-NEXT: movb %al, -{{[0-9]+}}(%rsp) 1364; AVX2-NEXT: movq %r14, %r10 1365; AVX2-NEXT: shrq $48, %rcx 1366; AVX2-NEXT: andb $15, %cl 1367; AVX2-NEXT: movb %cl, -{{[0-9]+}}(%rsp) 1368; AVX2-NEXT: movq %r14, %rdx 1369; AVX2-NEXT: shrq $40, %rdi 1370; AVX2-NEXT: andb $15, %dil 1371; AVX2-NEXT: movb %dil, -{{[0-9]+}}(%rsp) 1372; AVX2-NEXT: movq %r14, %rax 1373; AVX2-NEXT: shrq $32, %rsi 1374; AVX2-NEXT: andb $15, %sil 1375; AVX2-NEXT: movb %sil, -{{[0-9]+}}(%rsp) 1376; AVX2-NEXT: movq %r14, %rcx 1377; AVX2-NEXT: shrq $24, %r11 1378; AVX2-NEXT: andb $15, %r11b 1379; AVX2-NEXT: movb %r11b, -{{[0-9]+}}(%rsp) 1380; AVX2-NEXT: movq %r14, %rsi 1381; AVX2-NEXT: shrq $16, %r9 1382; AVX2-NEXT: andb $15, %r9b 1383; AVX2-NEXT: movb %r9b, -{{[0-9]+}}(%rsp) 1384; AVX2-NEXT: movq %r14, %rdi 1385; AVX2-NEXT: shrq $8, %r8 1386; AVX2-NEXT: andb $15, %r8b 1387; AVX2-NEXT: movb %r8b, -{{[0-9]+}}(%rsp) 1388; AVX2-NEXT: movq %r14, %rbx 1389; AVX2-NEXT: andb $15, %r14b 1390; AVX2-NEXT: movb %r14b, -{{[0-9]+}}(%rsp) 1391; AVX2-NEXT: shrq $8, %r10 1392; AVX2-NEXT: shrq $16, %rdx 1393; AVX2-NEXT: shrq $24, %rax 1394; AVX2-NEXT: shrq $32, %rcx 1395; AVX2-NEXT: shrq $40, %rsi 1396; AVX2-NEXT: shrq $48, %rdi 1397; AVX2-NEXT: shrq $56, %rbx 1398; AVX2-NEXT: andb $15, %bl 1399; AVX2-NEXT: movb %bl, -{{[0-9]+}}(%rsp) 1400; AVX2-NEXT: andb $15, %dil 1401; AVX2-NEXT: movb %dil, -{{[0-9]+}}(%rsp) 1402; AVX2-NEXT: andb $15, %sil 1403; AVX2-NEXT: movb %sil, -{{[0-9]+}}(%rsp) 1404; AVX2-NEXT: andb $15, %cl 1405; AVX2-NEXT: movb %cl, -{{[0-9]+}}(%rsp) 1406; AVX2-NEXT: andb $15, %al 1407; AVX2-NEXT: movb %al, -{{[0-9]+}}(%rsp) 1408; AVX2-NEXT: andb $15, %dl 1409; AVX2-NEXT: movb %dl, -{{[0-9]+}}(%rsp) 1410; AVX2-NEXT: andb $15, %r10b 1411; AVX2-NEXT: movb %r10b, -{{[0-9]+}}(%rsp) 1412; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 1413; AVX2-NEXT: vmovq %xmm0, %rax 1414; AVX2-NEXT: movq %rax, %r8 1415; AVX2-NEXT: movq %rax, %rdx 1416; AVX2-NEXT: movq %rax, %rsi 1417; AVX2-NEXT: movq %rax, %rdi 1418; AVX2-NEXT: movl %eax, %ebx 1419; AVX2-NEXT: movl %eax, %ecx 1420; AVX2-NEXT: vmovd %eax, %xmm1 1421; AVX2-NEXT: shrl $8, %eax 1422; AVX2-NEXT: vpinsrb $1, %eax, %xmm1, %xmm1 1423; AVX2-NEXT: shrl $16, %ecx 1424; AVX2-NEXT: vpinsrb $2, %ecx, %xmm1, %xmm1 1425; AVX2-NEXT: shrl $24, %ebx 1426; AVX2-NEXT: vpinsrb $3, %ebx, %xmm1, %xmm1 1427; AVX2-NEXT: shrq $32, %rdi 1428; AVX2-NEXT: vpinsrb $4, %edi, %xmm1, %xmm1 1429; AVX2-NEXT: shrq $40, %rsi 1430; AVX2-NEXT: vpinsrb $5, %esi, %xmm1, %xmm1 1431; AVX2-NEXT: movb $0, -{{[0-9]+}}(%rsp) 1432; AVX2-NEXT: vmovdqa -{{[0-9]+}}(%rsp), %xmm2 1433; AVX2-NEXT: shrq $48, %rdx 1434; AVX2-NEXT: vpinsrb $6, %edx, %xmm1, %xmm1 1435; AVX2-NEXT: vpextrq $1, %xmm0, %rax 1436; AVX2-NEXT: shrq $56, %r8 1437; AVX2-NEXT: vpinsrb $7, %r8d, %xmm1, %xmm0 1438; AVX2-NEXT: movl %eax, %ecx 1439; AVX2-NEXT: shrl $8, %ecx 1440; AVX2-NEXT: vpinsrb $8, %eax, %xmm0, %xmm0 1441; AVX2-NEXT: vpinsrb $9, %ecx, %xmm0, %xmm0 1442; AVX2-NEXT: movl %eax, %ecx 1443; AVX2-NEXT: shrl $16, %ecx 1444; AVX2-NEXT: vpinsrb $10, %ecx, %xmm0, %xmm0 1445; AVX2-NEXT: movl %eax, %ecx 1446; AVX2-NEXT: shrl $24, %ecx 1447; AVX2-NEXT: vpinsrb $11, %ecx, %xmm0, %xmm0 1448; AVX2-NEXT: movq %rax, %rcx 1449; AVX2-NEXT: shrq $32, %rcx 1450; AVX2-NEXT: vpinsrb $12, %ecx, %xmm0, %xmm0 1451; AVX2-NEXT: movq %rax, %rcx 1452; AVX2-NEXT: shrq $40, %rcx 1453; AVX2-NEXT: vpinsrb $13, %ecx, %xmm0, %xmm0 1454; AVX2-NEXT: movq %rax, %rcx 1455; AVX2-NEXT: shrq $48, %rcx 1456; AVX2-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0 1457; AVX2-NEXT: vmovq %xmm2, %rcx 1458; AVX2-NEXT: shrq $56, %rax 1459; AVX2-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0 1460; AVX2-NEXT: movl %ecx, %eax 1461; AVX2-NEXT: shrl $8, %eax 1462; AVX2-NEXT: vmovd %ecx, %xmm1 1463; AVX2-NEXT: vpinsrb $1, %eax, %xmm1, %xmm1 1464; AVX2-NEXT: movl %ecx, %eax 1465; AVX2-NEXT: shrl $16, %eax 1466; AVX2-NEXT: vpinsrb $2, %eax, %xmm1, %xmm1 1467; AVX2-NEXT: movl %ecx, %eax 1468; AVX2-NEXT: shrl $24, %eax 1469; AVX2-NEXT: vpinsrb $3, %eax, %xmm1, %xmm1 1470; AVX2-NEXT: movq %rcx, %rax 1471; AVX2-NEXT: shrq $32, %rax 1472; AVX2-NEXT: vpinsrb $4, %eax, %xmm1, %xmm1 1473; AVX2-NEXT: movq %rcx, %rax 1474; AVX2-NEXT: shrq $40, %rax 1475; AVX2-NEXT: vpinsrb $5, %eax, %xmm1, %xmm1 1476; AVX2-NEXT: movq %rcx, %rax 1477; AVX2-NEXT: shrq $48, %rax 1478; AVX2-NEXT: vpinsrb $6, %eax, %xmm1, %xmm1 1479; AVX2-NEXT: vpextrq $1, %xmm2, %rax 1480; AVX2-NEXT: shrq $56, %rcx 1481; AVX2-NEXT: vpinsrb $7, %ecx, %xmm1, %xmm1 1482; AVX2-NEXT: movl %eax, %ecx 1483; AVX2-NEXT: shrl $8, %ecx 1484; AVX2-NEXT: vpinsrb $8, %eax, %xmm1, %xmm1 1485; AVX2-NEXT: vpinsrb $9, %ecx, %xmm1, %xmm1 1486; AVX2-NEXT: movl %eax, %ecx 1487; AVX2-NEXT: shrl $16, %ecx 1488; AVX2-NEXT: vpinsrb $10, %ecx, %xmm1, %xmm1 1489; AVX2-NEXT: movl %eax, %ecx 1490; AVX2-NEXT: shrl $24, %ecx 1491; AVX2-NEXT: vpinsrb $11, %ecx, %xmm1, %xmm1 1492; AVX2-NEXT: movq %rax, %rcx 1493; AVX2-NEXT: shrq $32, %rcx 1494; AVX2-NEXT: vpinsrb $12, %ecx, %xmm1, %xmm1 1495; AVX2-NEXT: movq %rax, %rcx 1496; AVX2-NEXT: shrq $40, %rcx 1497; AVX2-NEXT: vpinsrb $13, %ecx, %xmm1, %xmm1 1498; AVX2-NEXT: movq %rax, %rcx 1499; AVX2-NEXT: shrq $48, %rcx 1500; AVX2-NEXT: vpinsrb $14, %ecx, %xmm1, %xmm1 1501; AVX2-NEXT: shrq $56, %rax 1502; AVX2-NEXT: vpinsrb $15, %eax, %xmm1, %xmm1 1503; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0 1504; AVX2-NEXT: popq %rbx 1505; AVX2-NEXT: popq %r14 1506; AVX2-NEXT: retq 1507 %x4 = bitcast <32 x i8> %0 to <64 x i4> 1508 %r0 = insertelement <64 x i4> %x4, i4 zeroinitializer, i32 1 1509 %r1 = insertelement <64 x i4> %r0, i4 zeroinitializer, i32 3 1510 %r2 = insertelement <64 x i4> %r1, i4 zeroinitializer, i32 5 1511 %r3 = insertelement <64 x i4> %r2, i4 zeroinitializer, i32 7 1512 %r4 = insertelement <64 x i4> %r3, i4 zeroinitializer, i32 9 1513 %r5 = insertelement <64 x i4> %r4, i4 zeroinitializer, i32 11 1514 %r6 = insertelement <64 x i4> %r5, i4 zeroinitializer, i32 13 1515 %r7 = insertelement <64 x i4> %r6, i4 zeroinitializer, i32 15 1516 %r8 = insertelement <64 x i4> %r7, i4 zeroinitializer, i32 17 1517 %r9 = insertelement <64 x i4> %r8, i4 zeroinitializer, i32 19 1518 %r10 = insertelement <64 x i4> %r9, i4 zeroinitializer, i32 21 1519 %r11 = insertelement <64 x i4> %r10, i4 zeroinitializer, i32 23 1520 %r12 = insertelement <64 x i4> %r11, i4 zeroinitializer, i32 25 1521 %r13 = insertelement <64 x i4> %r12, i4 zeroinitializer, i32 27 1522 %r14 = insertelement <64 x i4> %r13, i4 zeroinitializer, i32 29 1523 %r15 = insertelement <64 x i4> %r14, i4 zeroinitializer, i32 31 1524 %r16 = insertelement <64 x i4> %r15, i4 zeroinitializer, i32 33 1525 %r17 = insertelement <64 x i4> %r16, i4 zeroinitializer, i32 35 1526 %r18 = insertelement <64 x i4> %r17, i4 zeroinitializer, i32 37 1527 %r19 = insertelement <64 x i4> %r18, i4 zeroinitializer, i32 39 1528 %r20 = insertelement <64 x i4> %r19, i4 zeroinitializer, i32 41 1529 %r21 = insertelement <64 x i4> %r20, i4 zeroinitializer, i32 43 1530 %r22 = insertelement <64 x i4> %r21, i4 zeroinitializer, i32 45 1531 %r23 = insertelement <64 x i4> %r22, i4 zeroinitializer, i32 47 1532 %r24 = insertelement <64 x i4> %r23, i4 zeroinitializer, i32 49 1533 %r25 = insertelement <64 x i4> %r24, i4 zeroinitializer, i32 51 1534 %r26 = insertelement <64 x i4> %r25, i4 zeroinitializer, i32 53 1535 %r27 = insertelement <64 x i4> %r26, i4 zeroinitializer, i32 55 1536 %r28 = insertelement <64 x i4> %r27, i4 zeroinitializer, i32 57 1537 %r29 = insertelement <64 x i4> %r28, i4 zeroinitializer, i32 59 1538 %r30 = insertelement <64 x i4> %r29, i4 zeroinitializer, i32 61 1539 %r31 = insertelement <64 x i4> %r30, i4 zeroinitializer, i32 63 1540 %r = bitcast <64 x i4> %r15 to <32 x i8> 1541 ret <32 x i8> %r 1542} 1543 1544define <2 x i64> @_clearupper2xi64c(<2 x i64>) nounwind { 1545; SSE-LABEL: _clearupper2xi64c: 1546; SSE: # BB#0: 1547; SSE-NEXT: andps {{.*}}(%rip), %xmm0 1548; SSE-NEXT: retq 1549; 1550; AVX1-LABEL: _clearupper2xi64c: 1551; AVX1: # BB#0: 1552; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 1553; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7] 1554; AVX1-NEXT: retq 1555; 1556; AVX2-LABEL: _clearupper2xi64c: 1557; AVX2: # BB#0: 1558; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1 1559; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3] 1560; AVX2-NEXT: retq 1561 %r = and <2 x i64> <i64 4294967295, i64 4294967295>, %0 1562 ret <2 x i64> %r 1563} 1564 1565define <4 x i64> @_clearupper4xi64c(<4 x i64>) nounwind { 1566; SSE-LABEL: _clearupper4xi64c: 1567; SSE: # BB#0: 1568; SSE-NEXT: movaps {{.*#+}} xmm2 = [4294967295,0,4294967295,0] 1569; SSE-NEXT: andps %xmm2, %xmm0 1570; SSE-NEXT: andps %xmm2, %xmm1 1571; SSE-NEXT: retq 1572; 1573; AVX1-LABEL: _clearupper4xi64c: 1574; AVX1: # BB#0: 1575; AVX1-NEXT: vxorps %ymm1, %ymm1, %ymm1 1576; AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] 1577; AVX1-NEXT: retq 1578; 1579; AVX2-LABEL: _clearupper4xi64c: 1580; AVX2: # BB#0: 1581; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1 1582; AVX2-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7] 1583; AVX2-NEXT: retq 1584 %r = and <4 x i64> <i64 4294967295, i64 4294967295, i64 4294967295, i64 4294967295>, %0 1585 ret <4 x i64> %r 1586} 1587 1588define <4 x i32> @_clearupper4xi32c(<4 x i32>) nounwind { 1589; SSE-LABEL: _clearupper4xi32c: 1590; SSE: # BB#0: 1591; SSE-NEXT: andps {{.*}}(%rip), %xmm0 1592; SSE-NEXT: retq 1593; 1594; AVX-LABEL: _clearupper4xi32c: 1595; AVX: # BB#0: 1596; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1 1597; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 1598; AVX-NEXT: retq 1599 %r = and <4 x i32> <i32 65535, i32 65535, i32 65535, i32 65535>, %0 1600 ret <4 x i32> %r 1601} 1602 1603define <8 x i32> @_clearupper8xi32c(<8 x i32>) nounwind { 1604; SSE-LABEL: _clearupper8xi32c: 1605; SSE: # BB#0: 1606; SSE-NEXT: movaps {{.*#+}} xmm2 = [65535,0,65535,0,65535,0,65535,0] 1607; SSE-NEXT: andps %xmm2, %xmm0 1608; SSE-NEXT: andps %xmm2, %xmm1 1609; SSE-NEXT: retq 1610; 1611; AVX1-LABEL: _clearupper8xi32c: 1612; AVX1: # BB#0: 1613; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 1614; AVX1-NEXT: retq 1615; 1616; AVX2-LABEL: _clearupper8xi32c: 1617; AVX2: # BB#0: 1618; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1 1619; AVX2-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7],ymm0[8],ymm1[9],ymm0[10],ymm1[11],ymm0[12],ymm1[13],ymm0[14],ymm1[15] 1620; AVX2-NEXT: retq 1621 %r = and <8 x i32> <i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535>, %0 1622 ret <8 x i32> %r 1623} 1624 1625define <8 x i16> @_clearupper8xi16c(<8 x i16>) nounwind { 1626; SSE-LABEL: _clearupper8xi16c: 1627; SSE: # BB#0: 1628; SSE-NEXT: andps {{.*}}(%rip), %xmm0 1629; SSE-NEXT: retq 1630; 1631; AVX-LABEL: _clearupper8xi16c: 1632; AVX: # BB#0: 1633; AVX-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0 1634; AVX-NEXT: retq 1635 %r = and <8 x i16> <i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255>, %0 1636 ret <8 x i16> %r 1637} 1638 1639define <16 x i16> @_clearupper16xi16c(<16 x i16>) nounwind { 1640; SSE-LABEL: _clearupper16xi16c: 1641; SSE: # BB#0: 1642; SSE-NEXT: movaps {{.*#+}} xmm2 = [255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0] 1643; SSE-NEXT: andps %xmm2, %xmm0 1644; SSE-NEXT: andps %xmm2, %xmm1 1645; SSE-NEXT: retq 1646; 1647; AVX-LABEL: _clearupper16xi16c: 1648; AVX: # BB#0: 1649; AVX-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 1650; AVX-NEXT: retq 1651 %r = and <16 x i16> <i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255, i16 255>, %0 1652 ret <16 x i16> %r 1653} 1654 1655define <16 x i8> @_clearupper16xi8c(<16 x i8>) nounwind { 1656; SSE-LABEL: _clearupper16xi8c: 1657; SSE: # BB#0: 1658; SSE-NEXT: andps {{.*}}(%rip), %xmm0 1659; SSE-NEXT: retq 1660; 1661; AVX-LABEL: _clearupper16xi8c: 1662; AVX: # BB#0: 1663; AVX-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0 1664; AVX-NEXT: retq 1665 %r = and <16 x i8> <i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15>, %0 1666 ret <16 x i8> %r 1667} 1668 1669define <32 x i8> @_clearupper32xi8c(<32 x i8>) nounwind { 1670; SSE-LABEL: _clearupper32xi8c: 1671; SSE: # BB#0: 1672; SSE-NEXT: movaps {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15] 1673; SSE-NEXT: andps %xmm2, %xmm0 1674; SSE-NEXT: andps %xmm2, %xmm1 1675; SSE-NEXT: retq 1676; 1677; AVX-LABEL: _clearupper32xi8c: 1678; AVX: # BB#0: 1679; AVX-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 1680; AVX-NEXT: retq 1681 %r = and <32 x i8> <i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15>, %0 1682 ret <32 x i8> %r 1683} 1684