1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=avx | FileCheck %s 3 4@x = common global <8 x float> zeroinitializer, align 32 5@y = common global <4 x double> zeroinitializer, align 32 6@z = common global <4 x float> zeroinitializer, align 16 7 8define void @zero128() nounwind ssp { 9; CHECK-LABEL: zero128: 10; CHECK: ## BB#0: 11; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0 12; CHECK-NEXT: movq _z@{{.*}}(%rip), %rax 13; CHECK-NEXT: vmovaps %xmm0, (%rax) 14; CHECK-NEXT: retq 15; CHECK-NEXT: ## -- End function 16 store <4 x float> zeroinitializer, <4 x float>* @z, align 16 17 ret void 18} 19 20define void @zero256() nounwind ssp { 21; CHECK-LABEL: zero256: 22; CHECK: ## BB#0: 23; CHECK-NEXT: movq _x@{{.*}}(%rip), %rax 24; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0 25; CHECK-NEXT: vmovaps %ymm0, (%rax) 26; CHECK-NEXT: movq _y@{{.*}}(%rip), %rax 27; CHECK-NEXT: vmovaps %ymm0, (%rax) 28; CHECK-NEXT: vzeroupper 29; CHECK-NEXT: retq 30; CHECK-NEXT: ## -- End function 31 store <8 x float> zeroinitializer, <8 x float>* @x, align 32 32 store <4 x double> zeroinitializer, <4 x double>* @y, align 32 33 ret void 34} 35 36define void @ones([0 x float]* nocapture %RET, [0 x float]* nocapture %aFOO) nounwind { 37; CHECK-LABEL: ones: 38; CHECK: ## BB#0: ## %allocas 39; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0 40; CHECK-NEXT: vcmptrueps %ymm0, %ymm0, %ymm0 41; CHECK-NEXT: vmovaps %ymm0, (%rdi) 42; CHECK-NEXT: vzeroupper 43; CHECK-NEXT: retq 44; CHECK-NEXT: ## -- End function 45allocas: 46 %ptr2vec615 = bitcast [0 x float]* %RET to <8 x float>* 47 store <8 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 480xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 490xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000>, <8 x 50float>* %ptr2vec615, align 32 51 ret void 52} 53 54define void @ones2([0 x i32]* nocapture %RET, [0 x i32]* nocapture %aFOO) nounwind { 55; CHECK-LABEL: ones2: 56; CHECK: ## BB#0: ## %allocas 57; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0 58; CHECK-NEXT: vcmptrueps %ymm0, %ymm0, %ymm0 59; CHECK-NEXT: vmovaps %ymm0, (%rdi) 60; CHECK-NEXT: vzeroupper 61; CHECK-NEXT: retq 62; CHECK-NEXT: ## -- End function 63allocas: 64 %ptr2vec615 = bitcast [0 x i32]* %RET to <8 x i32>* 65 store <8 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1>, <8 x i32>* %ptr2vec615, align 32 66 ret void 67} 68 69;;; Just make sure this doesn't crash 70define <4 x i64> @ISelCrash(<4 x i64> %a) nounwind uwtable readnone ssp { 71; CHECK-LABEL: ISelCrash: 72; CHECK: ## BB#0: 73; CHECK-NEXT: vextractf128 $1, %ymm0, %xmm0 74; CHECK-NEXT: retq 75 %shuffle = shufflevector <4 x i64> %a, <4 x i64> undef, <4 x i32> <i32 2, i32 3, i32 4, i32 4> 76 ret <4 x i64> %shuffle 77} 78 79;;; Don't crash on movd 80define <8 x i32> @VMOVZQI2PQI([0 x float]* nocapture %aFOO) nounwind { 81; CHECK-LABEL: VMOVZQI2PQI: 82; CHECK: ## BB#0: 83; CHECK-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 84; CHECK-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,1,1] 85; CHECK-NEXT: retq 86; CHECK-NEXT: ## -- End function 87 %ptrcast.i33.i = bitcast [0 x float]* %aFOO to i32* 88 %val.i34.i = load i32, i32* %ptrcast.i33.i, align 4 89 %ptroffset.i22.i992 = getelementptr [0 x float], [0 x float]* %aFOO, i64 0, i64 1 90 %ptrcast.i23.i = bitcast float* %ptroffset.i22.i992 to i32* 91 %val.i24.i = load i32, i32* %ptrcast.i23.i, align 4 92 %updatedret.i30.i = insertelement <8 x i32> undef, i32 %val.i34.i, i32 1 93 ret <8 x i32> %updatedret.i30.i 94} 95 96;;;; Don't crash on fneg 97; rdar://10566486 98define <16 x float> @fneg(<16 x float> %a) nounwind { 99; CHECK-LABEL: fneg: 100; CHECK: ## BB#0: 101; CHECK-NEXT: vmovaps {{.*#+}} ymm2 = [-0.000000e+00,-0.000000e+00,-0.000000e+00,-0.000000e+00,-0.000000e+00,-0.000000e+00,-0.000000e+00,-0.000000e+00] 102; CHECK-NEXT: vxorps %ymm2, %ymm0, %ymm0 103; CHECK-NEXT: vxorps %ymm2, %ymm1, %ymm1 104; CHECK-NEXT: retq 105; CHECK-NEXT: ## -- End function 106 %1 = fsub <16 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %a 107 ret <16 x float> %1 108} 109 110;;; Don't crash on build vector 111define <16 x i16> @build_vec_16x16(i16 %a) nounwind readonly { 112; CHECK-LABEL: build_vec_16x16: 113; CHECK: ## BB#0: 114; CHECK-NEXT: movzwl %di, %eax 115; CHECK-NEXT: vmovd %eax, %xmm0 116; CHECK-NEXT: retq 117; CHECK-NEXT: ## -- End function 118 %res = insertelement <16 x i16> <i16 undef, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>, i16 %a, i32 0 119 ret <16 x i16> %res 120} 121 122;;; Check that VMOVPQIto64rr generates the assembly string "vmovq". Previously 123;;; an incorrect mnemonic of "movd" was printed for this instruction. 124define i64 @VMOVPQIto64rr(<2 x i64> %a) { 125; CHECK-LABEL: VMOVPQIto64rr: 126; CHECK: ## BB#0: 127; CHECK-NEXT: vmovq %xmm0, %rax 128; CHECK-NEXT: retq 129 %vecext.i = extractelement <2 x i64> %a, i32 0 130 ret i64 %vecext.i 131} 132 133; PR22685 134define <8 x float> @mov00_8f32(float* %ptr) { 135; CHECK-LABEL: mov00_8f32: 136; CHECK: ## BB#0: 137; CHECK-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero 138; CHECK-NEXT: retq 139 %val = load float, float* %ptr 140 %vec = insertelement <8 x float> zeroinitializer, float %val, i32 0 141 ret <8 x float> %vec 142} 143