1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -O0 -mtriple=x86_64-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X64 3; RUN: llc < %s -O0 -mtriple=i386-- -mcpu=i486 -verify-machineinstrs | FileCheck %s --check-prefix I486 4 5@sc64 = external dso_local global i64 6@fsc64 = external dso_local global double 7@psc64 = external dso_local global i8* 8 9define void @atomic_fetch_add64() nounwind { 10; X64-LABEL: atomic_fetch_add64: 11; X64: # %bb.0: # %entry 12; X64-NEXT: lock incq sc64(%rip) 13; X64-NEXT: lock addq $3, sc64(%rip) 14; X64-NEXT: movl $5, %eax 15; X64-NEXT: lock xaddq %rax, sc64(%rip) 16; X64-NEXT: lock addq %rax, sc64(%rip) 17; X64-NEXT: retq 18; 19; I486-LABEL: atomic_fetch_add64: 20; I486: # %bb.0: # %entry 21; I486-NEXT: subl $16, %esp 22; I486-NEXT: movl %esp, %eax 23; I486-NEXT: movl $2, 12(%eax) 24; I486-NEXT: movl $0, 8(%eax) 25; I486-NEXT: movl $1, 4(%eax) 26; I486-NEXT: movl $sc64, (%eax) 27; I486-NEXT: calll __atomic_fetch_add_8@PLT 28; I486-NEXT: movl %esp, %eax 29; I486-NEXT: movl $2, 12(%eax) 30; I486-NEXT: movl $0, 8(%eax) 31; I486-NEXT: movl $3, 4(%eax) 32; I486-NEXT: movl $sc64, (%eax) 33; I486-NEXT: calll __atomic_fetch_add_8@PLT 34; I486-NEXT: movl %esp, %eax 35; I486-NEXT: movl $2, 12(%eax) 36; I486-NEXT: movl $0, 8(%eax) 37; I486-NEXT: movl $5, 4(%eax) 38; I486-NEXT: movl $sc64, (%eax) 39; I486-NEXT: calll __atomic_fetch_add_8@PLT 40; I486-NEXT: movl %eax, %ecx 41; I486-NEXT: movl %esp, %eax 42; I486-NEXT: movl %edx, 8(%eax) 43; I486-NEXT: movl %ecx, 4(%eax) 44; I486-NEXT: movl $2, 12(%eax) 45; I486-NEXT: movl $sc64, (%eax) 46; I486-NEXT: calll __atomic_fetch_add_8@PLT 47; I486-NEXT: addl $16, %esp 48; I486-NEXT: retl 49entry: 50 %t1 = atomicrmw add i64* @sc64, i64 1 acquire 51 %t2 = atomicrmw add i64* @sc64, i64 3 acquire 52 %t3 = atomicrmw add i64* @sc64, i64 5 acquire 53 %t4 = atomicrmw add i64* @sc64, i64 %t3 acquire 54 ret void 55} 56 57define void @atomic_fetch_sub64() nounwind { 58; X64-LABEL: atomic_fetch_sub64: 59; X64: # %bb.0: 60; X64-NEXT: lock decq sc64(%rip) 61; X64-NEXT: lock subq $3, sc64(%rip) 62; X64-NEXT: movq $-5, %rax 63; X64-NEXT: lock xaddq %rax, sc64(%rip) 64; X64-NEXT: lock subq %rax, sc64(%rip) 65; X64-NEXT: retq 66; 67; I486-LABEL: atomic_fetch_sub64: 68; I486: # %bb.0: 69; I486-NEXT: subl $16, %esp 70; I486-NEXT: movl %esp, %eax 71; I486-NEXT: movl $2, 12(%eax) 72; I486-NEXT: movl $0, 8(%eax) 73; I486-NEXT: movl $1, 4(%eax) 74; I486-NEXT: movl $sc64, (%eax) 75; I486-NEXT: calll __atomic_fetch_sub_8@PLT 76; I486-NEXT: movl %esp, %eax 77; I486-NEXT: movl $2, 12(%eax) 78; I486-NEXT: movl $0, 8(%eax) 79; I486-NEXT: movl $3, 4(%eax) 80; I486-NEXT: movl $sc64, (%eax) 81; I486-NEXT: calll __atomic_fetch_sub_8@PLT 82; I486-NEXT: movl %esp, %eax 83; I486-NEXT: movl $2, 12(%eax) 84; I486-NEXT: movl $0, 8(%eax) 85; I486-NEXT: movl $5, 4(%eax) 86; I486-NEXT: movl $sc64, (%eax) 87; I486-NEXT: calll __atomic_fetch_sub_8@PLT 88; I486-NEXT: movl %eax, %ecx 89; I486-NEXT: movl %esp, %eax 90; I486-NEXT: movl %edx, 8(%eax) 91; I486-NEXT: movl %ecx, 4(%eax) 92; I486-NEXT: movl $2, 12(%eax) 93; I486-NEXT: movl $sc64, (%eax) 94; I486-NEXT: calll __atomic_fetch_sub_8@PLT 95; I486-NEXT: addl $16, %esp 96; I486-NEXT: retl 97 %t1 = atomicrmw sub i64* @sc64, i64 1 acquire 98 %t2 = atomicrmw sub i64* @sc64, i64 3 acquire 99 %t3 = atomicrmw sub i64* @sc64, i64 5 acquire 100 %t4 = atomicrmw sub i64* @sc64, i64 %t3 acquire 101 ret void 102} 103 104define void @atomic_fetch_and64() nounwind { 105; X64-LABEL: atomic_fetch_and64: 106; X64: # %bb.0: 107; X64-NEXT: lock andq $3, sc64(%rip) 108; X64-NEXT: movq sc64, %rax 109; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 110; X64-NEXT: .LBB2_1: # %atomicrmw.start 111; X64-NEXT: # =>This Inner Loop Header: Depth=1 112; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload 113; X64-NEXT: movl %eax, %ecx 114; X64-NEXT: andl $5, %ecx 115; X64-NEXT: # kill: def $rcx killed $ecx 116; X64-NEXT: lock cmpxchgq %rcx, sc64(%rip) 117; X64-NEXT: sete %cl 118; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 119; X64-NEXT: testb $1, %cl 120; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 121; X64-NEXT: jne .LBB2_2 122; X64-NEXT: jmp .LBB2_1 123; X64-NEXT: .LBB2_2: # %atomicrmw.end 124; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload 125; X64-NEXT: lock andq %rax, sc64(%rip) 126; X64-NEXT: retq 127; 128; I486-LABEL: atomic_fetch_and64: 129; I486: # %bb.0: 130; I486-NEXT: subl $16, %esp 131; I486-NEXT: movl %esp, %eax 132; I486-NEXT: movl $2, 12(%eax) 133; I486-NEXT: movl $0, 8(%eax) 134; I486-NEXT: movl $3, 4(%eax) 135; I486-NEXT: movl $sc64, (%eax) 136; I486-NEXT: calll __atomic_fetch_and_8@PLT 137; I486-NEXT: movl %esp, %eax 138; I486-NEXT: movl $2, 12(%eax) 139; I486-NEXT: movl $0, 8(%eax) 140; I486-NEXT: movl $5, 4(%eax) 141; I486-NEXT: movl $sc64, (%eax) 142; I486-NEXT: calll __atomic_fetch_and_8@PLT 143; I486-NEXT: movl %eax, %ecx 144; I486-NEXT: movl %esp, %eax 145; I486-NEXT: movl %edx, 8(%eax) 146; I486-NEXT: movl %ecx, 4(%eax) 147; I486-NEXT: movl $2, 12(%eax) 148; I486-NEXT: movl $sc64, (%eax) 149; I486-NEXT: calll __atomic_fetch_and_8@PLT 150; I486-NEXT: addl $16, %esp 151; I486-NEXT: retl 152 %t1 = atomicrmw and i64* @sc64, i64 3 acquire 153 %t2 = atomicrmw and i64* @sc64, i64 5 acquire 154 %t3 = atomicrmw and i64* @sc64, i64 %t2 acquire 155 ret void 156} 157 158define void @atomic_fetch_or64() nounwind { 159; X64-LABEL: atomic_fetch_or64: 160; X64: # %bb.0: 161; X64-NEXT: lock orq $3, sc64(%rip) 162; X64-NEXT: movq sc64, %rax 163; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 164; X64-NEXT: .LBB3_1: # %atomicrmw.start 165; X64-NEXT: # =>This Inner Loop Header: Depth=1 166; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload 167; X64-NEXT: movq %rax, %rcx 168; X64-NEXT: orq $5, %rcx 169; X64-NEXT: lock cmpxchgq %rcx, sc64(%rip) 170; X64-NEXT: sete %cl 171; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 172; X64-NEXT: testb $1, %cl 173; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 174; X64-NEXT: jne .LBB3_2 175; X64-NEXT: jmp .LBB3_1 176; X64-NEXT: .LBB3_2: # %atomicrmw.end 177; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload 178; X64-NEXT: lock orq %rax, sc64(%rip) 179; X64-NEXT: retq 180; 181; I486-LABEL: atomic_fetch_or64: 182; I486: # %bb.0: 183; I486-NEXT: subl $16, %esp 184; I486-NEXT: movl %esp, %eax 185; I486-NEXT: movl $2, 12(%eax) 186; I486-NEXT: movl $0, 8(%eax) 187; I486-NEXT: movl $3, 4(%eax) 188; I486-NEXT: movl $sc64, (%eax) 189; I486-NEXT: calll __atomic_fetch_or_8@PLT 190; I486-NEXT: movl %esp, %eax 191; I486-NEXT: movl $2, 12(%eax) 192; I486-NEXT: movl $0, 8(%eax) 193; I486-NEXT: movl $5, 4(%eax) 194; I486-NEXT: movl $sc64, (%eax) 195; I486-NEXT: calll __atomic_fetch_or_8@PLT 196; I486-NEXT: movl %eax, %ecx 197; I486-NEXT: movl %esp, %eax 198; I486-NEXT: movl %edx, 8(%eax) 199; I486-NEXT: movl %ecx, 4(%eax) 200; I486-NEXT: movl $2, 12(%eax) 201; I486-NEXT: movl $sc64, (%eax) 202; I486-NEXT: calll __atomic_fetch_or_8@PLT 203; I486-NEXT: addl $16, %esp 204; I486-NEXT: retl 205 %t1 = atomicrmw or i64* @sc64, i64 3 acquire 206 %t2 = atomicrmw or i64* @sc64, i64 5 acquire 207 %t3 = atomicrmw or i64* @sc64, i64 %t2 acquire 208 ret void 209} 210 211define void @atomic_fetch_xor64() nounwind { 212; X64-LABEL: atomic_fetch_xor64: 213; X64: # %bb.0: 214; X64-NEXT: lock xorq $3, sc64(%rip) 215; X64-NEXT: movq sc64, %rax 216; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 217; X64-NEXT: .LBB4_1: # %atomicrmw.start 218; X64-NEXT: # =>This Inner Loop Header: Depth=1 219; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload 220; X64-NEXT: movq %rax, %rcx 221; X64-NEXT: xorq $5, %rcx 222; X64-NEXT: lock cmpxchgq %rcx, sc64(%rip) 223; X64-NEXT: sete %cl 224; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 225; X64-NEXT: testb $1, %cl 226; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 227; X64-NEXT: jne .LBB4_2 228; X64-NEXT: jmp .LBB4_1 229; X64-NEXT: .LBB4_2: # %atomicrmw.end 230; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload 231; X64-NEXT: lock xorq %rax, sc64(%rip) 232; X64-NEXT: retq 233; 234; I486-LABEL: atomic_fetch_xor64: 235; I486: # %bb.0: 236; I486-NEXT: subl $16, %esp 237; I486-NEXT: movl %esp, %eax 238; I486-NEXT: movl $2, 12(%eax) 239; I486-NEXT: movl $0, 8(%eax) 240; I486-NEXT: movl $3, 4(%eax) 241; I486-NEXT: movl $sc64, (%eax) 242; I486-NEXT: calll __atomic_fetch_xor_8@PLT 243; I486-NEXT: movl %esp, %eax 244; I486-NEXT: movl $2, 12(%eax) 245; I486-NEXT: movl $0, 8(%eax) 246; I486-NEXT: movl $5, 4(%eax) 247; I486-NEXT: movl $sc64, (%eax) 248; I486-NEXT: calll __atomic_fetch_xor_8@PLT 249; I486-NEXT: movl %eax, %ecx 250; I486-NEXT: movl %esp, %eax 251; I486-NEXT: movl %edx, 8(%eax) 252; I486-NEXT: movl %ecx, 4(%eax) 253; I486-NEXT: movl $2, 12(%eax) 254; I486-NEXT: movl $sc64, (%eax) 255; I486-NEXT: calll __atomic_fetch_xor_8@PLT 256; I486-NEXT: addl $16, %esp 257; I486-NEXT: retl 258 %t1 = atomicrmw xor i64* @sc64, i64 3 acquire 259 %t2 = atomicrmw xor i64* @sc64, i64 5 acquire 260 %t3 = atomicrmw xor i64* @sc64, i64 %t2 acquire 261 ret void 262} 263 264define void @atomic_fetch_nand64(i64 %x) nounwind { 265; X64-LABEL: atomic_fetch_nand64: 266; X64: # %bb.0: 267; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 268; X64-NEXT: movq sc64, %rax 269; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 270; X64-NEXT: .LBB5_1: # %atomicrmw.start 271; X64-NEXT: # =>This Inner Loop Header: Depth=1 272; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload 273; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload 274; X64-NEXT: movq %rax, %rcx 275; X64-NEXT: andq %rdx, %rcx 276; X64-NEXT: movq %rcx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 277; X64-NEXT: notq %rcx 278; X64-NEXT: lock cmpxchgq %rcx, sc64(%rip) 279; X64-NEXT: sete %cl 280; X64-NEXT: testb $1, %cl 281; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 282; X64-NEXT: jne .LBB5_2 283; X64-NEXT: jmp .LBB5_1 284; X64-NEXT: .LBB5_2: # %atomicrmw.end 285; X64-NEXT: retq 286; 287; I486-LABEL: atomic_fetch_nand64: 288; I486: # %bb.0: 289; I486-NEXT: subl $16, %esp 290; I486-NEXT: movl {{[0-9]+}}(%esp), %edx 291; I486-NEXT: movl {{[0-9]+}}(%esp), %ecx 292; I486-NEXT: movl %esp, %eax 293; I486-NEXT: movl %edx, 8(%eax) 294; I486-NEXT: movl %ecx, 4(%eax) 295; I486-NEXT: movl $2, 12(%eax) 296; I486-NEXT: movl $sc64, (%eax) 297; I486-NEXT: calll __atomic_fetch_nand_8@PLT 298; I486-NEXT: addl $16, %esp 299; I486-NEXT: retl 300 %t1 = atomicrmw nand i64* @sc64, i64 %x acquire 301 ret void 302} 303 304define void @atomic_fetch_max64(i64 %x) nounwind { 305; X64-LABEL: atomic_fetch_max64: 306; X64: # %bb.0: 307; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 308; X64-NEXT: movq sc64, %rax 309; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 310; X64-NEXT: .LBB6_1: # %atomicrmw.start 311; X64-NEXT: # =>This Inner Loop Header: Depth=1 312; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload 313; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload 314; X64-NEXT: movq %rax, %rdx 315; X64-NEXT: subq %rcx, %rdx 316; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 317; X64-NEXT: cmovgq %rax, %rcx 318; X64-NEXT: lock cmpxchgq %rcx, sc64(%rip) 319; X64-NEXT: sete %cl 320; X64-NEXT: testb $1, %cl 321; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 322; X64-NEXT: jne .LBB6_2 323; X64-NEXT: jmp .LBB6_1 324; X64-NEXT: .LBB6_2: # %atomicrmw.end 325; X64-NEXT: retq 326; 327; I486-LABEL: atomic_fetch_max64: 328; I486: # %bb.0: 329; I486-NEXT: pushl %ebp 330; I486-NEXT: movl %esp, %ebp 331; I486-NEXT: pushl %esi 332; I486-NEXT: andl $-8, %esp 333; I486-NEXT: subl $72, %esp 334; I486-NEXT: movl 12(%ebp), %eax 335; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 336; I486-NEXT: movl 8(%ebp), %eax 337; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 338; I486-NEXT: movl sc64+4, %eax 339; I486-NEXT: movl sc64, %ecx 340; I486-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 341; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 342; I486-NEXT: jmp .LBB6_1 343; I486-NEXT: .LBB6_1: # %atomicrmw.start 344; I486-NEXT: # =>This Inner Loop Header: Depth=1 345; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload 346; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload 347; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload 348; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload 349; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 350; I486-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 351; I486-NEXT: subl %ecx, %esi 352; I486-NEXT: sbbl %eax, %edx 353; I486-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 354; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 355; I486-NEXT: jl .LBB6_4 356; I486-NEXT: # %bb.3: # %atomicrmw.start 357; I486-NEXT: # in Loop: Header=BB6_1 Depth=1 358; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload 359; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload 360; I486-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 361; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 362; I486-NEXT: .LBB6_4: # %atomicrmw.start 363; I486-NEXT: # in Loop: Header=BB6_1 Depth=1 364; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload 365; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload 366; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload 367; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload 368; I486-NEXT: movl %esi, {{[0-9]+}}(%esp) 369; I486-NEXT: movl %eax, {{[0-9]+}}(%esp) 370; I486-NEXT: movl %esp, %eax 371; I486-NEXT: movl %edx, 12(%eax) 372; I486-NEXT: movl %ecx, 8(%eax) 373; I486-NEXT: leal {{[0-9]+}}(%esp), %ecx 374; I486-NEXT: movl %ecx, 4(%eax) 375; I486-NEXT: movl $2, 20(%eax) 376; I486-NEXT: movl $2, 16(%eax) 377; I486-NEXT: movl $sc64, (%eax) 378; I486-NEXT: calll __atomic_compare_exchange_8@PLT 379; I486-NEXT: movb %al, %dl 380; I486-NEXT: movl {{[0-9]+}}(%esp), %ecx 381; I486-NEXT: movl {{[0-9]+}}(%esp), %eax 382; I486-NEXT: testb %dl, %dl 383; I486-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 384; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 385; I486-NEXT: je .LBB6_1 386; I486-NEXT: jmp .LBB6_2 387; I486-NEXT: .LBB6_2: # %atomicrmw.end 388; I486-NEXT: leal -4(%ebp), %esp 389; I486-NEXT: popl %esi 390; I486-NEXT: popl %ebp 391; I486-NEXT: retl 392 %t1 = atomicrmw max i64* @sc64, i64 %x acquire 393 394 ret void 395} 396 397define void @atomic_fetch_min64(i64 %x) nounwind { 398; X64-LABEL: atomic_fetch_min64: 399; X64: # %bb.0: 400; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 401; X64-NEXT: movq sc64, %rax 402; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 403; X64-NEXT: .LBB7_1: # %atomicrmw.start 404; X64-NEXT: # =>This Inner Loop Header: Depth=1 405; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload 406; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload 407; X64-NEXT: movq %rax, %rdx 408; X64-NEXT: subq %rcx, %rdx 409; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 410; X64-NEXT: cmovleq %rax, %rcx 411; X64-NEXT: lock cmpxchgq %rcx, sc64(%rip) 412; X64-NEXT: sete %cl 413; X64-NEXT: testb $1, %cl 414; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 415; X64-NEXT: jne .LBB7_2 416; X64-NEXT: jmp .LBB7_1 417; X64-NEXT: .LBB7_2: # %atomicrmw.end 418; X64-NEXT: retq 419; 420; I486-LABEL: atomic_fetch_min64: 421; I486: # %bb.0: 422; I486-NEXT: pushl %ebp 423; I486-NEXT: movl %esp, %ebp 424; I486-NEXT: pushl %esi 425; I486-NEXT: andl $-8, %esp 426; I486-NEXT: subl $72, %esp 427; I486-NEXT: movl 12(%ebp), %eax 428; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 429; I486-NEXT: movl 8(%ebp), %eax 430; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 431; I486-NEXT: movl sc64+4, %eax 432; I486-NEXT: movl sc64, %ecx 433; I486-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 434; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 435; I486-NEXT: jmp .LBB7_1 436; I486-NEXT: .LBB7_1: # %atomicrmw.start 437; I486-NEXT: # =>This Inner Loop Header: Depth=1 438; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload 439; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload 440; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload 441; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload 442; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 443; I486-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 444; I486-NEXT: subl %ecx, %esi 445; I486-NEXT: sbbl %eax, %edx 446; I486-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 447; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 448; I486-NEXT: jge .LBB7_4 449; I486-NEXT: # %bb.3: # %atomicrmw.start 450; I486-NEXT: # in Loop: Header=BB7_1 Depth=1 451; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload 452; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload 453; I486-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 454; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 455; I486-NEXT: .LBB7_4: # %atomicrmw.start 456; I486-NEXT: # in Loop: Header=BB7_1 Depth=1 457; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload 458; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload 459; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload 460; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload 461; I486-NEXT: movl %esi, {{[0-9]+}}(%esp) 462; I486-NEXT: movl %eax, {{[0-9]+}}(%esp) 463; I486-NEXT: movl %esp, %eax 464; I486-NEXT: movl %edx, 12(%eax) 465; I486-NEXT: movl %ecx, 8(%eax) 466; I486-NEXT: leal {{[0-9]+}}(%esp), %ecx 467; I486-NEXT: movl %ecx, 4(%eax) 468; I486-NEXT: movl $2, 20(%eax) 469; I486-NEXT: movl $2, 16(%eax) 470; I486-NEXT: movl $sc64, (%eax) 471; I486-NEXT: calll __atomic_compare_exchange_8@PLT 472; I486-NEXT: movb %al, %dl 473; I486-NEXT: movl {{[0-9]+}}(%esp), %ecx 474; I486-NEXT: movl {{[0-9]+}}(%esp), %eax 475; I486-NEXT: testb %dl, %dl 476; I486-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 477; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 478; I486-NEXT: je .LBB7_1 479; I486-NEXT: jmp .LBB7_2 480; I486-NEXT: .LBB7_2: # %atomicrmw.end 481; I486-NEXT: leal -4(%ebp), %esp 482; I486-NEXT: popl %esi 483; I486-NEXT: popl %ebp 484; I486-NEXT: retl 485 %t1 = atomicrmw min i64* @sc64, i64 %x acquire 486 487 ret void 488} 489 490define void @atomic_fetch_umax64(i64 %x) nounwind { 491; X64-LABEL: atomic_fetch_umax64: 492; X64: # %bb.0: 493; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 494; X64-NEXT: movq sc64, %rax 495; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 496; X64-NEXT: .LBB8_1: # %atomicrmw.start 497; X64-NEXT: # =>This Inner Loop Header: Depth=1 498; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload 499; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload 500; X64-NEXT: movq %rax, %rdx 501; X64-NEXT: subq %rcx, %rdx 502; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 503; X64-NEXT: cmovaq %rax, %rcx 504; X64-NEXT: lock cmpxchgq %rcx, sc64(%rip) 505; X64-NEXT: sete %cl 506; X64-NEXT: testb $1, %cl 507; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 508; X64-NEXT: jne .LBB8_2 509; X64-NEXT: jmp .LBB8_1 510; X64-NEXT: .LBB8_2: # %atomicrmw.end 511; X64-NEXT: retq 512; 513; I486-LABEL: atomic_fetch_umax64: 514; I486: # %bb.0: 515; I486-NEXT: pushl %ebp 516; I486-NEXT: movl %esp, %ebp 517; I486-NEXT: pushl %esi 518; I486-NEXT: andl $-8, %esp 519; I486-NEXT: subl $72, %esp 520; I486-NEXT: movl 12(%ebp), %eax 521; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 522; I486-NEXT: movl 8(%ebp), %eax 523; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 524; I486-NEXT: movl sc64+4, %eax 525; I486-NEXT: movl sc64, %ecx 526; I486-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 527; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 528; I486-NEXT: jmp .LBB8_1 529; I486-NEXT: .LBB8_1: # %atomicrmw.start 530; I486-NEXT: # =>This Inner Loop Header: Depth=1 531; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload 532; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload 533; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload 534; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload 535; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 536; I486-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 537; I486-NEXT: subl %ecx, %esi 538; I486-NEXT: sbbl %eax, %edx 539; I486-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 540; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 541; I486-NEXT: jb .LBB8_4 542; I486-NEXT: # %bb.3: # %atomicrmw.start 543; I486-NEXT: # in Loop: Header=BB8_1 Depth=1 544; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload 545; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload 546; I486-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 547; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 548; I486-NEXT: .LBB8_4: # %atomicrmw.start 549; I486-NEXT: # in Loop: Header=BB8_1 Depth=1 550; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload 551; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload 552; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload 553; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload 554; I486-NEXT: movl %esi, {{[0-9]+}}(%esp) 555; I486-NEXT: movl %eax, {{[0-9]+}}(%esp) 556; I486-NEXT: movl %esp, %eax 557; I486-NEXT: movl %edx, 12(%eax) 558; I486-NEXT: movl %ecx, 8(%eax) 559; I486-NEXT: leal {{[0-9]+}}(%esp), %ecx 560; I486-NEXT: movl %ecx, 4(%eax) 561; I486-NEXT: movl $2, 20(%eax) 562; I486-NEXT: movl $2, 16(%eax) 563; I486-NEXT: movl $sc64, (%eax) 564; I486-NEXT: calll __atomic_compare_exchange_8@PLT 565; I486-NEXT: movb %al, %dl 566; I486-NEXT: movl {{[0-9]+}}(%esp), %ecx 567; I486-NEXT: movl {{[0-9]+}}(%esp), %eax 568; I486-NEXT: testb %dl, %dl 569; I486-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 570; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 571; I486-NEXT: je .LBB8_1 572; I486-NEXT: jmp .LBB8_2 573; I486-NEXT: .LBB8_2: # %atomicrmw.end 574; I486-NEXT: leal -4(%ebp), %esp 575; I486-NEXT: popl %esi 576; I486-NEXT: popl %ebp 577; I486-NEXT: retl 578 %t1 = atomicrmw umax i64* @sc64, i64 %x acquire 579 580 ret void 581} 582 583define void @atomic_fetch_umin64(i64 %x) nounwind { 584; X64-LABEL: atomic_fetch_umin64: 585; X64: # %bb.0: 586; X64-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 587; X64-NEXT: movq sc64, %rax 588; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 589; X64-NEXT: .LBB9_1: # %atomicrmw.start 590; X64-NEXT: # =>This Inner Loop Header: Depth=1 591; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload 592; X64-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload 593; X64-NEXT: movq %rax, %rdx 594; X64-NEXT: subq %rcx, %rdx 595; X64-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 596; X64-NEXT: cmovbeq %rax, %rcx 597; X64-NEXT: lock cmpxchgq %rcx, sc64(%rip) 598; X64-NEXT: sete %cl 599; X64-NEXT: testb $1, %cl 600; X64-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 601; X64-NEXT: jne .LBB9_2 602; X64-NEXT: jmp .LBB9_1 603; X64-NEXT: .LBB9_2: # %atomicrmw.end 604; X64-NEXT: retq 605; 606; I486-LABEL: atomic_fetch_umin64: 607; I486: # %bb.0: 608; I486-NEXT: pushl %ebp 609; I486-NEXT: movl %esp, %ebp 610; I486-NEXT: pushl %esi 611; I486-NEXT: andl $-8, %esp 612; I486-NEXT: subl $72, %esp 613; I486-NEXT: movl 12(%ebp), %eax 614; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 615; I486-NEXT: movl 8(%ebp), %eax 616; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 617; I486-NEXT: movl sc64+4, %eax 618; I486-NEXT: movl sc64, %ecx 619; I486-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 620; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 621; I486-NEXT: jmp .LBB9_1 622; I486-NEXT: .LBB9_1: # %atomicrmw.start 623; I486-NEXT: # =>This Inner Loop Header: Depth=1 624; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload 625; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload 626; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload 627; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload 628; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 629; I486-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 630; I486-NEXT: subl %ecx, %esi 631; I486-NEXT: sbbl %eax, %edx 632; I486-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 633; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 634; I486-NEXT: jae .LBB9_4 635; I486-NEXT: # %bb.3: # %atomicrmw.start 636; I486-NEXT: # in Loop: Header=BB9_1 Depth=1 637; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload 638; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload 639; I486-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 640; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 641; I486-NEXT: .LBB9_4: # %atomicrmw.start 642; I486-NEXT: # in Loop: Header=BB9_1 Depth=1 643; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload 644; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload 645; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload 646; I486-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload 647; I486-NEXT: movl %esi, {{[0-9]+}}(%esp) 648; I486-NEXT: movl %eax, {{[0-9]+}}(%esp) 649; I486-NEXT: movl %esp, %eax 650; I486-NEXT: movl %edx, 12(%eax) 651; I486-NEXT: movl %ecx, 8(%eax) 652; I486-NEXT: leal {{[0-9]+}}(%esp), %ecx 653; I486-NEXT: movl %ecx, 4(%eax) 654; I486-NEXT: movl $2, 20(%eax) 655; I486-NEXT: movl $2, 16(%eax) 656; I486-NEXT: movl $sc64, (%eax) 657; I486-NEXT: calll __atomic_compare_exchange_8@PLT 658; I486-NEXT: movb %al, %dl 659; I486-NEXT: movl {{[0-9]+}}(%esp), %ecx 660; I486-NEXT: movl {{[0-9]+}}(%esp), %eax 661; I486-NEXT: testb %dl, %dl 662; I486-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 663; I486-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill 664; I486-NEXT: je .LBB9_1 665; I486-NEXT: jmp .LBB9_2 666; I486-NEXT: .LBB9_2: # %atomicrmw.end 667; I486-NEXT: leal -4(%ebp), %esp 668; I486-NEXT: popl %esi 669; I486-NEXT: popl %ebp 670; I486-NEXT: retl 671 %t1 = atomicrmw umin i64* @sc64, i64 %x acquire 672 673 ret void 674} 675 676define void @atomic_fetch_cmpxchg64() nounwind { 677; X64-LABEL: atomic_fetch_cmpxchg64: 678; X64: # %bb.0: 679; X64-NEXT: xorl %eax, %eax 680; X64-NEXT: # kill: def $rax killed $eax 681; X64-NEXT: movl $1, %ecx 682; X64-NEXT: lock cmpxchgq %rcx, sc64(%rip) 683; X64-NEXT: retq 684; 685; I486-LABEL: atomic_fetch_cmpxchg64: 686; I486: # %bb.0: 687; I486-NEXT: pushl %ebp 688; I486-NEXT: movl %esp, %ebp 689; I486-NEXT: andl $-8, %esp 690; I486-NEXT: subl $32, %esp 691; I486-NEXT: leal {{[0-9]+}}(%esp), %ecx 692; I486-NEXT: movl $0, {{[0-9]+}}(%esp) 693; I486-NEXT: movl $0, {{[0-9]+}}(%esp) 694; I486-NEXT: movl %esp, %eax 695; I486-NEXT: movl %ecx, 4(%eax) 696; I486-NEXT: movl $2, 20(%eax) 697; I486-NEXT: movl $2, 16(%eax) 698; I486-NEXT: movl $0, 12(%eax) 699; I486-NEXT: movl $1, 8(%eax) 700; I486-NEXT: movl $sc64, (%eax) 701; I486-NEXT: calll __atomic_compare_exchange_8@PLT 702; I486-NEXT: movl %ebp, %esp 703; I486-NEXT: popl %ebp 704; I486-NEXT: retl 705 %t1 = cmpxchg i64* @sc64, i64 0, i64 1 acquire acquire 706 ret void 707} 708 709define void @atomic_fetch_store64(i64 %x) nounwind { 710; X64-LABEL: atomic_fetch_store64: 711; X64: # %bb.0: 712; X64-NEXT: movq %rdi, sc64(%rip) 713; X64-NEXT: retq 714; 715; I486-LABEL: atomic_fetch_store64: 716; I486: # %bb.0: 717; I486-NEXT: subl $16, %esp 718; I486-NEXT: movl {{[0-9]+}}(%esp), %edx 719; I486-NEXT: movl {{[0-9]+}}(%esp), %ecx 720; I486-NEXT: movl %esp, %eax 721; I486-NEXT: movl %edx, 8(%eax) 722; I486-NEXT: movl %ecx, 4(%eax) 723; I486-NEXT: movl $3, 12(%eax) 724; I486-NEXT: movl $sc64, (%eax) 725; I486-NEXT: calll __atomic_store_8@PLT 726; I486-NEXT: addl $16, %esp 727; I486-NEXT: retl 728 store atomic i64 %x, i64* @sc64 release, align 8 729 ret void 730} 731 732define void @atomic_fetch_swap64(i64 %x) nounwind { 733; X64-LABEL: atomic_fetch_swap64: 734; X64: # %bb.0: 735; X64-NEXT: xchgq %rdi, sc64(%rip) 736; X64-NEXT: retq 737; 738; I486-LABEL: atomic_fetch_swap64: 739; I486: # %bb.0: 740; I486-NEXT: subl $16, %esp 741; I486-NEXT: movl {{[0-9]+}}(%esp), %edx 742; I486-NEXT: movl {{[0-9]+}}(%esp), %ecx 743; I486-NEXT: movl %esp, %eax 744; I486-NEXT: movl %edx, 8(%eax) 745; I486-NEXT: movl %ecx, 4(%eax) 746; I486-NEXT: movl $2, 12(%eax) 747; I486-NEXT: movl $sc64, (%eax) 748; I486-NEXT: calll __atomic_exchange_8@PLT 749; I486-NEXT: addl $16, %esp 750; I486-NEXT: retl 751 %t1 = atomicrmw xchg i64* @sc64, i64 %x acquire 752 ret void 753} 754 755define void @atomic_fetch_swapf64(double %x) nounwind { 756; X64-LABEL: atomic_fetch_swapf64: 757; X64: # %bb.0: 758; X64-NEXT: movq %xmm0, %rax 759; X64-NEXT: xchgq %rax, fsc64(%rip) 760; X64-NEXT: retq 761; 762; I486-LABEL: atomic_fetch_swapf64: 763; I486: # %bb.0: 764; I486-NEXT: pushl %ebp 765; I486-NEXT: movl %esp, %ebp 766; I486-NEXT: andl $-8, %esp 767; I486-NEXT: subl $24, %esp 768; I486-NEXT: fldl 8(%ebp) 769; I486-NEXT: fstpl {{[0-9]+}}(%esp) 770; I486-NEXT: movl {{[0-9]+}}(%esp), %ecx 771; I486-NEXT: movl {{[0-9]+}}(%esp), %edx 772; I486-NEXT: movl %esp, %eax 773; I486-NEXT: movl %edx, 8(%eax) 774; I486-NEXT: movl %ecx, 4(%eax) 775; I486-NEXT: movl $2, 12(%eax) 776; I486-NEXT: movl $fsc64, (%eax) 777; I486-NEXT: calll __atomic_exchange_8@PLT 778; I486-NEXT: movl %ebp, %esp 779; I486-NEXT: popl %ebp 780; I486-NEXT: retl 781 %t1 = atomicrmw xchg double* @fsc64, double %x acquire 782 ret void 783} 784 785define void @atomic_fetch_swapptr(i8* %x) nounwind { 786; X64-LABEL: atomic_fetch_swapptr: 787; X64: # %bb.0: 788; X64-NEXT: xchgq %rdi, psc64(%rip) 789; X64-NEXT: retq 790; 791; I486-LABEL: atomic_fetch_swapptr: 792; I486: # %bb.0: 793; I486-NEXT: movl {{[0-9]+}}(%esp), %eax 794; I486-NEXT: xchgl %eax, psc64 795; I486-NEXT: retl 796 %t1 = atomicrmw xchg i8** @psc64, i8* %x acquire 797 ret void 798} 799