1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -O0 -mtriple=x86_64-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X64
3; RUN: llc < %s -O0 -mtriple=i386-- -mcpu=i486 -verify-machineinstrs | FileCheck %s --check-prefix I486
4
5@sc64 = external dso_local global i64
6@fsc64 = external dso_local global double
7
8define void @atomic_fetch_add64() nounwind {
9; X64-LABEL: atomic_fetch_add64:
10; X64:       # %bb.0: # %entry
11; X64-NEXT:    lock incq sc64(%rip)
12; X64-NEXT:    lock addq $3, sc64(%rip)
13; X64-NEXT:    movl $5, %eax
14; X64-NEXT:    lock xaddq %rax, sc64(%rip)
15; X64-NEXT:    lock addq %rax, sc64(%rip)
16; X64-NEXT:    retq
17;
18; I486-LABEL: atomic_fetch_add64:
19; I486:       # %bb.0: # %entry
20; I486-NEXT:    subl $16, %esp
21; I486-NEXT:    leal sc64, %eax
22; I486-NEXT:    movl %esp, %eax
23; I486-NEXT:    movl $2, 12(%eax)
24; I486-NEXT:    movl $0, 8(%eax)
25; I486-NEXT:    movl $1, 4(%eax)
26; I486-NEXT:    movl $sc64, (%eax)
27; I486-NEXT:    calll __atomic_fetch_add_8@PLT
28; I486-NEXT:    leal sc64, %eax
29; I486-NEXT:    movl %esp, %eax
30; I486-NEXT:    movl $2, 12(%eax)
31; I486-NEXT:    movl $0, 8(%eax)
32; I486-NEXT:    movl $3, 4(%eax)
33; I486-NEXT:    movl $sc64, (%eax)
34; I486-NEXT:    calll __atomic_fetch_add_8@PLT
35; I486-NEXT:    leal sc64, %eax
36; I486-NEXT:    movl %esp, %eax
37; I486-NEXT:    movl $2, 12(%eax)
38; I486-NEXT:    movl $0, 8(%eax)
39; I486-NEXT:    movl $5, 4(%eax)
40; I486-NEXT:    movl $sc64, (%eax)
41; I486-NEXT:    calll __atomic_fetch_add_8@PLT
42; I486-NEXT:    movl %eax, %ecx
43; I486-NEXT:    leal sc64, %eax
44; I486-NEXT:    movl %esp, %eax
45; I486-NEXT:    movl %edx, 8(%eax)
46; I486-NEXT:    movl %ecx, 4(%eax)
47; I486-NEXT:    movl $2, 12(%eax)
48; I486-NEXT:    movl $sc64, (%eax)
49; I486-NEXT:    calll __atomic_fetch_add_8@PLT
50; I486-NEXT:    addl $16, %esp
51; I486-NEXT:    retl
52entry:
53  %t1 = atomicrmw add  i64* @sc64, i64 1 acquire
54  %t2 = atomicrmw add  i64* @sc64, i64 3 acquire
55  %t3 = atomicrmw add  i64* @sc64, i64 5 acquire
56  %t4 = atomicrmw add  i64* @sc64, i64 %t3 acquire
57  ret void
58}
59
60define void @atomic_fetch_sub64() nounwind {
61; X64-LABEL: atomic_fetch_sub64:
62; X64:       # %bb.0:
63; X64-NEXT:    lock decq sc64(%rip)
64; X64-NEXT:    lock subq $3, sc64(%rip)
65; X64-NEXT:    movq $-5, %rax
66; X64-NEXT:    lock xaddq %rax, sc64(%rip)
67; X64-NEXT:    lock subq %rax, sc64(%rip)
68; X64-NEXT:    retq
69;
70; I486-LABEL: atomic_fetch_sub64:
71; I486:       # %bb.0:
72; I486-NEXT:    subl $16, %esp
73; I486-NEXT:    leal sc64, %eax
74; I486-NEXT:    movl %esp, %eax
75; I486-NEXT:    movl $2, 12(%eax)
76; I486-NEXT:    movl $0, 8(%eax)
77; I486-NEXT:    movl $1, 4(%eax)
78; I486-NEXT:    movl $sc64, (%eax)
79; I486-NEXT:    calll __atomic_fetch_sub_8@PLT
80; I486-NEXT:    leal sc64, %eax
81; I486-NEXT:    movl %esp, %eax
82; I486-NEXT:    movl $2, 12(%eax)
83; I486-NEXT:    movl $0, 8(%eax)
84; I486-NEXT:    movl $3, 4(%eax)
85; I486-NEXT:    movl $sc64, (%eax)
86; I486-NEXT:    calll __atomic_fetch_sub_8@PLT
87; I486-NEXT:    leal sc64, %eax
88; I486-NEXT:    movl %esp, %eax
89; I486-NEXT:    movl $2, 12(%eax)
90; I486-NEXT:    movl $0, 8(%eax)
91; I486-NEXT:    movl $5, 4(%eax)
92; I486-NEXT:    movl $sc64, (%eax)
93; I486-NEXT:    calll __atomic_fetch_sub_8@PLT
94; I486-NEXT:    movl %eax, %ecx
95; I486-NEXT:    leal sc64, %eax
96; I486-NEXT:    movl %esp, %eax
97; I486-NEXT:    movl %edx, 8(%eax)
98; I486-NEXT:    movl %ecx, 4(%eax)
99; I486-NEXT:    movl $2, 12(%eax)
100; I486-NEXT:    movl $sc64, (%eax)
101; I486-NEXT:    calll __atomic_fetch_sub_8@PLT
102; I486-NEXT:    addl $16, %esp
103; I486-NEXT:    retl
104  %t1 = atomicrmw sub  i64* @sc64, i64 1 acquire
105  %t2 = atomicrmw sub  i64* @sc64, i64 3 acquire
106  %t3 = atomicrmw sub  i64* @sc64, i64 5 acquire
107  %t4 = atomicrmw sub  i64* @sc64, i64 %t3 acquire
108  ret void
109}
110
111define void @atomic_fetch_and64() nounwind {
112; X64-LABEL: atomic_fetch_and64:
113; X64:       # %bb.0:
114; X64-NEXT:    lock andq $3, sc64(%rip)
115; X64-NEXT:    movq sc64, %rax
116; X64-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
117; X64-NEXT:  .LBB2_1: # %atomicrmw.start
118; X64-NEXT:    # =>This Inner Loop Header: Depth=1
119; X64-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
120; X64-NEXT:    movl %eax, %ecx
121; X64-NEXT:    andl $5, %ecx
122; X64-NEXT:    # kill: def $rcx killed $ecx
123; X64-NEXT:    lock cmpxchgq %rcx, sc64(%rip)
124; X64-NEXT:    sete %cl
125; X64-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
126; X64-NEXT:    testb $1, %cl
127; X64-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
128; X64-NEXT:    jne .LBB2_2
129; X64-NEXT:    jmp .LBB2_1
130; X64-NEXT:  .LBB2_2: # %atomicrmw.end
131; X64-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
132; X64-NEXT:    lock andq %rax, sc64(%rip)
133; X64-NEXT:    retq
134;
135; I486-LABEL: atomic_fetch_and64:
136; I486:       # %bb.0:
137; I486-NEXT:    subl $16, %esp
138; I486-NEXT:    leal sc64, %eax
139; I486-NEXT:    movl %esp, %eax
140; I486-NEXT:    movl $2, 12(%eax)
141; I486-NEXT:    movl $0, 8(%eax)
142; I486-NEXT:    movl $3, 4(%eax)
143; I486-NEXT:    movl $sc64, (%eax)
144; I486-NEXT:    calll __atomic_fetch_and_8@PLT
145; I486-NEXT:    leal sc64, %eax
146; I486-NEXT:    movl %esp, %eax
147; I486-NEXT:    movl $2, 12(%eax)
148; I486-NEXT:    movl $0, 8(%eax)
149; I486-NEXT:    movl $5, 4(%eax)
150; I486-NEXT:    movl $sc64, (%eax)
151; I486-NEXT:    calll __atomic_fetch_and_8@PLT
152; I486-NEXT:    movl %eax, %ecx
153; I486-NEXT:    leal sc64, %eax
154; I486-NEXT:    movl %esp, %eax
155; I486-NEXT:    movl %edx, 8(%eax)
156; I486-NEXT:    movl %ecx, 4(%eax)
157; I486-NEXT:    movl $2, 12(%eax)
158; I486-NEXT:    movl $sc64, (%eax)
159; I486-NEXT:    calll __atomic_fetch_and_8@PLT
160; I486-NEXT:    addl $16, %esp
161; I486-NEXT:    retl
162  %t1 = atomicrmw and  i64* @sc64, i64 3 acquire
163  %t2 = atomicrmw and  i64* @sc64, i64 5 acquire
164  %t3 = atomicrmw and  i64* @sc64, i64 %t2 acquire
165  ret void
166}
167
168define void @atomic_fetch_or64() nounwind {
169; X64-LABEL: atomic_fetch_or64:
170; X64:       # %bb.0:
171; X64-NEXT:    lock orq $3, sc64(%rip)
172; X64-NEXT:    movq sc64, %rax
173; X64-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
174; X64-NEXT:  .LBB3_1: # %atomicrmw.start
175; X64-NEXT:    # =>This Inner Loop Header: Depth=1
176; X64-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
177; X64-NEXT:    movq %rax, %rcx
178; X64-NEXT:    orq $5, %rcx
179; X64-NEXT:    lock cmpxchgq %rcx, sc64(%rip)
180; X64-NEXT:    sete %cl
181; X64-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
182; X64-NEXT:    testb $1, %cl
183; X64-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
184; X64-NEXT:    jne .LBB3_2
185; X64-NEXT:    jmp .LBB3_1
186; X64-NEXT:  .LBB3_2: # %atomicrmw.end
187; X64-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
188; X64-NEXT:    lock orq %rax, sc64(%rip)
189; X64-NEXT:    retq
190;
191; I486-LABEL: atomic_fetch_or64:
192; I486:       # %bb.0:
193; I486-NEXT:    subl $16, %esp
194; I486-NEXT:    leal sc64, %eax
195; I486-NEXT:    movl %esp, %eax
196; I486-NEXT:    movl $2, 12(%eax)
197; I486-NEXT:    movl $0, 8(%eax)
198; I486-NEXT:    movl $3, 4(%eax)
199; I486-NEXT:    movl $sc64, (%eax)
200; I486-NEXT:    calll __atomic_fetch_or_8@PLT
201; I486-NEXT:    leal sc64, %eax
202; I486-NEXT:    movl %esp, %eax
203; I486-NEXT:    movl $2, 12(%eax)
204; I486-NEXT:    movl $0, 8(%eax)
205; I486-NEXT:    movl $5, 4(%eax)
206; I486-NEXT:    movl $sc64, (%eax)
207; I486-NEXT:    calll __atomic_fetch_or_8@PLT
208; I486-NEXT:    movl %eax, %ecx
209; I486-NEXT:    leal sc64, %eax
210; I486-NEXT:    movl %esp, %eax
211; I486-NEXT:    movl %edx, 8(%eax)
212; I486-NEXT:    movl %ecx, 4(%eax)
213; I486-NEXT:    movl $2, 12(%eax)
214; I486-NEXT:    movl $sc64, (%eax)
215; I486-NEXT:    calll __atomic_fetch_or_8@PLT
216; I486-NEXT:    addl $16, %esp
217; I486-NEXT:    retl
218  %t1 = atomicrmw or   i64* @sc64, i64 3 acquire
219  %t2 = atomicrmw or   i64* @sc64, i64 5 acquire
220  %t3 = atomicrmw or   i64* @sc64, i64 %t2 acquire
221  ret void
222}
223
224define void @atomic_fetch_xor64() nounwind {
225; X64-LABEL: atomic_fetch_xor64:
226; X64:       # %bb.0:
227; X64-NEXT:    lock xorq $3, sc64(%rip)
228; X64-NEXT:    movq sc64, %rax
229; X64-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
230; X64-NEXT:  .LBB4_1: # %atomicrmw.start
231; X64-NEXT:    # =>This Inner Loop Header: Depth=1
232; X64-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
233; X64-NEXT:    movq %rax, %rcx
234; X64-NEXT:    xorq $5, %rcx
235; X64-NEXT:    lock cmpxchgq %rcx, sc64(%rip)
236; X64-NEXT:    sete %cl
237; X64-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
238; X64-NEXT:    testb $1, %cl
239; X64-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
240; X64-NEXT:    jne .LBB4_2
241; X64-NEXT:    jmp .LBB4_1
242; X64-NEXT:  .LBB4_2: # %atomicrmw.end
243; X64-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
244; X64-NEXT:    lock xorq %rax, sc64(%rip)
245; X64-NEXT:    retq
246;
247; I486-LABEL: atomic_fetch_xor64:
248; I486:       # %bb.0:
249; I486-NEXT:    subl $16, %esp
250; I486-NEXT:    leal sc64, %eax
251; I486-NEXT:    movl %esp, %eax
252; I486-NEXT:    movl $2, 12(%eax)
253; I486-NEXT:    movl $0, 8(%eax)
254; I486-NEXT:    movl $3, 4(%eax)
255; I486-NEXT:    movl $sc64, (%eax)
256; I486-NEXT:    calll __atomic_fetch_xor_8@PLT
257; I486-NEXT:    leal sc64, %eax
258; I486-NEXT:    movl %esp, %eax
259; I486-NEXT:    movl $2, 12(%eax)
260; I486-NEXT:    movl $0, 8(%eax)
261; I486-NEXT:    movl $5, 4(%eax)
262; I486-NEXT:    movl $sc64, (%eax)
263; I486-NEXT:    calll __atomic_fetch_xor_8@PLT
264; I486-NEXT:    movl %eax, %ecx
265; I486-NEXT:    leal sc64, %eax
266; I486-NEXT:    movl %esp, %eax
267; I486-NEXT:    movl %edx, 8(%eax)
268; I486-NEXT:    movl %ecx, 4(%eax)
269; I486-NEXT:    movl $2, 12(%eax)
270; I486-NEXT:    movl $sc64, (%eax)
271; I486-NEXT:    calll __atomic_fetch_xor_8@PLT
272; I486-NEXT:    addl $16, %esp
273; I486-NEXT:    retl
274  %t1 = atomicrmw xor  i64* @sc64, i64 3 acquire
275  %t2 = atomicrmw xor  i64* @sc64, i64 5 acquire
276  %t3 = atomicrmw xor  i64* @sc64, i64 %t2 acquire
277  ret void
278}
279
280define void @atomic_fetch_nand64(i64 %x) nounwind {
281; X64-LABEL: atomic_fetch_nand64:
282; X64:       # %bb.0:
283; X64-NEXT:    movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
284; X64-NEXT:    movq sc64, %rax
285; X64-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
286; X64-NEXT:  .LBB5_1: # %atomicrmw.start
287; X64-NEXT:    # =>This Inner Loop Header: Depth=1
288; X64-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
289; X64-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload
290; X64-NEXT:    movq %rax, %rcx
291; X64-NEXT:    andq %rdx, %rcx
292; X64-NEXT:    movq %rcx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
293; X64-NEXT:    notq %rcx
294; X64-NEXT:    lock cmpxchgq %rcx, sc64(%rip)
295; X64-NEXT:    sete %cl
296; X64-NEXT:    testb $1, %cl
297; X64-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
298; X64-NEXT:    jne .LBB5_2
299; X64-NEXT:    jmp .LBB5_1
300; X64-NEXT:  .LBB5_2: # %atomicrmw.end
301; X64-NEXT:    retq
302;
303; I486-LABEL: atomic_fetch_nand64:
304; I486:       # %bb.0:
305; I486-NEXT:    subl $16, %esp
306; I486-NEXT:    movl {{[0-9]+}}(%esp), %edx
307; I486-NEXT:    movl {{[0-9]+}}(%esp), %ecx
308; I486-NEXT:    leal sc64, %eax
309; I486-NEXT:    movl %esp, %eax
310; I486-NEXT:    movl %edx, 8(%eax)
311; I486-NEXT:    movl %ecx, 4(%eax)
312; I486-NEXT:    movl $2, 12(%eax)
313; I486-NEXT:    movl $sc64, (%eax)
314; I486-NEXT:    calll __atomic_fetch_nand_8@PLT
315; I486-NEXT:    addl $16, %esp
316; I486-NEXT:    retl
317  %t1 = atomicrmw nand i64* @sc64, i64 %x acquire
318  ret void
319}
320
321define void @atomic_fetch_max64(i64 %x) nounwind {
322; X64-LABEL: atomic_fetch_max64:
323; X64:       # %bb.0:
324; X64-NEXT:    movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
325; X64-NEXT:    movq sc64, %rax
326; X64-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
327; X64-NEXT:  .LBB6_1: # %atomicrmw.start
328; X64-NEXT:    # =>This Inner Loop Header: Depth=1
329; X64-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
330; X64-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload
331; X64-NEXT:    movq %rax, %rdx
332; X64-NEXT:    subq %rcx, %rdx
333; X64-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
334; X64-NEXT:    cmovgq %rax, %rcx
335; X64-NEXT:    lock cmpxchgq %rcx, sc64(%rip)
336; X64-NEXT:    sete %cl
337; X64-NEXT:    testb $1, %cl
338; X64-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
339; X64-NEXT:    jne .LBB6_2
340; X64-NEXT:    jmp .LBB6_1
341; X64-NEXT:  .LBB6_2: # %atomicrmw.end
342; X64-NEXT:    retq
343;
344; I486-LABEL: atomic_fetch_max64:
345; I486:       # %bb.0:
346; I486-NEXT:    pushl %ebp
347; I486-NEXT:    movl %esp, %ebp
348; I486-NEXT:    pushl %esi
349; I486-NEXT:    andl $-8, %esp
350; I486-NEXT:    subl $72, %esp
351; I486-NEXT:    movl 12(%ebp), %eax
352; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
353; I486-NEXT:    movl 8(%ebp), %eax
354; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
355; I486-NEXT:    movl sc64+4, %eax
356; I486-NEXT:    movl sc64, %ecx
357; I486-NEXT:    movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
358; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
359; I486-NEXT:    jmp .LBB6_1
360; I486-NEXT:  .LBB6_1: # %atomicrmw.start
361; I486-NEXT:    # =>This Inner Loop Header: Depth=1
362; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
363; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
364; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
365; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
366; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
367; I486-NEXT:    movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
368; I486-NEXT:    subl %ecx, %esi
369; I486-NEXT:    sbbl %eax, %edx
370; I486-NEXT:    movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
371; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
372; I486-NEXT:    jl .LBB6_4
373; I486-NEXT:  # %bb.3: # %atomicrmw.start
374; I486-NEXT:    # in Loop: Header=BB6_1 Depth=1
375; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
376; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
377; I486-NEXT:    movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
378; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
379; I486-NEXT:  .LBB6_4: # %atomicrmw.start
380; I486-NEXT:    # in Loop: Header=BB6_1 Depth=1
381; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
382; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
383; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
384; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
385; I486-NEXT:    movl %esi, {{[0-9]+}}(%esp)
386; I486-NEXT:    movl %eax, {{[0-9]+}}(%esp)
387; I486-NEXT:    movl %esp, %eax
388; I486-NEXT:    movl %edx, 12(%eax)
389; I486-NEXT:    movl %ecx, 8(%eax)
390; I486-NEXT:    leal {{[0-9]+}}(%esp), %ecx
391; I486-NEXT:    movl %ecx, 4(%eax)
392; I486-NEXT:    movl $2, 20(%eax)
393; I486-NEXT:    movl $2, 16(%eax)
394; I486-NEXT:    movl $sc64, (%eax)
395; I486-NEXT:    calll __atomic_compare_exchange_8@PLT
396; I486-NEXT:    movb %al, %dl
397; I486-NEXT:    movl {{[0-9]+}}(%esp), %ecx
398; I486-NEXT:    movl {{[0-9]+}}(%esp), %eax
399; I486-NEXT:    testb %dl, %dl
400; I486-NEXT:    movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
401; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
402; I486-NEXT:    je .LBB6_1
403; I486-NEXT:    jmp .LBB6_2
404; I486-NEXT:  .LBB6_2: # %atomicrmw.end
405; I486-NEXT:    leal -4(%ebp), %esp
406; I486-NEXT:    popl %esi
407; I486-NEXT:    popl %ebp
408; I486-NEXT:    retl
409  %t1 = atomicrmw max  i64* @sc64, i64 %x acquire
410
411  ret void
412}
413
414define void @atomic_fetch_min64(i64 %x) nounwind {
415; X64-LABEL: atomic_fetch_min64:
416; X64:       # %bb.0:
417; X64-NEXT:    movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
418; X64-NEXT:    movq sc64, %rax
419; X64-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
420; X64-NEXT:  .LBB7_1: # %atomicrmw.start
421; X64-NEXT:    # =>This Inner Loop Header: Depth=1
422; X64-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
423; X64-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload
424; X64-NEXT:    movq %rax, %rdx
425; X64-NEXT:    subq %rcx, %rdx
426; X64-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
427; X64-NEXT:    cmovleq %rax, %rcx
428; X64-NEXT:    lock cmpxchgq %rcx, sc64(%rip)
429; X64-NEXT:    sete %cl
430; X64-NEXT:    testb $1, %cl
431; X64-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
432; X64-NEXT:    jne .LBB7_2
433; X64-NEXT:    jmp .LBB7_1
434; X64-NEXT:  .LBB7_2: # %atomicrmw.end
435; X64-NEXT:    retq
436;
437; I486-LABEL: atomic_fetch_min64:
438; I486:       # %bb.0:
439; I486-NEXT:    pushl %ebp
440; I486-NEXT:    movl %esp, %ebp
441; I486-NEXT:    pushl %esi
442; I486-NEXT:    andl $-8, %esp
443; I486-NEXT:    subl $72, %esp
444; I486-NEXT:    movl 12(%ebp), %eax
445; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
446; I486-NEXT:    movl 8(%ebp), %eax
447; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
448; I486-NEXT:    movl sc64+4, %eax
449; I486-NEXT:    movl sc64, %ecx
450; I486-NEXT:    movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
451; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
452; I486-NEXT:    jmp .LBB7_1
453; I486-NEXT:  .LBB7_1: # %atomicrmw.start
454; I486-NEXT:    # =>This Inner Loop Header: Depth=1
455; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
456; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
457; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
458; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
459; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
460; I486-NEXT:    movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
461; I486-NEXT:    subl %ecx, %esi
462; I486-NEXT:    sbbl %eax, %edx
463; I486-NEXT:    movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
464; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
465; I486-NEXT:    jge .LBB7_4
466; I486-NEXT:  # %bb.3: # %atomicrmw.start
467; I486-NEXT:    # in Loop: Header=BB7_1 Depth=1
468; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
469; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
470; I486-NEXT:    movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
471; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
472; I486-NEXT:  .LBB7_4: # %atomicrmw.start
473; I486-NEXT:    # in Loop: Header=BB7_1 Depth=1
474; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
475; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
476; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
477; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
478; I486-NEXT:    movl %esi, {{[0-9]+}}(%esp)
479; I486-NEXT:    movl %eax, {{[0-9]+}}(%esp)
480; I486-NEXT:    movl %esp, %eax
481; I486-NEXT:    movl %edx, 12(%eax)
482; I486-NEXT:    movl %ecx, 8(%eax)
483; I486-NEXT:    leal {{[0-9]+}}(%esp), %ecx
484; I486-NEXT:    movl %ecx, 4(%eax)
485; I486-NEXT:    movl $2, 20(%eax)
486; I486-NEXT:    movl $2, 16(%eax)
487; I486-NEXT:    movl $sc64, (%eax)
488; I486-NEXT:    calll __atomic_compare_exchange_8@PLT
489; I486-NEXT:    movb %al, %dl
490; I486-NEXT:    movl {{[0-9]+}}(%esp), %ecx
491; I486-NEXT:    movl {{[0-9]+}}(%esp), %eax
492; I486-NEXT:    testb %dl, %dl
493; I486-NEXT:    movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
494; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
495; I486-NEXT:    je .LBB7_1
496; I486-NEXT:    jmp .LBB7_2
497; I486-NEXT:  .LBB7_2: # %atomicrmw.end
498; I486-NEXT:    leal -4(%ebp), %esp
499; I486-NEXT:    popl %esi
500; I486-NEXT:    popl %ebp
501; I486-NEXT:    retl
502  %t1 = atomicrmw min  i64* @sc64, i64 %x acquire
503
504  ret void
505}
506
507define void @atomic_fetch_umax64(i64 %x) nounwind {
508; X64-LABEL: atomic_fetch_umax64:
509; X64:       # %bb.0:
510; X64-NEXT:    movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
511; X64-NEXT:    movq sc64, %rax
512; X64-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
513; X64-NEXT:  .LBB8_1: # %atomicrmw.start
514; X64-NEXT:    # =>This Inner Loop Header: Depth=1
515; X64-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
516; X64-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload
517; X64-NEXT:    movq %rax, %rdx
518; X64-NEXT:    subq %rcx, %rdx
519; X64-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
520; X64-NEXT:    cmovaq %rax, %rcx
521; X64-NEXT:    lock cmpxchgq %rcx, sc64(%rip)
522; X64-NEXT:    sete %cl
523; X64-NEXT:    testb $1, %cl
524; X64-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
525; X64-NEXT:    jne .LBB8_2
526; X64-NEXT:    jmp .LBB8_1
527; X64-NEXT:  .LBB8_2: # %atomicrmw.end
528; X64-NEXT:    retq
529;
530; I486-LABEL: atomic_fetch_umax64:
531; I486:       # %bb.0:
532; I486-NEXT:    pushl %ebp
533; I486-NEXT:    movl %esp, %ebp
534; I486-NEXT:    pushl %esi
535; I486-NEXT:    andl $-8, %esp
536; I486-NEXT:    subl $72, %esp
537; I486-NEXT:    movl 12(%ebp), %eax
538; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
539; I486-NEXT:    movl 8(%ebp), %eax
540; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
541; I486-NEXT:    movl sc64+4, %eax
542; I486-NEXT:    movl sc64, %ecx
543; I486-NEXT:    movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
544; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
545; I486-NEXT:    jmp .LBB8_1
546; I486-NEXT:  .LBB8_1: # %atomicrmw.start
547; I486-NEXT:    # =>This Inner Loop Header: Depth=1
548; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
549; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
550; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
551; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
552; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
553; I486-NEXT:    movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
554; I486-NEXT:    subl %ecx, %esi
555; I486-NEXT:    sbbl %eax, %edx
556; I486-NEXT:    movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
557; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
558; I486-NEXT:    jb .LBB8_4
559; I486-NEXT:  # %bb.3: # %atomicrmw.start
560; I486-NEXT:    # in Loop: Header=BB8_1 Depth=1
561; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
562; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
563; I486-NEXT:    movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
564; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
565; I486-NEXT:  .LBB8_4: # %atomicrmw.start
566; I486-NEXT:    # in Loop: Header=BB8_1 Depth=1
567; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
568; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
569; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
570; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
571; I486-NEXT:    movl %esi, {{[0-9]+}}(%esp)
572; I486-NEXT:    movl %eax, {{[0-9]+}}(%esp)
573; I486-NEXT:    movl %esp, %eax
574; I486-NEXT:    movl %edx, 12(%eax)
575; I486-NEXT:    movl %ecx, 8(%eax)
576; I486-NEXT:    leal {{[0-9]+}}(%esp), %ecx
577; I486-NEXT:    movl %ecx, 4(%eax)
578; I486-NEXT:    movl $2, 20(%eax)
579; I486-NEXT:    movl $2, 16(%eax)
580; I486-NEXT:    movl $sc64, (%eax)
581; I486-NEXT:    calll __atomic_compare_exchange_8@PLT
582; I486-NEXT:    movb %al, %dl
583; I486-NEXT:    movl {{[0-9]+}}(%esp), %ecx
584; I486-NEXT:    movl {{[0-9]+}}(%esp), %eax
585; I486-NEXT:    testb %dl, %dl
586; I486-NEXT:    movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
587; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
588; I486-NEXT:    je .LBB8_1
589; I486-NEXT:    jmp .LBB8_2
590; I486-NEXT:  .LBB8_2: # %atomicrmw.end
591; I486-NEXT:    leal -4(%ebp), %esp
592; I486-NEXT:    popl %esi
593; I486-NEXT:    popl %ebp
594; I486-NEXT:    retl
595  %t1 = atomicrmw umax i64* @sc64, i64 %x acquire
596
597  ret void
598}
599
600define void @atomic_fetch_umin64(i64 %x) nounwind {
601; X64-LABEL: atomic_fetch_umin64:
602; X64:       # %bb.0:
603; X64-NEXT:    movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
604; X64-NEXT:    movq sc64, %rax
605; X64-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
606; X64-NEXT:  .LBB9_1: # %atomicrmw.start
607; X64-NEXT:    # =>This Inner Loop Header: Depth=1
608; X64-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload
609; X64-NEXT:    movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload
610; X64-NEXT:    movq %rax, %rdx
611; X64-NEXT:    subq %rcx, %rdx
612; X64-NEXT:    movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
613; X64-NEXT:    cmovbeq %rax, %rcx
614; X64-NEXT:    lock cmpxchgq %rcx, sc64(%rip)
615; X64-NEXT:    sete %cl
616; X64-NEXT:    testb $1, %cl
617; X64-NEXT:    movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
618; X64-NEXT:    jne .LBB9_2
619; X64-NEXT:    jmp .LBB9_1
620; X64-NEXT:  .LBB9_2: # %atomicrmw.end
621; X64-NEXT:    retq
622;
623; I486-LABEL: atomic_fetch_umin64:
624; I486:       # %bb.0:
625; I486-NEXT:    pushl %ebp
626; I486-NEXT:    movl %esp, %ebp
627; I486-NEXT:    pushl %esi
628; I486-NEXT:    andl $-8, %esp
629; I486-NEXT:    subl $72, %esp
630; I486-NEXT:    movl 12(%ebp), %eax
631; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
632; I486-NEXT:    movl 8(%ebp), %eax
633; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
634; I486-NEXT:    movl sc64+4, %eax
635; I486-NEXT:    movl sc64, %ecx
636; I486-NEXT:    movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
637; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
638; I486-NEXT:    jmp .LBB9_1
639; I486-NEXT:  .LBB9_1: # %atomicrmw.start
640; I486-NEXT:    # =>This Inner Loop Header: Depth=1
641; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
642; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
643; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
644; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
645; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
646; I486-NEXT:    movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
647; I486-NEXT:    subl %ecx, %esi
648; I486-NEXT:    sbbl %eax, %edx
649; I486-NEXT:    movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
650; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
651; I486-NEXT:    jae .LBB9_4
652; I486-NEXT:  # %bb.3: # %atomicrmw.start
653; I486-NEXT:    # in Loop: Header=BB9_1 Depth=1
654; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
655; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
656; I486-NEXT:    movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
657; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
658; I486-NEXT:  .LBB9_4: # %atomicrmw.start
659; I486-NEXT:    # in Loop: Header=BB9_1 Depth=1
660; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
661; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
662; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
663; I486-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
664; I486-NEXT:    movl %esi, {{[0-9]+}}(%esp)
665; I486-NEXT:    movl %eax, {{[0-9]+}}(%esp)
666; I486-NEXT:    movl %esp, %eax
667; I486-NEXT:    movl %edx, 12(%eax)
668; I486-NEXT:    movl %ecx, 8(%eax)
669; I486-NEXT:    leal {{[0-9]+}}(%esp), %ecx
670; I486-NEXT:    movl %ecx, 4(%eax)
671; I486-NEXT:    movl $2, 20(%eax)
672; I486-NEXT:    movl $2, 16(%eax)
673; I486-NEXT:    movl $sc64, (%eax)
674; I486-NEXT:    calll __atomic_compare_exchange_8@PLT
675; I486-NEXT:    movb %al, %dl
676; I486-NEXT:    movl {{[0-9]+}}(%esp), %ecx
677; I486-NEXT:    movl {{[0-9]+}}(%esp), %eax
678; I486-NEXT:    testb %dl, %dl
679; I486-NEXT:    movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
680; I486-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
681; I486-NEXT:    je .LBB9_1
682; I486-NEXT:    jmp .LBB9_2
683; I486-NEXT:  .LBB9_2: # %atomicrmw.end
684; I486-NEXT:    leal -4(%ebp), %esp
685; I486-NEXT:    popl %esi
686; I486-NEXT:    popl %ebp
687; I486-NEXT:    retl
688  %t1 = atomicrmw umin i64* @sc64, i64 %x acquire
689
690  ret void
691}
692
693define void @atomic_fetch_cmpxchg64() nounwind {
694; X64-LABEL: atomic_fetch_cmpxchg64:
695; X64:       # %bb.0:
696; X64-NEXT:    xorl %eax, %eax
697; X64-NEXT:    # kill: def $rax killed $eax
698; X64-NEXT:    movl $1, %ecx
699; X64-NEXT:    lock cmpxchgq %rcx, sc64(%rip)
700; X64-NEXT:    retq
701;
702; I486-LABEL: atomic_fetch_cmpxchg64:
703; I486:       # %bb.0:
704; I486-NEXT:    pushl %ebp
705; I486-NEXT:    movl %esp, %ebp
706; I486-NEXT:    andl $-8, %esp
707; I486-NEXT:    subl $32, %esp
708; I486-NEXT:    leal {{[0-9]+}}(%esp), %ecx
709; I486-NEXT:    movl $0, {{[0-9]+}}(%esp)
710; I486-NEXT:    movl $0, {{[0-9]+}}(%esp)
711; I486-NEXT:    leal sc64, %eax
712; I486-NEXT:    movl %esp, %eax
713; I486-NEXT:    movl %ecx, 4(%eax)
714; I486-NEXT:    movl $2, 20(%eax)
715; I486-NEXT:    movl $2, 16(%eax)
716; I486-NEXT:    movl $0, 12(%eax)
717; I486-NEXT:    movl $1, 8(%eax)
718; I486-NEXT:    movl $sc64, (%eax)
719; I486-NEXT:    calll __atomic_compare_exchange_8@PLT
720; I486-NEXT:    movl %ebp, %esp
721; I486-NEXT:    popl %ebp
722; I486-NEXT:    retl
723  %t1 = cmpxchg i64* @sc64, i64 0, i64 1 acquire acquire
724  ret void
725}
726
727define void @atomic_fetch_store64(i64 %x) nounwind {
728; X64-LABEL: atomic_fetch_store64:
729; X64:       # %bb.0:
730; X64-NEXT:    movq %rdi, sc64(%rip)
731; X64-NEXT:    retq
732;
733; I486-LABEL: atomic_fetch_store64:
734; I486:       # %bb.0:
735; I486-NEXT:    subl $16, %esp
736; I486-NEXT:    movl {{[0-9]+}}(%esp), %edx
737; I486-NEXT:    movl {{[0-9]+}}(%esp), %ecx
738; I486-NEXT:    leal sc64, %eax
739; I486-NEXT:    movl %esp, %eax
740; I486-NEXT:    movl %edx, 8(%eax)
741; I486-NEXT:    movl %ecx, 4(%eax)
742; I486-NEXT:    movl $3, 12(%eax)
743; I486-NEXT:    movl $sc64, (%eax)
744; I486-NEXT:    calll __atomic_store_8@PLT
745; I486-NEXT:    addl $16, %esp
746; I486-NEXT:    retl
747  store atomic i64 %x, i64* @sc64 release, align 8
748  ret void
749}
750
751define void @atomic_fetch_swap64(i64 %x) nounwind {
752; X64-LABEL: atomic_fetch_swap64:
753; X64:       # %bb.0:
754; X64-NEXT:    xchgq %rdi, sc64(%rip)
755; X64-NEXT:    retq
756;
757; I486-LABEL: atomic_fetch_swap64:
758; I486:       # %bb.0:
759; I486-NEXT:    subl $16, %esp
760; I486-NEXT:    movl {{[0-9]+}}(%esp), %edx
761; I486-NEXT:    movl {{[0-9]+}}(%esp), %ecx
762; I486-NEXT:    leal sc64, %eax
763; I486-NEXT:    movl %esp, %eax
764; I486-NEXT:    movl %edx, 8(%eax)
765; I486-NEXT:    movl %ecx, 4(%eax)
766; I486-NEXT:    movl $2, 12(%eax)
767; I486-NEXT:    movl $sc64, (%eax)
768; I486-NEXT:    calll __atomic_exchange_8@PLT
769; I486-NEXT:    addl $16, %esp
770; I486-NEXT:    retl
771  %t1 = atomicrmw xchg i64* @sc64, i64 %x acquire
772  ret void
773}
774
775define void @atomic_fetch_swapf64(double %x) nounwind {
776; X64-LABEL: atomic_fetch_swapf64:
777; X64:       # %bb.0:
778; X64-NEXT:    movq %xmm0, %rax
779; X64-NEXT:    xchgq %rax, fsc64(%rip)
780; X64-NEXT:    retq
781;
782; I486-LABEL: atomic_fetch_swapf64:
783; I486:       # %bb.0:
784; I486-NEXT:    pushl %ebp
785; I486-NEXT:    movl %esp, %ebp
786; I486-NEXT:    andl $-8, %esp
787; I486-NEXT:    subl $24, %esp
788; I486-NEXT:    fldl 8(%ebp)
789; I486-NEXT:    fstpl {{[0-9]+}}(%esp)
790; I486-NEXT:    movl {{[0-9]+}}(%esp), %ecx
791; I486-NEXT:    movl {{[0-9]+}}(%esp), %edx
792; I486-NEXT:    leal fsc64, %eax
793; I486-NEXT:    movl %esp, %eax
794; I486-NEXT:    movl %edx, 8(%eax)
795; I486-NEXT:    movl %ecx, 4(%eax)
796; I486-NEXT:    movl $2, 12(%eax)
797; I486-NEXT:    movl $fsc64, (%eax)
798; I486-NEXT:    calll __atomic_exchange_8@PLT
799; I486-NEXT:    movl %ebp, %esp
800; I486-NEXT:    popl %ebp
801; I486-NEXT:    retl
802  %t1 = atomicrmw xchg double* @fsc64, double %x acquire
803  ret void
804}
805