1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mcpu=corei7 -mtriple=i686-- -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=SSE42 3; RUN: llc < %s -mtriple=i686-- -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=NOSSE 4 5; 64-bit load/store on x86-32 6; FIXME: The generated code can be substantially improved. 7 8define void @test1(i64* %ptr, i64 %val1) { 9; CHECK-LABEL: test1: 10; CHECK: # %bb.0: 11; CHECK-NEXT: pushl %ebx 12; CHECK-NEXT: .cfi_def_cfa_offset 8 13; CHECK-NEXT: pushl %esi 14; CHECK-NEXT: .cfi_def_cfa_offset 12 15; CHECK-NEXT: .cfi_offset %esi, -12 16; CHECK-NEXT: .cfi_offset %ebx, -8 17; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx 18; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ebx 19; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi 20; CHECK-NEXT: movl (%esi), %eax 21; CHECK-NEXT: movl 4(%esi), %edx 22; CHECK-NEXT: .p2align 4, 0x90 23; CHECK-NEXT: .LBB0_1: # %atomicrmw.start 24; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 25; CHECK-NEXT: lock cmpxchg8b (%esi) 26; CHECK-NEXT: jne .LBB0_1 27; CHECK-NEXT: # %bb.2: # %atomicrmw.end 28; CHECK-NEXT: popl %esi 29; CHECK-NEXT: .cfi_def_cfa_offset 8 30; CHECK-NEXT: popl %ebx 31; CHECK-NEXT: .cfi_def_cfa_offset 4 32; CHECK-NEXT: retl 33 store atomic i64 %val1, i64* %ptr seq_cst, align 8 34 ret void 35} 36 37define i64 @test2(i64* %ptr) { 38; SSE42-LABEL: test2: 39; SSE42: # %bb.0: 40; SSE42-NEXT: movl {{[0-9]+}}(%esp), %eax 41; SSE42-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 42; SSE42-NEXT: movd %xmm0, %eax 43; SSE42-NEXT: pextrd $1, %xmm0, %edx 44; SSE42-NEXT: retl 45; 46; NOSSE-LABEL: test2: 47; NOSSE: # %bb.0: 48; NOSSE-NEXT: pushl %ebx 49; NOSSE-NEXT: .cfi_def_cfa_offset 8 50; NOSSE-NEXT: pushl %esi 51; NOSSE-NEXT: .cfi_def_cfa_offset 12 52; NOSSE-NEXT: .cfi_offset %esi, -12 53; NOSSE-NEXT: .cfi_offset %ebx, -8 54; NOSSE-NEXT: movl {{[0-9]+}}(%esp), %esi 55; NOSSE-NEXT: xorl %eax, %eax 56; NOSSE-NEXT: xorl %edx, %edx 57; NOSSE-NEXT: xorl %ecx, %ecx 58; NOSSE-NEXT: xorl %ebx, %ebx 59; NOSSE-NEXT: lock cmpxchg8b (%esi) 60; NOSSE-NEXT: popl %esi 61; NOSSE-NEXT: .cfi_def_cfa_offset 8 62; NOSSE-NEXT: popl %ebx 63; NOSSE-NEXT: .cfi_def_cfa_offset 4 64; NOSSE-NEXT: retl 65 %val = load atomic i64, i64* %ptr seq_cst, align 8 66 ret i64 %val 67} 68 69; Same as test2, but with noimplicitfloat. 70define i64 @test3(i64* %ptr) noimplicitfloat { 71; CHECK-LABEL: test3: 72; CHECK: # %bb.0: 73; CHECK-NEXT: pushl %ebx 74; CHECK-NEXT: .cfi_def_cfa_offset 8 75; CHECK-NEXT: pushl %esi 76; CHECK-NEXT: .cfi_def_cfa_offset 12 77; CHECK-NEXT: .cfi_offset %esi, -12 78; CHECK-NEXT: .cfi_offset %ebx, -8 79; CHECK-NEXT: movl {{[0-9]+}}(%esp), %esi 80; CHECK-NEXT: xorl %eax, %eax 81; CHECK-NEXT: xorl %edx, %edx 82; CHECK-NEXT: xorl %ecx, %ecx 83; CHECK-NEXT: xorl %ebx, %ebx 84; CHECK-NEXT: lock cmpxchg8b (%esi) 85; CHECK-NEXT: popl %esi 86; CHECK-NEXT: .cfi_def_cfa_offset 8 87; CHECK-NEXT: popl %ebx 88; CHECK-NEXT: .cfi_def_cfa_offset 4 89; CHECK-NEXT: retl 90 %val = load atomic i64, i64* %ptr seq_cst, align 8 91 ret i64 %val 92} 93