1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs | FileCheck %s
3@buf = dso_local global [3072 x i8] zeroinitializer, align 16
4
5define dso_local void @test1(i16 signext %0, i16 signext %1) nounwind {
6; CHECK-LABEL: test1:
7; CHECK:       # %bb.0:
8; CHECK-NEXT:    vpxord %zmm0, %zmm0, %zmm0
9; CHECK-NEXT:    vmovdqu64 %zmm0, -{{[0-9]+}}(%rsp)
10; CHECK-NEXT:    movb $1, -{{[0-9]+}}(%rsp)
11; CHECK-NEXT:    movb %dil, -{{[0-9]+}}(%rsp)
12; CHECK-NEXT:    movw $8, -{{[0-9]+}}(%rsp)
13; CHECK-NEXT:    movb $8, -{{[0-9]+}}(%rsp)
14; CHECK-NEXT:    movw %si, -{{[0-9]+}}(%rsp)
15; CHECK-NEXT:    movb %dil, -{{[0-9]+}}(%rsp)
16; CHECK-NEXT:    movw %si, -{{[0-9]+}}(%rsp)
17; CHECK-NEXT:    ldtilecfg -{{[0-9]+}}(%rsp)
18; CHECK-NEXT:    movl $buf, %eax
19; CHECK-NEXT:    movl $32, %ecx
20; CHECK-NEXT:    movw $8, %dx
21; CHECK-NEXT:    tileloadd (%rax,%rcx), %tmm0
22; CHECK-NEXT:    movl $buf+1024, %eax
23; CHECK-NEXT:    tileloadd (%rax,%rcx), %tmm1
24; CHECK-NEXT:    movl $buf+2048, %eax
25; CHECK-NEXT:    tileloadd (%rax,%rcx), %tmm2
26; CHECK-NEXT:    tdpbssd %tmm1, %tmm0, %tmm2
27; CHECK-NEXT:    tilestored %tmm2, (%rax,%rcx)
28; CHECK-NEXT:    tilerelease
29; CHECK-NEXT:    vzeroupper
30; CHECK-NEXT:    jmp foo # TAILCALL
31  %3 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %0, i16 8, i8* getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 0), i64 32)
32  %4 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 %1, i8* getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 1024), i64 32)
33  %5 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %0, i16 %1, i8* getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 2048), i64 32)
34  %6 = tail call x86_amx @llvm.x86.tdpbssd.internal(i16 %0, i16 %1, i16 8, x86_amx %5, x86_amx %3, x86_amx %4)
35  tail call void @llvm.x86.tilestored64.internal(i16 %0, i16 %1, i8* getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 2048), i64 32, x86_amx %6)
36  tail call void @foo()
37  ret void
38}
39
40define dso_local void @test2(i16 signext %0, i16 signext %1) nounwind {
41; CHECK-LABEL: test2:
42; CHECK:       # %bb.0:
43; CHECK-NEXT:    pushq %rbp
44; CHECK-NEXT:    pushq %rbx
45; CHECK-NEXT:    subq $72, %rsp
46; CHECK-NEXT:    movl %esi, %ebx
47; CHECK-NEXT:    movl %edi, %ebp
48; CHECK-NEXT:    vpxord %zmm0, %zmm0, %zmm0
49; CHECK-NEXT:    vmovdqu64 %zmm0, {{[0-9]+}}(%rsp)
50; CHECK-NEXT:    movb $1, {{[0-9]+}}(%rsp)
51; CHECK-NEXT:    movb $8, {{[0-9]+}}(%rsp)
52; CHECK-NEXT:    movw %bx, {{[0-9]+}}(%rsp)
53; CHECK-NEXT:    movb %bpl, {{[0-9]+}}(%rsp)
54; CHECK-NEXT:    movw %bx, {{[0-9]+}}(%rsp)
55; CHECK-NEXT:    movb %bpl, {{[0-9]+}}(%rsp)
56; CHECK-NEXT:    movw $8, {{[0-9]+}}(%rsp)
57; CHECK-NEXT:    movb $8, {{[0-9]+}}(%rsp)
58; CHECK-NEXT:    movw %bx, {{[0-9]+}}(%rsp)
59; CHECK-NEXT:    movb %bpl, {{[0-9]+}}(%rsp)
60; CHECK-NEXT:    movw $8, {{[0-9]+}}(%rsp)
61; CHECK-NEXT:    ldtilecfg {{[0-9]+}}(%rsp)
62; CHECK-NEXT:    vzeroupper
63; CHECK-NEXT:    callq foo
64; CHECK-NEXT:    ldtilecfg {{[0-9]+}}(%rsp)
65; CHECK-NEXT:    xorl %eax, %eax
66; CHECK-NEXT:    testb %al, %al
67; CHECK-NEXT:    jne .LBB1_3
68; CHECK-NEXT:  # %bb.1: # %if.true
69; CHECK-NEXT:    movw $8, %ax
70; CHECK-NEXT:    tilezero %tmm0
71; CHECK-NEXT:    movl $32, %ecx
72; CHECK-NEXT:    movl $buf+1024, %edx
73; CHECK-NEXT:    tileloadd (%rdx,%rcx), %tmm1
74; CHECK-NEXT:    movl $buf+2048, %edx
75; CHECK-NEXT:    tileloadd (%rdx,%rcx), %tmm2
76; CHECK-NEXT:    tdpbssd %tmm2, %tmm1, %tmm0
77; CHECK-NEXT:    tilestored %tmm0, (%rdx,%rcx)
78; CHECK-NEXT:    jmp .LBB1_2
79; CHECK-NEXT:  .LBB1_3: # %if.false
80; CHECK-NEXT:    movl $buf, %eax
81; CHECK-NEXT:    movl $32, %ecx
82; CHECK-NEXT:    movw $8, %dx
83; CHECK-NEXT:    tileloadd (%rax,%rcx), %tmm3
84; CHECK-NEXT:    movl $buf+1024, %eax
85; CHECK-NEXT:    tileloadd (%rax,%rcx), %tmm4
86; CHECK-NEXT:    movl $buf+2048, %eax
87; CHECK-NEXT:    tileloadd (%rax,%rcx), %tmm2
88; CHECK-NEXT:    tdpbssd %tmm2, %tmm4, %tmm3
89; CHECK-NEXT:    tilestored %tmm3, (%rax,%rcx)
90; CHECK-NEXT:  .LBB1_2: # %if.true
91; CHECK-NEXT:    addq $72, %rsp
92; CHECK-NEXT:    popq %rbx
93; CHECK-NEXT:    popq %rbp
94; CHECK-NEXT:    tilerelease
95; CHECK-NEXT:    retq
96  call void @foo()
97  br i1 undef, label %if.true, label %if.false
98
99if.true:
100  %t1 = tail call x86_amx @llvm.x86.tilezero.internal(i16 %0, i16 8)
101  %t2 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 %1, i8* getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 1024), i64 32)
102  %t3 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %0, i16 %1, i8* getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 2048), i64 32)
103  %t4 = tail call x86_amx @llvm.x86.tdpbssd.internal(i16 %0, i16 %1, i16 8, x86_amx %t1, x86_amx %t2, x86_amx %t3)
104  tail call void @llvm.x86.tilestored64.internal(i16 %0, i16 %1, i8* getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 2048), i64 32, x86_amx %t4)
105  br label %exit
106
107if.false:
108  %t5 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %0, i16 8, i8* getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 0), i64 32)
109  %t6 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 %1, i8* getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 1024), i64 32)
110  %t7 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %0, i16 %1, i8* getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 2048), i64 32)
111  %t8 = tail call x86_amx @llvm.x86.tdpbssd.internal(i16 %0, i16 %1, i16 8, x86_amx %t5, x86_amx %t6, x86_amx %t7)
112  tail call void @llvm.x86.tilestored64.internal(i16 %0, i16 %1, i8* getelementptr inbounds ([3072 x i8], [3072 x i8]* @buf, i64 0, i64 2048), i64 32, x86_amx %t8)
113  br label %exit
114
115exit:
116  ret void
117}
118
119declare dso_local void @foo() nounwind
120declare x86_amx @llvm.x86.tilezero.internal(i16, i16)
121declare x86_amx @llvm.x86.tileloadd64.internal(i16, i16, i8*, i64)
122declare x86_amx @llvm.x86.tdpbssd.internal(i16, i16, i16, x86_amx, x86_amx, x86_amx)
123declare void @llvm.x86.tilestored64.internal(i16, i16, i8*, i64, x86_amx)
124