1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f | FileCheck %s --check-prefix=AVX512 3 4@buf = dso_local global [1024 x i8] zeroinitializer, align 16 5@buf2 = dso_local global [1024 x i8] zeroinitializer, align 16 6 7define dso_local void @test_api(i32 %cond, i16 signext %row, i16 signext %col) nounwind { 8; AVX512-LABEL: test_api: 9; AVX512: # %bb.0: # %entry 10; AVX512-NEXT: pushq %rbp 11; AVX512-NEXT: movq %rsp, %rbp 12; AVX512-NEXT: andq $-1024, %rsp # imm = 0xFC00 13; AVX512-NEXT: subq $8192, %rsp # imm = 0x2000 14; AVX512-NEXT: vxorps %xmm0, %xmm0, %xmm0 15; AVX512-NEXT: vmovups %zmm0, {{[0-9]+}}(%rsp) 16; AVX512-NEXT: movb $1, {{[0-9]+}}(%rsp) 17; AVX512-NEXT: movw %dx, %ax 18; AVX512-NEXT: movw %ax, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill 19; AVX512-NEXT: movw %si, %ax 20; AVX512-NEXT: movw %ax, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill 21; AVX512-NEXT: leaq {{[0-9]+}}(%rsp), %rax 22; AVX512-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 23; AVX512-NEXT: leaq {{[0-9]+}}(%rsp), %rax 24; AVX512-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 25; AVX512-NEXT: leaq {{[0-9]+}}(%rsp), %rax 26; AVX512-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 27; AVX512-NEXT: leaq {{[0-9]+}}(%rsp), %rax 28; AVX512-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill 29; AVX512-NEXT: cmpl $0, %edi 30; AVX512-NEXT: je .LBB0_2 31; AVX512-NEXT: # %bb.1: # %if.then 32; AVX512-NEXT: movw {{[-0-9]+}}(%r{{[sb]}}p), %ax # 2-byte Reload 33; AVX512-NEXT: movw {{[-0-9]+}}(%r{{[sb]}}p), %cx # 2-byte Reload 34; AVX512-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload 35; AVX512-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Reload 36; AVX512-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r8 # 8-byte Reload 37; AVX512-NEXT: movl $buf, %r9d 38; AVX512-NEXT: movl $32, %r10d 39; AVX512-NEXT: movw $8, %si 40; AVX512-NEXT: # implicit-def: $al 41; AVX512-NEXT: movb %al, {{[0-9]+}}(%rsp) 42; AVX512-NEXT: movw %si, {{[0-9]+}}(%rsp) 43; AVX512-NEXT: ldtilecfg {{[0-9]+}}(%rsp) 44; AVX512-NEXT: tileloadd (%r9,%r10), %tmm0 45; AVX512-NEXT: movl $64, %r9d 46; AVX512-NEXT: movw $8, %si 47; AVX512-NEXT: tilestored %tmm0, (%r8,%r9) 48; AVX512-NEXT: movl $buf, %r8d 49; AVX512-NEXT: movl $32, %r9d 50; AVX512-NEXT: movw $8, %si 51; AVX512-NEXT: # implicit-def: $al 52; AVX512-NEXT: movb %al, {{[0-9]+}}(%rsp) 53; AVX512-NEXT: movw %cx, {{[0-9]+}}(%rsp) 54; AVX512-NEXT: # implicit-def: $sil 55; AVX512-NEXT: movb %sil, {{[0-9]+}}(%rsp) 56; AVX512-NEXT: movw %cx, {{[0-9]+}}(%rsp) 57; AVX512-NEXT: ldtilecfg {{[0-9]+}}(%rsp) 58; AVX512-NEXT: tileloadd (%r8,%r9), %tmm0 59; AVX512-NEXT: movl $64, %r8d 60; AVX512-NEXT: movw $8, %si 61; AVX512-NEXT: tilestored %tmm0, (%rdi,%r8) 62; AVX512-NEXT: movl $buf, %esi 63; AVX512-NEXT: movl $32, %edi 64; AVX512-NEXT: tileloadd (%rsi,%rdi), %tmm0 65; AVX512-NEXT: movl $64, %esi 66; AVX512-NEXT: tilestored %tmm0, (%rdx,%rsi) 67; AVX512-NEXT: jmp .LBB0_3 68; AVX512-NEXT: .LBB0_2: # %if.else 69; AVX512-NEXT: movw {{[-0-9]+}}(%r{{[sb]}}p), %ax # 2-byte Reload 70; AVX512-NEXT: movw {{[-0-9]+}}(%r{{[sb]}}p), %cx # 2-byte Reload 71; AVX512-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload 72; AVX512-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Reload 73; AVX512-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r8 # 8-byte Reload 74; AVX512-NEXT: movl $buf2, %r9d 75; AVX512-NEXT: movl $32, %r10d 76; AVX512-NEXT: movw $8, %si 77; AVX512-NEXT: # implicit-def: $al 78; AVX512-NEXT: movb %al, {{[0-9]+}}(%rsp) 79; AVX512-NEXT: movw %si, {{[0-9]+}}(%rsp) 80; AVX512-NEXT: ldtilecfg {{[0-9]+}}(%rsp) 81; AVX512-NEXT: tileloadd (%r9,%r10), %tmm0 82; AVX512-NEXT: movl $64, %r9d 83; AVX512-NEXT: movw $8, %si 84; AVX512-NEXT: tilestored %tmm0, (%r8,%r9) 85; AVX512-NEXT: movl $buf2, %r8d 86; AVX512-NEXT: movl $32, %r9d 87; AVX512-NEXT: movw $8, %si 88; AVX512-NEXT: # implicit-def: $al 89; AVX512-NEXT: movb %al, {{[0-9]+}}(%rsp) 90; AVX512-NEXT: movw %cx, {{[0-9]+}}(%rsp) 91; AVX512-NEXT: # implicit-def: $sil 92; AVX512-NEXT: movb %sil, {{[0-9]+}}(%rsp) 93; AVX512-NEXT: movw %cx, {{[0-9]+}}(%rsp) 94; AVX512-NEXT: ldtilecfg {{[0-9]+}}(%rsp) 95; AVX512-NEXT: tileloadd (%r8,%r9), %tmm0 96; AVX512-NEXT: movl $64, %r8d 97; AVX512-NEXT: movw $8, %si 98; AVX512-NEXT: tilestored %tmm0, (%rdi,%r8) 99; AVX512-NEXT: movl $buf2, %esi 100; AVX512-NEXT: movl $32, %edi 101; AVX512-NEXT: tileloadd (%rsi,%rdi), %tmm0 102; AVX512-NEXT: movl $64, %esi 103; AVX512-NEXT: tilestored %tmm0, (%rdx,%rsi) 104; AVX512-NEXT: .LBB0_3: # %if.end 105; AVX512-NEXT: movw {{[-0-9]+}}(%r{{[sb]}}p), %ax # 2-byte Reload 106; AVX512-NEXT: movw {{[-0-9]+}}(%r{{[sb]}}p), %cx # 2-byte Reload 107; AVX512-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload 108; AVX512-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload 109; AVX512-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r9 # 8-byte Reload 110; AVX512-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r8 # 8-byte Reload 111; AVX512-NEXT: movl $64, %r10d 112; AVX512-NEXT: movw $8, %di 113; AVX512-NEXT: # implicit-def: $al 114; AVX512-NEXT: movb %al, {{[0-9]+}}(%rsp) 115; AVX512-NEXT: movw %di, {{[0-9]+}}(%rsp) 116; AVX512-NEXT: ldtilecfg {{[0-9]+}}(%rsp) 117; AVX512-NEXT: tileloadd (%r8,%r10), %tmm0 118; AVX512-NEXT: movabsq $64, %r8 119; AVX512-NEXT: tilestored %tmm0, 1024(%rsp,%r8) # 1024-byte Folded Spill 120; AVX512-NEXT: movl $64, %r10d 121; AVX512-NEXT: movw $8, %r8w 122; AVX512-NEXT: # implicit-def: $al 123; AVX512-NEXT: movb %al, {{[0-9]+}}(%rsp) 124; AVX512-NEXT: movw %cx, {{[0-9]+}}(%rsp) 125; AVX512-NEXT: # implicit-def: $al 126; AVX512-NEXT: movb %al, {{[0-9]+}}(%rsp) 127; AVX512-NEXT: movw %cx, {{[0-9]+}}(%rsp) 128; AVX512-NEXT: # implicit-def: $al 129; AVX512-NEXT: movb %al, {{[0-9]+}}(%rsp) 130; AVX512-NEXT: movw %di, {{[0-9]+}}(%rsp) 131; AVX512-NEXT: # implicit-def: $al 132; AVX512-NEXT: movb %al, {{[0-9]+}}(%rsp) 133; AVX512-NEXT: movw %cx, {{[0-9]+}}(%rsp) 134; AVX512-NEXT: # implicit-def: $r8b 135; AVX512-NEXT: movb %r8b, {{[0-9]+}}(%rsp) 136; AVX512-NEXT: movw %cx, {{[0-9]+}}(%rsp) 137; AVX512-NEXT: ldtilecfg {{[0-9]+}}(%rsp) 138; AVX512-NEXT: tileloadd (%r9,%r10), %tmm2 139; AVX512-NEXT: movl $64, %r8d 140; AVX512-NEXT: tileloadd (%rsi,%r8), %tmm0 141; AVX512-NEXT: movw $8, %si 142; AVX512-NEXT: movabsq $64, %r8 143; AVX512-NEXT: tileloadd 1024(%rsp,%r8), %tmm1 # 1024-byte Folded Reload 144; AVX512-NEXT: tdpbssd %tmm2, %tmm1, %tmm0 145; AVX512-NEXT: movl $64, %esi 146; AVX512-NEXT: tilestored %tmm0, (%rdx,%rsi) 147; AVX512-NEXT: movl $64, %esi 148; AVX512-NEXT: tileloadd (%rdx,%rsi), %tmm0 149; AVX512-NEXT: movl $buf, %edx 150; AVX512-NEXT: movl $32, %esi 151; AVX512-NEXT: tilestored %tmm0, (%rdx,%rsi) 152; AVX512-NEXT: movq %rbp, %rsp 153; AVX512-NEXT: popq %rbp 154; AVX512-NEXT: tilerelease 155; AVX512-NEXT: vzeroupper 156; AVX512-NEXT: retq 157entry: 158 %tobool.not = icmp eq i32 %cond, 0 159 br i1 %tobool.not, label %if.else, label %if.then 160 161if.then: ; preds = %entry 162 %0 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %row, i16 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @buf, i64 0, i64 0), i64 32) 163 %1 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 %col, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @buf, i64 0, i64 0), i64 32) 164 %2 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %row, i16 %col, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @buf, i64 0, i64 0), i64 32) 165 br label %if.end 166 167if.else: ; preds = %entry 168 %3 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %row, i16 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @buf2, i64 0, i64 0), i64 32) 169 %4 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 8, i16 %col, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @buf2, i64 0, i64 0), i64 32) 170 %5 = tail call x86_amx @llvm.x86.tileloadd64.internal(i16 %row, i16 %col, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @buf2, i64 0, i64 0), i64 32) 171 br label %if.end 172 173if.end: ; preds = %if.else, %if.then 174 %a.sroa.1094.0.in = phi x86_amx [ %3, %if.else ], [ %0, %if.then ] 175 %b.sroa.1069.0.in = phi x86_amx [ %4, %if.else ], [ %1, %if.then ] 176 %c.sroa.1044.0.in = phi x86_amx [ %5, %if.else ], [ %2, %if.then ] 177 %6 = tail call x86_amx @llvm.x86.tdpbssd.internal(i16 %row, i16 %col, i16 8, x86_amx %c.sroa.1044.0.in, x86_amx %a.sroa.1094.0.in, x86_amx %b.sroa.1069.0.in) 178 tail call void @llvm.x86.tilestored64.internal(i16 %row, i16 %col, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @buf, i64 0, i64 0), i64 32, x86_amx %6) 179 ret void 180} 181 182declare x86_amx @llvm.x86.tileloadd64.internal(i16, i16, i8*, i64) 183declare x86_amx @llvm.x86.tdpbssd.internal(i16, i16, i16, x86_amx, x86_amx, x86_amx) 184declare void @llvm.x86.tilestored64.internal(i16, i16, i8*, i64, x86_amx) 185