1; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128
2; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals | FileCheck %s --check-prefixes CHECK,NO-SIMD128
3
4; Test that vector float-to-int and int-to-float instructions lower correctly
5
6target triple = "wasm32-unknown-unknown"
7
8; CHECK-LABEL: convert_s_v4f32:
9; NO-SIMD128-NOT: i32x4
10; SIMD128-NEXT: .functype convert_s_v4f32 (v128) -> (v128){{$}}
11; SIMD128-NEXT: f32x4.convert_i32x4_s $push[[R:[0-9]+]]=, $0
12; SIMD128-NEXT: return $pop[[R]]
13define <4 x float> @convert_s_v4f32(<4 x i32> %x) {
14  %a = sitofp <4 x i32> %x to <4 x float>
15  ret <4 x float> %a
16}
17
18; CHECK-LABEL: convert_u_v4f32:
19; NO-SIMD128-NOT: i32x4
20; SIMD128-NEXT: .functype convert_u_v4f32 (v128) -> (v128){{$}}
21; SIMD128-NEXT: f32x4.convert_i32x4_u $push[[R:[0-9]+]]=, $0
22; SIMD128-NEXT: return $pop[[R]]
23define <4 x float> @convert_u_v4f32(<4 x i32> %x) {
24  %a = uitofp <4 x i32> %x to <4 x float>
25  ret <4 x float> %a
26}
27
28; CHECK-LABEL: convert_s_v2f64:
29; NO-SIMD128-NOT: i64x2
30; SIMD128-NOT: f64x2.convert_i64x2_s
31; SIMD128-NEXT: .functype convert_s_v2f64 (v128) -> (v128){{$}}
32define <2 x double> @convert_s_v2f64(<2 x i64> %x) {
33  %a = sitofp <2 x i64> %x to <2 x double>
34  ret <2 x double> %a
35}
36
37; CHECK-LABEL: convert_u_v2f64:
38; NO-SIMD128-NOT: i64x2
39; SIMD128-NOT: f64x2.convert_i64x2_u
40; SIMD128-NEXT: .functype convert_u_v2f64 (v128) -> (v128){{$}}
41define <2 x double> @convert_u_v2f64(<2 x i64> %x) {
42  %a = uitofp <2 x i64> %x to <2 x double>
43  ret <2 x double> %a
44}
45
46; CHECK-LABEL: trunc_sat_s_v4i32:
47; NO-SIMD128-NOT: f32x4
48; SIMD128-NEXT: .functype trunc_sat_s_v4i32 (v128) -> (v128){{$}}
49; SIMD128-NEXT: i32x4.trunc_sat_f32x4_s $push[[R:[0-9]+]]=, $0
50; SIMD128-NEXT: return $pop[[R]]
51define <4 x i32> @trunc_sat_s_v4i32(<4 x float> %x) {
52  %a = fptosi <4 x float> %x to <4 x i32>
53  ret <4 x i32> %a
54}
55
56; CHECK-LABEL: trunc_sat_u_v4i32:
57; NO-SIMD128-NOT: f32x4
58; SIMD128-NEXT: .functype trunc_sat_u_v4i32 (v128) -> (v128){{$}}
59; SIMD128-NEXT: i32x4.trunc_sat_f32x4_u $push[[R:[0-9]+]]=, $0
60; SIMD128-NEXT: return $pop[[R]]
61define <4 x i32> @trunc_sat_u_v4i32(<4 x float> %x) {
62  %a = fptoui <4 x float> %x to <4 x i32>
63  ret <4 x i32> %a
64}
65
66; CHECK-LABEL: trunc_sat_s_v2i64:
67; NO-SIMD128-NOT: f64x2
68; SIMD128-NOT: i64x2.trunc_sat_f64x2_s
69; SIMD128-NEXT: .functype trunc_sat_s_v2i64 (v128) -> (v128){{$}}
70define <2 x i64> @trunc_sat_s_v2i64(<2 x double> %x) {
71  %a = fptosi <2 x double> %x to <2 x i64>
72  ret <2 x i64> %a
73}
74
75; CHECK-LABEL: trunc_sat_u_v2i64:
76; NO-SIMD128-NOT: f64x2
77; SIMD128-NOT: i64x2.trunc_sat_f64x2_u
78; SIMD128-NEXT: .functype trunc_sat_u_v2i64 (v128) -> (v128){{$}}
79define <2 x i64> @trunc_sat_u_v2i64(<2 x double> %x) {
80  %a = fptoui <2 x double> %x to <2 x i64>
81  ret <2 x i64> %a
82}
83
84; CHECK-LABEL: demote_zero_v4f32:
85; NO-SIMD128-NOT: f32x4
86; SIMD128-NEXT: .functype demote_zero_v4f32 (v128) -> (v128){{$}}
87; SIMD128-NEXT: f32x4.demote_zero_f64x2 $push[[R:[0-9]+]]=, $0
88; SIMD128-NEXT: return $pop[[R]]
89define <4 x float> @demote_zero_v4f32(<2 x double> %x) {
90  %v = shufflevector <2 x double> %x, <2 x double> zeroinitializer,
91         <4 x i32> <i32 0, i32 1, i32 2, i32 3>
92  %a = fptrunc <4 x double> %v to <4 x float>
93  ret <4 x float> %a
94}
95
96; CHECK-LABEL: demote_zero_v4f32_2:
97; NO-SIMD128-NOT: f32x4
98; SIMD128-NEXT: .functype demote_zero_v4f32_2 (v128) -> (v128){{$}}
99; SIMD128-NEXT: f32x4.demote_zero_f64x2 $push[[R:[0-9]+]]=, $0
100; SIMD128-NEXT: return $pop[[R]]
101define <4 x float> @demote_zero_v4f32_2(<2 x double> %x) {
102  %v = fptrunc <2 x double> %x to <2 x float>
103  %a = shufflevector <2 x float> %v, <2 x float> zeroinitializer,
104         <4 x i32> <i32 0, i32 1, i32 2, i32 3>
105  ret <4 x float> %a
106}
107
108; CHECK-LABEL: convert_low_s_v2f64:
109; NO-SIMD128-NOT: f64x2
110; SIMD128-NEXT: .functype convert_low_s_v2f64 (v128) -> (v128){{$}}
111; SIMD128-NEXT: f64x2.convert_low_i32x4_s $push[[R:[0-9]+]]=, $0
112; SIMD128-NEXT: return $pop[[R]]
113define <2 x double> @convert_low_s_v2f64(<4 x i32> %x) {
114  %v = shufflevector <4 x i32> %x, <4 x i32> undef, <2 x i32> <i32 0, i32 1>
115  %a = sitofp <2 x i32> %v to <2 x double>
116  ret <2 x double> %a
117}
118
119; CHECK-LABEL: convert_low_u_v2f64:
120; NO-SIMD128-NOT: f64x2
121; SIMD128-NEXT: .functype convert_low_u_v2f64 (v128) -> (v128){{$}}
122; SIMD128-NEXT: f64x2.convert_low_i32x4_u $push[[R:[0-9]+]]=, $0
123; SIMD128-NEXT: return $pop[[R]]
124define <2 x double> @convert_low_u_v2f64(<4 x i32> %x) {
125  %v = shufflevector <4 x i32> %x, <4 x i32> undef, <2 x i32> <i32 0, i32 1>
126  %a = uitofp <2 x i32> %v to <2 x double>
127  ret <2 x double> %a
128}
129
130
131; CHECK-LABEL: convert_low_s_v2f64_2:
132; NO-SIMD128-NOT: f64x2
133; SIMD128-NEXT: .functype convert_low_s_v2f64_2 (v128) -> (v128){{$}}
134; SIMD128-NEXT: f64x2.convert_low_i32x4_s $push[[R:[0-9]+]]=, $0
135; SIMD128-NEXT: return $pop[[R]]
136define <2 x double> @convert_low_s_v2f64_2(<4 x i32> %x) {
137  %v = sitofp <4 x i32> %x to <4 x double>
138  %a = shufflevector <4 x double> %v, <4 x double> undef, <2 x i32> <i32 0, i32 1>
139  ret <2 x double> %a
140}
141
142; CHECK-LABEL: convert_low_u_v2f64_2:
143; NO-SIMD128-NOT: f64x2
144; SIMD128-NEXT: .functype convert_low_u_v2f64_2 (v128) -> (v128){{$}}
145; SIMD128-NEXT: f64x2.convert_low_i32x4_u $push[[R:[0-9]+]]=, $0
146; SIMD128-NEXT: return $pop[[R]]
147define <2 x double> @convert_low_u_v2f64_2(<4 x i32> %x) {
148  %v = uitofp <4 x i32> %x to <4 x double>
149  %a = shufflevector <4 x double> %v, <4 x double> undef, <2 x i32> <i32 0, i32 1>
150  ret <2 x double> %a
151}
152
153; CHECK-LABEL: promote_low_v2f64:
154; NO-SIMD128-NOT: f64x2
155; SIMD128-NEXT: .functype promote_low_v2f64 (v128) -> (v128){{$}}
156; SIMD128-NEXT: f64x2.promote_low_f32x4 $push[[R:[0-9]+]]=, $0
157; SIMD128-NEXT: return $pop[[R]]
158define <2 x double> @promote_low_v2f64(<4 x float> %x) {
159  %v = shufflevector <4 x float> %x, <4 x float> undef, <2 x i32> <i32 0, i32 1>
160  %a = fpext <2 x float> %v to <2 x double>
161  ret <2 x double> %a
162}
163
164; CHECK-LABEL: promote_low_v2f64_2:
165; NO-SIMD128-NOT: f64x2
166; SIMD128-NEXT: .functype promote_low_v2f64_2 (v128) -> (v128){{$}}
167; SIMD128-NEXT: f64x2.promote_low_f32x4 $push[[R:[0-9]+]]=, $0
168; SIMD128-NEXT: return $pop[[R]]
169define <2 x double> @promote_low_v2f64_2(<4 x float> %x) {
170  %v = fpext <4 x float> %x to <4 x double>
171  %a = shufflevector <4 x double> %v, <4 x double> undef, <2 x i32> <i32 0, i32 1>
172  ret <2 x double> %a
173}
174