1; RUN: llc < %s -asm-verbose=false -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-enable-unimplemented-simd -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128
2; RUN: llc < %s -asm-verbose=false -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128-VM
3; RUN: llc < %s -asm-verbose=false -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=-simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,NO-SIMD128
4
5; Test that vector float-to-int and int-to-float instructions lower correctly
6
7target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
8target triple = "wasm32-unknown-unknown"
9
10; CHECK-LABEL: convert_s_v4f32:
11; NO-SIMD128-NOT: i32x4
12; SIMD128-NEXT: .functype convert_s_v4f32 (v128) -> (v128){{$}}
13; SIMD128-NEXT: f32x4.convert_s/i32x4 $push[[R:[0-9]+]]=, $0
14; SIMD128-NEXT: return $pop[[R]]
15define <4 x float> @convert_s_v4f32(<4 x i32> %x) {
16  %a = sitofp <4 x i32> %x to <4 x float>
17  ret <4 x float> %a
18}
19
20; CHECK-LABEL: convert_u_v4f32:
21; NO-SIMD128-NOT: i32x4
22; SIMD128-NEXT: .functype convert_u_v4f32 (v128) -> (v128){{$}}
23; SIMD128-NEXT: f32x4.convert_u/i32x4 $push[[R:[0-9]+]]=, $0
24; SIMD128-NEXT: return $pop[[R]]
25define <4 x float> @convert_u_v4f32(<4 x i32> %x) {
26  %a = uitofp <4 x i32> %x to <4 x float>
27  ret <4 x float> %a
28}
29
30; CHECK-LABEL: convert_s_v2f64:
31; NO-SIMD128-NOT: i64x2
32; SIMD128-VM-NOT: f64x2.convert_s/i64x2
33; SIMD128-NEXT: .functype convert_s_v2f64 (v128) -> (v128){{$}}
34; SIMD128-NEXT: f64x2.convert_s/i64x2 $push[[R:[0-9]+]]=, $0
35; SIMD128-NEXT: return $pop[[R]]
36define <2 x double> @convert_s_v2f64(<2 x i64> %x) {
37  %a = sitofp <2 x i64> %x to <2 x double>
38  ret <2 x double> %a
39}
40
41; CHECK-LABEL: convert_u_v2f64:
42; NO-SIMD128-NOT: i64x2
43; SIMD128-VM-NOT: f64x2.convert_u/i64x2
44; SIMD128-NEXT: .functype convert_u_v2f64 (v128) -> (v128){{$}}
45; SIMD128-NEXT: f64x2.convert_u/i64x2 $push[[R:[0-9]+]]=, $0
46; SIMD128-NEXT: return $pop[[R]]
47define <2 x double> @convert_u_v2f64(<2 x i64> %x) {
48  %a = uitofp <2 x i64> %x to <2 x double>
49  ret <2 x double> %a
50}
51
52; CHECK-LABEL: trunc_sat_s_v4i32:
53; NO-SIMD128-NOT: f32x4
54; SIMD128-NEXT: .functype trunc_sat_s_v4i32 (v128) -> (v128){{$}}
55; SIMD128-NEXT: i32x4.trunc_sat_s/f32x4 $push[[R:[0-9]+]]=, $0
56; SIMD128-NEXT: return $pop[[R]]
57define <4 x i32> @trunc_sat_s_v4i32(<4 x float> %x) {
58  %a = fptosi <4 x float> %x to <4 x i32>
59  ret <4 x i32> %a
60}
61
62; CHECK-LABEL: trunc_sat_u_v4i32:
63; NO-SIMD128-NOT: f32x4
64; SIMD128-NEXT: .functype trunc_sat_u_v4i32 (v128) -> (v128){{$}}
65; SIMD128-NEXT: i32x4.trunc_sat_u/f32x4 $push[[R:[0-9]+]]=, $0
66; SIMD128-NEXT: return $pop[[R]]
67define <4 x i32> @trunc_sat_u_v4i32(<4 x float> %x) {
68  %a = fptoui <4 x float> %x to <4 x i32>
69  ret <4 x i32> %a
70}
71
72; CHECK-LABEL: trunc_sat_s_v2i64:
73; NO-SIMD128-NOT: f64x2
74; SIMD128-VM-NOT: i64x2.trunc_sat_s/f64x2
75; SIMD128-NEXT: .functype trunc_sat_s_v2i64 (v128) -> (v128){{$}}
76; SIMD128-NEXT: i64x2.trunc_sat_s/f64x2 $push[[R:[0-9]+]]=, $0
77; SIMD128-NEXT: return $pop[[R]]
78define <2 x i64> @trunc_sat_s_v2i64(<2 x double> %x) {
79  %a = fptosi <2 x double> %x to <2 x i64>
80  ret <2 x i64> %a
81}
82
83; CHECK-LABEL: trunc_sat_u_v2i64:
84; NO-SIMD128-NOT: f64x2
85; SIMD128-VM-NOT: i64x2.trunc_sat_u/f64x2
86; SIMD128-NEXT: .functype trunc_sat_u_v2i64 (v128) -> (v128){{$}}
87; SIMD128-NEXT: i64x2.trunc_sat_u/f64x2 $push[[R:[0-9]+]]=, $0
88; SIMD128-NEXT: return $pop[[R]]
89define <2 x i64> @trunc_sat_u_v2i64(<2 x double> %x) {
90  %a = fptoui <2 x double> %x to <2 x i64>
91  ret <2 x i64> %a
92}
93