1; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128
2; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals | FileCheck %s --check-prefixes CHECK,NO-SIMD128
3
4; Test that vector float-to-int and int-to-float instructions lower correctly
5
6target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
7target triple = "wasm32-unknown-unknown"
8
9; CHECK-LABEL: convert_s_v4f32:
10; NO-SIMD128-NOT: i32x4
11; SIMD128-NEXT: .functype convert_s_v4f32 (v128) -> (v128){{$}}
12; SIMD128-NEXT: f32x4.convert_i32x4_s $push[[R:[0-9]+]]=, $0
13; SIMD128-NEXT: return $pop[[R]]
14define <4 x float> @convert_s_v4f32(<4 x i32> %x) {
15  %a = sitofp <4 x i32> %x to <4 x float>
16  ret <4 x float> %a
17}
18
19; CHECK-LABEL: convert_u_v4f32:
20; NO-SIMD128-NOT: i32x4
21; SIMD128-NEXT: .functype convert_u_v4f32 (v128) -> (v128){{$}}
22; SIMD128-NEXT: f32x4.convert_i32x4_u $push[[R:[0-9]+]]=, $0
23; SIMD128-NEXT: return $pop[[R]]
24define <4 x float> @convert_u_v4f32(<4 x i32> %x) {
25  %a = uitofp <4 x i32> %x to <4 x float>
26  ret <4 x float> %a
27}
28
29; CHECK-LABEL: convert_s_v2f64:
30; NO-SIMD128-NOT: i64x2
31; SIMD128-NOT: f64x2.convert_i64x2_s
32; SIMD128-NEXT: .functype convert_s_v2f64 (v128) -> (v128){{$}}
33define <2 x double> @convert_s_v2f64(<2 x i64> %x) {
34  %a = sitofp <2 x i64> %x to <2 x double>
35  ret <2 x double> %a
36}
37
38; CHECK-LABEL: convert_u_v2f64:
39; NO-SIMD128-NOT: i64x2
40; SIMD128-NOT: f64x2.convert_i64x2_u
41; SIMD128-NEXT: .functype convert_u_v2f64 (v128) -> (v128){{$}}
42define <2 x double> @convert_u_v2f64(<2 x i64> %x) {
43  %a = uitofp <2 x i64> %x to <2 x double>
44  ret <2 x double> %a
45}
46
47; CHECK-LABEL: trunc_sat_s_v4i32:
48; NO-SIMD128-NOT: f32x4
49; SIMD128-NEXT: .functype trunc_sat_s_v4i32 (v128) -> (v128){{$}}
50; SIMD128-NEXT: i32x4.trunc_sat_f32x4_s $push[[R:[0-9]+]]=, $0
51; SIMD128-NEXT: return $pop[[R]]
52define <4 x i32> @trunc_sat_s_v4i32(<4 x float> %x) {
53  %a = fptosi <4 x float> %x to <4 x i32>
54  ret <4 x i32> %a
55}
56
57; CHECK-LABEL: trunc_sat_u_v4i32:
58; NO-SIMD128-NOT: f32x4
59; SIMD128-NEXT: .functype trunc_sat_u_v4i32 (v128) -> (v128){{$}}
60; SIMD128-NEXT: i32x4.trunc_sat_f32x4_u $push[[R:[0-9]+]]=, $0
61; SIMD128-NEXT: return $pop[[R]]
62define <4 x i32> @trunc_sat_u_v4i32(<4 x float> %x) {
63  %a = fptoui <4 x float> %x to <4 x i32>
64  ret <4 x i32> %a
65}
66
67; CHECK-LABEL: trunc_sat_s_v2i64:
68; NO-SIMD128-NOT: f64x2
69; SIMD128-NOT: i64x2.trunc_sat_f64x2_s
70; SIMD128-NEXT: .functype trunc_sat_s_v2i64 (v128) -> (v128){{$}}
71define <2 x i64> @trunc_sat_s_v2i64(<2 x double> %x) {
72  %a = fptosi <2 x double> %x to <2 x i64>
73  ret <2 x i64> %a
74}
75
76; CHECK-LABEL: trunc_sat_u_v2i64:
77; NO-SIMD128-NOT: f64x2
78; SIMD128-NOT: i64x2.trunc_sat_f64x2_u
79; SIMD128-NEXT: .functype trunc_sat_u_v2i64 (v128) -> (v128){{$}}
80define <2 x i64> @trunc_sat_u_v2i64(<2 x double> %x) {
81  %a = fptoui <2 x double> %x to <2 x i64>
82  ret <2 x i64> %a
83}
84
85; CHECK-LABEL: convert_low_s_v2f64:
86; NO-SIMD128-NOT: f64x2
87; SIMD128-NEXT: .functype convert_low_s_v2f64 (v128) -> (v128){{$}}
88; SIMD128-NEXT: f64x2.convert_low_i32x4_s $push[[R:[0-9]+]]=, $0
89; SIMD128-NEXT: return $pop[[R]]
90define <2 x double> @convert_low_s_v2f64(<4 x i32> %x) {
91  %v = shufflevector <4 x i32> %x, <4 x i32> undef, <2 x i32> <i32 0, i32 1>
92  %a = sitofp <2 x i32> %v to <2 x double>
93  ret <2 x double> %a
94}
95
96; CHECK-LABEL: convert_low_u_v2f64:
97; NO-SIMD128-NOT: f64x2
98; SIMD128-NEXT: .functype convert_low_u_v2f64 (v128) -> (v128){{$}}
99; SIMD128-NEXT: f64x2.convert_low_i32x4_u $push[[R:[0-9]+]]=, $0
100; SIMD128-NEXT: return $pop[[R]]
101define <2 x double> @convert_low_u_v2f64(<4 x i32> %x) {
102  %v = shufflevector <4 x i32> %x, <4 x i32> undef, <2 x i32> <i32 0, i32 1>
103  %a = uitofp <2 x i32> %v to <2 x double>
104  ret <2 x double> %a
105}
106
107
108; CHECK-LABEL: convert_low_s_v2f64_2:
109; NO-SIMD128-NOT: f64x2
110; SIMD128-NEXT: .functype convert_low_s_v2f64_2 (v128) -> (v128){{$}}
111; SIMD128-NEXT: f64x2.convert_low_i32x4_s $push[[R:[0-9]+]]=, $0
112; SIMD128-NEXT: return $pop[[R]]
113define <2 x double> @convert_low_s_v2f64_2(<4 x i32> %x) {
114  %v = sitofp <4 x i32> %x to <4 x double>
115  %a = shufflevector <4 x double> %v, <4 x double> undef, <2 x i32> <i32 0, i32 1>
116  ret <2 x double> %a
117}
118
119; CHECK-LABEL: convert_low_u_v2f64_2:
120; NO-SIMD128-NOT: f64x2
121; SIMD128-NEXT: .functype convert_low_u_v2f64_2 (v128) -> (v128){{$}}
122; SIMD128-NEXT: f64x2.convert_low_i32x4_u $push[[R:[0-9]+]]=, $0
123; SIMD128-NEXT: return $pop[[R]]
124define <2 x double> @convert_low_u_v2f64_2(<4 x i32> %x) {
125  %v = uitofp <4 x i32> %x to <4 x double>
126  %a = shufflevector <4 x double> %v, <4 x double> undef, <2 x i32> <i32 0, i32 1>
127  ret <2 x double> %a
128}
129