1; RUN: llc < %s -asm-verbose=false -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-enable-unimplemented-simd -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128
2; RUN: llc < %s -asm-verbose=false -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,SIMD128-VM
3; RUN: llc < %s -asm-verbose=false -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=-simd128,+sign-ext | FileCheck %s --check-prefixes CHECK,NO-SIMD128
4
5; Test that vector float-to-int and int-to-float instructions lower correctly
6
7target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
8target triple = "wasm32-unknown-unknown"
9
10; CHECK-LABEL: convert_s_v4f32:
11; NO-SIMD128-NOT: i32x4
12; SIMD128-NEXT: .param v128{{$}}
13; SIMD128-NEXT: .result v128{{$}}
14; SIMD128-NEXT: f32x4.convert_s/i32x4 $push[[R:[0-9]+]]=, $0
15; SIMD128-NEXT: return $pop[[R]]
16define <4 x float> @convert_s_v4f32(<4 x i32> %x) {
17  %a = sitofp <4 x i32> %x to <4 x float>
18  ret <4 x float> %a
19}
20
21; CHECK-LABEL: convert_u_v4f32:
22; NO-SIMD128-NOT: i32x4
23; SIMD128-NEXT: .param v128{{$}}
24; SIMD128-NEXT: .result v128{{$}}
25; SIMD128-NEXT: f32x4.convert_u/i32x4 $push[[R:[0-9]+]]=, $0
26; SIMD128-NEXT: return $pop[[R]]
27define <4 x float> @convert_u_v4f32(<4 x i32> %x) {
28  %a = uitofp <4 x i32> %x to <4 x float>
29  ret <4 x float> %a
30}
31
32; CHECK-LABEL: convert_s_v2f64:
33; NO-SIMD128-NOT: i64x2
34; SIMD128-VM-NOT: f64x2.convert_s/i64x2
35; SIMD128-NEXT: .param v128{{$}}
36; SIMD128-NEXT: .result v128{{$}}
37; SIMD128-NEXT: f64x2.convert_s/i64x2 $push[[R:[0-9]+]]=, $0
38; SIMD128-NEXT: return $pop[[R]]
39define <2 x double> @convert_s_v2f64(<2 x i64> %x) {
40  %a = sitofp <2 x i64> %x to <2 x double>
41  ret <2 x double> %a
42}
43
44; CHECK-LABEL: convert_u_v2f64:
45; NO-SIMD128-NOT: i64x2
46; SIMD128-VM-NOT: f64x2.convert_u/i64x2
47; SIMD128-NEXT: .param v128{{$}}
48; SIMD128-NEXT: .result v128{{$}}
49; SIMD128-NEXT: f64x2.convert_u/i64x2 $push[[R:[0-9]+]]=, $0
50; SIMD128-NEXT: return $pop[[R]]
51define <2 x double> @convert_u_v2f64(<2 x i64> %x) {
52  %a = uitofp <2 x i64> %x to <2 x double>
53  ret <2 x double> %a
54}
55
56; CHECK-LABEL: trunc_sat_s_v4i32:
57; NO-SIMD128-NOT: f32x4
58; SIMD128-NEXT: .param v128{{$}}
59; SIMD128-NEXT: .result v128{{$}}
60; SIMD128-NEXT: i32x4.trunc_sat_s/f32x4 $push[[R:[0-9]+]]=, $0
61; SIMD128-NEXT: return $pop[[R]]
62define <4 x i32> @trunc_sat_s_v4i32(<4 x float> %x) {
63  %a = fptosi <4 x float> %x to <4 x i32>
64  ret <4 x i32> %a
65}
66
67; CHECK-LABEL: trunc_sat_u_v4i32:
68; NO-SIMD128-NOT: f32x4
69; SIMD128-NEXT: .param v128{{$}}
70; SIMD128-NEXT: .result v128{{$}}
71; SIMD128-NEXT: i32x4.trunc_sat_u/f32x4 $push[[R:[0-9]+]]=, $0
72; SIMD128-NEXT: return $pop[[R]]
73define <4 x i32> @trunc_sat_u_v4i32(<4 x float> %x) {
74  %a = fptoui <4 x float> %x to <4 x i32>
75  ret <4 x i32> %a
76}
77
78; CHECK-LABEL: trunc_sat_s_v2i64:
79; NO-SIMD128-NOT: f64x2
80; SIMD128-VM-NOT: i64x2.trunc_sat_s/f64x2
81; SIMD128-NEXT: .param v128{{$}}
82; SIMD128-NEXT: .result v128{{$}}
83; SIMD128-NEXT: i64x2.trunc_sat_s/f64x2 $push[[R:[0-9]+]]=, $0
84; SIMD128-NEXT: return $pop[[R]]
85define <2 x i64> @trunc_sat_s_v2i64(<2 x double> %x) {
86  %a = fptosi <2 x double> %x to <2 x i64>
87  ret <2 x i64> %a
88}
89
90; CHECK-LABEL: trunc_sat_u_v2i64:
91; NO-SIMD128-NOT: f64x2
92; SIMD128-VM-NOT: i64x2.trunc_sat_u/f64x2
93; SIMD128-NEXT: .param v128{{$}}
94; SIMD128-NEXT: .result v128{{$}}
95; SIMD128-NEXT: i64x2.trunc_sat_u/f64x2 $push[[R:[0-9]+]]=, $0
96; SIMD128-NEXT: return $pop[[R]]
97define <2 x i64> @trunc_sat_u_v2i64(<2 x double> %x) {
98  %a = fptoui <2 x double> %x to <2 x i64>
99  ret <2 x i64> %a
100}
101