1; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -mattr=+unimplemented-simd128 | FileCheck %s --check-prefixes CHECK,SIMD128 2; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128-VM 3; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals | FileCheck %s --check-prefixes CHECK,NO-SIMD128 4 5; Test SIMD comparison operators 6 7target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128" 8target triple = "wasm32-unknown-unknown" 9 10; CHECK-LABEL: compare_eq_v16i8: 11; NO-SIMD128-NOT: i8x16 12; SIMD128-NEXT: .functype compare_eq_v16i8 (v128, v128) -> (v128){{$}} 13; SIMD128-NEXT: i8x16.eq $push[[R:[0-9]+]]=, $0, $1{{$}} 14; SIMD128-NEXT: return $pop[[R]]{{$}} 15define <16 x i1> @compare_eq_v16i8 (<16 x i8> %x, <16 x i8> %y) { 16 %res = icmp eq <16 x i8> %x, %y 17 ret <16 x i1> %res 18} 19 20; CHECK-LABEL: compare_sext_eq_v16i8: 21; NO-SIMD128-NOT: i8x16 22; SIMD128-NEXT: .functype compare_sext_eq_v16i8 (v128, v128) -> (v128){{$}} 23; SIMD128-NEXT: i8x16.eq $push[[R:[0-9]+]]=, $0, $1{{$}} 24; SIMD128-NEXT: return $pop[[R]]{{$}} 25define <16 x i8> @compare_sext_eq_v16i8 (<16 x i8> %x, <16 x i8> %y) { 26 %cmp = icmp eq <16 x i8> %x, %y 27 %res = sext <16 x i1> %cmp to <16 x i8> 28 ret <16 x i8> %res 29} 30 31; CHECK-LABEL: compare_ne_v16i8: 32; NO-SIMD128-NOT: i8x16 33; SIMD128-NEXT: .functype compare_ne_v16i8 (v128, v128) -> (v128){{$}} 34; SIMD128-NEXT: i8x16.ne $push[[R:[0-9]+]]=, $0, $1{{$}} 35; SIMD128-NEXT: return $pop[[R]]{{$}} 36define <16 x i1> @compare_ne_v16i8 (<16 x i8> %x, <16 x i8> %y) { 37 %res = icmp ne <16 x i8> %x, %y 38 ret <16 x i1> %res 39} 40 41; CHECK-LABEL: compare_sext_ne_v16i8: 42; NO-SIMD128-NOT: i8x16 43; SIMD128-NEXT: .functype compare_sext_ne_v16i8 (v128, v128) -> (v128){{$}} 44; SIMD128-NEXT: i8x16.ne $push[[R:[0-9]+]]=, $0, $1{{$}} 45; SIMD128-NEXT: return $pop[[R]]{{$}} 46define <16 x i8> @compare_sext_ne_v16i8 (<16 x i8> %x, <16 x i8> %y) { 47 %cmp = icmp ne <16 x i8> %x, %y 48 %res = sext <16 x i1> %cmp to <16 x i8> 49 ret <16 x i8> %res 50} 51 52; CHECK-LABEL: compare_slt_v16i8: 53; NO-SIMD128-NOT: i8x16 54; SIMD128-NEXT: .functype compare_slt_v16i8 (v128, v128) -> (v128){{$}} 55; SIMD128-NEXT: i8x16.lt_s $push[[R:[0-9]+]]=, $0, $1{{$}} 56; SIMD128-NEXT: return $pop[[R]]{{$}} 57define <16 x i1> @compare_slt_v16i8 (<16 x i8> %x, <16 x i8> %y) { 58 %res = icmp slt <16 x i8> %x, %y 59 ret <16 x i1> %res 60} 61 62; CHECK-LABEL: compare_sext_slt_v16i8: 63; NO-SIMD128-NOT: i8x16 64; SIMD128-NEXT: .functype compare_sext_slt_v16i8 (v128, v128) -> (v128){{$}} 65; SIMD128-NEXT: i8x16.lt_s $push[[R:[0-9]+]]=, $0, $1{{$}} 66; SIMD128-NEXT: return $pop[[R]]{{$}} 67define <16 x i8> @compare_sext_slt_v16i8 (<16 x i8> %x, <16 x i8> %y) { 68 %cmp = icmp slt <16 x i8> %x, %y 69 %res = sext <16 x i1> %cmp to <16 x i8> 70 ret <16 x i8> %res 71} 72 73; CHECK-LABEL: compare_ult_v16i8: 74; NO-SIMD128-NOT: i8x16 75; SIMD128-NEXT: .functype compare_ult_v16i8 (v128, v128) -> (v128){{$}} 76; SIMD128-NEXT: i8x16.lt_u $push[[R:[0-9]+]]=, $0, $1{{$}} 77; SIMD128-NEXT: return $pop[[R]]{{$}} 78define <16 x i1> @compare_ult_v16i8 (<16 x i8> %x, <16 x i8> %y) { 79 %res = icmp ult <16 x i8> %x, %y 80 ret <16 x i1> %res 81} 82 83; CHECK-LABEL: compare_sext_ult_v16i8: 84; NO-SIMD128-NOT: i8x16 85; SIMD128-NEXT: .functype compare_sext_ult_v16i8 (v128, v128) -> (v128){{$}} 86; SIMD128-NEXT: i8x16.lt_u $push[[R:[0-9]+]]=, $0, $1{{$}} 87; SIMD128-NEXT: return $pop[[R]]{{$}} 88define <16 x i8> @compare_sext_ult_v16i8 (<16 x i8> %x, <16 x i8> %y) { 89 %cmp = icmp ult <16 x i8> %x, %y 90 %res = sext <16 x i1> %cmp to <16 x i8> 91 ret <16 x i8> %res 92} 93 94; CHECK-LABEL: compare_sle_v16i8: 95; NO-SIMD128-NOT: i8x16 96; SIMD128-NEXT: .functype compare_sle_v16i8 (v128, v128) -> (v128){{$}} 97; SIMD128-NEXT: i8x16.le_s $push[[R:[0-9]+]]=, $0, $1{{$}} 98; SIMD128-NEXT: return $pop[[R]]{{$}} 99define <16 x i1> @compare_sle_v16i8 (<16 x i8> %x, <16 x i8> %y) { 100 %res = icmp sle <16 x i8> %x, %y 101 ret <16 x i1> %res 102} 103 104; CHECK-LABEL: compare_sext_sle_v16i8: 105; NO-SIMD128-NOT: i8x16 106; SIMD128-NEXT: .functype compare_sext_sle_v16i8 (v128, v128) -> (v128){{$}} 107; SIMD128-NEXT: i8x16.le_s $push[[R:[0-9]+]]=, $0, $1{{$}} 108; SIMD128-NEXT: return $pop[[R]]{{$}} 109define <16 x i8> @compare_sext_sle_v16i8 (<16 x i8> %x, <16 x i8> %y) { 110 %cmp = icmp sle <16 x i8> %x, %y 111 %res = sext <16 x i1> %cmp to <16 x i8> 112 ret <16 x i8> %res 113} 114 115; CHECK-LABEL: compare_ule_v16i8: 116; NO-SIMD128-NOT: i8x16 117; SIMD128-NEXT: .functype compare_ule_v16i8 (v128, v128) -> (v128){{$}} 118; SIMD128-NEXT: i8x16.le_u $push[[R:[0-9]+]]=, $0, $1{{$}} 119; SIMD128-NEXT: return $pop[[R]]{{$}} 120define <16 x i1> @compare_ule_v16i8 (<16 x i8> %x, <16 x i8> %y) { 121 %res = icmp ule <16 x i8> %x, %y 122 ret <16 x i1> %res 123} 124 125; CHECK-LABEL: compare_sext_ule_v16i8: 126; NO-SIMD128-NOT: i8x16 127; SIMD128-NEXT: .functype compare_sext_ule_v16i8 (v128, v128) -> (v128){{$}} 128; SIMD128-NEXT: i8x16.le_u $push[[R:[0-9]+]]=, $0, $1{{$}} 129; SIMD128-NEXT: return $pop[[R]]{{$}} 130define <16 x i8> @compare_sext_ule_v16i8 (<16 x i8> %x, <16 x i8> %y) { 131 %cmp = icmp ule <16 x i8> %x, %y 132 %res = sext <16 x i1> %cmp to <16 x i8> 133 ret <16 x i8> %res 134} 135 136; CHECK-LABEL: compare_sgt_v16i8: 137; NO-SIMD128-NOT: i8x16 138; SIMD128-NEXT: .functype compare_sgt_v16i8 (v128, v128) -> (v128){{$}} 139; SIMD128-NEXT: i8x16.gt_s $push[[R:[0-9]+]]=, $0, $1{{$}} 140; SIMD128-NEXT: return $pop[[R]]{{$}} 141define <16 x i1> @compare_sgt_v16i8 (<16 x i8> %x, <16 x i8> %y) { 142 %res = icmp sgt <16 x i8> %x, %y 143 ret <16 x i1> %res 144} 145 146; CHECK-LABEL: compare_sext_sgt_v16i8: 147; NO-SIMD128-NOT: i8x16 148; SIMD128-NEXT: .functype compare_sext_sgt_v16i8 (v128, v128) -> (v128){{$}} 149; SIMD128-NEXT: i8x16.gt_s $push[[R:[0-9]+]]=, $0, $1{{$}} 150; SIMD128-NEXT: return $pop[[R]]{{$}} 151define <16 x i8> @compare_sext_sgt_v16i8 (<16 x i8> %x, <16 x i8> %y) { 152 %cmp = icmp sgt <16 x i8> %x, %y 153 %res = sext <16 x i1> %cmp to <16 x i8> 154 ret <16 x i8> %res 155} 156 157; CHECK-LABEL: compare_ugt_v16i8: 158; NO-SIMD128-NOT: i8x16 159; SIMD128-NEXT: .functype compare_ugt_v16i8 (v128, v128) -> (v128){{$}} 160; SIMD128-NEXT: i8x16.gt_u $push[[R:[0-9]+]]=, $0, $1{{$}} 161; SIMD128-NEXT: return $pop[[R]]{{$}} 162define <16 x i1> @compare_ugt_v16i8 (<16 x i8> %x, <16 x i8> %y) { 163 %res = icmp ugt <16 x i8> %x, %y 164 ret <16 x i1> %res 165} 166 167; CHECK-LABEL: compare_sext_ugt_v16i8: 168; NO-SIMD128-NOT: i8x16 169; SIMD128-NEXT: .functype compare_sext_ugt_v16i8 (v128, v128) -> (v128){{$}} 170; SIMD128-NEXT: i8x16.gt_u $push[[R:[0-9]+]]=, $0, $1{{$}} 171; SIMD128-NEXT: return $pop[[R]]{{$}} 172define <16 x i8> @compare_sext_ugt_v16i8 (<16 x i8> %x, <16 x i8> %y) { 173 %cmp = icmp ugt <16 x i8> %x, %y 174 %res = sext <16 x i1> %cmp to <16 x i8> 175 ret <16 x i8> %res 176} 177 178; CHECK-LABEL: compare_sge_v16i8: 179; NO-SIMD128-NOT: i8x16 180; SIMD128-NEXT: .functype compare_sge_v16i8 (v128, v128) -> (v128){{$}} 181; SIMD128-NEXT: i8x16.ge_s $push[[R:[0-9]+]]=, $0, $1{{$}} 182; SIMD128-NEXT: return $pop[[R]]{{$}} 183define <16 x i1> @compare_sge_v16i8 (<16 x i8> %x, <16 x i8> %y) { 184 %res = icmp sge <16 x i8> %x, %y 185 ret <16 x i1> %res 186} 187 188; CHECK-LABEL: compare_sext_sge_v16i8: 189; NO-SIMD128-NOT: i8x16 190; SIMD128-NEXT: .functype compare_sext_sge_v16i8 (v128, v128) -> (v128){{$}} 191; SIMD128-NEXT: i8x16.ge_s $push[[R:[0-9]+]]=, $0, $1{{$}} 192; SIMD128-NEXT: return $pop[[R]]{{$}} 193define <16 x i8> @compare_sext_sge_v16i8 (<16 x i8> %x, <16 x i8> %y) { 194 %cmp = icmp sge <16 x i8> %x, %y 195 %res = sext <16 x i1> %cmp to <16 x i8> 196 ret <16 x i8> %res 197} 198 199; CHECK-LABEL: compare_uge_v16i8: 200; NO-SIMD128-NOT: i8x16 201; SIMD128-NEXT: .functype compare_uge_v16i8 (v128, v128) -> (v128){{$}} 202; SIMD128-NEXT: i8x16.ge_u $push[[R:[0-9]+]]=, $0, $1{{$}} 203; SIMD128-NEXT: return $pop[[R]]{{$}} 204define <16 x i1> @compare_uge_v16i8 (<16 x i8> %x, <16 x i8> %y) { 205 %res = icmp uge <16 x i8> %x, %y 206 ret <16 x i1> %res 207} 208 209; CHECK-LABEL: compare_sext_uge_v16i8: 210; NO-SIMD128-NOT: i8x16 211; SIMD128-NEXT: .functype compare_sext_uge_v16i8 (v128, v128) -> (v128){{$}} 212; SIMD128-NEXT: i8x16.ge_u $push[[R:[0-9]+]]=, $0, $1{{$}} 213; SIMD128-NEXT: return $pop[[R]]{{$}} 214define <16 x i8> @compare_sext_uge_v16i8 (<16 x i8> %x, <16 x i8> %y) { 215 %cmp = icmp uge <16 x i8> %x, %y 216 %res = sext <16 x i1> %cmp to <16 x i8> 217 ret <16 x i8> %res 218} 219 220; CHECK-LABEL: compare_eq_v8i16: 221; NO-SIMD128-NOT: i16x8 222; SIMD128-NEXT: .functype compare_eq_v8i16 (v128, v128) -> (v128){{$}} 223; SIMD128-NEXT: i16x8.eq $push[[R:[0-9]+]]=, $0, $1{{$}} 224; SIMD128-NEXT: return $pop[[R]]{{$}} 225define <8 x i1> @compare_eq_v8i16 (<8 x i16> %x, <8 x i16> %y) { 226 %res = icmp eq <8 x i16> %x, %y 227 ret <8 x i1> %res 228} 229 230; CHECK-LABEL: compare_sext_eq_v8i16: 231; NO-SIMD128-NOT: i16x8 232; SIMD128-NEXT: .functype compare_sext_eq_v8i16 (v128, v128) -> (v128){{$}} 233; SIMD128-NEXT: i16x8.eq $push[[R:[0-9]+]]=, $0, $1{{$}} 234; SIMD128-NEXT: return $pop[[R]]{{$}} 235define <8 x i16> @compare_sext_eq_v8i16 (<8 x i16> %x, <8 x i16> %y) { 236 %cmp = icmp eq <8 x i16> %x, %y 237 %res = sext <8 x i1> %cmp to <8 x i16> 238 ret <8 x i16> %res 239} 240 241; CHECK-LABEL: compare_ne_v8i16: 242; NO-SIMD128-NOT: i16x8 243; SIMD128-NEXT: .functype compare_ne_v8i16 (v128, v128) -> (v128){{$}} 244; SIMD128-NEXT: i16x8.ne $push[[R:[0-9]+]]=, $0, $1{{$}} 245; SIMD128-NEXT: return $pop[[R]]{{$}} 246define <8 x i1> @compare_ne_v8i16 (<8 x i16> %x, <8 x i16> %y) { 247 %res = icmp ne <8 x i16> %x, %y 248 ret <8 x i1> %res 249} 250 251; CHECK-LABEL: compare_sext_ne_v8i16: 252; NO-SIMD128-NOT: i16x8 253; SIMD128-NEXT: .functype compare_sext_ne_v8i16 (v128, v128) -> (v128){{$}} 254; SIMD128-NEXT: i16x8.ne $push[[R:[0-9]+]]=, $0, $1{{$}} 255; SIMD128-NEXT: return $pop[[R]]{{$}} 256define <8 x i16> @compare_sext_ne_v8i16 (<8 x i16> %x, <8 x i16> %y) { 257 %cmp = icmp ne <8 x i16> %x, %y 258 %res = sext <8 x i1> %cmp to <8 x i16> 259 ret <8 x i16> %res 260} 261 262; CHECK-LABEL: compare_slt_v8i16: 263; NO-SIMD128-NOT: i16x8 264; SIMD128-NEXT: .functype compare_slt_v8i16 (v128, v128) -> (v128){{$}} 265; SIMD128-NEXT: i16x8.lt_s $push[[R:[0-9]+]]=, $0, $1{{$}} 266; SIMD128-NEXT: return $pop[[R]]{{$}} 267define <8 x i1> @compare_slt_v8i16 (<8 x i16> %x, <8 x i16> %y) { 268 %res = icmp slt <8 x i16> %x, %y 269 ret <8 x i1> %res 270} 271 272; CHECK-LABEL: compare_sext_slt_v8i16: 273; NO-SIMD128-NOT: i16x8 274; SIMD128-NEXT: .functype compare_sext_slt_v8i16 (v128, v128) -> (v128){{$}} 275; SIMD128-NEXT: i16x8.lt_s $push[[R:[0-9]+]]=, $0, $1{{$}} 276; SIMD128-NEXT: return $pop[[R]]{{$}} 277define <8 x i16> @compare_sext_slt_v8i16 (<8 x i16> %x, <8 x i16> %y) { 278 %cmp = icmp slt <8 x i16> %x, %y 279 %res = sext <8 x i1> %cmp to <8 x i16> 280 ret <8 x i16> %res 281} 282 283; CHECK-LABEL: compare_ult_v8i16: 284; NO-SIMD128-NOT: i16x8 285; SIMD128-NEXT: .functype compare_ult_v8i16 (v128, v128) -> (v128){{$}} 286; SIMD128-NEXT: i16x8.lt_u $push[[R:[0-9]+]]=, $0, $1{{$}} 287; SIMD128-NEXT: return $pop[[R]]{{$}} 288define <8 x i1> @compare_ult_v8i16 (<8 x i16> %x, <8 x i16> %y) { 289 %res = icmp ult <8 x i16> %x, %y 290 ret <8 x i1> %res 291} 292 293; CHECK-LABEL: compare_sext_ult_v8i16: 294; NO-SIMD128-NOT: i16x8 295; SIMD128-NEXT: .functype compare_sext_ult_v8i16 (v128, v128) -> (v128){{$}} 296; SIMD128-NEXT: i16x8.lt_u $push[[R:[0-9]+]]=, $0, $1{{$}} 297; SIMD128-NEXT: return $pop[[R]]{{$}} 298define <8 x i16> @compare_sext_ult_v8i16 (<8 x i16> %x, <8 x i16> %y) { 299 %cmp = icmp ult <8 x i16> %x, %y 300 %res = sext <8 x i1> %cmp to <8 x i16> 301 ret <8 x i16> %res 302} 303 304; CHECK-LABEL: compare_sle_v8i16: 305; NO-SIMD128-NOT: i16x8 306; SIMD128-NEXT: .functype compare_sle_v8i16 (v128, v128) -> (v128){{$}} 307; SIMD128-NEXT: i16x8.le_s $push[[R:[0-9]+]]=, $0, $1{{$}} 308; SIMD128-NEXT: return $pop[[R]]{{$}} 309define <8 x i1> @compare_sle_v8i16 (<8 x i16> %x, <8 x i16> %y) { 310 %res = icmp sle <8 x i16> %x, %y 311 ret <8 x i1> %res 312} 313 314; CHECK-LABEL: compare_sext_sle_v8i16: 315; NO-SIMD128-NOT: i16x8 316; SIMD128-NEXT: .functype compare_sext_sle_v8i16 (v128, v128) -> (v128){{$}} 317; SIMD128-NEXT: i16x8.le_s $push[[R:[0-9]+]]=, $0, $1{{$}} 318; SIMD128-NEXT: return $pop[[R]]{{$}} 319define <8 x i16> @compare_sext_sle_v8i16 (<8 x i16> %x, <8 x i16> %y) { 320 %cmp = icmp sle <8 x i16> %x, %y 321 %res = sext <8 x i1> %cmp to <8 x i16> 322 ret <8 x i16> %res 323} 324 325; CHECK-LABEL: compare_ule_v8i16: 326; NO-SIMD128-NOT: i16x8 327; SIMD128-NEXT: .functype compare_ule_v8i16 (v128, v128) -> (v128){{$}} 328; SIMD128-NEXT: i16x8.le_u $push[[R:[0-9]+]]=, $0, $1{{$}} 329; SIMD128-NEXT: return $pop[[R]]{{$}} 330define <8 x i1> @compare_ule_v8i16 (<8 x i16> %x, <8 x i16> %y) { 331 %res = icmp ule <8 x i16> %x, %y 332 ret <8 x i1> %res 333} 334 335; CHECK-LABEL: compare_sext_ule_v8i16: 336; NO-SIMD128-NOT: i16x8 337; SIMD128-NEXT: .functype compare_sext_ule_v8i16 (v128, v128) -> (v128){{$}} 338; SIMD128-NEXT: i16x8.le_u $push[[R:[0-9]+]]=, $0, $1{{$}} 339; SIMD128-NEXT: return $pop[[R]]{{$}} 340define <8 x i16> @compare_sext_ule_v8i16 (<8 x i16> %x, <8 x i16> %y) { 341 %cmp = icmp ule <8 x i16> %x, %y 342 %res = sext <8 x i1> %cmp to <8 x i16> 343 ret <8 x i16> %res 344} 345 346; CHECK-LABEL: compare_sgt_v8i16: 347; NO-SIMD128-NOT: i16x8 348; SIMD128-NEXT: .functype compare_sgt_v8i16 (v128, v128) -> (v128){{$}} 349; SIMD128-NEXT: i16x8.gt_s $push[[R:[0-9]+]]=, $0, $1{{$}} 350; SIMD128-NEXT: return $pop[[R]]{{$}} 351define <8 x i1> @compare_sgt_v8i16 (<8 x i16> %x, <8 x i16> %y) { 352 %res = icmp sgt <8 x i16> %x, %y 353 ret <8 x i1> %res 354} 355 356; CHECK-LABEL: compare_sext_sgt_v8i16: 357; NO-SIMD128-NOT: i16x8 358; SIMD128-NEXT: .functype compare_sext_sgt_v8i16 (v128, v128) -> (v128){{$}} 359; SIMD128-NEXT: i16x8.gt_s $push[[R:[0-9]+]]=, $0, $1{{$}} 360; SIMD128-NEXT: return $pop[[R]]{{$}} 361define <8 x i16> @compare_sext_sgt_v8i16 (<8 x i16> %x, <8 x i16> %y) { 362 %cmp = icmp sgt <8 x i16> %x, %y 363 %res = sext <8 x i1> %cmp to <8 x i16> 364 ret <8 x i16> %res 365} 366 367; CHECK-LABEL: compare_ugt_v8i16: 368; NO-SIMD128-NOT: i16x8 369; SIMD128-NEXT: .functype compare_ugt_v8i16 (v128, v128) -> (v128){{$}} 370; SIMD128-NEXT: i16x8.gt_u $push[[R:[0-9]+]]=, $0, $1{{$}} 371; SIMD128-NEXT: return $pop[[R]]{{$}} 372define <8 x i1> @compare_ugt_v8i16 (<8 x i16> %x, <8 x i16> %y) { 373 %res = icmp ugt <8 x i16> %x, %y 374 ret <8 x i1> %res 375} 376 377; CHECK-LABEL: compare_sext_ugt_v8i16: 378; NO-SIMD128-NOT: i16x8 379; SIMD128-NEXT: .functype compare_sext_ugt_v8i16 (v128, v128) -> (v128){{$}} 380; SIMD128-NEXT: i16x8.gt_u $push[[R:[0-9]+]]=, $0, $1{{$}} 381; SIMD128-NEXT: return $pop[[R]]{{$}} 382define <8 x i16> @compare_sext_ugt_v8i16 (<8 x i16> %x, <8 x i16> %y) { 383 %cmp = icmp ugt <8 x i16> %x, %y 384 %res = sext <8 x i1> %cmp to <8 x i16> 385 ret <8 x i16> %res 386} 387 388; CHECK-LABEL: compare_sge_v8i16: 389; NO-SIMD128-NOT: i16x8 390; SIMD128-NEXT: .functype compare_sge_v8i16 (v128, v128) -> (v128){{$}} 391; SIMD128-NEXT: i16x8.ge_s $push[[R:[0-9]+]]=, $0, $1{{$}} 392; SIMD128-NEXT: return $pop[[R]]{{$}} 393define <8 x i1> @compare_sge_v8i16 (<8 x i16> %x, <8 x i16> %y) { 394 %res = icmp sge <8 x i16> %x, %y 395 ret <8 x i1> %res 396} 397 398; CHECK-LABEL: compare_sext_sge_v8i16: 399; NO-SIMD128-NOT: i16x8 400; SIMD128-NEXT: .functype compare_sext_sge_v8i16 (v128, v128) -> (v128){{$}} 401; SIMD128-NEXT: i16x8.ge_s $push[[R:[0-9]+]]=, $0, $1{{$}} 402; SIMD128-NEXT: return $pop[[R]]{{$}} 403define <8 x i16> @compare_sext_sge_v8i16 (<8 x i16> %x, <8 x i16> %y) { 404 %cmp = icmp sge <8 x i16> %x, %y 405 %res = sext <8 x i1> %cmp to <8 x i16> 406 ret <8 x i16> %res 407} 408 409; CHECK-LABEL: compare_uge_v8i16: 410; NO-SIMD128-NOT: i16x8 411; SIMD128-NEXT: .functype compare_uge_v8i16 (v128, v128) -> (v128){{$}} 412; SIMD128-NEXT: i16x8.ge_u $push[[R:[0-9]+]]=, $0, $1{{$}} 413; SIMD128-NEXT: return $pop[[R]]{{$}} 414define <8 x i1> @compare_uge_v8i16 (<8 x i16> %x, <8 x i16> %y) { 415 %res = icmp uge <8 x i16> %x, %y 416 ret <8 x i1> %res 417} 418 419; CHECK-LABEL: compare_sext_uge_v8i16: 420; NO-SIMD128-NOT: i16x8 421; SIMD128-NEXT: .functype compare_sext_uge_v8i16 (v128, v128) -> (v128){{$}} 422; SIMD128-NEXT: i16x8.ge_u $push[[R:[0-9]+]]=, $0, $1{{$}} 423; SIMD128-NEXT: return $pop[[R]]{{$}} 424define <8 x i16> @compare_sext_uge_v8i16 (<8 x i16> %x, <8 x i16> %y) { 425 %cmp = icmp uge <8 x i16> %x, %y 426 %res = sext <8 x i1> %cmp to <8 x i16> 427 ret <8 x i16> %res 428} 429 430; CHECK-LABEL: compare_eq_v4i32: 431; NO-SIMD128-NOT: i32x4 432; SIMD128-NEXT: .functype compare_eq_v4i32 (v128, v128) -> (v128){{$}} 433; SIMD128-NEXT: i32x4.eq $push[[R:[0-9]+]]=, $0, $1{{$}} 434; SIMD128-NEXT: return $pop[[R]]{{$}} 435define <4 x i1> @compare_eq_v4i32 (<4 x i32> %x, <4 x i32> %y) { 436 %res = icmp eq <4 x i32> %x, %y 437 ret <4 x i1> %res 438} 439 440; CHECK-LABEL: compare_sext_eq_v4i32: 441; NO-SIMD128-NOT: i32x4 442; SIMD128-NEXT: .functype compare_sext_eq_v4i32 (v128, v128) -> (v128){{$}} 443; SIMD128-NEXT: i32x4.eq $push[[R:[0-9]+]]=, $0, $1{{$}} 444; SIMD128-NEXT: return $pop[[R]]{{$}} 445define <4 x i32> @compare_sext_eq_v4i32 (<4 x i32> %x, <4 x i32> %y) { 446 %cmp = icmp eq <4 x i32> %x, %y 447 %res = sext <4 x i1> %cmp to <4 x i32> 448 ret <4 x i32> %res 449} 450 451; CHECK-LABEL: compare_ne_v4i32: 452; NO-SIMD128-NOT: i32x4 453; SIMD128-NEXT: .functype compare_ne_v4i32 (v128, v128) -> (v128){{$}} 454; SIMD128-NEXT: i32x4.ne $push[[R:[0-9]+]]=, $0, $1{{$}} 455; SIMD128-NEXT: return $pop[[R]]{{$}} 456define <4 x i1> @compare_ne_v4i32 (<4 x i32> %x, <4 x i32> %y) { 457 %res = icmp ne <4 x i32> %x, %y 458 ret <4 x i1> %res 459} 460 461; CHECK-LABEL: compare_sext_ne_v4i32: 462; NO-SIMD128-NOT: i32x4 463; SIMD128-NEXT: .functype compare_sext_ne_v4i32 (v128, v128) -> (v128){{$}} 464; SIMD128-NEXT: i32x4.ne $push[[R:[0-9]+]]=, $0, $1{{$}} 465; SIMD128-NEXT: return $pop[[R]]{{$}} 466define <4 x i32> @compare_sext_ne_v4i32 (<4 x i32> %x, <4 x i32> %y) { 467 %cmp = icmp ne <4 x i32> %x, %y 468 %res = sext <4 x i1> %cmp to <4 x i32> 469 ret <4 x i32> %res 470} 471 472; CHECK-LABEL: compare_slt_v4i32: 473; NO-SIMD128-NOT: i32x4 474; SIMD128-NEXT: .functype compare_slt_v4i32 (v128, v128) -> (v128){{$}} 475; SIMD128-NEXT: i32x4.lt_s $push[[R:[0-9]+]]=, $0, $1{{$}} 476; SIMD128-NEXT: return $pop[[R]]{{$}} 477define <4 x i1> @compare_slt_v4i32 (<4 x i32> %x, <4 x i32> %y) { 478 %res = icmp slt <4 x i32> %x, %y 479 ret <4 x i1> %res 480} 481 482; CHECK-LABEL: compare_sext_slt_v4i32: 483; NO-SIMD128-NOT: i32x4 484; SIMD128-NEXT: .functype compare_sext_slt_v4i32 (v128, v128) -> (v128){{$}} 485; SIMD128-NEXT: i32x4.lt_s $push[[R:[0-9]+]]=, $0, $1{{$}} 486; SIMD128-NEXT: return $pop[[R]]{{$}} 487define <4 x i32> @compare_sext_slt_v4i32 (<4 x i32> %x, <4 x i32> %y) { 488 %cmp = icmp slt <4 x i32> %x, %y 489 %res = sext <4 x i1> %cmp to <4 x i32> 490 ret <4 x i32> %res 491} 492 493; CHECK-LABEL: compare_ult_v4i32: 494; NO-SIMD128-NOT: i32x4 495; SIMD128-NEXT: .functype compare_ult_v4i32 (v128, v128) -> (v128){{$}} 496; SIMD128-NEXT: i32x4.lt_u $push[[R:[0-9]+]]=, $0, $1{{$}} 497; SIMD128-NEXT: return $pop[[R]]{{$}} 498define <4 x i1> @compare_ult_v4i32 (<4 x i32> %x, <4 x i32> %y) { 499 %res = icmp ult <4 x i32> %x, %y 500 ret <4 x i1> %res 501} 502 503; CHECK-LABEL: compare_sext_ult_v4i32: 504; NO-SIMD128-NOT: i32x4 505; SIMD128-NEXT: .functype compare_sext_ult_v4i32 (v128, v128) -> (v128){{$}} 506; SIMD128-NEXT: i32x4.lt_u $push[[R:[0-9]+]]=, $0, $1{{$}} 507; SIMD128-NEXT: return $pop[[R]]{{$}} 508define <4 x i32> @compare_sext_ult_v4i32 (<4 x i32> %x, <4 x i32> %y) { 509 %cmp = icmp ult <4 x i32> %x, %y 510 %res = sext <4 x i1> %cmp to <4 x i32> 511 ret <4 x i32> %res 512} 513 514; CHECK-LABEL: compare_sle_v4i32: 515; NO-SIMD128-NOT: i32x4 516; SIMD128-NEXT: .functype compare_sle_v4i32 (v128, v128) -> (v128){{$}} 517; SIMD128-NEXT: i32x4.le_s $push[[R:[0-9]+]]=, $0, $1{{$}} 518; SIMD128-NEXT: return $pop[[R]]{{$}} 519define <4 x i1> @compare_sle_v4i32 (<4 x i32> %x, <4 x i32> %y) { 520 %res = icmp sle <4 x i32> %x, %y 521 ret <4 x i1> %res 522} 523 524; CHECK-LABEL: compare_sext_sle_v4i32: 525; NO-SIMD128-NOT: i32x4 526; SIMD128-NEXT: .functype compare_sext_sle_v4i32 (v128, v128) -> (v128){{$}} 527; SIMD128-NEXT: i32x4.le_s $push[[R:[0-9]+]]=, $0, $1{{$}} 528; SIMD128-NEXT: return $pop[[R]]{{$}} 529define <4 x i32> @compare_sext_sle_v4i32 (<4 x i32> %x, <4 x i32> %y) { 530 %cmp = icmp sle <4 x i32> %x, %y 531 %res = sext <4 x i1> %cmp to <4 x i32> 532 ret <4 x i32> %res 533} 534 535; CHECK-LABEL: compare_ule_v4i32: 536; NO-SIMD128-NOT: i32x4 537; SIMD128-NEXT: .functype compare_ule_v4i32 (v128, v128) -> (v128){{$}} 538; SIMD128-NEXT: i32x4.le_u $push[[R:[0-9]+]]=, $0, $1{{$}} 539; SIMD128-NEXT: return $pop[[R]]{{$}} 540define <4 x i1> @compare_ule_v4i32 (<4 x i32> %x, <4 x i32> %y) { 541 %res = icmp ule <4 x i32> %x, %y 542 ret <4 x i1> %res 543} 544 545; CHECK-LABEL: compare_sext_ule_v4i32: 546; NO-SIMD128-NOT: i32x4 547; SIMD128-NEXT: .functype compare_sext_ule_v4i32 (v128, v128) -> (v128){{$}} 548; SIMD128-NEXT: i32x4.le_u $push[[R:[0-9]+]]=, $0, $1{{$}} 549; SIMD128-NEXT: return $pop[[R]]{{$}} 550define <4 x i32> @compare_sext_ule_v4i32 (<4 x i32> %x, <4 x i32> %y) { 551 %cmp = icmp ule <4 x i32> %x, %y 552 %res = sext <4 x i1> %cmp to <4 x i32> 553 ret <4 x i32> %res 554} 555 556; CHECK-LABEL: compare_sgt_v4i32: 557; NO-SIMD128-NOT: i32x4 558; SIMD128-NEXT: .functype compare_sgt_v4i32 (v128, v128) -> (v128){{$}} 559; SIMD128-NEXT: i32x4.gt_s $push[[R:[0-9]+]]=, $0, $1{{$}} 560; SIMD128-NEXT: return $pop[[R]]{{$}} 561define <4 x i1> @compare_sgt_v4i32 (<4 x i32> %x, <4 x i32> %y) { 562 %res = icmp sgt <4 x i32> %x, %y 563 ret <4 x i1> %res 564} 565 566; CHECK-LABEL: compare_sext_sgt_v4i32: 567; NO-SIMD128-NOT: i32x4 568; SIMD128-NEXT: .functype compare_sext_sgt_v4i32 (v128, v128) -> (v128){{$}} 569; SIMD128-NEXT: i32x4.gt_s $push[[R:[0-9]+]]=, $0, $1{{$}} 570; SIMD128-NEXT: return $pop[[R]]{{$}} 571define <4 x i32> @compare_sext_sgt_v4i32 (<4 x i32> %x, <4 x i32> %y) { 572 %cmp = icmp sgt <4 x i32> %x, %y 573 %res = sext <4 x i1> %cmp to <4 x i32> 574 ret <4 x i32> %res 575} 576 577; CHECK-LABEL: compare_ugt_v4i32: 578; NO-SIMD128-NOT: i32x4 579; SIMD128-NEXT: .functype compare_ugt_v4i32 (v128, v128) -> (v128){{$}} 580; SIMD128-NEXT: i32x4.gt_u $push[[R:[0-9]+]]=, $0, $1{{$}} 581; SIMD128-NEXT: return $pop[[R]]{{$}} 582define <4 x i1> @compare_ugt_v4i32 (<4 x i32> %x, <4 x i32> %y) { 583 %res = icmp ugt <4 x i32> %x, %y 584 ret <4 x i1> %res 585} 586 587; CHECK-LABEL: compare_sext_ugt_v4i32: 588; NO-SIMD128-NOT: i32x4 589; SIMD128-NEXT: .functype compare_sext_ugt_v4i32 (v128, v128) -> (v128){{$}} 590; SIMD128-NEXT: i32x4.gt_u $push[[R:[0-9]+]]=, $0, $1{{$}} 591; SIMD128-NEXT: return $pop[[R]]{{$}} 592define <4 x i32> @compare_sext_ugt_v4i32 (<4 x i32> %x, <4 x i32> %y) { 593 %cmp = icmp ugt <4 x i32> %x, %y 594 %res = sext <4 x i1> %cmp to <4 x i32> 595 ret <4 x i32> %res 596} 597 598; CHECK-LABEL: compare_sge_v4i32: 599; NO-SIMD128-NOT: i32x4 600; SIMD128-NEXT: .functype compare_sge_v4i32 (v128, v128) -> (v128){{$}} 601; SIMD128-NEXT: i32x4.ge_s $push[[R:[0-9]+]]=, $0, $1{{$}} 602; SIMD128-NEXT: return $pop[[R]]{{$}} 603define <4 x i1> @compare_sge_v4i32 (<4 x i32> %x, <4 x i32> %y) { 604 %res = icmp sge <4 x i32> %x, %y 605 ret <4 x i1> %res 606} 607 608; CHECK-LABEL: compare_sext_sge_v4i32: 609; NO-SIMD128-NOT: i32x4 610; SIMD128-NEXT: .functype compare_sext_sge_v4i32 (v128, v128) -> (v128){{$}} 611; SIMD128-NEXT: i32x4.ge_s $push[[R:[0-9]+]]=, $0, $1{{$}} 612; SIMD128-NEXT: return $pop[[R]]{{$}} 613define <4 x i32> @compare_sext_sge_v4i32 (<4 x i32> %x, <4 x i32> %y) { 614 %cmp = icmp sge <4 x i32> %x, %y 615 %res = sext <4 x i1> %cmp to <4 x i32> 616 ret <4 x i32> %res 617} 618 619; CHECK-LABEL: compare_uge_v4i32: 620; NO-SIMD128-NOT: i32x4 621; SIMD128-NEXT: .functype compare_uge_v4i32 (v128, v128) -> (v128){{$}} 622; SIMD128-NEXT: i32x4.ge_u $push[[R:[0-9]+]]=, $0, $1{{$}} 623; SIMD128-NEXT: return $pop[[R]]{{$}} 624define <4 x i1> @compare_uge_v4i32 (<4 x i32> %x, <4 x i32> %y) { 625 %res = icmp uge <4 x i32> %x, %y 626 ret <4 x i1> %res 627} 628 629; CHECK-LABEL: compare_sext_uge_v4i32: 630; NO-SIMD128-NOT: i32x4 631; SIMD128-NEXT: .functype compare_sext_uge_v4i32 (v128, v128) -> (v128){{$}} 632; SIMD128-NEXT: i32x4.ge_u $push[[R:[0-9]+]]=, $0, $1{{$}} 633; SIMD128-NEXT: return $pop[[R]]{{$}} 634define <4 x i32> @compare_sext_uge_v4i32 (<4 x i32> %x, <4 x i32> %y) { 635 %cmp = icmp uge <4 x i32> %x, %y 636 %res = sext <4 x i1> %cmp to <4 x i32> 637 ret <4 x i32> %res 638} 639 640; CHECK-LABEL: compare_oeq_v4f32: 641; NO-SIMD128-NOT: f32x4 642; SIMD128-NEXT: .functype compare_oeq_v4f32 (v128, v128) -> (v128){{$}} 643; SIMD128-NEXT: f32x4.eq $push[[R:[0-9]+]]=, $0, $1{{$}} 644; SIMD128-NEXT: return $pop[[R]]{{$}} 645define <4 x i1> @compare_oeq_v4f32 (<4 x float> %x, <4 x float> %y) { 646 %res = fcmp oeq <4 x float> %x, %y 647 ret <4 x i1> %res 648} 649 650; CHECK-LABEL: compare_oeq_nnan_v4f32: 651; NO-SIMD128-NOT: f32x4 652; SIMD128-NEXT: .functype compare_oeq_nnan_v4f32 (v128, v128) -> (v128){{$}} 653; SIMD128-NEXT: f32x4.eq $push[[R:[0-9]+]]=, $0, $1{{$}} 654; SIMD128-NEXT: return $pop[[R]]{{$}} 655define <4 x i1> @compare_oeq_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 656 %res = fcmp nnan oeq <4 x float> %x, %y 657 ret <4 x i1> %res 658} 659 660; CHECK-LABEL: compare_sext_oeq_v4f32: 661; NO-SIMD128-NOT: f32x4 662; SIMD128-NEXT: .functype compare_sext_oeq_v4f32 (v128, v128) -> (v128){{$}} 663; SIMD128-NEXT: f32x4.eq $push[[R:[0-9]+]]=, $0, $1{{$}} 664; SIMD128-NEXT: return $pop[[R]]{{$}} 665define <4 x i32> @compare_sext_oeq_v4f32 (<4 x float> %x, <4 x float> %y) { 666 %cmp = fcmp oeq <4 x float> %x, %y 667 %res = sext <4 x i1> %cmp to <4 x i32> 668 ret <4 x i32> %res 669} 670 671; CHECK-LABEL: compare_sext_oeq_nnan_v4f32: 672; NO-SIMD128-NOT: f32x4 673; SIMD128-NEXT: .functype compare_sext_oeq_nnan_v4f32 (v128, v128) -> (v128){{$}} 674; SIMD128-NEXT: f32x4.eq $push[[R:[0-9]+]]=, $0, $1{{$}} 675; SIMD128-NEXT: return $pop[[R]]{{$}} 676define <4 x i32> @compare_sext_oeq_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 677 %cmp = fcmp nnan oeq <4 x float> %x, %y 678 %res = sext <4 x i1> %cmp to <4 x i32> 679 ret <4 x i32> %res 680} 681 682; CHECK-LABEL: compare_ogt_v4f32: 683; NO-SIMD128-NOT: f32x4 684; SIMD128-NEXT: .functype compare_ogt_v4f32 (v128, v128) -> (v128){{$}} 685; SIMD128-NEXT: f32x4.gt $push[[R:[0-9]+]]=, $0, $1{{$}} 686; SIMD128-NEXT: return $pop[[R]]{{$}} 687define <4 x i1> @compare_ogt_v4f32 (<4 x float> %x, <4 x float> %y) { 688 %res = fcmp ogt <4 x float> %x, %y 689 ret <4 x i1> %res 690} 691 692; CHECK-LABEL: compare_ogt_nnan_v4f32: 693; NO-SIMD128-NOT: f32x4 694; SIMD128-NEXT: .functype compare_ogt_nnan_v4f32 (v128, v128) -> (v128){{$}} 695; SIMD128-NEXT: f32x4.gt $push[[R:[0-9]+]]=, $0, $1{{$}} 696; SIMD128-NEXT: return $pop[[R]]{{$}} 697define <4 x i1> @compare_ogt_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 698 %res = fcmp nnan ogt <4 x float> %x, %y 699 ret <4 x i1> %res 700} 701 702; CHECK-LABEL: compare_sext_ogt_v4f32: 703; NO-SIMD128-NOT: f32x4 704; SIMD128-NEXT: .functype compare_sext_ogt_v4f32 (v128, v128) -> (v128){{$}} 705; SIMD128-NEXT: f32x4.gt $push[[R:[0-9]+]]=, $0, $1{{$}} 706; SIMD128-NEXT: return $pop[[R]]{{$}} 707define <4 x i32> @compare_sext_ogt_v4f32 (<4 x float> %x, <4 x float> %y) { 708 %cmp = fcmp ogt <4 x float> %x, %y 709 %res = sext <4 x i1> %cmp to <4 x i32> 710 ret <4 x i32> %res 711} 712 713; CHECK-LABEL: compare_sext_ogt_nnan_v4f32: 714; NO-SIMD128-NOT: f32x4 715; SIMD128-NEXT: .functype compare_sext_ogt_nnan_v4f32 (v128, v128) -> (v128){{$}} 716; SIMD128-NEXT: f32x4.gt $push[[R:[0-9]+]]=, $0, $1{{$}} 717; SIMD128-NEXT: return $pop[[R]]{{$}} 718define <4 x i32> @compare_sext_ogt_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 719 %cmp = fcmp nnan ogt <4 x float> %x, %y 720 %res = sext <4 x i1> %cmp to <4 x i32> 721 ret <4 x i32> %res 722} 723 724; CHECK-LABEL: compare_oge_v4f32: 725; NO-SIMD128-NOT: f32x4 726; SIMD128-NEXT: .functype compare_oge_v4f32 (v128, v128) -> (v128){{$}} 727; SIMD128-NEXT: f32x4.ge $push[[R:[0-9]+]]=, $0, $1{{$}} 728; SIMD128-NEXT: return $pop[[R]]{{$}} 729define <4 x i1> @compare_oge_v4f32 (<4 x float> %x, <4 x float> %y) { 730 %res = fcmp oge <4 x float> %x, %y 731 ret <4 x i1> %res 732} 733 734; CHECK-LABEL: compare_oge_nnan_v4f32: 735; NO-SIMD128-NOT: f32x4 736; SIMD128-NEXT: .functype compare_oge_nnan_v4f32 (v128, v128) -> (v128){{$}} 737; SIMD128-NEXT: f32x4.ge $push[[R:[0-9]+]]=, $0, $1{{$}} 738; SIMD128-NEXT: return $pop[[R]]{{$}} 739define <4 x i1> @compare_oge_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 740 %res = fcmp nnan oge <4 x float> %x, %y 741 ret <4 x i1> %res 742} 743 744; CHECK-LABEL: compare_sext_oge_v4f32: 745; NO-SIMD128-NOT: f32x4 746; SIMD128-NEXT: .functype compare_sext_oge_v4f32 (v128, v128) -> (v128){{$}} 747; SIMD128-NEXT: f32x4.ge $push[[R:[0-9]+]]=, $0, $1{{$}} 748; SIMD128-NEXT: return $pop[[R]]{{$}} 749define <4 x i32> @compare_sext_oge_v4f32 (<4 x float> %x, <4 x float> %y) { 750 %cmp = fcmp oge <4 x float> %x, %y 751 %res = sext <4 x i1> %cmp to <4 x i32> 752 ret <4 x i32> %res 753} 754 755; CHECK-LABEL: compare_sext_oge_nnan_v4f32: 756; NO-SIMD128-NOT: f32x4 757; SIMD128-NEXT: .functype compare_sext_oge_nnan_v4f32 (v128, v128) -> (v128){{$}} 758; SIMD128-NEXT: f32x4.ge $push[[R:[0-9]+]]=, $0, $1{{$}} 759; SIMD128-NEXT: return $pop[[R]]{{$}} 760define <4 x i32> @compare_sext_oge_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 761 %cmp = fcmp nnan oge <4 x float> %x, %y 762 %res = sext <4 x i1> %cmp to <4 x i32> 763 ret <4 x i32> %res 764} 765 766; CHECK-LABEL: compare_olt_v4f32: 767; NO-SIMD128-NOT: f32x4 768; SIMD128-NEXT: .functype compare_olt_v4f32 (v128, v128) -> (v128){{$}} 769; SIMD128-NEXT: f32x4.lt $push[[R:[0-9]+]]=, $0, $1{{$}} 770; SIMD128-NEXT: return $pop[[R]]{{$}} 771define <4 x i1> @compare_olt_v4f32 (<4 x float> %x, <4 x float> %y) { 772 %res = fcmp olt <4 x float> %x, %y 773 ret <4 x i1> %res 774} 775 776; CHECK-LABEL: compare_olt_nnan_v4f32: 777; NO-SIMD128-NOT: f32x4 778; SIMD128-NEXT: .functype compare_olt_nnan_v4f32 (v128, v128) -> (v128){{$}} 779; SIMD128-NEXT: f32x4.lt $push[[R:[0-9]+]]=, $0, $1{{$}} 780; SIMD128-NEXT: return $pop[[R]]{{$}} 781define <4 x i1> @compare_olt_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 782 %res = fcmp nnan olt <4 x float> %x, %y 783 ret <4 x i1> %res 784} 785 786; CHECK-LABEL: compare_sext_olt_v4f32: 787; NO-SIMD128-NOT: f32x4 788; SIMD128-NEXT: .functype compare_sext_olt_v4f32 (v128, v128) -> (v128){{$}} 789; SIMD128-NEXT: f32x4.lt $push[[R:[0-9]+]]=, $0, $1{{$}} 790; SIMD128-NEXT: return $pop[[R]]{{$}} 791define <4 x i32> @compare_sext_olt_v4f32 (<4 x float> %x, <4 x float> %y) { 792 %cmp = fcmp olt <4 x float> %x, %y 793 %res = sext <4 x i1> %cmp to <4 x i32> 794 ret <4 x i32> %res 795} 796 797; CHECK-LABEL: compare_sext_olt_nnan_v4f32: 798; NO-SIMD128-NOT: f32x4 799; SIMD128-NEXT: .functype compare_sext_olt_nnan_v4f32 (v128, v128) -> (v128){{$}} 800; SIMD128-NEXT: f32x4.lt $push[[R:[0-9]+]]=, $0, $1{{$}} 801; SIMD128-NEXT: return $pop[[R]]{{$}} 802define <4 x i32> @compare_sext_olt_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 803 %cmp = fcmp nnan olt <4 x float> %x, %y 804 %res = sext <4 x i1> %cmp to <4 x i32> 805 ret <4 x i32> %res 806} 807 808; CHECK-LABEL: compare_ole_v4f32: 809; NO-SIMD128-NOT: f32x4 810; SIMD128-NEXT: .functype compare_ole_v4f32 (v128, v128) -> (v128){{$}} 811; SIMD128-NEXT: f32x4.le $push[[R:[0-9]+]]=, $0, $1{{$}} 812; SIMD128-NEXT: return $pop[[R]]{{$}} 813define <4 x i1> @compare_ole_v4f32 (<4 x float> %x, <4 x float> %y) { 814 %res = fcmp ole <4 x float> %x, %y 815 ret <4 x i1> %res 816} 817 818; CHECK-LABEL: compare_ole_nnan_v4f32: 819; NO-SIMD128-NOT: f32x4 820; SIMD128-NEXT: .functype compare_ole_nnan_v4f32 (v128, v128) -> (v128){{$}} 821; SIMD128-NEXT: f32x4.le $push[[R:[0-9]+]]=, $0, $1{{$}} 822; SIMD128-NEXT: return $pop[[R]]{{$}} 823define <4 x i1> @compare_ole_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 824 %res = fcmp nnan ole <4 x float> %x, %y 825 ret <4 x i1> %res 826} 827 828; CHECK-LABEL: compare_sext_ole_v4f32: 829; NO-SIMD128-NOT: f32x4 830; SIMD128-NEXT: .functype compare_sext_ole_v4f32 (v128, v128) -> (v128){{$}} 831; SIMD128-NEXT: f32x4.le $push[[R:[0-9]+]]=, $0, $1{{$}} 832; SIMD128-NEXT: return $pop[[R]]{{$}} 833define <4 x i32> @compare_sext_ole_v4f32 (<4 x float> %x, <4 x float> %y) { 834 %cmp = fcmp ole <4 x float> %x, %y 835 %res = sext <4 x i1> %cmp to <4 x i32> 836 ret <4 x i32> %res 837} 838 839; CHECK-LABEL: compare_sext_ole_nnan_v4f32: 840; NO-SIMD128-NOT: f32x4 841; SIMD128-NEXT: .functype compare_sext_ole_nnan_v4f32 (v128, v128) -> (v128){{$}} 842; SIMD128-NEXT: f32x4.le $push[[R:[0-9]+]]=, $0, $1{{$}} 843; SIMD128-NEXT: return $pop[[R]]{{$}} 844define <4 x i32> @compare_sext_ole_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 845 %cmp = fcmp nnan ole <4 x float> %x, %y 846 %res = sext <4 x i1> %cmp to <4 x i32> 847 ret <4 x i32> %res 848} 849 850; CHECK-LABEL: compare_one_v4f32: 851; NO-SIMD128-NOT: f32x4 852; SIMD128-NEXT: .functype compare_one_v4f32 (v128, v128) -> (v128){{$}} 853; SIMD128-NEXT: f32x4.ne $push[[T0:[0-9]+]]=, $0, $1{{$}} 854; SIMD128-NEXT: f32x4.eq $push[[T1:[0-9]+]]=, $0, $0{{$}} 855; SIMD128-NEXT: f32x4.eq $push[[T2:[0-9]+]]=, $1, $1{{$}} 856; SIMD128-NEXT: v128.and $push[[T3:[0-9]+]]=, $pop[[T1]], $pop[[T2]]{{$}} 857; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T3]]{{$}} 858; SIMD128-NEXT: return $pop[[R]]{{$}} 859define <4 x i1> @compare_one_v4f32 (<4 x float> %x, <4 x float> %y) { 860 %res = fcmp one <4 x float> %x, %y 861 ret <4 x i1> %res 862} 863 864; CHECK-LABEL: compare_one_nnan_v4f32: 865; NO-SIMD128-NOT: f32x4 866; SIMD128-NEXT: .functype compare_one_nnan_v4f32 (v128, v128) -> (v128){{$}} 867; SIMD128-NEXT: f32x4.ne $push[[R:[0-9]+]]=, $0, $1{{$}} 868; SIMD128-NEXT: return $pop[[R]]{{$}} 869define <4 x i1> @compare_one_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 870 %res = fcmp nnan one <4 x float> %x, %y 871 ret <4 x i1> %res 872} 873 874; CHECK-LABEL: compare_sext_one_v4f32: 875; NO-SIMD128-NOT: f32x4 876; SIMD128-NEXT: .functype compare_sext_one_v4f32 (v128, v128) -> (v128){{$}} 877; SIMD128-NEXT: f32x4.ne $push[[T0:[0-9]+]]=, $0, $1{{$}} 878; SIMD128-NEXT: f32x4.eq $push[[T1:[0-9]+]]=, $0, $0{{$}} 879; SIMD128-NEXT: f32x4.eq $push[[T2:[0-9]+]]=, $1, $1{{$}} 880; SIMD128-NEXT: v128.and $push[[T3:[0-9]+]]=, $pop[[T1]], $pop[[T2]]{{$}} 881; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T3]]{{$}} 882; SIMD128-NEXT: return $pop[[R]]{{$}} 883define <4 x i32> @compare_sext_one_v4f32 (<4 x float> %x, <4 x float> %y) { 884 %cmp = fcmp one <4 x float> %x, %y 885 %res = sext <4 x i1> %cmp to <4 x i32> 886 ret <4 x i32> %res 887} 888 889; CHECK-LABEL: compare_sext_one_nnan_v4f32: 890; NO-SIMD128-NOT: f32x4 891; SIMD128-NEXT: .functype compare_sext_one_nnan_v4f32 (v128, v128) -> (v128){{$}} 892; SIMD128-NEXT: f32x4.ne $push[[R:[0-9]+]]=, $0, $1{{$}} 893; SIMD128-NEXT: return $pop[[R]]{{$}} 894define <4 x i32> @compare_sext_one_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 895 %cmp = fcmp nnan one <4 x float> %x, %y 896 %res = sext <4 x i1> %cmp to <4 x i32> 897 ret <4 x i32> %res 898} 899 900; CHECK-LABEL: compare_ord_v4f32: 901; NO-SIMD128-NOT: f32x4 902; SIMD128-NEXT: .functype compare_ord_v4f32 (v128, v128) -> (v128){{$}} 903; SIMD128-NEXT: f32x4.eq $push[[T0:[0-9]+]]=, $0, $0{{$}} 904; SIMD128-NEXT: f32x4.eq $push[[T1:[0-9]+]]=, $1, $1{{$}} 905; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}} 906; SIMD128-NEXT: return $pop[[R]]{{$}} 907define <4 x i1> @compare_ord_v4f32 (<4 x float> %x, <4 x float> %y) { 908 %res = fcmp ord <4 x float> %x, %y 909 ret <4 x i1> %res 910} 911 912; CHECK-LABEL: compare_ord_nnan_v4f32: 913; NO-SIMD128-NOT: f32x4 914; SIMD128-NEXT: .functype compare_ord_nnan_v4f32 (v128, v128) -> (v128){{$}} 915; SIMD128-NEXT: f32x4.eq $push[[T0:[0-9]+]]=, $0, $0{{$}} 916; SIMD128-NEXT: f32x4.eq $push[[T1:[0-9]+]]=, $1, $1{{$}} 917; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}} 918; SIMD128-NEXT: return $pop[[R]]{{$}} 919define <4 x i1> @compare_ord_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 920 %res = fcmp nnan ord <4 x float> %x, %y 921 ret <4 x i1> %res 922} 923 924; CHECK-LABEL: compare_sext_ord_v4f32: 925; NO-SIMD128-NOT: f32x4 926; SIMD128-NEXT: .functype compare_sext_ord_v4f32 (v128, v128) -> (v128){{$}} 927; SIMD128-NEXT: f32x4.eq $push[[T0:[0-9]+]]=, $0, $0{{$}} 928; SIMD128-NEXT: f32x4.eq $push[[T1:[0-9]+]]=, $1, $1{{$}} 929; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}} 930; SIMD128-NEXT: return $pop[[R]]{{$}} 931define <4 x i32> @compare_sext_ord_v4f32 (<4 x float> %x, <4 x float> %y) { 932 %cmp = fcmp ord <4 x float> %x, %y 933 %res = sext <4 x i1> %cmp to <4 x i32> 934 ret <4 x i32> %res 935} 936 937; CHECK-LABEL: compare_sext_ord_nnan_v4f32: 938; NO-SIMD128-NOT: f32x4 939; SIMD128-NEXT: .functype compare_sext_ord_nnan_v4f32 (v128, v128) -> (v128){{$}} 940; SIMD128-NEXT: f32x4.eq $push[[T0:[0-9]+]]=, $0, $0{{$}} 941; SIMD128-NEXT: f32x4.eq $push[[T1:[0-9]+]]=, $1, $1{{$}} 942; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}} 943; SIMD128-NEXT: return $pop[[R]]{{$}} 944define <4 x i32> @compare_sext_ord_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 945 %cmp = fcmp nnan ord <4 x float> %x, %y 946 %res = sext <4 x i1> %cmp to <4 x i32> 947 ret <4 x i32> %res 948} 949 950; CHECK-LABEL: compare_ueq_v4f32: 951; NO-SIMD128-NOT: f32x4 952; SIMD128-NEXT: .functype compare_ueq_v4f32 (v128, v128) -> (v128){{$}} 953; SIMD128-NEXT: f32x4.eq $push[[T0:[0-9]+]]=, $0, $1{{$}} 954; SIMD128-NEXT: f32x4.ne $push[[T1:[0-9]+]]=, $0, $0{{$}} 955; SIMD128-NEXT: f32x4.ne $push[[T2:[0-9]+]]=, $1, $1{{$}} 956; SIMD128-NEXT: v128.or $push[[T3:[0-9]+]]=, $pop[[T1]], $pop[[T2]]{{$}} 957; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T3]]{{$}} 958; SIMD128-NEXT: return $pop[[R]]{{$}} 959define <4 x i1> @compare_ueq_v4f32 (<4 x float> %x, <4 x float> %y) { 960 %res = fcmp ueq <4 x float> %x, %y 961 ret <4 x i1> %res 962} 963 964; CHECK-LABEL: compare_ueq_nnan_v4f32: 965; NO-SIMD128-NOT: f32x4 966; SIMD128-NEXT: .functype compare_ueq_nnan_v4f32 (v128, v128) -> (v128){{$}} 967; SIMD128-NEXT: f32x4.eq $push[[R:[0-9]+]]=, $0, $1{{$}} 968; SIMD128-NEXT: return $pop[[R]]{{$}} 969define <4 x i1> @compare_ueq_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 970 %res = fcmp nnan ueq <4 x float> %x, %y 971 ret <4 x i1> %res 972} 973 974; CHECK-LABEL: compare_sext_ueq_v4f32: 975; NO-SIMD128-NOT: f32x4 976; SIMD128-NEXT: .functype compare_sext_ueq_v4f32 (v128, v128) -> (v128){{$}} 977; SIMD128-NEXT: f32x4.eq $push[[T0:[0-9]+]]=, $0, $1{{$}} 978; SIMD128-NEXT: f32x4.ne $push[[T1:[0-9]+]]=, $0, $0{{$}} 979; SIMD128-NEXT: f32x4.ne $push[[T2:[0-9]+]]=, $1, $1{{$}} 980; SIMD128-NEXT: v128.or $push[[T3:[0-9]+]]=, $pop[[T1]], $pop[[T2]]{{$}} 981; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T3]]{{$}} 982; SIMD128-NEXT: return $pop[[R]] 983define <4 x i32> @compare_sext_ueq_v4f32 (<4 x float> %x, <4 x float> %y) { 984 %cmp = fcmp ueq <4 x float> %x, %y 985 %res = sext <4 x i1> %cmp to <4 x i32> 986 ret <4 x i32> %res 987} 988 989; CHECK-LABEL: compare_sext_ueq_nnan_v4f32: 990; NO-SIMD128-NOT: f32x4 991; SIMD128-NEXT: .functype compare_sext_ueq_nnan_v4f32 (v128, v128) -> (v128){{$}} 992; SIMD128-NEXT: f32x4.eq $push[[R:[0-9]+]]=, $0, $1{{$}} 993; SIMD128-NEXT: return $pop[[R]] 994define <4 x i32> @compare_sext_ueq_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 995 %cmp = fcmp nnan ueq <4 x float> %x, %y 996 %res = sext <4 x i1> %cmp to <4 x i32> 997 ret <4 x i32> %res 998} 999 1000; CHECK-LABEL: compare_ugt_v4f32: 1001; NO-SIMD128-NOT: f32x4 1002; SIMD128-NEXT: .functype compare_ugt_v4f32 (v128, v128) -> (v128){{$}} 1003; SIMD128-NEXT: f32x4.le $push[[T0:[0-9]+]]=, $0, $1{{$}} 1004; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}} 1005; SIMD128-NEXT: return $pop[[R]]{{$}} 1006define <4 x i1> @compare_ugt_v4f32 (<4 x float> %x, <4 x float> %y) { 1007 %res = fcmp ugt <4 x float> %x, %y 1008 ret <4 x i1> %res 1009} 1010 1011; CHECK-LABEL: compare_ugt_nnan_v4f32: 1012; NO-SIMD128-NOT: f32x4 1013; SIMD128-NEXT: .functype compare_ugt_nnan_v4f32 (v128, v128) -> (v128){{$}} 1014; SIMD128-NEXT: f32x4.gt $push[[R:[0-9]+]]=, $0, $1{{$}} 1015; SIMD128-NEXT: return $pop[[R]]{{$}} 1016define <4 x i1> @compare_ugt_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 1017 %res = fcmp nnan ugt <4 x float> %x, %y 1018 ret <4 x i1> %res 1019} 1020 1021; CHECK-LABEL: compare_sext_ugt_v4f32: 1022; NO-SIMD128-NOT: f32x4 1023; SIMD128-NEXT: .functype compare_sext_ugt_v4f32 (v128, v128) -> (v128){{$}} 1024; SIMD128-NEXT: f32x4.le $push[[T0:[0-9]+]]=, $0, $1{{$}} 1025; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}} 1026; SIMD128-NEXT: return $pop[[R]]{{$}} 1027define <4 x i32> @compare_sext_ugt_v4f32 (<4 x float> %x, <4 x float> %y) { 1028 %cmp = fcmp ugt <4 x float> %x, %y 1029 %res = sext <4 x i1> %cmp to <4 x i32> 1030 ret <4 x i32> %res 1031} 1032 1033; CHECK-LABEL: compare_sext_ugt_nnan_v4f32: 1034; NO-SIMD128-NOT: f32x4 1035; SIMD128-NEXT: .functype compare_sext_ugt_nnan_v4f32 (v128, v128) -> (v128){{$}} 1036; SIMD128-NEXT: f32x4.gt $push[[R:[0-9]+]]=, $0, $1{{$}} 1037; SIMD128-NEXT: return $pop[[R]]{{$}} 1038define <4 x i32> @compare_sext_ugt_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 1039 %cmp = fcmp nnan ugt <4 x float> %x, %y 1040 %res = sext <4 x i1> %cmp to <4 x i32> 1041 ret <4 x i32> %res 1042} 1043 1044; CHECK-LABEL: compare_uge_v4f32: 1045; NO-SIMD128-NOT: f32x4 1046; SIMD128-NEXT: .functype compare_uge_v4f32 (v128, v128) -> (v128){{$}} 1047; SIMD128-NEXT: f32x4.lt $push[[T0:[0-9]+]]=, $0, $1{{$}} 1048; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}} 1049; SIMD128-NEXT: return $pop[[R]]{{$}} 1050define <4 x i1> @compare_uge_v4f32 (<4 x float> %x, <4 x float> %y) { 1051 %res = fcmp uge <4 x float> %x, %y 1052 ret <4 x i1> %res 1053} 1054 1055; CHECK-LABEL: compare_uge_nnan_v4f32: 1056; NO-SIMD128-NOT: f32x4 1057; SIMD128-NEXT: .functype compare_uge_nnan_v4f32 (v128, v128) -> (v128){{$}} 1058; SIMD128-NEXT: f32x4.ge $push[[R:[0-9]+]]=, $0, $1{{$}} 1059; SIMD128-NEXT: return $pop[[R]]{{$}} 1060define <4 x i1> @compare_uge_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 1061 %res = fcmp nnan uge <4 x float> %x, %y 1062 ret <4 x i1> %res 1063} 1064 1065; CHECK-LABEL: compare_sext_uge_v4f32: 1066; NO-SIMD128-NOT: f32x4 1067; SIMD128-NEXT: .functype compare_sext_uge_v4f32 (v128, v128) -> (v128){{$}} 1068; SIMD128-NEXT: f32x4.lt $push[[T0:[0-9]+]]=, $0, $1{{$}} 1069; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}} 1070; SIMD128-NEXT: return $pop[[R]]{{$}} 1071define <4 x i32> @compare_sext_uge_v4f32 (<4 x float> %x, <4 x float> %y) { 1072 %cmp = fcmp uge <4 x float> %x, %y 1073 %res = sext <4 x i1> %cmp to <4 x i32> 1074 ret <4 x i32> %res 1075} 1076 1077; CHECK-LABEL: compare_sext_uge_nnan_v4f32: 1078; NO-SIMD128-NOT: f32x4 1079; SIMD128-NEXT: .functype compare_sext_uge_nnan_v4f32 (v128, v128) -> (v128){{$}} 1080; SIMD128-NEXT: f32x4.ge $push[[R:[0-9]+]]=, $0, $1{{$}} 1081; SIMD128-NEXT: return $pop[[R]]{{$}} 1082define <4 x i32> @compare_sext_uge_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 1083 %cmp = fcmp nnan uge <4 x float> %x, %y 1084 %res = sext <4 x i1> %cmp to <4 x i32> 1085 ret <4 x i32> %res 1086} 1087 1088; CHECK-LABEL: compare_ult_v4f32: 1089; NO-SIMD128-NOT: f32x4 1090; SIMD128-NEXT: .functype compare_ult_v4f32 (v128, v128) -> (v128){{$}} 1091; SIMD128-NEXT: f32x4.ge $push[[T0:[0-9]+]]=, $0, $1{{$}} 1092; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}} 1093; SIMD128-NEXT: return $pop[[R]]{{$}} 1094define <4 x i1> @compare_ult_v4f32 (<4 x float> %x, <4 x float> %y) { 1095 %res = fcmp ult <4 x float> %x, %y 1096 ret <4 x i1> %res 1097} 1098 1099; CHECK-LABEL: compare_ult_nnan_v4f32: 1100; NO-SIMD128-NOT: f32x4 1101; SIMD128-NEXT: .functype compare_ult_nnan_v4f32 (v128, v128) -> (v128){{$}} 1102; SIMD128-NEXT: f32x4.lt $push[[R:[0-9]+]]=, $0, $1{{$}} 1103; SIMD128-NEXT: return $pop[[R]]{{$}} 1104define <4 x i1> @compare_ult_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 1105 %res = fcmp nnan ult <4 x float> %x, %y 1106 ret <4 x i1> %res 1107} 1108 1109; CHECK-LABEL: compare_sext_ult_v4f32: 1110; NO-SIMD128-NOT: f32x4 1111; SIMD128-NEXT: .functype compare_sext_ult_v4f32 (v128, v128) -> (v128){{$}} 1112; SIMD128-NEXT: f32x4.ge $push[[T0:[0-9]+]]=, $0, $1{{$}} 1113; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}} 1114; SIMD128-NEXT: return $pop[[R]]{{$}} 1115define <4 x i32> @compare_sext_ult_v4f32 (<4 x float> %x, <4 x float> %y) { 1116 %cmp = fcmp ult <4 x float> %x, %y 1117 %res = sext <4 x i1> %cmp to <4 x i32> 1118 ret <4 x i32> %res 1119} 1120 1121; CHECK-LABEL: compare_sext_ult_nnan_v4f32: 1122; NO-SIMD128-NOT: f32x4 1123; SIMD128-NEXT: .functype compare_sext_ult_nnan_v4f32 (v128, v128) -> (v128){{$}} 1124; SIMD128-NEXT: f32x4.lt $push[[R:[0-9]+]]=, $0, $1{{$}} 1125; SIMD128-NEXT: return $pop[[R]]{{$}} 1126define <4 x i32> @compare_sext_ult_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 1127 %cmp = fcmp nnan ult <4 x float> %x, %y 1128 %res = sext <4 x i1> %cmp to <4 x i32> 1129 ret <4 x i32> %res 1130} 1131 1132; CHECK-LABEL: compare_ule_v4f32: 1133; NO-SIMD128-NOT: f32x4 1134; SIMD128-NEXT: .functype compare_ule_v4f32 (v128, v128) -> (v128){{$}} 1135; SIMD128-NEXT: f32x4.gt $push[[T0:[0-9]+]]=, $0, $1{{$}} 1136; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}} 1137; SIMD128-NEXT: return $pop[[R]]{{$}} 1138define <4 x i1> @compare_ule_v4f32 (<4 x float> %x, <4 x float> %y) { 1139 %res = fcmp ule <4 x float> %x, %y 1140 ret <4 x i1> %res 1141} 1142 1143; CHECK-LABEL: compare_ule_nnan_v4f32: 1144; NO-SIMD128-NOT: f32x4 1145; SIMD128-NEXT: .functype compare_ule_nnan_v4f32 (v128, v128) -> (v128){{$}} 1146; SIMD128-NEXT: f32x4.le $push[[R:[0-9]+]]=, $0, $1{{$}} 1147; SIMD128-NEXT: return $pop[[R]]{{$}} 1148define <4 x i1> @compare_ule_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 1149 %res = fcmp nnan ule <4 x float> %x, %y 1150 ret <4 x i1> %res 1151} 1152 1153; CHECK-LABEL: compare_sext_ule_v4f32: 1154; NO-SIMD128-NOT: f32x4 1155; SIMD128-NEXT: .functype compare_sext_ule_v4f32 (v128, v128) -> (v128){{$}} 1156; SIMD128-NEXT: f32x4.gt $push[[T0:[0-9]+]]=, $0, $1{{$}} 1157; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}} 1158; SIMD128-NEXT: return $pop[[R]]{{$}} 1159define <4 x i32> @compare_sext_ule_v4f32 (<4 x float> %x, <4 x float> %y) { 1160 %cmp = fcmp ule <4 x float> %x, %y 1161 %res = sext <4 x i1> %cmp to <4 x i32> 1162 ret <4 x i32> %res 1163} 1164 1165; CHECK-LABEL: compare_sext_ule_nnan_v4f32: 1166; NO-SIMD128-NOT: f32x4 1167; SIMD128-NEXT: .functype compare_sext_ule_nnan_v4f32 (v128, v128) -> (v128){{$}} 1168; SIMD128-NEXT: f32x4.le $push[[R:[0-9]+]]=, $0, $1{{$}} 1169; SIMD128-NEXT: return $pop[[R]]{{$}} 1170define <4 x i32> @compare_sext_ule_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 1171 %cmp = fcmp nnan ule <4 x float> %x, %y 1172 %res = sext <4 x i1> %cmp to <4 x i32> 1173 ret <4 x i32> %res 1174} 1175 1176; CHECK-LABEL: compare_une_v4f32: 1177; NO-SIMD128-NOT: f32x4 1178; SIMD128-NEXT: .functype compare_une_v4f32 (v128, v128) -> (v128){{$}} 1179; SIMD128-NEXT: f32x4.ne $push[[R:[0-9]+]]=, $0, $1{{$}}{{$}} 1180; SIMD128-NEXT: return $pop[[R]]{{$}} 1181define <4 x i1> @compare_une_v4f32 (<4 x float> %x, <4 x float> %y) { 1182 %res = fcmp une <4 x float> %x, %y 1183 ret <4 x i1> %res 1184} 1185 1186; CHECK-LABEL: compare_une_nnan_v4f32: 1187; NO-SIMD128-NOT: f32x4 1188; SIMD128-NEXT: .functype compare_une_nnan_v4f32 (v128, v128) -> (v128){{$}} 1189; SIMD128-NEXT: f32x4.ne $push[[R:[0-9]+]]=, $0, $1{{$}}{{$}} 1190; SIMD128-NEXT: return $pop[[R]]{{$}} 1191define <4 x i1> @compare_une_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 1192 %res = fcmp nnan une <4 x float> %x, %y 1193 ret <4 x i1> %res 1194} 1195 1196; CHECK-LABEL: compare_sext_une_v4f32: 1197; NO-SIMD128-NOT: f32x4 1198; SIMD128-NEXT: .functype compare_sext_une_v4f32 (v128, v128) -> (v128){{$}} 1199; SIMD128-NEXT: f32x4.ne $push[[R:[0-9]+]]=, $0, $1{{$}} 1200; SIMD128-NEXT: return $pop[[R]]{{$}} 1201define <4 x i32> @compare_sext_une_v4f32 (<4 x float> %x, <4 x float> %y) { 1202 %cmp = fcmp une <4 x float> %x, %y 1203 %res = sext <4 x i1> %cmp to <4 x i32> 1204 ret <4 x i32> %res 1205} 1206 1207; CHECK-LABEL: compare_sext_une_nnan_v4f32: 1208; NO-SIMD128-NOT: f32x4 1209; SIMD128-NEXT: .functype compare_sext_une_nnan_v4f32 (v128, v128) -> (v128){{$}} 1210; SIMD128-NEXT: f32x4.ne $push[[R:[0-9]+]]=, $0, $1{{$}} 1211; SIMD128-NEXT: return $pop[[R]]{{$}} 1212define <4 x i32> @compare_sext_une_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 1213 %cmp = fcmp nnan une <4 x float> %x, %y 1214 %res = sext <4 x i1> %cmp to <4 x i32> 1215 ret <4 x i32> %res 1216} 1217 1218; CHECK-LABEL: compare_uno_v4f32: 1219; NO-SIMD128-NOT: f32x4 1220; SIMD128-NEXT: .functype compare_uno_v4f32 (v128, v128) -> (v128){{$}} 1221; SIMD128-NEXT: f32x4.ne $push[[T0:[0-9]+]]=, $0, $0{{$}} 1222; SIMD128-NEXT: f32x4.ne $push[[T1:[0-9]+]]=, $1, $1{{$}} 1223; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}} 1224; SIMD128-NEXT: return $pop[[R]]{{$}} 1225define <4 x i1> @compare_uno_v4f32 (<4 x float> %x, <4 x float> %y) { 1226 %res = fcmp uno <4 x float> %x, %y 1227 ret <4 x i1> %res 1228} 1229 1230; CHECK-LABEL: compare_uno_nnan_v4f32: 1231; NO-SIMD128-NOT: f32x4 1232; SIMD128-NEXT: .functype compare_uno_nnan_v4f32 (v128, v128) -> (v128){{$}} 1233; SIMD128-NEXT: f32x4.ne $push[[T0:[0-9]+]]=, $0, $0{{$}} 1234; SIMD128-NEXT: f32x4.ne $push[[T1:[0-9]+]]=, $1, $1{{$}} 1235; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}} 1236; SIMD128-NEXT: return $pop[[R]]{{$}} 1237define <4 x i1> @compare_uno_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 1238 %res = fcmp nnan uno <4 x float> %x, %y 1239 ret <4 x i1> %res 1240} 1241 1242; CHECK-LABEL: compare_sext_uno_v4f32: 1243; NO-SIMD128-NOT: f32x4 1244; SIMD128-NEXT: .functype compare_sext_uno_v4f32 (v128, v128) -> (v128){{$}} 1245; SIMD128-NEXT: f32x4.ne $push[[T0:[0-9]+]]=, $0, $0{{$}} 1246; SIMD128-NEXT: f32x4.ne $push[[T1:[0-9]+]]=, $1, $1{{$}} 1247; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}} 1248; SIMD128-NEXT: return $pop[[R]]{{$}} 1249define <4 x i32> @compare_sext_uno_v4f32 (<4 x float> %x, <4 x float> %y) { 1250 %cmp = fcmp uno <4 x float> %x, %y 1251 %res = sext <4 x i1> %cmp to <4 x i32> 1252 ret <4 x i32> %res 1253} 1254 1255; CHECK-LABEL: compare_sext_uno_nnan_v4f32: 1256; NO-SIMD128-NOT: f32x4 1257; SIMD128-NEXT: .functype compare_sext_uno_nnan_v4f32 (v128, v128) -> (v128){{$}} 1258; SIMD128-NEXT: f32x4.ne $push[[T0:[0-9]+]]=, $0, $0{{$}} 1259; SIMD128-NEXT: f32x4.ne $push[[T1:[0-9]+]]=, $1, $1{{$}} 1260; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}} 1261; SIMD128-NEXT: return $pop[[R]]{{$}} 1262define <4 x i32> @compare_sext_uno_nnan_v4f32 (<4 x float> %x, <4 x float> %y) { 1263 %cmp = fcmp nnan uno <4 x float> %x, %y 1264 %res = sext <4 x i1> %cmp to <4 x i32> 1265 ret <4 x i32> %res 1266} 1267 1268; CHECK-LABEL: compare_oeq_v2f64: 1269; NO-SIMD128-NOT: f64x2 1270; SIMD128-VM-NOT: f64x2 1271; SIMD128-NEXT: .functype compare_oeq_v2f64 (v128, v128) -> (v128){{$}} 1272; SIMD128-NEXT: f64x2.eq $push[[R:[0-9]+]]=, $0, $1{{$}} 1273; SIMD128-NEXT: return $pop[[R]]{{$}} 1274define <2 x i1> @compare_oeq_v2f64 (<2 x double> %x, <2 x double> %y) { 1275 %res = fcmp oeq <2 x double> %x, %y 1276 ret <2 x i1> %res 1277} 1278 1279; CHECK-LABEL: compare_oeq_nnan_v2f64: 1280; NO-SIMD128-NOT: f64x2 1281; SIMD128-VM-NOT: f64x2 1282; SIMD128-NEXT: .functype compare_oeq_nnan_v2f64 (v128, v128) -> (v128){{$}} 1283; SIMD128-NEXT: f64x2.eq $push[[R:[0-9]+]]=, $0, $1{{$}} 1284; SIMD128-NEXT: return $pop[[R]]{{$}} 1285define <2 x i1> @compare_oeq_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1286 %res = fcmp nnan oeq <2 x double> %x, %y 1287 ret <2 x i1> %res 1288} 1289 1290; CHECK-LABEL: compare_sext_oeq_v2f64: 1291; NO-SIMD128-NOT: f64x2 1292; SIMD128-VM-NOT: f64x2 1293; SIMD128-NEXT: .functype compare_sext_oeq_v2f64 (v128, v128) -> (v128){{$}} 1294; SIMD128-NEXT: f64x2.eq $push[[R:[0-9]+]]=, $0, $1{{$}} 1295; SIMD128-NEXT: return $pop[[R]]{{$}} 1296define <2 x i64> @compare_sext_oeq_v2f64 (<2 x double> %x, <2 x double> %y) { 1297 %cmp = fcmp oeq <2 x double> %x, %y 1298 %res = sext <2 x i1> %cmp to <2 x i64> 1299 ret <2 x i64> %res 1300} 1301 1302; CHECK-LABEL: compare_sext_oeq_nnan_v2f64: 1303; NO-SIMD128-NOT: f64x2 1304; SIMD128-VM-NOT: f64x2 1305; SIMD128-NEXT: .functype compare_sext_oeq_nnan_v2f64 (v128, v128) -> (v128){{$}} 1306; SIMD128-NEXT: f64x2.eq $push[[R:[0-9]+]]=, $0, $1{{$}} 1307; SIMD128-NEXT: return $pop[[R]]{{$}} 1308define <2 x i64> @compare_sext_oeq_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1309 %cmp = fcmp nnan oeq <2 x double> %x, %y 1310 %res = sext <2 x i1> %cmp to <2 x i64> 1311 ret <2 x i64> %res 1312} 1313 1314; CHECK-LABEL: compare_ogt_v2f64: 1315; NO-SIMD128-NOT: f64x2 1316; SIMD128-VM-NOT: f64x2 1317; SIMD128-NEXT: .functype compare_ogt_v2f64 (v128, v128) -> (v128){{$}} 1318; SIMD128-NEXT: f64x2.gt $push[[R:[0-9]+]]=, $0, $1{{$}} 1319; SIMD128-NEXT: return $pop[[R]]{{$}} 1320define <2 x i1> @compare_ogt_v2f64 (<2 x double> %x, <2 x double> %y) { 1321 %res = fcmp ogt <2 x double> %x, %y 1322 ret <2 x i1> %res 1323} 1324 1325; CHECK-LABEL: compare_ogt_nnan_v2f64: 1326; NO-SIMD128-NOT: f64x2 1327; SIMD128-VM-NOT: f64x2 1328; SIMD128-NEXT: .functype compare_ogt_nnan_v2f64 (v128, v128) -> (v128){{$}} 1329; SIMD128-NEXT: f64x2.gt $push[[R:[0-9]+]]=, $0, $1{{$}} 1330; SIMD128-NEXT: return $pop[[R]]{{$}} 1331define <2 x i1> @compare_ogt_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1332 %res = fcmp nnan ogt <2 x double> %x, %y 1333 ret <2 x i1> %res 1334} 1335 1336; CHECK-LABEL: compare_sext_ogt_v2f64: 1337; NO-SIMD128-NOT: f64x2 1338; SIMD128-VM-NOT: f64x2 1339; SIMD128-NEXT: .functype compare_sext_ogt_v2f64 (v128, v128) -> (v128){{$}} 1340; SIMD128-NEXT: f64x2.gt $push[[R:[0-9]+]]=, $0, $1{{$}} 1341; SIMD128-NEXT: return $pop[[R]]{{$}} 1342define <2 x i64> @compare_sext_ogt_v2f64 (<2 x double> %x, <2 x double> %y) { 1343 %cmp = fcmp ogt <2 x double> %x, %y 1344 %res = sext <2 x i1> %cmp to <2 x i64> 1345 ret <2 x i64> %res 1346} 1347 1348; CHECK-LABEL: compare_sext_ogt_nnan_v2f64: 1349; NO-SIMD128-NOT: f64x2 1350; SIMD128-VM-NOT: f64x2 1351; SIMD128-NEXT: .functype compare_sext_ogt_nnan_v2f64 (v128, v128) -> (v128){{$}} 1352; SIMD128-NEXT: f64x2.gt $push[[R:[0-9]+]]=, $0, $1{{$}} 1353; SIMD128-NEXT: return $pop[[R]]{{$}} 1354define <2 x i64> @compare_sext_ogt_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1355 %cmp = fcmp nnan ogt <2 x double> %x, %y 1356 %res = sext <2 x i1> %cmp to <2 x i64> 1357 ret <2 x i64> %res 1358} 1359 1360; CHECK-LABEL: compare_oge_v2f64: 1361; NO-SIMD128-NOT: f64x2 1362; SIMD128-VM-NOT: f64x2 1363; SIMD128-NEXT: .functype compare_oge_v2f64 (v128, v128) -> (v128){{$}} 1364; SIMD128-NEXT: f64x2.ge $push[[R:[0-9]+]]=, $0, $1{{$}} 1365; SIMD128-NEXT: return $pop[[R]]{{$}} 1366define <2 x i1> @compare_oge_v2f64 (<2 x double> %x, <2 x double> %y) { 1367 %res = fcmp oge <2 x double> %x, %y 1368 ret <2 x i1> %res 1369} 1370 1371; CHECK-LABEL: compare_oge_nnan_v2f64: 1372; NO-SIMD128-NOT: f64x2 1373; SIMD128-VM-NOT: f64x2 1374; SIMD128-NEXT: .functype compare_oge_nnan_v2f64 (v128, v128) -> (v128){{$}} 1375; SIMD128-NEXT: f64x2.ge $push[[R:[0-9]+]]=, $0, $1{{$}} 1376; SIMD128-NEXT: return $pop[[R]]{{$}} 1377define <2 x i1> @compare_oge_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1378 %res = fcmp nnan oge <2 x double> %x, %y 1379 ret <2 x i1> %res 1380} 1381 1382; CHECK-LABEL: compare_sext_oge_v2f64: 1383; NO-SIMD128-NOT: f64x2 1384; SIMD128-VM-NOT: f64x2 1385; SIMD128-NEXT: .functype compare_sext_oge_v2f64 (v128, v128) -> (v128){{$}} 1386; SIMD128-NEXT: f64x2.ge $push[[R:[0-9]+]]=, $0, $1{{$}} 1387; SIMD128-NEXT: return $pop[[R]]{{$}} 1388define <2 x i64> @compare_sext_oge_v2f64 (<2 x double> %x, <2 x double> %y) { 1389 %cmp = fcmp oge <2 x double> %x, %y 1390 %res = sext <2 x i1> %cmp to <2 x i64> 1391 ret <2 x i64> %res 1392} 1393 1394; CHECK-LABEL: compare_sext_oge_nnan_v2f64: 1395; NO-SIMD128-NOT: f64x2 1396; SIMD128-VM-NOT: f64x2 1397; SIMD128-NEXT: .functype compare_sext_oge_nnan_v2f64 (v128, v128) -> (v128){{$}} 1398; SIMD128-NEXT: f64x2.ge $push[[R:[0-9]+]]=, $0, $1{{$}} 1399; SIMD128-NEXT: return $pop[[R]]{{$}} 1400define <2 x i64> @compare_sext_oge_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1401 %cmp = fcmp nnan oge <2 x double> %x, %y 1402 %res = sext <2 x i1> %cmp to <2 x i64> 1403 ret <2 x i64> %res 1404} 1405 1406; CHECK-LABEL: compare_olt_v2f64: 1407; NO-SIMD128-NOT: f64x2 1408; SIMD128-VM-NOT: f64x2 1409; SIMD128-NEXT: .functype compare_olt_v2f64 (v128, v128) -> (v128){{$}} 1410; SIMD128-NEXT: f64x2.lt $push[[R:[0-9]+]]=, $0, $1{{$}} 1411; SIMD128-NEXT: return $pop[[R]]{{$}} 1412define <2 x i1> @compare_olt_v2f64 (<2 x double> %x, <2 x double> %y) { 1413 %res = fcmp olt <2 x double> %x, %y 1414 ret <2 x i1> %res 1415} 1416 1417; CHECK-LABEL: compare_olt_nnan_v2f64: 1418; NO-SIMD128-NOT: f64x2 1419; SIMD128-VM-NOT: f64x2 1420; SIMD128-NEXT: .functype compare_olt_nnan_v2f64 (v128, v128) -> (v128){{$}} 1421; SIMD128-NEXT: f64x2.lt $push[[R:[0-9]+]]=, $0, $1{{$}} 1422; SIMD128-NEXT: return $pop[[R]]{{$}} 1423define <2 x i1> @compare_olt_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1424 %res = fcmp nnan olt <2 x double> %x, %y 1425 ret <2 x i1> %res 1426} 1427 1428; CHECK-LABEL: compare_sext_olt_v2f64: 1429; NO-SIMD128-NOT: f64x2 1430; SIMD128-VM-NOT: f64x2 1431; SIMD128-NEXT: .functype compare_sext_olt_v2f64 (v128, v128) -> (v128){{$}} 1432; SIMD128-NEXT: f64x2.lt $push[[R:[0-9]+]]=, $0, $1{{$}} 1433; SIMD128-NEXT: return $pop[[R]]{{$}} 1434define <2 x i64> @compare_sext_olt_v2f64 (<2 x double> %x, <2 x double> %y) { 1435 %cmp = fcmp olt <2 x double> %x, %y 1436 %res = sext <2 x i1> %cmp to <2 x i64> 1437 ret <2 x i64> %res 1438} 1439 1440; CHECK-LABEL: compare_sext_olt_nnan_v2f64: 1441; NO-SIMD128-NOT: f64x2 1442; SIMD128-VM-NOT: f64x2 1443; SIMD128-NEXT: .functype compare_sext_olt_nnan_v2f64 (v128, v128) -> (v128){{$}} 1444; SIMD128-NEXT: f64x2.lt $push[[R:[0-9]+]]=, $0, $1{{$}} 1445; SIMD128-NEXT: return $pop[[R]]{{$}} 1446define <2 x i64> @compare_sext_olt_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1447 %cmp = fcmp nnan olt <2 x double> %x, %y 1448 %res = sext <2 x i1> %cmp to <2 x i64> 1449 ret <2 x i64> %res 1450} 1451 1452; CHECK-LABEL: compare_ole_v2f64: 1453; NO-SIMD128-NOT: f64x2 1454; SIMD128-VM-NOT: f64x2 1455; SIMD128-NEXT: .functype compare_ole_v2f64 (v128, v128) -> (v128){{$}} 1456; SIMD128-NEXT: f64x2.le $push[[R:[0-9]+]]=, $0, $1{{$}} 1457; SIMD128-NEXT: return $pop[[R]]{{$}} 1458define <2 x i1> @compare_ole_v2f64 (<2 x double> %x, <2 x double> %y) { 1459 %res = fcmp ole <2 x double> %x, %y 1460 ret <2 x i1> %res 1461} 1462 1463; CHECK-LABEL: compare_ole_nnan_v2f64: 1464; NO-SIMD128-NOT: f64x2 1465; SIMD128-VM-NOT: f64x2 1466; SIMD128-NEXT: .functype compare_ole_nnan_v2f64 (v128, v128) -> (v128){{$}} 1467; SIMD128-NEXT: f64x2.le $push[[R:[0-9]+]]=, $0, $1{{$}} 1468; SIMD128-NEXT: return $pop[[R]]{{$}} 1469define <2 x i1> @compare_ole_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1470 %res = fcmp nnan ole <2 x double> %x, %y 1471 ret <2 x i1> %res 1472} 1473 1474; CHECK-LABEL: compare_sext_ole_v2f64: 1475; NO-SIMD128-NOT: f64x2 1476; SIMD128-VM-NOT: f64x2 1477; SIMD128-NEXT: .functype compare_sext_ole_v2f64 (v128, v128) -> (v128){{$}} 1478; SIMD128-NEXT: f64x2.le $push[[R:[0-9]+]]=, $0, $1{{$}} 1479; SIMD128-NEXT: return $pop[[R]]{{$}} 1480define <2 x i64> @compare_sext_ole_v2f64 (<2 x double> %x, <2 x double> %y) { 1481 %cmp = fcmp ole <2 x double> %x, %y 1482 %res = sext <2 x i1> %cmp to <2 x i64> 1483 ret <2 x i64> %res 1484} 1485 1486; CHECK-LABEL: compare_sext_ole_nnan_v2f64: 1487; NO-SIMD128-NOT: f64x2 1488; SIMD128-VM-NOT: f64x2 1489; SIMD128-NEXT: .functype compare_sext_ole_nnan_v2f64 (v128, v128) -> (v128){{$}} 1490; SIMD128-NEXT: f64x2.le $push[[R:[0-9]+]]=, $0, $1{{$}} 1491; SIMD128-NEXT: return $pop[[R]]{{$}} 1492define <2 x i64> @compare_sext_ole_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1493 %cmp = fcmp nnan ole <2 x double> %x, %y 1494 %res = sext <2 x i1> %cmp to <2 x i64> 1495 ret <2 x i64> %res 1496} 1497 1498; CHECK-LABEL: compare_one_v2f64: 1499; NO-SIMD128-NOT: f64x2 1500; SIMD128-VM-NOT: f64x2 1501; SIMD128-NEXT: .functype compare_one_v2f64 (v128, v128) -> (v128){{$}} 1502; SIMD128-NEXT: f64x2.ne $push[[T0:[0-9]+]]=, $0, $1{{$}} 1503; SIMD128-NEXT: f64x2.eq $push[[T1:[0-9]+]]=, $0, $0{{$}} 1504; SIMD128-NEXT: f64x2.eq $push[[T2:[0-9]+]]=, $1, $1{{$}} 1505; SIMD128-NEXT: v128.and $push[[T3:[0-9]+]]=, $pop[[T1]], $pop[[T2]]{{$}} 1506; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T3]]{{$}} 1507; SIMD128-NEXT: return $pop[[R]]{{$}} 1508define <2 x i1> @compare_one_v2f64 (<2 x double> %x, <2 x double> %y) { 1509 %res = fcmp one <2 x double> %x, %y 1510 ret <2 x i1> %res 1511} 1512 1513; CHECK-LABEL: compare_one_nnan_v2f64: 1514; NO-SIMD128-NOT: f64x2 1515; SIMD128-VM-NOT: f64x2 1516; SIMD128-NEXT: .functype compare_one_nnan_v2f64 (v128, v128) -> (v128){{$}} 1517; SIMD128-NEXT: f64x2.ne $push[[R:[0-9]+]]=, $0, $1{{$}} 1518; SIMD128-NEXT: return $pop[[R]]{{$}} 1519define <2 x i1> @compare_one_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1520 %res = fcmp nnan one <2 x double> %x, %y 1521 ret <2 x i1> %res 1522} 1523 1524; CHECK-LABEL: compare_sext_one_v2f64: 1525; NO-SIMD128-NOT: f64x2 1526; SIMD128-VM-NOT: f64x2 1527; SIMD128-NEXT: .functype compare_sext_one_v2f64 (v128, v128) -> (v128){{$}} 1528; SIMD128-NEXT: f64x2.ne $push[[T0:[0-9]+]]=, $0, $1{{$}} 1529; SIMD128-NEXT: f64x2.eq $push[[T1:[0-9]+]]=, $0, $0{{$}} 1530; SIMD128-NEXT: f64x2.eq $push[[T2:[0-9]+]]=, $1, $1{{$}} 1531; SIMD128-NEXT: v128.and $push[[T3:[0-9]+]]=, $pop[[T1]], $pop[[T2]]{{$}} 1532; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T3]]{{$}} 1533; SIMD128-NEXT: return $pop[[R]]{{$}} 1534define <2 x i64> @compare_sext_one_v2f64 (<2 x double> %x, <2 x double> %y) { 1535 %cmp = fcmp one <2 x double> %x, %y 1536 %res = sext <2 x i1> %cmp to <2 x i64> 1537 ret <2 x i64> %res 1538} 1539 1540; CHECK-LABEL: compare_sext_one_nnan_v2f64: 1541; NO-SIMD128-NOT: f64x2 1542; SIMD128-VM-NOT: f64x2 1543; SIMD128-NEXT: .functype compare_sext_one_nnan_v2f64 (v128, v128) -> (v128){{$}} 1544; SIMD128-NEXT: f64x2.ne $push[[R:[0-9]+]]=, $0, $1{{$}} 1545; SIMD128-NEXT: return $pop[[R]]{{$}} 1546define <2 x i64> @compare_sext_one_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1547 %cmp = fcmp nnan one <2 x double> %x, %y 1548 %res = sext <2 x i1> %cmp to <2 x i64> 1549 ret <2 x i64> %res 1550} 1551 1552; CHECK-LABEL: compare_ord_v2f64: 1553; NO-SIMD128-NOT: f64x2 1554; SIMD128-VM-NOT: f64x2 1555; SIMD128-NEXT: .functype compare_ord_v2f64 (v128, v128) -> (v128){{$}} 1556; SIMD128-NEXT: f64x2.eq $push[[T0:[0-9]+]]=, $0, $0{{$}} 1557; SIMD128-NEXT: f64x2.eq $push[[T1:[0-9]+]]=, $1, $1{{$}} 1558; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}} 1559; SIMD128-NEXT: return $pop[[R]]{{$}} 1560define <2 x i1> @compare_ord_v2f64 (<2 x double> %x, <2 x double> %y) { 1561 %res = fcmp ord <2 x double> %x, %y 1562 ret <2 x i1> %res 1563} 1564 1565; CHECK-LABEL: compare_ord_nnan_v2f64: 1566; NO-SIMD128-NOT: f64x2 1567; SIMD128-VM-NOT: f64x2 1568; SIMD128-NEXT: .functype compare_ord_nnan_v2f64 (v128, v128) -> (v128){{$}} 1569; SIMD128-NEXT: f64x2.eq $push[[T0:[0-9]+]]=, $0, $0{{$}} 1570; SIMD128-NEXT: f64x2.eq $push[[T1:[0-9]+]]=, $1, $1{{$}} 1571; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}} 1572; SIMD128-NEXT: return $pop[[R]]{{$}} 1573define <2 x i1> @compare_ord_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1574 %res = fcmp nnan ord <2 x double> %x, %y 1575 ret <2 x i1> %res 1576} 1577 1578; CHECK-LABEL: compare_sext_ord_v2f64: 1579; NO-SIMD128-NOT: f64x2 1580; SIMD128-VM-NOT: f64x2 1581; SIMD128-NEXT: .functype compare_sext_ord_v2f64 (v128, v128) -> (v128){{$}} 1582; SIMD128-NEXT: f64x2.eq $push[[T0:[0-9]+]]=, $0, $0{{$}} 1583; SIMD128-NEXT: f64x2.eq $push[[T1:[0-9]+]]=, $1, $1{{$}} 1584; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}} 1585; SIMD128-NEXT: return $pop[[R]]{{$}} 1586define <2 x i64> @compare_sext_ord_v2f64 (<2 x double> %x, <2 x double> %y) { 1587 %cmp = fcmp ord <2 x double> %x, %y 1588 %res = sext <2 x i1> %cmp to <2 x i64> 1589 ret <2 x i64> %res 1590} 1591 1592; CHECK-LABEL: compare_sext_ord_nnan_v2f64: 1593; NO-SIMD128-NOT: f64x2 1594; SIMD128-VM-NOT: f64x2 1595; SIMD128-NEXT: .functype compare_sext_ord_nnan_v2f64 (v128, v128) -> (v128){{$}} 1596; SIMD128-NEXT: f64x2.eq $push[[T0:[0-9]+]]=, $0, $0{{$}} 1597; SIMD128-NEXT: f64x2.eq $push[[T1:[0-9]+]]=, $1, $1{{$}} 1598; SIMD128-NEXT: v128.and $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}} 1599; SIMD128-NEXT: return $pop[[R]]{{$}} 1600define <2 x i64> @compare_sext_ord_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1601 %cmp = fcmp nnan ord <2 x double> %x, %y 1602 %res = sext <2 x i1> %cmp to <2 x i64> 1603 ret <2 x i64> %res 1604} 1605 1606; CHECK-LABEL: compare_ueq_v2f64: 1607; NO-SIMD128-NOT: f64x2 1608; SIMD128-VM-NOT: f64x2 1609; SIMD128-NEXT: .functype compare_ueq_v2f64 (v128, v128) -> (v128){{$}} 1610; SIMD128-NEXT: f64x2.eq $push[[T0:[0-9]+]]=, $0, $1{{$}} 1611; SIMD128-NEXT: f64x2.ne $push[[T1:[0-9]+]]=, $0, $0{{$}} 1612; SIMD128-NEXT: f64x2.ne $push[[T2:[0-9]+]]=, $1, $1{{$}} 1613; SIMD128-NEXT: v128.or $push[[T3:[0-9]+]]=, $pop[[T1]], $pop[[T2]]{{$}} 1614; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T3]]{{$}} 1615; SIMD128-NEXT: return $pop[[R]]{{$}} 1616define <2 x i1> @compare_ueq_v2f64 (<2 x double> %x, <2 x double> %y) { 1617 %res = fcmp ueq <2 x double> %x, %y 1618 ret <2 x i1> %res 1619} 1620 1621; CHECK-LABEL: compare_ueq_nnan_v2f64: 1622; NO-SIMD128-NOT: f64x2 1623; SIMD128-VM-NOT: f64x2 1624; SIMD128-NEXT: .functype compare_ueq_nnan_v2f64 (v128, v128) -> (v128){{$}} 1625; SIMD128-NEXT: f64x2.eq $push[[R:[0-9]+]]=, $0, $1{{$}} 1626; SIMD128-NEXT: return $pop[[R]]{{$}} 1627define <2 x i1> @compare_ueq_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1628 %res = fcmp nnan ueq <2 x double> %x, %y 1629 ret <2 x i1> %res 1630} 1631 1632; CHECK-LABEL: compare_sext_ueq_v2f64: 1633; NO-SIMD128-NOT: f64x2 1634; SIMD128-VM-NOT: f64x2 1635; SIMD128-NEXT: .functype compare_sext_ueq_v2f64 (v128, v128) -> (v128){{$}} 1636; SIMD128-NEXT: f64x2.eq $push[[T0:[0-9]+]]=, $0, $1{{$}} 1637; SIMD128-NEXT: f64x2.ne $push[[T1:[0-9]+]]=, $0, $0{{$}} 1638; SIMD128-NEXT: f64x2.ne $push[[T2:[0-9]+]]=, $1, $1{{$}} 1639; SIMD128-NEXT: v128.or $push[[T3:[0-9]+]]=, $pop[[T1]], $pop[[T2]]{{$}} 1640; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T3]]{{$}} 1641; SIMD128-NEXT: return $pop[[R]]{{$}} 1642define <2 x i64> @compare_sext_ueq_v2f64 (<2 x double> %x, <2 x double> %y) { 1643 %cmp = fcmp ueq <2 x double> %x, %y 1644 %res = sext <2 x i1> %cmp to <2 x i64> 1645 ret <2 x i64> %res 1646} 1647 1648; CHECK-LABEL: compare_sext_ueq_nnan_v2f64: 1649; NO-SIMD128-NOT: f64x2 1650; SIMD128-VM-NOT: f64x2 1651; SIMD128-NEXT: .functype compare_sext_ueq_nnan_v2f64 (v128, v128) -> (v128){{$}} 1652; SIMD128-NEXT: f64x2.eq $push[[R:[0-9]+]]=, $0, $1{{$}} 1653; SIMD128-NEXT: return $pop[[R]]{{$}} 1654define <2 x i64> @compare_sext_ueq_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1655 %cmp = fcmp nnan ueq <2 x double> %x, %y 1656 %res = sext <2 x i1> %cmp to <2 x i64> 1657 ret <2 x i64> %res 1658} 1659 1660; CHECK-LABEL: compare_ugt_v2f64: 1661; NO-SIMD128-NOT: f64x2 1662; SIMD128-VM-NOT: f64x2 1663; SIMD128-NEXT: .functype compare_ugt_v2f64 (v128, v128) -> (v128){{$}} 1664; SIMD128-NEXT: f64x2.le $push[[T0:[0-9]+]]=, $0, $1{{$}} 1665; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}} 1666; SIMD128-NEXT: return $pop[[R]]{{$}} 1667define <2 x i1> @compare_ugt_v2f64 (<2 x double> %x, <2 x double> %y) { 1668 %res = fcmp ugt <2 x double> %x, %y 1669 ret <2 x i1> %res 1670} 1671 1672; CHECK-LABEL: compare_ugt_nnan_v2f64: 1673; NO-SIMD128-NOT: f64x2 1674; SIMD128-VM-NOT: f64x2 1675; SIMD128-NEXT: .functype compare_ugt_nnan_v2f64 (v128, v128) -> (v128){{$}} 1676; SIMD128-NEXT: f64x2.gt $push[[R:[0-9]+]]=, $0, $1{{$}} 1677; SIMD128-NEXT: return $pop[[R]]{{$}} 1678define <2 x i1> @compare_ugt_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1679 %res = fcmp nnan ugt <2 x double> %x, %y 1680 ret <2 x i1> %res 1681} 1682 1683; CHECK-LABEL: compare_sext_ugt_v2f64: 1684; NO-SIMD128-NOT: f64x2 1685; SIMD128-VM-NOT: f64x2 1686; SIMD128-NEXT: .functype compare_sext_ugt_v2f64 (v128, v128) -> (v128){{$}} 1687; SIMD128-NEXT: f64x2.le $push[[T0:[0-9]+]]=, $0, $1{{$}} 1688; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}} 1689; SIMD128-NEXT: return $pop[[R]]{{$}} 1690define <2 x i64> @compare_sext_ugt_v2f64 (<2 x double> %x, <2 x double> %y) { 1691 %cmp = fcmp ugt <2 x double> %x, %y 1692 %res = sext <2 x i1> %cmp to <2 x i64> 1693 ret <2 x i64> %res 1694} 1695 1696; CHECK-LABEL: compare_sext_ugt_nnan_v2f64: 1697; NO-SIMD128-NOT: f64x2 1698; SIMD128-VM-NOT: f64x2 1699; SIMD128-NEXT: .functype compare_sext_ugt_nnan_v2f64 (v128, v128) -> (v128){{$}} 1700; SIMD128-NEXT: f64x2.gt $push[[R:[0-9]+]]=, $0, $1{{$}} 1701; SIMD128-NEXT: return $pop[[R]]{{$}} 1702define <2 x i64> @compare_sext_ugt_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1703 %cmp = fcmp nnan ugt <2 x double> %x, %y 1704 %res = sext <2 x i1> %cmp to <2 x i64> 1705 ret <2 x i64> %res 1706} 1707 1708; CHECK-LABEL: compare_uge_v2f64: 1709; NO-SIMD128-NOT: f64x2 1710; SIMD128-VM-NOT: f64x2 1711; SIMD128-NEXT: .functype compare_uge_v2f64 (v128, v128) -> (v128){{$}} 1712; SIMD128-NEXT: f64x2.lt $push[[T0:[0-9]+]]=, $0, $1{{$}} 1713; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}} 1714; SIMD128-NEXT: return $pop[[R]]{{$}} 1715define <2 x i1> @compare_uge_v2f64 (<2 x double> %x, <2 x double> %y) { 1716 %res = fcmp uge <2 x double> %x, %y 1717 ret <2 x i1> %res 1718} 1719 1720; CHECK-LABEL: compare_uge_nnan_v2f64: 1721; NO-SIMD128-NOT: f64x2 1722; SIMD128-VM-NOT: f64x2 1723; SIMD128-NEXT: .functype compare_uge_nnan_v2f64 (v128, v128) -> (v128){{$}} 1724; SIMD128-NEXT: f64x2.ge $push[[R:[0-9]+]]=, $0, $1{{$}} 1725; SIMD128-NEXT: return $pop[[R]]{{$}} 1726define <2 x i1> @compare_uge_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1727 %res = fcmp nnan uge <2 x double> %x, %y 1728 ret <2 x i1> %res 1729} 1730 1731; CHECK-LABEL: compare_sext_uge_v2f64: 1732; NO-SIMD128-NOT: f64x2 1733; SIMD128-VM-NOT: f64x2 1734; SIMD128-NEXT: .functype compare_sext_uge_v2f64 (v128, v128) -> (v128){{$}} 1735; SIMD128-NEXT: f64x2.lt $push[[T0:[0-9]+]]=, $0, $1{{$}} 1736; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}} 1737; SIMD128-NEXT: return $pop[[R]]{{$}} 1738define <2 x i64> @compare_sext_uge_v2f64 (<2 x double> %x, <2 x double> %y) { 1739 %cmp = fcmp uge <2 x double> %x, %y 1740 %res = sext <2 x i1> %cmp to <2 x i64> 1741 ret <2 x i64> %res 1742} 1743 1744; CHECK-LABEL: compare_sext_uge_nnan_v2f64: 1745; NO-SIMD128-NOT: f64x2 1746; SIMD128-VM-NOT: f64x2 1747; SIMD128-NEXT: .functype compare_sext_uge_nnan_v2f64 (v128, v128) -> (v128){{$}} 1748; SIMD128-NEXT: f64x2.ge $push[[R:[0-9]+]]=, $0, $1{{$}} 1749; SIMD128-NEXT: return $pop[[R]]{{$}} 1750define <2 x i64> @compare_sext_uge_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1751 %cmp = fcmp nnan uge <2 x double> %x, %y 1752 %res = sext <2 x i1> %cmp to <2 x i64> 1753 ret <2 x i64> %res 1754} 1755 1756; CHECK-LABEL: compare_ult_v2f64: 1757; NO-SIMD128-NOT: f64x2 1758; SIMD128-VM-NOT: f64x2 1759; SIMD128-NEXT: .functype compare_ult_v2f64 (v128, v128) -> (v128){{$}} 1760; SIMD128-NEXT: f64x2.ge $push[[T0:[0-9]+]]=, $0, $1{{$}} 1761; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}} 1762; SIMD128-NEXT: return $pop[[R]]{{$}} 1763define <2 x i1> @compare_ult_v2f64 (<2 x double> %x, <2 x double> %y) { 1764 %res = fcmp ult <2 x double> %x, %y 1765 ret <2 x i1> %res 1766} 1767 1768; CHECK-LABEL: compare_ult_nnan_v2f64: 1769; NO-SIMD128-NOT: f64x2 1770; SIMD128-VM-NOT: f64x2 1771; SIMD128-NEXT: .functype compare_ult_nnan_v2f64 (v128, v128) -> (v128){{$}} 1772; SIMD128-NEXT: f64x2.lt $push[[R:[0-9]+]]=, $0, $1{{$}} 1773; SIMD128-NEXT: return $pop[[R]]{{$}} 1774define <2 x i1> @compare_ult_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1775 %res = fcmp nnan ult <2 x double> %x, %y 1776 ret <2 x i1> %res 1777} 1778 1779; CHECK-LABEL: compare_sext_ult_v2f64: 1780; NO-SIMD128-NOT: f64x2 1781; SIMD128-VM-NOT: f64x2 1782; SIMD128-NEXT: .functype compare_sext_ult_v2f64 (v128, v128) -> (v128){{$}} 1783; SIMD128-NEXT: f64x2.ge $push[[T0:[0-9]+]]=, $0, $1{{$}} 1784; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}} 1785; SIMD128-NEXT: return $pop[[R]]{{$}} 1786define <2 x i64> @compare_sext_ult_v2f64 (<2 x double> %x, <2 x double> %y) { 1787 %cmp = fcmp ult <2 x double> %x, %y 1788 %res = sext <2 x i1> %cmp to <2 x i64> 1789 ret <2 x i64> %res 1790} 1791 1792; CHECK-LABEL: compare_sext_ult_nnan_v2f64: 1793; NO-SIMD128-NOT: f64x2 1794; SIMD128-VM-NOT: f64x2 1795; SIMD128-NEXT: .functype compare_sext_ult_nnan_v2f64 (v128, v128) -> (v128){{$}} 1796; SIMD128-NEXT: f64x2.lt $push[[R:[0-9]+]]=, $0, $1{{$}} 1797; SIMD128-NEXT: return $pop[[R]]{{$}} 1798define <2 x i64> @compare_sext_ult_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1799 %cmp = fcmp nnan ult <2 x double> %x, %y 1800 %res = sext <2 x i1> %cmp to <2 x i64> 1801 ret <2 x i64> %res 1802} 1803 1804; CHECK-LABEL: compare_ule_v2f64: 1805; NO-SIMD128-NOT: f64x2 1806; SIMD128-VM-NOT: f64x2 1807; SIMD128-NEXT: .functype compare_ule_v2f64 (v128, v128) -> (v128){{$}} 1808; SIMD128-NEXT: f64x2.gt $push[[T0:[0-9]+]]=, $0, $1{{$}} 1809; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}} 1810; SIMD128-NEXT: return $pop[[R]]{{$}} 1811define <2 x i1> @compare_ule_v2f64 (<2 x double> %x, <2 x double> %y) { 1812 %res = fcmp ule <2 x double> %x, %y 1813 ret <2 x i1> %res 1814} 1815 1816; CHECK-LABEL: compare_ule_nnan_v2f64: 1817; NO-SIMD128-NOT: f64x2 1818; SIMD128-VM-NOT: f64x2 1819; SIMD128-NEXT: .functype compare_ule_nnan_v2f64 (v128, v128) -> (v128){{$}} 1820; SIMD128-NEXT: f64x2.le $push[[R:[0-9]+]]=, $0, $1{{$}} 1821; SIMD128-NEXT: return $pop[[R]]{{$}} 1822define <2 x i1> @compare_ule_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1823 %res = fcmp nnan ule <2 x double> %x, %y 1824 ret <2 x i1> %res 1825} 1826 1827; CHECK-LABEL: compare_sext_ule_v2f64: 1828; NO-SIMD128-NOT: f64x2 1829; SIMD128-VM-NOT: f64x2 1830; SIMD128-NEXT: .functype compare_sext_ule_v2f64 (v128, v128) -> (v128){{$}} 1831; SIMD128-NEXT: f64x2.gt $push[[T0:[0-9]+]]=, $0, $1{{$}} 1832; SIMD128-NEXT: v128.not $push[[R:[0-9]+]]=, $pop[[T0]]{{$}} 1833; SIMD128-NEXT: return $pop[[R]]{{$}} 1834define <2 x i64> @compare_sext_ule_v2f64 (<2 x double> %x, <2 x double> %y) { 1835 %cmp = fcmp ule <2 x double> %x, %y 1836 %res = sext <2 x i1> %cmp to <2 x i64> 1837 ret <2 x i64> %res 1838} 1839 1840; CHECK-LABEL: compare_sext_ule_nnan_v2f64: 1841; NO-SIMD128-NOT: f64x2 1842; SIMD128-VM-NOT: f64x2 1843; SIMD128-NEXT: .functype compare_sext_ule_nnan_v2f64 (v128, v128) -> (v128){{$}} 1844; SIMD128-NEXT: f64x2.le $push[[R:[0-9]+]]=, $0, $1{{$}} 1845; SIMD128-NEXT: return $pop[[R]]{{$}} 1846define <2 x i64> @compare_sext_ule_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1847 %cmp = fcmp nnan ule <2 x double> %x, %y 1848 %res = sext <2 x i1> %cmp to <2 x i64> 1849 ret <2 x i64> %res 1850} 1851 1852; CHECK-LABEL: compare_une_v2f64: 1853; NO-SIMD128-NOT: f64x2 1854; SIMD128-VM-NOT: f64x2 1855; SIMD128-NEXT: .functype compare_une_v2f64 (v128, v128) -> (v128){{$}} 1856; SIMD128-NEXT: f64x2.ne $push[[R:[0-9]+]]=, $0, $1{{$}} 1857; SIMD128-NEXT: return $pop[[R]]{{$}} 1858define <2 x i1> @compare_une_v2f64 (<2 x double> %x, <2 x double> %y) { 1859 %res = fcmp une <2 x double> %x, %y 1860 ret <2 x i1> %res 1861} 1862 1863; CHECK-LABEL: compare_une_nnan_v2f64: 1864; NO-SIMD128-NOT: f64x2 1865; SIMD128-VM-NOT: f64x2 1866; SIMD128-NEXT: .functype compare_une_nnan_v2f64 (v128, v128) -> (v128){{$}} 1867; SIMD128-NEXT: f64x2.ne $push[[R:[0-9]+]]=, $0, $1{{$}} 1868; SIMD128-NEXT: return $pop[[R]]{{$}} 1869define <2 x i1> @compare_une_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1870 %res = fcmp nnan une <2 x double> %x, %y 1871 ret <2 x i1> %res 1872} 1873 1874; CHECK-LABEL: compare_sext_une_v2f64: 1875; NO-SIMD128-NOT: f64x2 1876; SIMD128-VM-NOT: f64x2 1877; SIMD128-NEXT: .functype compare_sext_une_v2f64 (v128, v128) -> (v128){{$}} 1878; SIMD128-NEXT: f64x2.ne $push[[R:[0-9]+]]=, $0, $1{{$}} 1879; SIMD128-NEXT: return $pop[[R]]{{$}} 1880define <2 x i64> @compare_sext_une_v2f64 (<2 x double> %x, <2 x double> %y) { 1881 %cmp = fcmp une <2 x double> %x, %y 1882 %res = sext <2 x i1> %cmp to <2 x i64> 1883 ret <2 x i64> %res 1884} 1885 1886; CHECK-LABEL: compare_sext_une_nnan_v2f64: 1887; NO-SIMD128-NOT: f64x2 1888; SIMD128-VM-NOT: f64x2 1889; SIMD128-NEXT: .functype compare_sext_une_nnan_v2f64 (v128, v128) -> (v128){{$}} 1890; SIMD128-NEXT: f64x2.ne $push[[R:[0-9]+]]=, $0, $1{{$}} 1891; SIMD128-NEXT: return $pop[[R]]{{$}} 1892define <2 x i64> @compare_sext_une_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1893 %cmp = fcmp nnan une <2 x double> %x, %y 1894 %res = sext <2 x i1> %cmp to <2 x i64> 1895 ret <2 x i64> %res 1896} 1897 1898; CHECK-LABEL: compare_uno_v2f64: 1899; NO-SIMD128-NOT: f64x2 1900; SIMD128-VM-NOT: f64x2 1901; SIMD128-NEXT: .functype compare_uno_v2f64 (v128, v128) -> (v128){{$}} 1902; SIMD128-NEXT: f64x2.ne $push[[T0:[0-9]+]]=, $0, $0{{$}} 1903; SIMD128-NEXT: f64x2.ne $push[[T1:[0-9]+]]=, $1, $1{{$}} 1904; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}} 1905; SIMD128-NEXT: return $pop[[R]]{{$}} 1906define <2 x i1> @compare_uno_v2f64 (<2 x double> %x, <2 x double> %y) { 1907 %res = fcmp uno <2 x double> %x, %y 1908 ret <2 x i1> %res 1909} 1910 1911; CHECK-LABEL: compare_uno_nnan_v2f64: 1912; NO-SIMD128-NOT: f64x2 1913; SIMD128-VM-NOT: f64x2 1914; SIMD128-NEXT: .functype compare_uno_nnan_v2f64 (v128, v128) -> (v128){{$}} 1915; SIMD128-NEXT: f64x2.ne $push[[T0:[0-9]+]]=, $0, $0{{$}} 1916; SIMD128-NEXT: f64x2.ne $push[[T1:[0-9]+]]=, $1, $1{{$}} 1917; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}} 1918; SIMD128-NEXT: return $pop[[R]]{{$}} 1919define <2 x i1> @compare_uno_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1920 %res = fcmp nnan uno <2 x double> %x, %y 1921 ret <2 x i1> %res 1922} 1923 1924; CHECK-LABEL: compare_sext_uno_v2f64: 1925; NO-SIMD128-NOT: f64x2 1926; SIMD128-VM-NOT: f64x2 1927; SIMD128-NEXT: .functype compare_sext_uno_v2f64 (v128, v128) -> (v128){{$}} 1928; SIMD128-NEXT: f64x2.ne $push[[T0:[0-9]+]]=, $0, $0{{$}} 1929; SIMD128-NEXT: f64x2.ne $push[[T1:[0-9]+]]=, $1, $1{{$}} 1930; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}} 1931; SIMD128-NEXT: return $pop[[R]]{{$}} 1932define <2 x i64> @compare_sext_uno_v2f64 (<2 x double> %x, <2 x double> %y) { 1933 %cmp = fcmp uno <2 x double> %x, %y 1934 %res = sext <2 x i1> %cmp to <2 x i64> 1935 ret <2 x i64> %res 1936} 1937 1938; CHECK-LABEL: compare_sext_uno_nnan_v2f64: 1939; NO-SIMD128-NOT: f64x2 1940; SIMD128-VM-NOT: f64x2 1941; SIMD128-NEXT: .functype compare_sext_uno_nnan_v2f64 (v128, v128) -> (v128){{$}} 1942; SIMD128-NEXT: f64x2.ne $push[[T0:[0-9]+]]=, $0, $0{{$}} 1943; SIMD128-NEXT: f64x2.ne $push[[T1:[0-9]+]]=, $1, $1{{$}} 1944; SIMD128-NEXT: v128.or $push[[R:[0-9]+]]=, $pop[[T0]], $pop[[T1]]{{$}} 1945; SIMD128-NEXT: return $pop[[R]]{{$}} 1946define <2 x i64> @compare_sext_uno_nnan_v2f64 (<2 x double> %x, <2 x double> %y) { 1947 %cmp = fcmp nnan uno <2 x double> %x, %y 1948 %res = sext <2 x i1> %cmp to <2 x i64> 1949 ret <2 x i64> %res 1950} 1951