1; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128 | FileCheck %s
2
3; Test that the logic to choose between v128.const vector
4; initialization and splat vector initialization and to optimize the
5; choice of splat value works correctly.
6
7target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
8target triple = "wasm32-unknown-unknown"
9
10; CHECK-LABEL: same_const_one_replaced_i16x8:
11; CHECK-NEXT:  .functype       same_const_one_replaced_i16x8 (i32) -> (v128)
12; CHECK-NEXT:  v128.const      $push[[L0:[0-9]+]]=, 42, 42, 42, 42, 42, 0, 42, 42
13; CHECK-NEXT:  i16x8.replace_lane      $push[[L1:[0-9]+]]=, $pop[[L0]], 5, $0
14; CHECK-NEXT:  return          $pop[[L1]]
15define <8 x i16> @same_const_one_replaced_i16x8(i16 %x) {
16  %v = insertelement
17    <8 x i16> <i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42>,
18    i16 %x,
19    i32 5
20  ret <8 x i16> %v
21}
22
23; CHECK-LABEL: different_const_one_replaced_i16x8:
24; CHECK-NEXT:  .functype       different_const_one_replaced_i16x8 (i32) -> (v128)
25; CHECK-NEXT:  v128.const      $push[[L0:[0-9]+]]=, 1, -2, 3, -4, 5, 0, 7, -8
26; CHECK-NEXT:  i16x8.replace_lane      $push[[L1:[0-9]+]]=, $pop[[L0]], 5, $0
27; CHECK-NEXT:  return          $pop[[L1]]
28define <8 x i16> @different_const_one_replaced_i16x8(i16 %x) {
29  %v = insertelement
30    <8 x i16> <i16 1, i16 -2, i16 3, i16 -4, i16 5, i16 -6, i16 7, i16 -8>,
31    i16 %x,
32    i32 5
33  ret <8 x i16> %v
34}
35
36; CHECK-LABEL: same_const_one_replaced_f32x4:
37; CHECK-NEXT:  .functype       same_const_one_replaced_f32x4 (f32) -> (v128)
38; CHECK-NEXT:  v128.const      $push[[L0:[0-9]+]]=, 0x1.5p5, 0x1.5p5, 0x0p0, 0x1.5p5
39; CHECK-NEXT:  f32x4.replace_lane      $push[[L1:[0-9]+]]=, $pop[[L0]], 2, $0
40; CHECK-NEXT:  return          $pop[[L1]]
41define <4 x float> @same_const_one_replaced_f32x4(float %x) {
42  %v = insertelement
43    <4 x float> <float 42., float 42., float 42., float 42.>,
44    float %x,
45    i32 2
46  ret <4 x float> %v
47}
48
49; CHECK-LABEL: different_const_one_replaced_f32x4:
50; CHECK-NEXT:  .functype       different_const_one_replaced_f32x4 (f32) -> (v128)
51; CHECK-NEXT:  v128.const      $push[[L0:[0-9]+]]=, 0x1p0, 0x1p1, 0x0p0, 0x1p2
52; CHECK-NEXT:  f32x4.replace_lane      $push[[L1:[0-9]+]]=, $pop[[L0]], 2, $0
53; CHECK-NEXT:  return          $pop[[L1]]
54define <4 x float> @different_const_one_replaced_f32x4(float %x) {
55  %v = insertelement
56    <4 x float> <float 1., float 2., float 3., float 4.>,
57    float %x,
58    i32 2
59  ret <4 x float> %v
60}
61
62; CHECK-LABEL: splat_common_const_i32x4:
63; CHECK-NEXT:  .functype       splat_common_const_i32x4 () -> (v128)
64; CHECK-NEXT:  v128.const      $push[[L0:[0-9]+]]=, 0, 3, 3, 1
65; CHECK-NEXT:  return          $pop[[L0]]
66define <4 x i32> @splat_common_const_i32x4() {
67  ret <4 x i32> <i32 undef, i32 3, i32 3, i32 1>
68}
69
70; CHECK-LABEL: splat_common_arg_i16x8:
71; CHECK-NEXT:  .functype       splat_common_arg_i16x8 (i32, i32, i32) -> (v128)
72; CHECK-NEXT:  i16x8.splat     $push[[L0:[0-9]+]]=, $2
73; CHECK-NEXT:  i16x8.replace_lane      $push[[L1:[0-9]+]]=, $pop[[L0]], 0, $1
74; CHECK-NEXT:  i16x8.replace_lane      $push[[L2:[0-9]+]]=, $pop[[L1]], 2, $0
75; CHECK-NEXT:  i16x8.replace_lane      $push[[L3:[0-9]+]]=, $pop[[L2]], 4, $1
76; CHECK-NEXT:  i16x8.replace_lane      $push[[L4:[0-9]+]]=, $pop[[L3]], 7, $1
77; CHECK-NEXT:  return          $pop[[L4]]
78define <8 x i16> @splat_common_arg_i16x8(i16 %a, i16 %b, i16 %c) {
79  %v0 = insertelement <8 x i16> undef, i16 %b, i32 0
80  %v1 = insertelement <8 x i16> %v0, i16 %c, i32 1
81  %v2 = insertelement <8 x i16> %v1, i16 %a, i32 2
82  %v3 = insertelement <8 x i16> %v2, i16 %c, i32 3
83  %v4 = insertelement <8 x i16> %v3, i16 %b, i32 4
84  %v5 = insertelement <8 x i16> %v4, i16 %c, i32 5
85  %v6 = insertelement <8 x i16> %v5, i16 %c, i32 6
86  %v7 = insertelement <8 x i16> %v6, i16 %b, i32 7
87  ret <8 x i16> %v7
88}
89
90; CHECK-LABEL: swizzle_one_i8x16:
91; CHECK-NEXT:  .functype       swizzle_one_i8x16 (v128, v128) -> (v128)
92; CHECK-NEXT:  i8x16.swizzle   $push[[L0:[0-9]+]]=, $0, $1
93; CHECK-NEXT:  return          $pop[[L0]]
94define <16 x i8> @swizzle_one_i8x16(<16 x i8> %src, <16 x i8> %mask) {
95  %m0 = extractelement <16 x i8> %mask, i32 0
96  %s0 = extractelement <16 x i8> %src, i8 %m0
97  %v0 = insertelement <16 x i8> undef, i8 %s0, i32 0
98  ret <16 x i8> %v0
99}
100
101; CHECK-LABEL: swizzle_all_i8x16:
102; CHECK-NEXT:  .functype       swizzle_all_i8x16 (v128, v128) -> (v128)
103; CHECK-NEXT:  i8x16.swizzle   $push[[L0:[0-9]+]]=, $0, $1
104; CHECK-NEXT:  return          $pop[[L0]]
105define <16 x i8> @swizzle_all_i8x16(<16 x i8> %src, <16 x i8> %mask) {
106  %m0 = extractelement <16 x i8> %mask, i32 0
107  %s0 = extractelement <16 x i8> %src, i8 %m0
108  %v0 = insertelement <16 x i8> undef, i8 %s0, i32 0
109  %m1 = extractelement <16 x i8> %mask, i32 1
110  %s1 = extractelement <16 x i8> %src, i8 %m1
111  %v1 = insertelement <16 x i8> %v0, i8 %s1, i32 1
112  %m2 = extractelement <16 x i8> %mask, i32 2
113  %s2 = extractelement <16 x i8> %src, i8 %m2
114  %v2 = insertelement <16 x i8> %v1, i8 %s2, i32 2
115  %m3 = extractelement <16 x i8> %mask, i32 3
116  %s3 = extractelement <16 x i8> %src, i8 %m3
117  %v3 = insertelement <16 x i8> %v2, i8 %s3, i32 3
118  %m4 = extractelement <16 x i8> %mask, i32 4
119  %s4 = extractelement <16 x i8> %src, i8 %m4
120  %v4 = insertelement <16 x i8> %v3, i8 %s4, i32 4
121  %m5 = extractelement <16 x i8> %mask, i32 5
122  %s5 = extractelement <16 x i8> %src, i8 %m5
123  %v5 = insertelement <16 x i8> %v4, i8 %s5, i32 5
124  %m6 = extractelement <16 x i8> %mask, i32 6
125  %s6 = extractelement <16 x i8> %src, i8 %m6
126  %v6 = insertelement <16 x i8> %v5, i8 %s6, i32 6
127  %m7 = extractelement <16 x i8> %mask, i32 7
128  %s7 = extractelement <16 x i8> %src, i8 %m7
129  %v7 = insertelement <16 x i8> %v6, i8 %s7, i32 7
130  %m8 = extractelement <16 x i8> %mask, i32 8
131  %s8 = extractelement <16 x i8> %src, i8 %m8
132  %v8 = insertelement <16 x i8> %v7, i8 %s8, i32 8
133  %m9 = extractelement <16 x i8> %mask, i32 9
134  %s9 = extractelement <16 x i8> %src, i8 %m9
135  %v9 = insertelement <16 x i8> %v8, i8 %s9, i32 9
136  %m10 = extractelement <16 x i8> %mask, i32 10
137  %s10 = extractelement <16 x i8> %src, i8 %m10
138  %v10 = insertelement <16 x i8> %v9, i8 %s10, i32 10
139  %m11 = extractelement <16 x i8> %mask, i32 11
140  %s11 = extractelement <16 x i8> %src, i8 %m11
141  %v11 = insertelement <16 x i8> %v10, i8 %s11, i32 11
142  %m12 = extractelement <16 x i8> %mask, i32 12
143  %s12 = extractelement <16 x i8> %src, i8 %m12
144  %v12 = insertelement <16 x i8> %v11, i8 %s12, i32 12
145  %m13 = extractelement <16 x i8> %mask, i32 13
146  %s13 = extractelement <16 x i8> %src, i8 %m13
147  %v13 = insertelement <16 x i8> %v12, i8 %s13, i32 13
148  %m14 = extractelement <16 x i8> %mask, i32 14
149  %s14 = extractelement <16 x i8> %src, i8 %m14
150  %v14 = insertelement <16 x i8> %v13, i8 %s14, i32 14
151  %m15 = extractelement <16 x i8> %mask, i32 15
152  %s15 = extractelement <16 x i8> %src, i8 %m15
153  %v15 = insertelement <16 x i8> %v14, i8 %s15, i32 15
154  ret <16 x i8> %v15
155}
156
157; CHECK-LABEL: swizzle_one_i16x8:
158; CHECK-NEXT:  .functype       swizzle_one_i16x8 (v128, v128) -> (v128)
159; CHECK-NOT:    swizzle
160; CHECK:        return
161define <8 x i16> @swizzle_one_i16x8(<8 x i16> %src, <8 x i16> %mask) {
162  %m0 = extractelement <8 x i16> %mask, i32 0
163  %s0 = extractelement <8 x i16> %src, i16 %m0
164  %v0 = insertelement <8 x i16> undef, i16 %s0, i32 0
165  ret <8 x i16> %v0
166}
167
168; CHECK-LABEL: half_shuffle_i32x4:
169; CHECK-NEXT: .functype        half_shuffle_i32x4 (v128) -> (v128)
170; CHECK:      i8x16.shuffle $push[[L0:[0-9]+]]=, $0, $0, 0, 0, 0, 0, 8, 9, 10, 11, 0, 1, 2, 3, 0, 0, 0, 0
171; CHECK:      i32x4.replace_lane
172; CHECK:      i32x4.replace_lane
173; CHECK:      return
174define <4 x i32> @half_shuffle_i32x4(<4 x i32> %src) {
175  %s0 = extractelement <4 x i32> %src, i32 0
176  %s2 = extractelement <4 x i32> %src, i32 2
177  %v0 = insertelement <4 x i32> undef, i32 0, i32 0
178  %v1 = insertelement <4 x i32> %v0, i32 %s2, i32 1
179  %v2 = insertelement <4 x i32> %v1, i32 %s0, i32 2
180  %v3 = insertelement <4 x i32> %v2, i32 3, i32 3
181  ret <4 x i32> %v3
182}
183
184; CHECK-LABEL: mashup_swizzle_i8x16:
185; CHECK-NEXT:  .functype       mashup_swizzle_i8x16 (v128, v128, i32) -> (v128)
186; CHECK-NEXT:  i8x16.swizzle   $push[[L0:[0-9]+]]=, $0, $1
187; CHECK:       i8x16.replace_lane
188; CHECK:       i8x16.replace_lane
189; CHECK:       i8x16.replace_lane
190; CHECK:       i8x16.replace_lane
191; CHECK:       return
192define <16 x i8> @mashup_swizzle_i8x16(<16 x i8> %src, <16 x i8> %mask, i8 %splatted) {
193  ; swizzle 0
194  %m0 = extractelement <16 x i8> %mask, i32 0
195  %s0 = extractelement <16 x i8> %src, i8 %m0
196  %v0 = insertelement <16 x i8> undef, i8 %s0, i32 0
197  ; swizzle 7
198  %m1 = extractelement <16 x i8> %mask, i32 7
199  %s1 = extractelement <16 x i8> %src, i8 %m1
200  %v1 = insertelement <16 x i8> %v0, i8 %s1, i32 7
201  ; splat 3
202  %v2 = insertelement <16 x i8> %v1, i8 %splatted, i32 3
203  ; splat 12
204  %v3 = insertelement <16 x i8> %v2, i8 %splatted, i32 12
205  ; const 4
206  %v4 = insertelement <16 x i8> %v3, i8 42, i32 4
207  ; const 14
208  %v5 = insertelement <16 x i8> %v4, i8 42, i32 14
209  ret <16 x i8> %v5
210}
211
212; CHECK-LABEL: mashup_const_i8x16:
213; CHECK-NEXT:  .functype       mashup_const_i8x16 (v128, v128, i32) -> (v128)
214; CHECK:       v128.const      $push[[L0:[0-9]+]]=, 0, 0, 0, 0, 42, 0, 0, 0, 0, 0, 0, 0, 0, 0, 42, 0
215; CHECK:       i8x16.replace_lane
216; CHECK:       i8x16.replace_lane
217; CHECK:       i8x16.replace_lane
218; CHECK:       return
219define <16 x i8> @mashup_const_i8x16(<16 x i8> %src, <16 x i8> %mask, i8 %splatted) {
220  ; swizzle 0
221  %m0 = extractelement <16 x i8> %mask, i32 0
222  %s0 = extractelement <16 x i8> %src, i8 %m0
223  %v0 = insertelement <16 x i8> undef, i8 %s0, i32 0
224  ; splat 3
225  %v1 = insertelement <16 x i8> %v0, i8 %splatted, i32 3
226  ; splat 12
227  %v2 = insertelement <16 x i8> %v1, i8 %splatted, i32 12
228  ; const 4
229  %v3 = insertelement <16 x i8> %v2, i8 42, i32 4
230  ; const 14
231  %v4 = insertelement <16 x i8> %v3, i8 42, i32 14
232  ret <16 x i8> %v4
233}
234
235; CHECK-LABEL: mashup_splat_i8x16:
236; CHECK-NEXT:  .functype       mashup_splat_i8x16 (v128, v128, i32) -> (v128)
237; CHECK:       i8x16.splat     $push[[L0:[0-9]+]]=, $2
238; CHECK:       i8x16.replace_lane
239; CHECK:       i8x16.replace_lane
240; CHECK:       return
241define <16 x i8> @mashup_splat_i8x16(<16 x i8> %src, <16 x i8> %mask, i8 %splatted) {
242  ; swizzle 0
243  %m0 = extractelement <16 x i8> %mask, i32 0
244  %s0 = extractelement <16 x i8> %src, i8 %m0
245  %v0 = insertelement <16 x i8> undef, i8 %s0, i32 0
246  ; splat 3
247  %v1 = insertelement <16 x i8> %v0, i8 %splatted, i32 3
248  ; splat 12
249  %v2 = insertelement <16 x i8> %v1, i8 %splatted, i32 12
250  ; const 4
251  %v3 = insertelement <16 x i8> %v2, i8 42, i32 4
252  ret <16 x i8> %v3
253}
254
255; CHECK-LABEL: undef_const_insert_f32x4:
256; CHECK-NEXT:  .functype       undef_const_insert_f32x4 () -> (v128)
257; CHECK-NEXT:  v128.const      $push[[L0:[0-9]+]]=, 0x0p0, 0x1.5p5, 0x0p0, 0x0p0
258; CHECK-NEXT:  return          $pop[[L0]]
259; SIMD-VM: f32x4.splat
260define <4 x float> @undef_const_insert_f32x4() {
261  %v = insertelement <4 x float> undef, float 42., i32 1
262  ret <4 x float> %v
263}
264
265; CHECK-LABEL: undef_arg_insert_i32x4:
266; CHECK-NEXT:  .functype       undef_arg_insert_i32x4 (i32) -> (v128)
267; CHECK-NEXT:  i32x4.splat     $push[[L0:[0-9]+]]=, $0
268; CHECK-NEXT:  return          $pop[[L0]]
269define <4 x i32> @undef_arg_insert_i32x4(i32 %x) {
270  %v = insertelement <4 x i32> undef, i32 %x, i32 3
271  ret <4 x i32> %v
272}
273
274; CHECK-LABEL: all_undef_i8x16:
275; CHECK-NEXT:  .functype       all_undef_i8x16 () -> (v128)
276; CHECK-NEXT:  return          $0
277define <16 x i8> @all_undef_i8x16() {
278  %v = insertelement <16 x i8> undef, i8 undef, i32 4
279  ret <16 x i8> %v
280}
281
282; CHECK-LABEL: all_undef_f64x2:
283; CHECK-NEXT:  .functype       all_undef_f64x2 () -> (v128)
284; CHECK-NEXT:  return          $0
285define <2 x double> @all_undef_f64x2() {
286  ret <2 x double> undef
287}
288