1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=thumbv8.1m.main-none-eabi -mattr=+mve --verify-machineinstrs %s -o - | FileCheck %s 3 4define void @simple(i32* nocapture readonly %x, i32* nocapture readnone %y, i32* nocapture %z, i32 %m, i32 %n) { 5; CHECK-LABEL: simple: 6; CHECK: @ %bb.0: @ %entry 7; CHECK-NEXT: .save {r7, lr} 8; CHECK-NEXT: push {r7, lr} 9; CHECK-NEXT: ldr r1, [sp, #8] 10; CHECK-NEXT: mov r12, r3 11; CHECK-NEXT: wlstp.32 lr, r1, .LBB0_2 12; CHECK-NEXT: .LBB0_1: @ %do.body 13; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 14; CHECK-NEXT: vldrw.u32 q0, [r0], #16 15; CHECK-NEXT: vaddva.s32 r12, q0 16; CHECK-NEXT: letp lr, .LBB0_1 17; CHECK-NEXT: .LBB0_2: @ %if.end 18; CHECK-NEXT: str.w r12, [r2] 19; CHECK-NEXT: pop {r7, pc} 20entry: 21 %add = add i32 %n, 3 22 %div = lshr i32 %add, 2 23 %cmp.not = icmp eq i32 %div, 0 24 br i1 %cmp.not, label %if.end, label %do.body 25 26do.body: ; preds = %entry, %do.body 27 %n.addr.0 = phi i32 [ %sub, %do.body ], [ %n, %entry ] 28 %count.0 = phi i32 [ %sub3, %do.body ], [ %div, %entry ] 29 %s.0 = phi i32 [ %add2, %do.body ], [ %m, %entry ] 30 %x.addr.0 = phi i32* [ %add.ptr, %do.body ], [ %x, %entry ] 31 %0 = tail call <4 x i1> @llvm.arm.mve.vctp32(i32 %n.addr.0) 32 %1 = bitcast i32* %x.addr.0 to <4 x i32>* 33 %2 = load <4 x i32>, <4 x i32>* %1, align 4 34 %3 = tail call i32 @llvm.arm.mve.addv.predicated.v4i32.v4i1(<4 x i32> %2, i32 0, <4 x i1> %0) 35 %add2 = add nsw i32 %3, %s.0 36 %add.ptr = getelementptr inbounds i32, i32* %x.addr.0, i32 4 37 %sub = add i32 %n.addr.0, -4 38 %sub3 = add nsw i32 %count.0, -1 39 %cmp4 = icmp sgt i32 %count.0, 1 40 br i1 %cmp4, label %do.body, label %if.end 41 42if.end: ; preds = %do.body, %entry 43 %s.1 = phi i32 [ %m, %entry ], [ %add2, %do.body ] 44 store i32 %s.1, i32* %z, align 4 45 ret void 46} 47 48define void @nested(i32* nocapture readonly %x, i32* nocapture readnone %y, i32* nocapture %z, i32 %m, i32 %n) { 49; CHECK-LABEL: nested: 50; CHECK: @ %bb.0: @ %entry 51; CHECK-NEXT: .save {r4, r5, r6, r7, lr} 52; CHECK-NEXT: push {r4, r5, r6, r7, lr} 53; CHECK-NEXT: cbz r3, .LBB1_7 54; CHECK-NEXT: @ %bb.1: @ %for.body.preheader 55; CHECK-NEXT: ldr.w r12, [sp, #20] 56; CHECK-NEXT: movs r1, #0 57; CHECK-NEXT: b .LBB1_3 58; CHECK-NEXT: .LBB1_2: @ %if.end 59; CHECK-NEXT: @ in Loop: Header=BB1_3 Depth=1 60; CHECK-NEXT: str.w r4, [r2, r1, lsl #2] 61; CHECK-NEXT: adds r1, #1 62; CHECK-NEXT: cmp r1, r3 63; CHECK-NEXT: beq .LBB1_7 64; CHECK-NEXT: .LBB1_3: @ %for.body 65; CHECK-NEXT: @ =>This Loop Header: Depth=1 66; CHECK-NEXT: @ Child Loop BB1_5 Depth 2 67; CHECK-NEXT: add.w r5, r12, #3 68; CHECK-NEXT: mov r4, r3 69; CHECK-NEXT: lsr.w lr, r5, #2 70; CHECK-NEXT: cmp.w lr, #0 71; CHECK-NEXT: beq .LBB1_2 72; CHECK-NEXT: b .LBB1_4 73; CHECK-NEXT: .LBB1_4: @ %do.body.preheader 74; CHECK-NEXT: @ in Loop: Header=BB1_3 Depth=1 75; CHECK-NEXT: bic r6, r5, #3 76; CHECK-NEXT: mov r7, r12 77; CHECK-NEXT: mov r4, r3 78; CHECK-NEXT: add.w r5, r0, r6, lsl #2 79; CHECK-NEXT: .LBB1_5: @ %do.body 80; CHECK-NEXT: @ Parent Loop BB1_3 Depth=1 81; CHECK-NEXT: @ => This Inner Loop Header: Depth=2 82; CHECK-NEXT: vctp.32 r7 83; CHECK-NEXT: vldrw.u32 q0, [r0], #16 84; CHECK-NEXT: subs r7, #4 85; CHECK-NEXT: subs.w lr, lr, #1 86; CHECK-NEXT: vpst 87; CHECK-NEXT: vaddvat.s32 r4, q0 88; CHECK-NEXT: bne .LBB1_5 89; CHECK-NEXT: b .LBB1_6 90; CHECK-NEXT: .LBB1_6: @ %if.end.loopexit 91; CHECK-NEXT: @ in Loop: Header=BB1_3 Depth=1 92; CHECK-NEXT: sub.w r12, r12, r6 93; CHECK-NEXT: mov r0, r5 94; CHECK-NEXT: b .LBB1_2 95; CHECK-NEXT: .LBB1_7: @ %for.cond.cleanup 96; CHECK-NEXT: pop {r4, r5, r6, r7, pc} 97entry: 98 %cmp20.not = icmp eq i32 %m, 0 99 br i1 %cmp20.not, label %for.cond.cleanup, label %for.body 100 101for.cond.cleanup: ; preds = %if.end, %entry 102 ret void 103 104for.body: ; preds = %entry, %if.end 105 %x.addr.023 = phi i32* [ %x.addr.2, %if.end ], [ %x, %entry ] 106 %a.022 = phi i32 [ %inc, %if.end ], [ 0, %entry ] 107 %n.addr.021 = phi i32 [ %n.addr.2, %if.end ], [ %n, %entry ] 108 %add = add i32 %n.addr.021, 3 109 %div = lshr i32 %add, 2 110 %cmp1.not = icmp eq i32 %div, 0 111 br i1 %cmp1.not, label %if.end, label %do.body.preheader 112 113do.body.preheader: ; preds = %for.body 114 %0 = and i32 %add, -4 115 %scevgep = getelementptr i32, i32* %x.addr.023, i32 %0 116 br label %do.body 117 118do.body: ; preds = %do.body.preheader, %do.body 119 %n.addr.1 = phi i32 [ %sub, %do.body ], [ %n.addr.021, %do.body.preheader ] 120 %count.0 = phi i32 [ %sub4, %do.body ], [ %div, %do.body.preheader ] 121 %s.0 = phi i32 [ %add3, %do.body ], [ %m, %do.body.preheader ] 122 %x.addr.1 = phi i32* [ %add.ptr, %do.body ], [ %x.addr.023, %do.body.preheader ] 123 %1 = tail call <4 x i1> @llvm.arm.mve.vctp32(i32 %n.addr.1) 124 %2 = bitcast i32* %x.addr.1 to <4 x i32>* 125 %3 = load <4 x i32>, <4 x i32>* %2, align 4 126 %4 = tail call i32 @llvm.arm.mve.addv.predicated.v4i32.v4i1(<4 x i32> %3, i32 0, <4 x i1> %1) 127 %add3 = add nsw i32 %4, %s.0 128 %add.ptr = getelementptr inbounds i32, i32* %x.addr.1, i32 4 129 %sub = add i32 %n.addr.1, -4 130 %sub4 = add nsw i32 %count.0, -1 131 %cmp5 = icmp sgt i32 %count.0, 1 132 br i1 %cmp5, label %do.body, label %if.end.loopexit 133 134if.end.loopexit: ; preds = %do.body 135 %5 = sub i32 %n.addr.021, %0 136 br label %if.end 137 138if.end: ; preds = %if.end.loopexit, %for.body 139 %n.addr.2 = phi i32 [ %n.addr.021, %for.body ], [ %5, %if.end.loopexit ] 140 %s.1 = phi i32 [ %m, %for.body ], [ %add3, %if.end.loopexit ] 141 %x.addr.2 = phi i32* [ %x.addr.023, %for.body ], [ %scevgep, %if.end.loopexit ] 142 %arrayidx = getelementptr inbounds i32, i32* %z, i32 %a.022 143 store i32 %s.1, i32* %arrayidx, align 4 144 %inc = add nuw nsw i32 %a.022, 1 145 %exitcond.not = icmp eq i32 %inc, %m 146 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body 147} 148 149declare <4 x i1> @llvm.arm.mve.vctp32(i32) 150declare i32 @llvm.arm.mve.addv.predicated.v4i32.v4i1(<4 x i32>, i32, <4 x i1>) 151