1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve -run-pass=arm-low-overhead-loops %s -o - | FileCheck %s
3--- |
4  define hidden void @vector_spill_in_loop() {
5  entry:
6    ret void
7  }
8
9  define hidden void @vector_spill_load_outside() {
10  entry:
11    ret void
12  }
13...
14---
15name:            vector_spill_in_loop
16tracksRegLiveness: true
17stack:
18  - { id: 0, name: '', type: spill-slot, offset: -120, size: 16, alignment: 8,
19      stack-id: default, callee-saved-register: '', callee-saved-restored: true,
20      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
21body:             |
22  ; CHECK-LABEL: name: vector_spill_in_loop
23  ; CHECK: bb.0:
24  ; CHECK:   successors: %bb.1(0x80000000)
25  ; CHECK:   liveins: $q0, $r1, $r2, $r3, $r4, $r5, $r7, $r8, $r10, $r11, $r12
26  ; CHECK:   $r6 = tMOVr $r2, 14 /* CC::al */, $noreg
27  ; CHECK:   $r0 = tMOVr $r12, 14 /* CC::al */, $noreg
28  ; CHECK:   $lr = MVE_DLSTP_16 renamable $r3
29  ; CHECK: bb.1:
30  ; CHECK:   successors: %bb.1(0x7c000000), %bb.2(0x04000000)
31  ; CHECK:   liveins: $lr, $q0, $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r10, $r11, $r12
32  ; CHECK:   renamable $r0, renamable $q6 = MVE_VLDRHU16_post killed renamable $r0, 16, 0, $noreg, $noreg
33  ; CHECK:   renamable $q3 = MVE_VLDRHU16 renamable $r6, 0, 0, $noreg, $noreg
34  ; CHECK:   renamable $q5 = MVE_VSHR_immu16 killed renamable $q3, 11, 0, $noreg, $noreg, undef renamable $q5
35  ; CHECK:   MVE_VSTRWU32 killed renamable $q5, $sp, 80, 0, $noreg, $noreg :: (store (s128) into %stack.0, align 8)
36  ; CHECK:   dead renamable $q7 = MVE_VLDRWU32 $sp, 80, 0, $noreg, $noreg :: (load (s128) from %stack.0, align 8)
37  ; CHECK:   dead renamable $vpr = MVE_VCMPi16r killed renamable $q6, renamable $r8, 1, 0, killed $noreg, $noreg
38  ; CHECK:   $lr = MVE_LETP killed renamable $lr, %bb.1
39  ; CHECK: bb.2:
40  ; CHECK:   successors: %bb.3(0x04000000), %bb.0(0x7c000000)
41  ; CHECK:   liveins: $q0, $r1, $r2, $r3, $r4, $r5, $r7, $r8, $r10, $r11, $r12
42  ; CHECK:   renamable $r0 = tLDRspi $sp, 1, 14 /* CC::al */, $noreg
43  ; CHECK:   renamable $r10 = nuw t2ADDri killed renamable $r10, 1, 14 /* CC::al */, $noreg, $noreg
44  ; CHECK:   renamable $r12 = t2ADDrs killed renamable $r12, killed renamable $r0, 10, 14 /* CC::al */, $noreg, $noreg
45  ; CHECK:   renamable $r0 = tLDRspi $sp, 3, 14 /* CC::al */, $noreg
46  ; CHECK:   renamable $r2 = t2ADDrs killed renamable $r2, killed renamable $r0, 10, 14 /* CC::al */, $noreg, $noreg
47  ; CHECK:   renamable $r0 = tLDRspi $sp, 2, 14 /* CC::al */, $noreg
48  ; CHECK:   tCMPhir renamable $r10, killed renamable $r0, 14 /* CC::al */, $noreg, implicit-def $cpsr
49  ; CHECK:   tBcc %bb.0, 1 /* CC::ne */, killed $cpsr
50  ; CHECK: bb.3:
51  ; CHECK:   $sp = frame-destroy tADDspi $sp, 24, 14 /* CC::al */, $noreg
52  ; CHECK:   $sp = frame-destroy VLDMDIA_UPD $sp, 14 /* CC::al */, $noreg, def $d8, def $d9, def $d10, def $d11, def $d12, def $d13, def $d14, def $d15
53  ; CHECK:   $sp = frame-destroy tADDspi $sp, 1, 14 /* CC::al */, $noreg
54  ; CHECK:   $sp = frame-destroy t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc
55  bb.0:
56    successors: %bb.1(0x80000000)
57    liveins: $q0, $r1, $r2, $r3, $r4, $r5, $r7, $r8, $r10, $r11, $r12
58
59    $r6 = tMOVr $r2, 14 /* CC::al */, $noreg
60    $r0 = tMOVr $r12, 14 /* CC::al */, $noreg
61    $r9 = tMOVr $r3, 14 /* CC::al */, $noreg
62    renamable $lr = t2DoLoopStartTP renamable $r1, renamable $r3
63
64  bb.1:
65    successors: %bb.1(0x7c000000), %bb.2(0x04000000)
66    liveins: $lr, $q0, $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $r11, $r12
67
68    renamable $vpr = MVE_VCTP16 renamable $r9, 0, $noreg, $noreg
69    MVE_VPST 8, implicit $vpr
70    renamable $r0, renamable $q6 = MVE_VLDRHU16_post killed renamable $r0, 16, 1, renamable $vpr, $noreg
71    renamable $q3 = MVE_VLDRHU16 renamable $r6, 0, 1, renamable $vpr, $noreg
72    MVE_VPST 2, implicit $vpr
73    renamable $q5 = MVE_VSHR_immu16 renamable $q3, 11, 1, renamable $vpr, $noreg, undef renamable $q5
74    renamable $r9 = nsw t2SUBri killed renamable $r9, 8, 14 /* CC::al */, $noreg, $noreg
75    MVE_VSTRWU32 killed renamable $q5, $sp, 80, 0, $noreg, $noreg :: (store (s128) into %stack.0, align 8)
76    MVE_VPST 8, implicit $vpr
77    renamable $q7 = MVE_VLDRWU32 $sp, 80, 0, $noreg, $noreg :: (load (s128) from %stack.0, align 8)
78    MVE_VPST 1, implicit $vpr
79    renamable $vpr = MVE_VCMPi16r killed renamable $q6, renamable $r8, 1, 1, killed renamable $vpr, $noreg
80    renamable $lr = t2LoopEndDec killed renamable $lr, %bb.1, implicit-def dead $cpsr
81    tB %bb.2, 14 /* CC::al */, $noreg
82
83  bb.2:
84    successors: %bb.3(0x04000000), %bb.0(0x7c000000)
85    liveins: $q0, $r1, $r2, $r3, $r4, $r5, $r7, $r8, $r10, $r11, $r12
86
87    renamable $r0 = tLDRspi $sp, 1, 14 /* CC::al */, $noreg
88    renamable $r10 = nuw t2ADDri killed renamable $r10, 1, 14 /* CC::al */, $noreg, $noreg
89    renamable $r12 = t2ADDrs killed renamable $r12, killed renamable $r0, 10, 14 /* CC::al */, $noreg, $noreg
90    renamable $r0 = tLDRspi $sp, 3, 14 /* CC::al */, $noreg
91    renamable $r2 = t2ADDrs killed renamable $r2, killed renamable $r0, 10, 14 /* CC::al */, $noreg, $noreg
92    renamable $r0 = tLDRspi $sp, 2, 14 /* CC::al */, $noreg
93    tCMPhir renamable $r10, killed renamable $r0, 14 /* CC::al */, $noreg, implicit-def $cpsr
94    tBcc %bb.0, 1 /* CC::ne */, killed $cpsr
95
96  bb.3:
97    $sp = frame-destroy tADDspi $sp, 24, 14 /* CC::al */, $noreg
98    $sp = frame-destroy VLDMDIA_UPD $sp, 14 /* CC::al */, $noreg, def $d8, def $d9, def $d10, def $d11, def $d12, def $d13, def $d14, def $d15
99    $sp = frame-destroy tADDspi $sp, 1, 14 /* CC::al */, $noreg
100    $sp = frame-destroy t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc
101...
102---
103name:            vector_spill_load_outside
104stack:
105  - { id: 0, name: '', type: spill-slot, offset: -120, size: 16, alignment: 8,
106      stack-id: default, callee-saved-register: '', callee-saved-restored: true,
107      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
108tracksRegLiveness: true
109body:             |
110  ; CHECK-LABEL: name: vector_spill_load_outside
111  ; CHECK: bb.0:
112  ; CHECK:   successors: %bb.1(0x80000000)
113  ; CHECK:   liveins: $q0, $r1, $r2, $r3, $r4, $r5, $r7, $r8, $r10, $r11, $r12
114  ; CHECK:   $r6 = tMOVr $r2, 14 /* CC::al */, $noreg
115  ; CHECK:   $r0 = tMOVr $r12, 14 /* CC::al */, $noreg
116  ; CHECK:   $r9 = tMOVr $r3, 14 /* CC::al */, $noreg
117  ; CHECK:   $lr = t2DLS renamable $r1
118  ; CHECK: bb.1:
119  ; CHECK:   successors: %bb.1(0x7c000000), %bb.2(0x04000000)
120  ; CHECK:   liveins: $lr, $q0, $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $r11, $r12
121  ; CHECK:   renamable $vpr = MVE_VCTP16 renamable $r9, 0, $noreg, $noreg
122  ; CHECK:   MVE_VPST 8, implicit $vpr
123  ; CHECK:   renamable $r0, renamable $q6 = MVE_VLDRHU16_post killed renamable $r0, 16, 1, renamable $vpr, $noreg
124  ; CHECK:   renamable $q3 = MVE_VLDRHU16 renamable $r6, 0, 1, renamable $vpr, $noreg
125  ; CHECK:   MVE_VPST 2, implicit $vpr
126  ; CHECK:   renamable $q5 = MVE_VSHR_immu16 killed renamable $q3, 11, 1, renamable $vpr, $noreg, undef renamable $q5
127  ; CHECK:   renamable $r9 = nsw t2SUBri killed renamable $r9, 8, 14 /* CC::al */, $noreg, $noreg
128  ; CHECK:   MVE_VSTRWU32 killed renamable $q5, $sp, 80, 0, $noreg, $noreg :: (store (s128) into %stack.0, align 8)
129  ; CHECK:   MVE_VPST 8, implicit $vpr
130  ; CHECK:   dead renamable $q7 = MVE_VLDRWU32 $sp, 80, 0, $noreg, $noreg :: (load (s128) from %stack.0, align 8)
131  ; CHECK:   MVE_VPST 1, implicit $vpr
132  ; CHECK:   dead renamable $vpr = MVE_VCMPi16r killed renamable $q6, renamable $r8, 1, 1, killed renamable $vpr, $noreg
133  ; CHECK:   $lr = t2LEUpdate killed renamable $lr, %bb.1
134  ; CHECK: bb.2:
135  ; CHECK:   successors: %bb.3(0x04000000), %bb.0(0x7c000000)
136  ; CHECK:   liveins: $q0, $r1, $r2, $r3, $r4, $r5, $r7, $r8, $r10, $r11, $r12
137  ; CHECK:   dead renamable $q7 = MVE_VLDRWU32 $sp, 80, 0, $noreg, $noreg :: (load (s128) from %stack.0, align 8)
138  ; CHECK:   renamable $r0 = tLDRspi $sp, 1, 14 /* CC::al */, $noreg
139  ; CHECK:   renamable $r10 = nuw t2ADDri killed renamable $r10, 1, 14 /* CC::al */, $noreg, $noreg
140  ; CHECK:   renamable $r12 = t2ADDrs killed renamable $r12, killed renamable $r0, 10, 14 /* CC::al */, $noreg, $noreg
141  ; CHECK:   renamable $r0 = tLDRspi $sp, 3, 14 /* CC::al */, $noreg
142  ; CHECK:   renamable $r2 = t2ADDrs killed renamable $r2, killed renamable $r0, 10, 14 /* CC::al */, $noreg, $noreg
143  ; CHECK:   renamable $r0 = tLDRspi $sp, 2, 14 /* CC::al */, $noreg
144  ; CHECK:   tCMPhir renamable $r10, killed renamable $r0, 14 /* CC::al */, $noreg, implicit-def $cpsr
145  ; CHECK:   tBcc %bb.0, 1 /* CC::ne */, killed $cpsr
146  ; CHECK: bb.3:
147  ; CHECK:   $sp = frame-destroy tADDspi $sp, 24, 14 /* CC::al */, $noreg
148  ; CHECK:   $sp = frame-destroy VLDMDIA_UPD $sp, 14 /* CC::al */, $noreg, def $d8, def $d9, def $d10, def $d11, def $d12, def $d13, def $d14, def $d15
149  ; CHECK:   $sp = frame-destroy tADDspi $sp, 1, 14 /* CC::al */, $noreg
150  ; CHECK:   $sp = frame-destroy t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc
151  bb.0:
152    successors: %bb.1(0x80000000)
153    liveins: $q0, $r1, $r2, $r3, $r4, $r5, $r7, $r8, $r10, $r11, $r12
154
155    $r6 = tMOVr $r2, 14 /* CC::al */, $noreg
156    $r0 = tMOVr $r12, 14 /* CC::al */, $noreg
157    $r9 = tMOVr $r3, 14 /* CC::al */, $noreg
158    renamable $lr = t2DoLoopStartTP renamable $r1, renamable $r3
159
160  bb.1:
161    successors: %bb.1(0x7c000000), %bb.2(0x04000000)
162    liveins: $lr, $q0, $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $r11, $r12
163
164    renamable $vpr = MVE_VCTP16 renamable $r9, 0, $noreg, $noreg
165    MVE_VPST 8, implicit $vpr
166    renamable $r0, renamable $q6 = MVE_VLDRHU16_post killed renamable $r0, 16, 1, renamable $vpr, $noreg
167    renamable $q3 = MVE_VLDRHU16 renamable $r6, 0, 1, renamable $vpr, $noreg
168    MVE_VPST 2, implicit $vpr
169    renamable $q5 = MVE_VSHR_immu16 renamable $q3, 11, 1, renamable $vpr, $noreg, undef renamable $q5
170    renamable $r9 = nsw t2SUBri killed renamable $r9, 8, 14 /* CC::al */, $noreg, $noreg
171    MVE_VSTRWU32 killed renamable $q5, $sp, 80, 0, $noreg, $noreg :: (store (s128) into %stack.0, align 8)
172    MVE_VPST 8, implicit $vpr
173    renamable $q7 = MVE_VLDRWU32 $sp, 80, 0, $noreg, $noreg :: (load (s128) from %stack.0, align 8)
174    MVE_VPST 1, implicit $vpr
175    renamable $vpr = MVE_VCMPi16r killed renamable $q6, renamable $r8, 1, 1, killed renamable $vpr, $noreg
176    renamable $lr = t2LoopEndDec killed renamable $lr, %bb.1, implicit-def dead $cpsr
177    tB %bb.2, 14 /* CC::al */, $noreg
178
179  bb.2:
180    successors: %bb.3(0x04000000), %bb.0(0x7c000000)
181    liveins: $q0, $r1, $r2, $r3, $r4, $r5, $r7, $r8, $r10, $r11, $r12
182
183    renamable $q7 = MVE_VLDRWU32 $sp, 80, 0, $noreg, $noreg :: (load (s128) from %stack.0, align 8)
184    renamable $r0 = tLDRspi $sp, 1, 14 /* CC::al */, $noreg
185    renamable $r10 = nuw t2ADDri killed renamable $r10, 1, 14 /* CC::al */, $noreg, $noreg
186    renamable $r12 = t2ADDrs killed renamable $r12, killed renamable $r0, 10, 14 /* CC::al */, $noreg, $noreg
187    renamable $r0 = tLDRspi $sp, 3, 14 /* CC::al */, $noreg
188    renamable $r2 = t2ADDrs killed renamable $r2, killed renamable $r0, 10, 14 /* CC::al */, $noreg, $noreg
189    renamable $r0 = tLDRspi $sp, 2, 14 /* CC::al */, $noreg
190    tCMPhir renamable $r10, killed renamable $r0, 14 /* CC::al */, $noreg, implicit-def $cpsr
191    tBcc %bb.0, 1 /* CC::ne */, killed $cpsr
192
193  bb.3:
194    $sp = frame-destroy tADDspi $sp, 24, 14 /* CC::al */, $noreg
195    $sp = frame-destroy VLDMDIA_UPD $sp, 14 /* CC::al */, $noreg, def $d8, def $d9, def $d10, def $d11, def $d12, def $d13, def $d14, def $d15
196    $sp = frame-destroy tADDspi $sp, 1, 14 /* CC::al */, $noreg
197    $sp = frame-destroy t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc
198
199...
200