1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=thumbv6-eabi %s -o - | FileCheck %s
3
4define i32 @test1(i32 %x) {
5; CHECK-LABEL: test1:
6; CHECK:       @ %bb.0: @ %entry
7; CHECK-NEXT:    lsls r0, r0, #20
8; CHECK-NEXT:    lsrs r0, r0, #22
9; CHECK-NEXT:    bx lr
10entry:
11  %0 = lshr i32 %x, 2
12  %shr = and i32 %0, 1023
13  ret i32 %shr
14}
15
16define i32 @test2(i32 %x) {
17; CHECK-LABEL: test2:
18; CHECK:       @ %bb.0: @ %entry
19; CHECK-NEXT:    lsrs r1, r0, #2
20; CHECK-NEXT:    ldr r0, .LCPI1_0
21; CHECK-NEXT:    ands r0, r1
22; CHECK-NEXT:    bx lr
23; CHECK-NEXT:    .p2align 2
24; CHECK-NEXT:  @ %bb.1:
25; CHECK-NEXT:  .LCPI1_0:
26; CHECK-NEXT:    .long 1022 @ 0x3fe
27entry:
28  %0 = lshr i32 %x, 2
29  %shr = and i32 %0, 1022
30  ret i32 %shr
31}
32
33define i32 @test3(i32 %x) {
34; CHECK-LABEL: test3:
35; CHECK:       @ %bb.0: @ %entry
36; CHECK-NEXT:    lsrs r0, r0, #2
37; CHECK-NEXT:    uxtb r0, r0
38; CHECK-NEXT:    bx lr
39entry:
40  %0 = lshr i32 %x, 2
41  %shr = and i32 %0, 255
42  ret i32 %shr
43}
44
45define i32 @test4(i32 %x) {
46; CHECK-LABEL: test4:
47; CHECK:       @ %bb.0: @ %entry
48; CHECK-NEXT:    lsrs r0, r0, #3
49; CHECK-NEXT:    lsls r0, r0, #7
50; CHECK-NEXT:    bx lr
51entry:
52  %0 = shl i32 %x, 4
53  %shr = and i32 %0, -128
54  ret i32 %shr
55}
56
57define i32 @test5(i32 %x) {
58; CHECK-LABEL: test5:
59; CHECK:       @ %bb.0: @ %entry
60; CHECK-NEXT:    lsls r0, r0, #31
61; CHECK-NEXT:    lsrs r0, r0, #2
62; CHECK-NEXT:    bx lr
63entry:
64  %0 = shl i32 %x, 29
65  %shr = and i32 %0, 536870912
66  ret i32 %shr
67}
68
69define i32 @test6(i32 %x) {
70; CHECK-LABEL: test6:
71; CHECK:       @ %bb.0: @ %entry
72; CHECK-NEXT:    movs r1, #5
73; CHECK-NEXT:    lsls r1, r1, #29
74; CHECK-NEXT:    lsls r0, r0, #29
75; CHECK-NEXT:    ands r0, r1
76; CHECK-NEXT:    bx lr
77entry:
78  %0 = shl i32 %x, 29
79  %shr = and i32 %0, 2684354560
80  ret i32 %shr
81}
82
83define i32 @test7(i32 %x) {
84; CHECK-LABEL: test7:
85; CHECK:       @ %bb.0: @ %entry
86; CHECK-NEXT:    lsrs r0, r0, #31
87; CHECK-NEXT:    lsls r0, r0, #2
88; CHECK-NEXT:    bx lr
89entry:
90  %0 = lshr i32 %x, 29
91  %shr = and i32 %0, 4
92  ret i32 %shr
93}
94
95define i32 @test8(i32 %x) {
96; CHECK-LABEL: test8:
97; CHECK:       @ %bb.0: @ %entry
98; CHECK-NEXT:    lsrs r1, r0, #29
99; CHECK-NEXT:    movs r0, #5
100; CHECK-NEXT:    ands r0, r1
101; CHECK-NEXT:    bx lr
102entry:
103  %0 = lshr i32 %x, 29
104  %shr = and i32 %0, 5
105  ret i32 %shr
106}
107
108define i32 @test9(i32 %x) {
109; CHECK-LABEL: test9:
110; CHECK:       @ %bb.0: @ %entry
111; CHECK-NEXT:    lsrs r0, r0, #3
112; CHECK-NEXT:    lsls r0, r0, #1
113; CHECK-NEXT:    bx lr
114entry:
115  %and = lshr i32 %x, 2
116  %shr = and i32 %and, 1073741822
117  ret i32 %shr
118}
119
120define i32 @test10(i32 %x) {
121; CHECK-LABEL: test10:
122; CHECK:       @ %bb.0: @ %entry
123; CHECK-NEXT:    lsls r0, r0, #2
124; CHECK-NEXT:    uxtb r0, r0
125; CHECK-NEXT:    bx lr
126entry:
127  %0 = shl i32 %x, 2
128  %shr = and i32 %0, 255
129  ret i32 %shr
130}
131
132define i32 @test11(i32 %x) {
133; CHECK-LABEL: test11:
134; CHECK:       @ %bb.0: @ %entry
135; CHECK-NEXT:    lsrs r0, r0, #24
136; CHECK-NEXT:    lsls r0, r0, #2
137; CHECK-NEXT:    bx lr
138entry:
139  %shl = lshr i32 %x, 22
140  %and = and i32 %shl, 1020
141  ret i32 %and
142}
143
144define i32 @test12(i32 %x) {
145; CHECK-LABEL: test12:
146; CHECK:       @ %bb.0: @ %entry
147; CHECK-NEXT:    lsrs r0, r0, #3
148; CHECK-NEXT:    lsls r0, r0, #4
149; CHECK-NEXT:    bx lr
150entry:
151  %0 = shl i32 %x, 1
152  %shr = and i32 %0, -16
153  ret i32 %shr
154}
155
156define i32 @test13(i32 %x) {
157; CHECK-LABEL: test13:
158; CHECK:       @ %bb.0: @ %entry
159; CHECK-NEXT:    lsrs r0, r0, #3
160; CHECK-NEXT:    lsls r0, r0, #4
161; CHECK-NEXT:    bx lr
162entry:
163  %shr = lshr i32 %x, 3
164  %shl = shl i32 %shr, 4
165  ret i32 %shl
166}
167
168define i32 @test14(i32 %x) {
169; CHECK-LABEL: test14:
170; CHECK:       @ %bb.0: @ %entry
171; CHECK-NEXT:    lsrs r0, r0, #6
172; CHECK-NEXT:    lsls r0, r0, #10
173; CHECK-NEXT:    bx lr
174entry:
175  %shl = shl i32 %x, 4
176  %and = and i32 %shl, -1024
177  ret i32 %and
178}
179
180define i32 @test15(i32 %x) {
181; CHECK-LABEL: test15:
182; CHECK:       @ %bb.0: @ %entry
183; CHECK-NEXT:    lsrs r0, r0, #4
184; CHECK-NEXT:    lsls r0, r0, #3
185; CHECK-NEXT:    bx lr
186entry:
187  %shr = lshr i32 %x, 4
188  %shl = shl i32 %shr, 3
189  ret i32 %shl
190}
191