1; Test vector stores. 2; 3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s 4 5; Test v16i8 stores. 6define void @f1(<16 x i8> %val, <16 x i8> *%ptr) { 7; CHECK-LABEL: f1: 8; CHECK: vst %v24, 0(%r2) 9; CHECK: br %r14 10 store <16 x i8> %val, <16 x i8> *%ptr 11 ret void 12} 13 14; Test v8i16 stores. 15define void @f2(<8 x i16> %val, <8 x i16> *%ptr) { 16; CHECK-LABEL: f2: 17; CHECK: vst %v24, 0(%r2) 18; CHECK: br %r14 19 store <8 x i16> %val, <8 x i16> *%ptr 20 ret void 21} 22 23; Test v4i32 stores. 24define void @f3(<4 x i32> %val, <4 x i32> *%ptr) { 25; CHECK-LABEL: f3: 26; CHECK: vst %v24, 0(%r2) 27; CHECK: br %r14 28 store <4 x i32> %val, <4 x i32> *%ptr 29 ret void 30} 31 32; Test v2i64 stores. 33define void @f4(<2 x i64> %val, <2 x i64> *%ptr) { 34; CHECK-LABEL: f4: 35; CHECK: vst %v24, 0(%r2) 36; CHECK: br %r14 37 store <2 x i64> %val, <2 x i64> *%ptr 38 ret void 39} 40 41; Test the highest aligned in-range offset. 42define void @f7(<16 x i8> %val, <16 x i8> *%base) { 43; CHECK-LABEL: f7: 44; CHECK: vst %v24, 4080(%r2) 45; CHECK: br %r14 46 %ptr = getelementptr <16 x i8>, <16 x i8> *%base, i64 255 47 store <16 x i8> %val, <16 x i8> *%ptr 48 ret void 49} 50 51; Test the highest unaligned in-range offset. 52define void @f8(<16 x i8> %val, i8 *%base) { 53; CHECK-LABEL: f8: 54; CHECK: vst %v24, 4095(%r2) 55; CHECK: br %r14 56 %addr = getelementptr i8, i8 *%base, i64 4095 57 %ptr = bitcast i8 *%addr to <16 x i8> * 58 store <16 x i8> %val, <16 x i8> *%ptr, align 1 59 ret void 60} 61 62; Test the next offset up, which requires separate address logic, 63define void @f9(<16 x i8> %val, <16 x i8> *%base) { 64; CHECK-LABEL: f9: 65; CHECK: aghi %r2, 4096 66; CHECK: vst %v24, 0(%r2) 67; CHECK: br %r14 68 %ptr = getelementptr <16 x i8>, <16 x i8> *%base, i64 256 69 store <16 x i8> %val, <16 x i8> *%ptr 70 ret void 71} 72 73; Test negative offsets, which also require separate address logic, 74define void @f10(<16 x i8> %val, <16 x i8> *%base) { 75; CHECK-LABEL: f10: 76; CHECK: aghi %r2, -16 77; CHECK: vst %v24, 0(%r2) 78; CHECK: br %r14 79 %ptr = getelementptr <16 x i8>, <16 x i8> *%base, i64 -1 80 store <16 x i8> %val, <16 x i8> *%ptr 81 ret void 82} 83 84; Check that indexes are allowed. 85define void @f11(<16 x i8> %val, i8 *%base, i64 %index) { 86; CHECK-LABEL: f11: 87; CHECK: vst %v24, 0(%r3,%r2) 88; CHECK: br %r14 89 %addr = getelementptr i8, i8 *%base, i64 %index 90 %ptr = bitcast i8 *%addr to <16 x i8> * 91 store <16 x i8> %val, <16 x i8> *%ptr, align 1 92 ret void 93} 94