175839913SUlrich Weigand; Test BRCTH. 275839913SUlrich Weigand 375839913SUlrich Weigand; RUN: llc < %s -verify-machineinstrs -mtriple=s390x-linux-gnu -mcpu=z196 \ 4*d2210af3SGuozhi Wei; RUN: -no-integrated-as -disable-block-placement | FileCheck %s 575839913SUlrich Weigand 675839913SUlrich Weigand; Test a loop that should be converted into dbr form and then use BRCTH. 775839913SUlrich Weiganddefine void @f2(i32 *%src, i32 *%dest) { 875839913SUlrich Weigand; CHECK-LABEL: f2: 975839913SUlrich Weigand; CHECK: blah [[REG:%r[0-5]]] 1075839913SUlrich Weigand; CHECK: [[LABEL:\.[^:]*]]:{{.*}} %loop 1175839913SUlrich Weigand; CHECK: brcth [[REG]], [[LABEL]] 1275839913SUlrich Weigand; CHECK: br %r14 1375839913SUlrich Weigandentry: 1475839913SUlrich Weigand ; Force upper bound into a high register in order to encourage the 1575839913SUlrich Weigand ; register allocator to use a high register for the count variable. 1675839913SUlrich Weigand %top = call i32 asm sideeffect "blah $0", "=h"() 1775839913SUlrich Weigand br label %loop 1875839913SUlrich Weigand 1975839913SUlrich Weigandloop: 2075839913SUlrich Weigand %count = phi i32 [ 0, %entry ], [ %next, %loop.next ] 2175839913SUlrich Weigand %next = add i32 %count, 1 2275839913SUlrich Weigand %val = load volatile i32, i32 *%src 2375839913SUlrich Weigand %cmp = icmp eq i32 %val, 0 2475839913SUlrich Weigand br i1 %cmp, label %loop.next, label %loop.store 2575839913SUlrich Weigand 2675839913SUlrich Weigandloop.store: 2775839913SUlrich Weigand %add = add i32 %val, 1 2875839913SUlrich Weigand store volatile i32 %add, i32 *%dest 2975839913SUlrich Weigand br label %loop.next 3075839913SUlrich Weigand 3175839913SUlrich Weigandloop.next: 3275839913SUlrich Weigand %cont = icmp ne i32 %next, %top 3375839913SUlrich Weigand br i1 %cont, label %loop, label %exit 3475839913SUlrich Weigand 3575839913SUlrich Weigandexit: 3675839913SUlrich Weigand ret void 3775839913SUlrich Weigand} 3875839913SUlrich Weigand 39