1; Test 64-bit floating-point comparison.
2;
3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
4
5; Check comparison with registers.
6define i64 @f1(i64 %a, i64 %b, double %f1, double %f2) {
7; CHECK: f1:
8; CHECK: cdbr %f0, %f2
9; CHECK-NEXT: je
10; CHECK: lgr %r2, %r3
11; CHECK: br %r14
12  %cond = fcmp oeq double %f1, %f2
13  %res = select i1 %cond, i64 %a, i64 %b
14  ret i64 %res
15}
16
17; Check the low end of the CDB range.
18define i64 @f2(i64 %a, i64 %b, double %f1, double *%ptr) {
19; CHECK: f2:
20; CHECK: cdb %f0, 0(%r4)
21; CHECK-NEXT: je
22; CHECK: lgr %r2, %r3
23; CHECK: br %r14
24  %f2 = load double *%ptr
25  %cond = fcmp oeq double %f1, %f2
26  %res = select i1 %cond, i64 %a, i64 %b
27  ret i64 %res
28}
29
30; Check the high end of the aligned CDB range.
31define i64 @f3(i64 %a, i64 %b, double %f1, double *%base) {
32; CHECK: f3:
33; CHECK: cdb %f0, 4088(%r4)
34; CHECK-NEXT: je
35; CHECK: lgr %r2, %r3
36; CHECK: br %r14
37  %ptr = getelementptr double *%base, i64 511
38  %f2 = load double *%ptr
39  %cond = fcmp oeq double %f1, %f2
40  %res = select i1 %cond, i64 %a, i64 %b
41  ret i64 %res
42}
43
44; Check the next doubleword up, which needs separate address logic.
45; Other sequences besides this one would be OK.
46define i64 @f4(i64 %a, i64 %b, double %f1, double *%base) {
47; CHECK: f4:
48; CHECK: aghi %r4, 4096
49; CHECK: cdb %f0, 0(%r4)
50; CHECK-NEXT: je
51; CHECK: lgr %r2, %r3
52; CHECK: br %r14
53  %ptr = getelementptr double *%base, i64 512
54  %f2 = load double *%ptr
55  %cond = fcmp oeq double %f1, %f2
56  %res = select i1 %cond, i64 %a, i64 %b
57  ret i64 %res
58}
59
60; Check negative displacements, which also need separate address logic.
61define i64 @f5(i64 %a, i64 %b, double %f1, double *%base) {
62; CHECK: f5:
63; CHECK: aghi %r4, -8
64; CHECK: cdb %f0, 0(%r4)
65; CHECK-NEXT: je
66; CHECK: lgr %r2, %r3
67; CHECK: br %r14
68  %ptr = getelementptr double *%base, i64 -1
69  %f2 = load double *%ptr
70  %cond = fcmp oeq double %f1, %f2
71  %res = select i1 %cond, i64 %a, i64 %b
72  ret i64 %res
73}
74
75; Check that CDB allows indices.
76define i64 @f6(i64 %a, i64 %b, double %f1, double *%base, i64 %index) {
77; CHECK: f6:
78; CHECK: sllg %r1, %r5, 3
79; CHECK: cdb %f0, 800(%r1,%r4)
80; CHECK-NEXT: je
81; CHECK: lgr %r2, %r3
82; CHECK: br %r14
83  %ptr1 = getelementptr double *%base, i64 %index
84  %ptr2 = getelementptr double *%ptr1, i64 100
85  %f2 = load double *%ptr2
86  %cond = fcmp oeq double %f1, %f2
87  %res = select i1 %cond, i64 %a, i64 %b
88  ret i64 %res
89}
90