1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 | FileCheck %s
3;
4; Test that DAGCombiner does not change the addressing as the displacements
5; are known to be out of range. Only one addition is needed.
6
7define void @fun(<2 x i64>* %Src, <2 x i64>* %Dst) {
8; CHECK-LABEL: fun:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    aghi %r2, 4096
11; CHECK-NEXT:    vl %v0, 0(%r2), 3
12; CHECK-NEXT:    vst %v0, 0(%r3), 3
13; CHECK-NEXT:    vl %v0, 16(%r2), 3
14; CHECK-NEXT:    vst %v0, 0(%r3), 3
15; CHECK-NEXT:    br %r14
16  %1 = bitcast <2 x i64>* %Src to i8*
17
18  %splitgep = getelementptr i8, i8* %1, i64 4096
19  %2 = bitcast i8* %splitgep to <2 x i64>*
20  %V0 = load <2 x i64>, <2 x i64>* %2, align 8
21  store volatile <2 x i64> %V0, <2 x i64>* %Dst, align 8
22
23  %3 = getelementptr i8, i8* %splitgep, i64 16
24  %4 = bitcast i8* %3 to <2 x i64>*
25  %V1 = load <2 x i64>, <2 x i64>* %4, align 8
26  store volatile <2 x i64> %V1, <2 x i64>* %Dst, align 8
27
28  ret void
29}
30