1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
3; RUN:   | FileCheck %s -check-prefix=RV32I
4; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
5; RUN:   | FileCheck %s -check-prefix=RV64I
6
7declare void @callee(i8*)
8
9define void @caller32() nounwind {
10; RV32I-LABEL: caller32:
11; RV32I:       # %bb.0:
12; RV32I-NEXT:    addi sp, sp, -32
13; RV32I-NEXT:    sw ra, 28(sp) # 4-byte Folded Spill
14; RV32I-NEXT:    sw s0, 24(sp) # 4-byte Folded Spill
15; RV32I-NEXT:    addi s0, sp, 32
16; RV32I-NEXT:    andi sp, sp, -32
17; RV32I-NEXT:    mv a0, sp
18; RV32I-NEXT:    call callee@plt
19; RV32I-NEXT:    addi sp, s0, -32
20; RV32I-NEXT:    lw s0, 24(sp) # 4-byte Folded Reload
21; RV32I-NEXT:    lw ra, 28(sp) # 4-byte Folded Reload
22; RV32I-NEXT:    addi sp, sp, 32
23; RV32I-NEXT:    ret
24;
25; RV64I-LABEL: caller32:
26; RV64I:       # %bb.0:
27; RV64I-NEXT:    addi sp, sp, -32
28; RV64I-NEXT:    sd ra, 24(sp) # 8-byte Folded Spill
29; RV64I-NEXT:    sd s0, 16(sp) # 8-byte Folded Spill
30; RV64I-NEXT:    addi s0, sp, 32
31; RV64I-NEXT:    andi sp, sp, -32
32; RV64I-NEXT:    mv a0, sp
33; RV64I-NEXT:    call callee@plt
34; RV64I-NEXT:    addi sp, s0, -32
35; RV64I-NEXT:    ld s0, 16(sp) # 8-byte Folded Reload
36; RV64I-NEXT:    ld ra, 24(sp) # 8-byte Folded Reload
37; RV64I-NEXT:    addi sp, sp, 32
38; RV64I-NEXT:    ret
39  %1 = alloca i8, align 32
40  call void @callee(i8* %1)
41  ret void
42}
43
44define void @caller_no_realign32() nounwind "no-realign-stack" {
45; RV32I-LABEL: caller_no_realign32:
46; RV32I:       # %bb.0:
47; RV32I-NEXT:    addi sp, sp, -16
48; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
49; RV32I-NEXT:    mv a0, sp
50; RV32I-NEXT:    call callee@plt
51; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
52; RV32I-NEXT:    addi sp, sp, 16
53; RV32I-NEXT:    ret
54;
55; RV64I-LABEL: caller_no_realign32:
56; RV64I:       # %bb.0:
57; RV64I-NEXT:    addi sp, sp, -16
58; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
59; RV64I-NEXT:    mv a0, sp
60; RV64I-NEXT:    call callee@plt
61; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
62; RV64I-NEXT:    addi sp, sp, 16
63; RV64I-NEXT:    ret
64  %1 = alloca i8, align 32
65  call void @callee(i8* %1)
66  ret void
67}
68
69define void @caller64() nounwind {
70; RV32I-LABEL: caller64:
71; RV32I:       # %bb.0:
72; RV32I-NEXT:    addi sp, sp, -64
73; RV32I-NEXT:    sw ra, 60(sp) # 4-byte Folded Spill
74; RV32I-NEXT:    sw s0, 56(sp) # 4-byte Folded Spill
75; RV32I-NEXT:    addi s0, sp, 64
76; RV32I-NEXT:    andi sp, sp, -64
77; RV32I-NEXT:    mv a0, sp
78; RV32I-NEXT:    call callee@plt
79; RV32I-NEXT:    addi sp, s0, -64
80; RV32I-NEXT:    lw s0, 56(sp) # 4-byte Folded Reload
81; RV32I-NEXT:    lw ra, 60(sp) # 4-byte Folded Reload
82; RV32I-NEXT:    addi sp, sp, 64
83; RV32I-NEXT:    ret
84;
85; RV64I-LABEL: caller64:
86; RV64I:       # %bb.0:
87; RV64I-NEXT:    addi sp, sp, -64
88; RV64I-NEXT:    sd ra, 56(sp) # 8-byte Folded Spill
89; RV64I-NEXT:    sd s0, 48(sp) # 8-byte Folded Spill
90; RV64I-NEXT:    addi s0, sp, 64
91; RV64I-NEXT:    andi sp, sp, -64
92; RV64I-NEXT:    mv a0, sp
93; RV64I-NEXT:    call callee@plt
94; RV64I-NEXT:    addi sp, s0, -64
95; RV64I-NEXT:    ld s0, 48(sp) # 8-byte Folded Reload
96; RV64I-NEXT:    ld ra, 56(sp) # 8-byte Folded Reload
97; RV64I-NEXT:    addi sp, sp, 64
98; RV64I-NEXT:    ret
99  %1 = alloca i8, align 64
100  call void @callee(i8* %1)
101  ret void
102}
103
104define void @caller_no_realign64() nounwind "no-realign-stack" {
105; RV32I-LABEL: caller_no_realign64:
106; RV32I:       # %bb.0:
107; RV32I-NEXT:    addi sp, sp, -16
108; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
109; RV32I-NEXT:    mv a0, sp
110; RV32I-NEXT:    call callee@plt
111; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
112; RV32I-NEXT:    addi sp, sp, 16
113; RV32I-NEXT:    ret
114;
115; RV64I-LABEL: caller_no_realign64:
116; RV64I:       # %bb.0:
117; RV64I-NEXT:    addi sp, sp, -16
118; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
119; RV64I-NEXT:    mv a0, sp
120; RV64I-NEXT:    call callee@plt
121; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
122; RV64I-NEXT:    addi sp, sp, 16
123; RV64I-NEXT:    ret
124  %1 = alloca i8, align 64
125  call void @callee(i8* %1)
126  ret void
127}
128
129define void @caller128() nounwind {
130; RV32I-LABEL: caller128:
131; RV32I:       # %bb.0:
132; RV32I-NEXT:    addi sp, sp, -128
133; RV32I-NEXT:    sw ra, 124(sp) # 4-byte Folded Spill
134; RV32I-NEXT:    sw s0, 120(sp) # 4-byte Folded Spill
135; RV32I-NEXT:    addi s0, sp, 128
136; RV32I-NEXT:    andi sp, sp, -128
137; RV32I-NEXT:    mv a0, sp
138; RV32I-NEXT:    call callee@plt
139; RV32I-NEXT:    addi sp, s0, -128
140; RV32I-NEXT:    lw s0, 120(sp) # 4-byte Folded Reload
141; RV32I-NEXT:    lw ra, 124(sp) # 4-byte Folded Reload
142; RV32I-NEXT:    addi sp, sp, 128
143; RV32I-NEXT:    ret
144;
145; RV64I-LABEL: caller128:
146; RV64I:       # %bb.0:
147; RV64I-NEXT:    addi sp, sp, -128
148; RV64I-NEXT:    sd ra, 120(sp) # 8-byte Folded Spill
149; RV64I-NEXT:    sd s0, 112(sp) # 8-byte Folded Spill
150; RV64I-NEXT:    addi s0, sp, 128
151; RV64I-NEXT:    andi sp, sp, -128
152; RV64I-NEXT:    mv a0, sp
153; RV64I-NEXT:    call callee@plt
154; RV64I-NEXT:    addi sp, s0, -128
155; RV64I-NEXT:    ld s0, 112(sp) # 8-byte Folded Reload
156; RV64I-NEXT:    ld ra, 120(sp) # 8-byte Folded Reload
157; RV64I-NEXT:    addi sp, sp, 128
158; RV64I-NEXT:    ret
159  %1 = alloca i8, align 128
160  call void @callee(i8* %1)
161  ret void
162}
163
164define void @caller_no_realign128() nounwind "no-realign-stack" {
165; RV32I-LABEL: caller_no_realign128:
166; RV32I:       # %bb.0:
167; RV32I-NEXT:    addi sp, sp, -16
168; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
169; RV32I-NEXT:    mv a0, sp
170; RV32I-NEXT:    call callee@plt
171; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
172; RV32I-NEXT:    addi sp, sp, 16
173; RV32I-NEXT:    ret
174;
175; RV64I-LABEL: caller_no_realign128:
176; RV64I:       # %bb.0:
177; RV64I-NEXT:    addi sp, sp, -16
178; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
179; RV64I-NEXT:    mv a0, sp
180; RV64I-NEXT:    call callee@plt
181; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
182; RV64I-NEXT:    addi sp, sp, 16
183; RV64I-NEXT:    ret
184  %1 = alloca i8, align 128
185  call void @callee(i8* %1)
186  ret void
187}
188
189define void @caller256() nounwind {
190; RV32I-LABEL: caller256:
191; RV32I:       # %bb.0:
192; RV32I-NEXT:    addi sp, sp, -256
193; RV32I-NEXT:    sw ra, 252(sp) # 4-byte Folded Spill
194; RV32I-NEXT:    sw s0, 248(sp) # 4-byte Folded Spill
195; RV32I-NEXT:    addi s0, sp, 256
196; RV32I-NEXT:    andi sp, sp, -256
197; RV32I-NEXT:    mv a0, sp
198; RV32I-NEXT:    call callee@plt
199; RV32I-NEXT:    addi sp, s0, -256
200; RV32I-NEXT:    lw s0, 248(sp) # 4-byte Folded Reload
201; RV32I-NEXT:    lw ra, 252(sp) # 4-byte Folded Reload
202; RV32I-NEXT:    addi sp, sp, 256
203; RV32I-NEXT:    ret
204;
205; RV64I-LABEL: caller256:
206; RV64I:       # %bb.0:
207; RV64I-NEXT:    addi sp, sp, -256
208; RV64I-NEXT:    sd ra, 248(sp) # 8-byte Folded Spill
209; RV64I-NEXT:    sd s0, 240(sp) # 8-byte Folded Spill
210; RV64I-NEXT:    addi s0, sp, 256
211; RV64I-NEXT:    andi sp, sp, -256
212; RV64I-NEXT:    mv a0, sp
213; RV64I-NEXT:    call callee@plt
214; RV64I-NEXT:    addi sp, s0, -256
215; RV64I-NEXT:    ld s0, 240(sp) # 8-byte Folded Reload
216; RV64I-NEXT:    ld ra, 248(sp) # 8-byte Folded Reload
217; RV64I-NEXT:    addi sp, sp, 256
218; RV64I-NEXT:    ret
219  %1 = alloca i8, align 256
220  call void @callee(i8* %1)
221  ret void
222}
223
224define void @caller_no_realign256() nounwind "no-realign-stack" {
225; RV32I-LABEL: caller_no_realign256:
226; RV32I:       # %bb.0:
227; RV32I-NEXT:    addi sp, sp, -16
228; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
229; RV32I-NEXT:    mv a0, sp
230; RV32I-NEXT:    call callee@plt
231; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
232; RV32I-NEXT:    addi sp, sp, 16
233; RV32I-NEXT:    ret
234;
235; RV64I-LABEL: caller_no_realign256:
236; RV64I:       # %bb.0:
237; RV64I-NEXT:    addi sp, sp, -16
238; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
239; RV64I-NEXT:    mv a0, sp
240; RV64I-NEXT:    call callee@plt
241; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
242; RV64I-NEXT:    addi sp, sp, 16
243; RV64I-NEXT:    ret
244  %1 = alloca i8, align 256
245  call void @callee(i8* %1)
246  ret void
247}
248
249define void @caller512() nounwind {
250; RV32I-LABEL: caller512:
251; RV32I:       # %bb.0:
252; RV32I-NEXT:    addi sp, sp, -1024
253; RV32I-NEXT:    sw ra, 1020(sp) # 4-byte Folded Spill
254; RV32I-NEXT:    sw s0, 1016(sp) # 4-byte Folded Spill
255; RV32I-NEXT:    addi s0, sp, 1024
256; RV32I-NEXT:    andi sp, sp, -512
257; RV32I-NEXT:    addi a0, sp, 512
258; RV32I-NEXT:    call callee@plt
259; RV32I-NEXT:    addi sp, s0, -1024
260; RV32I-NEXT:    lw s0, 1016(sp) # 4-byte Folded Reload
261; RV32I-NEXT:    lw ra, 1020(sp) # 4-byte Folded Reload
262; RV32I-NEXT:    addi sp, sp, 1024
263; RV32I-NEXT:    ret
264;
265; RV64I-LABEL: caller512:
266; RV64I:       # %bb.0:
267; RV64I-NEXT:    addi sp, sp, -1024
268; RV64I-NEXT:    sd ra, 1016(sp) # 8-byte Folded Spill
269; RV64I-NEXT:    sd s0, 1008(sp) # 8-byte Folded Spill
270; RV64I-NEXT:    addi s0, sp, 1024
271; RV64I-NEXT:    andi sp, sp, -512
272; RV64I-NEXT:    addi a0, sp, 512
273; RV64I-NEXT:    call callee@plt
274; RV64I-NEXT:    addi sp, s0, -1024
275; RV64I-NEXT:    ld s0, 1008(sp) # 8-byte Folded Reload
276; RV64I-NEXT:    ld ra, 1016(sp) # 8-byte Folded Reload
277; RV64I-NEXT:    addi sp, sp, 1024
278; RV64I-NEXT:    ret
279  %1 = alloca i8, align 512
280  call void @callee(i8* %1)
281  ret void
282}
283
284define void @caller_no_realign512() nounwind "no-realign-stack" {
285; RV32I-LABEL: caller_no_realign512:
286; RV32I:       # %bb.0:
287; RV32I-NEXT:    addi sp, sp, -16
288; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
289; RV32I-NEXT:    mv a0, sp
290; RV32I-NEXT:    call callee@plt
291; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
292; RV32I-NEXT:    addi sp, sp, 16
293; RV32I-NEXT:    ret
294;
295; RV64I-LABEL: caller_no_realign512:
296; RV64I:       # %bb.0:
297; RV64I-NEXT:    addi sp, sp, -16
298; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
299; RV64I-NEXT:    mv a0, sp
300; RV64I-NEXT:    call callee@plt
301; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
302; RV64I-NEXT:    addi sp, sp, 16
303; RV64I-NEXT:    ret
304  %1 = alloca i8, align 512
305  call void @callee(i8* %1)
306  ret void
307}
308
309define void @caller1024() nounwind {
310; RV32I-LABEL: caller1024:
311; RV32I:       # %bb.0:
312; RV32I-NEXT:    addi sp, sp, -2032
313; RV32I-NEXT:    sw ra, 2028(sp) # 4-byte Folded Spill
314; RV32I-NEXT:    sw s0, 2024(sp) # 4-byte Folded Spill
315; RV32I-NEXT:    addi s0, sp, 2032
316; RV32I-NEXT:    addi sp, sp, -16
317; RV32I-NEXT:    andi sp, sp, -1024
318; RV32I-NEXT:    addi a0, sp, 1024
319; RV32I-NEXT:    call callee@plt
320; RV32I-NEXT:    addi sp, s0, -2048
321; RV32I-NEXT:    addi sp, sp, 16
322; RV32I-NEXT:    lw s0, 2024(sp) # 4-byte Folded Reload
323; RV32I-NEXT:    lw ra, 2028(sp) # 4-byte Folded Reload
324; RV32I-NEXT:    addi sp, sp, 2032
325; RV32I-NEXT:    ret
326;
327; RV64I-LABEL: caller1024:
328; RV64I:       # %bb.0:
329; RV64I-NEXT:    addi sp, sp, -2032
330; RV64I-NEXT:    sd ra, 2024(sp) # 8-byte Folded Spill
331; RV64I-NEXT:    sd s0, 2016(sp) # 8-byte Folded Spill
332; RV64I-NEXT:    addi s0, sp, 2032
333; RV64I-NEXT:    addi sp, sp, -16
334; RV64I-NEXT:    andi sp, sp, -1024
335; RV64I-NEXT:    addi a0, sp, 1024
336; RV64I-NEXT:    call callee@plt
337; RV64I-NEXT:    addi sp, s0, -2048
338; RV64I-NEXT:    addi sp, sp, 16
339; RV64I-NEXT:    ld s0, 2016(sp) # 8-byte Folded Reload
340; RV64I-NEXT:    ld ra, 2024(sp) # 8-byte Folded Reload
341; RV64I-NEXT:    addi sp, sp, 2032
342; RV64I-NEXT:    ret
343  %1 = alloca i8, align 1024
344  call void @callee(i8* %1)
345  ret void
346}
347
348define void @caller_no_realign1024() nounwind "no-realign-stack" {
349; RV32I-LABEL: caller_no_realign1024:
350; RV32I:       # %bb.0:
351; RV32I-NEXT:    addi sp, sp, -16
352; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
353; RV32I-NEXT:    mv a0, sp
354; RV32I-NEXT:    call callee@plt
355; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
356; RV32I-NEXT:    addi sp, sp, 16
357; RV32I-NEXT:    ret
358;
359; RV64I-LABEL: caller_no_realign1024:
360; RV64I:       # %bb.0:
361; RV64I-NEXT:    addi sp, sp, -16
362; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
363; RV64I-NEXT:    mv a0, sp
364; RV64I-NEXT:    call callee@plt
365; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
366; RV64I-NEXT:    addi sp, sp, 16
367; RV64I-NEXT:    ret
368  %1 = alloca i8, align 1024
369  call void @callee(i8* %1)
370  ret void
371}
372
373define void @caller2048() nounwind {
374; RV32I-LABEL: caller2048:
375; RV32I:       # %bb.0:
376; RV32I-NEXT:    addi sp, sp, -2032
377; RV32I-NEXT:    sw ra, 2028(sp) # 4-byte Folded Spill
378; RV32I-NEXT:    sw s0, 2024(sp) # 4-byte Folded Spill
379; RV32I-NEXT:    addi s0, sp, 2032
380; RV32I-NEXT:    lui a0, 1
381; RV32I-NEXT:    addi a0, a0, -2032
382; RV32I-NEXT:    sub sp, sp, a0
383; RV32I-NEXT:    andi sp, sp, -2048
384; RV32I-NEXT:    lui a0, 1
385; RV32I-NEXT:    addi a0, a0, -2048
386; RV32I-NEXT:    add a0, sp, a0
387; RV32I-NEXT:    mv a0, a0
388; RV32I-NEXT:    call callee@plt
389; RV32I-NEXT:    lui a0, 1
390; RV32I-NEXT:    sub sp, s0, a0
391; RV32I-NEXT:    lui a0, 1
392; RV32I-NEXT:    addi a0, a0, -2032
393; RV32I-NEXT:    add sp, sp, a0
394; RV32I-NEXT:    lw s0, 2024(sp) # 4-byte Folded Reload
395; RV32I-NEXT:    lw ra, 2028(sp) # 4-byte Folded Reload
396; RV32I-NEXT:    addi sp, sp, 2032
397; RV32I-NEXT:    ret
398;
399; RV64I-LABEL: caller2048:
400; RV64I:       # %bb.0:
401; RV64I-NEXT:    addi sp, sp, -2032
402; RV64I-NEXT:    sd ra, 2024(sp) # 8-byte Folded Spill
403; RV64I-NEXT:    sd s0, 2016(sp) # 8-byte Folded Spill
404; RV64I-NEXT:    addi s0, sp, 2032
405; RV64I-NEXT:    lui a0, 1
406; RV64I-NEXT:    addiw a0, a0, -2032
407; RV64I-NEXT:    sub sp, sp, a0
408; RV64I-NEXT:    andi sp, sp, -2048
409; RV64I-NEXT:    lui a0, 1
410; RV64I-NEXT:    addiw a0, a0, -2048
411; RV64I-NEXT:    add a0, sp, a0
412; RV64I-NEXT:    mv a0, a0
413; RV64I-NEXT:    call callee@plt
414; RV64I-NEXT:    lui a0, 1
415; RV64I-NEXT:    sub sp, s0, a0
416; RV64I-NEXT:    lui a0, 1
417; RV64I-NEXT:    addiw a0, a0, -2032
418; RV64I-NEXT:    add sp, sp, a0
419; RV64I-NEXT:    ld s0, 2016(sp) # 8-byte Folded Reload
420; RV64I-NEXT:    ld ra, 2024(sp) # 8-byte Folded Reload
421; RV64I-NEXT:    addi sp, sp, 2032
422; RV64I-NEXT:    ret
423  %1 = alloca i8, align 2048
424  call void @callee(i8* %1)
425  ret void
426}
427
428define void @caller_no_realign2048() nounwind "no-realign-stack" {
429; RV32I-LABEL: caller_no_realign2048:
430; RV32I:       # %bb.0:
431; RV32I-NEXT:    addi sp, sp, -16
432; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
433; RV32I-NEXT:    mv a0, sp
434; RV32I-NEXT:    call callee@plt
435; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
436; RV32I-NEXT:    addi sp, sp, 16
437; RV32I-NEXT:    ret
438;
439; RV64I-LABEL: caller_no_realign2048:
440; RV64I:       # %bb.0:
441; RV64I-NEXT:    addi sp, sp, -16
442; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
443; RV64I-NEXT:    mv a0, sp
444; RV64I-NEXT:    call callee@plt
445; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
446; RV64I-NEXT:    addi sp, sp, 16
447; RV64I-NEXT:    ret
448  %1 = alloca i8, align 2048
449  call void @callee(i8* %1)
450  ret void
451}
452
453define void @caller4096() nounwind {
454; RV32I-LABEL: caller4096:
455; RV32I:       # %bb.0:
456; RV32I-NEXT:    addi sp, sp, -2032
457; RV32I-NEXT:    sw ra, 2028(sp) # 4-byte Folded Spill
458; RV32I-NEXT:    sw s0, 2024(sp) # 4-byte Folded Spill
459; RV32I-NEXT:    addi s0, sp, 2032
460; RV32I-NEXT:    lui a0, 2
461; RV32I-NEXT:    addi a0, a0, -2032
462; RV32I-NEXT:    sub sp, sp, a0
463; RV32I-NEXT:    srli a0, sp, 12
464; RV32I-NEXT:    slli sp, a0, 12
465; RV32I-NEXT:    lui a0, 1
466; RV32I-NEXT:    add a0, sp, a0
467; RV32I-NEXT:    mv a0, a0
468; RV32I-NEXT:    call callee@plt
469; RV32I-NEXT:    lui a0, 2
470; RV32I-NEXT:    sub sp, s0, a0
471; RV32I-NEXT:    lui a0, 2
472; RV32I-NEXT:    addi a0, a0, -2032
473; RV32I-NEXT:    add sp, sp, a0
474; RV32I-NEXT:    lw s0, 2024(sp) # 4-byte Folded Reload
475; RV32I-NEXT:    lw ra, 2028(sp) # 4-byte Folded Reload
476; RV32I-NEXT:    addi sp, sp, 2032
477; RV32I-NEXT:    ret
478;
479; RV64I-LABEL: caller4096:
480; RV64I:       # %bb.0:
481; RV64I-NEXT:    addi sp, sp, -2032
482; RV64I-NEXT:    sd ra, 2024(sp) # 8-byte Folded Spill
483; RV64I-NEXT:    sd s0, 2016(sp) # 8-byte Folded Spill
484; RV64I-NEXT:    addi s0, sp, 2032
485; RV64I-NEXT:    lui a0, 2
486; RV64I-NEXT:    addiw a0, a0, -2032
487; RV64I-NEXT:    sub sp, sp, a0
488; RV64I-NEXT:    srli a0, sp, 12
489; RV64I-NEXT:    slli sp, a0, 12
490; RV64I-NEXT:    lui a0, 1
491; RV64I-NEXT:    add a0, sp, a0
492; RV64I-NEXT:    mv a0, a0
493; RV64I-NEXT:    call callee@plt
494; RV64I-NEXT:    lui a0, 2
495; RV64I-NEXT:    sub sp, s0, a0
496; RV64I-NEXT:    lui a0, 2
497; RV64I-NEXT:    addiw a0, a0, -2032
498; RV64I-NEXT:    add sp, sp, a0
499; RV64I-NEXT:    ld s0, 2016(sp) # 8-byte Folded Reload
500; RV64I-NEXT:    ld ra, 2024(sp) # 8-byte Folded Reload
501; RV64I-NEXT:    addi sp, sp, 2032
502; RV64I-NEXT:    ret
503  %1 = alloca i8, align 4096
504  call void @callee(i8* %1)
505  ret void
506}
507
508define void @caller_no_realign4096() nounwind "no-realign-stack" {
509; RV32I-LABEL: caller_no_realign4096:
510; RV32I:       # %bb.0:
511; RV32I-NEXT:    addi sp, sp, -16
512; RV32I-NEXT:    sw ra, 12(sp) # 4-byte Folded Spill
513; RV32I-NEXT:    mv a0, sp
514; RV32I-NEXT:    call callee@plt
515; RV32I-NEXT:    lw ra, 12(sp) # 4-byte Folded Reload
516; RV32I-NEXT:    addi sp, sp, 16
517; RV32I-NEXT:    ret
518;
519; RV64I-LABEL: caller_no_realign4096:
520; RV64I:       # %bb.0:
521; RV64I-NEXT:    addi sp, sp, -16
522; RV64I-NEXT:    sd ra, 8(sp) # 8-byte Folded Spill
523; RV64I-NEXT:    mv a0, sp
524; RV64I-NEXT:    call callee@plt
525; RV64I-NEXT:    ld ra, 8(sp) # 8-byte Folded Reload
526; RV64I-NEXT:    addi sp, sp, 16
527; RV64I-NEXT:    ret
528  %1 = alloca i8, align 4096
529  call void @callee(i8* %1)
530  ret void
531}
532