1cf6cf0cdSShiva Chen; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2cf6cf0cdSShiva Chen; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \ 3cf6cf0cdSShiva Chen; RUN: | FileCheck %s -check-prefix=RV32I 4cf6cf0cdSShiva Chen; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \ 5cf6cf0cdSShiva Chen; RUN: | FileCheck %s -check-prefix=RV64I 6cf6cf0cdSShiva Chen 7cf6cf0cdSShiva Chendeclare void @callee(i8*, i32*) 8cf6cf0cdSShiva Chen 9cf6cf0cdSShiva Chendefine void @caller(i32 %n) { 10cf6cf0cdSShiva Chen; RV32I-LABEL: caller: 11cf6cf0cdSShiva Chen; RV32I: # %bb.0: 12524d8fa9SRoger Ferrer Ibanez; RV32I-NEXT: addi sp, sp, -64 13524d8fa9SRoger Ferrer Ibanez; RV32I-NEXT: .cfi_def_cfa_offset 64 14524d8fa9SRoger Ferrer Ibanez; RV32I-NEXT: sw ra, 60(sp) # 4-byte Folded Spill 15524d8fa9SRoger Ferrer Ibanez; RV32I-NEXT: sw s0, 56(sp) # 4-byte Folded Spill 16524d8fa9SRoger Ferrer Ibanez; RV32I-NEXT: sw s1, 52(sp) # 4-byte Folded Spill 17cf6cf0cdSShiva Chen; RV32I-NEXT: .cfi_offset ra, -4 18cf6cf0cdSShiva Chen; RV32I-NEXT: .cfi_offset s0, -8 19cf6cf0cdSShiva Chen; RV32I-NEXT: .cfi_offset s1, -12 20524d8fa9SRoger Ferrer Ibanez; RV32I-NEXT: addi s0, sp, 64 21cf6cf0cdSShiva Chen; RV32I-NEXT: .cfi_def_cfa s0, 0 22cf6cf0cdSShiva Chen; RV32I-NEXT: andi sp, sp, -64 23cf6cf0cdSShiva Chen; RV32I-NEXT: mv s1, sp 24cf6cf0cdSShiva Chen; RV32I-NEXT: addi a0, a0, 15 25cf6cf0cdSShiva Chen; RV32I-NEXT: andi a0, a0, -16 26cf6cf0cdSShiva Chen; RV32I-NEXT: sub a0, sp, a0 27cf6cf0cdSShiva Chen; RV32I-NEXT: mv sp, a0 28524d8fa9SRoger Ferrer Ibanez; RV32I-NEXT: mv a1, s1 29e28b6a60SMichael Munday; RV32I-NEXT: call callee@plt 30524d8fa9SRoger Ferrer Ibanez; RV32I-NEXT: addi sp, s0, -64 31524d8fa9SRoger Ferrer Ibanez; RV32I-NEXT: lw ra, 60(sp) # 4-byte Folded Reload 32*137d3474SHsiangkai Wang; RV32I-NEXT: lw s0, 56(sp) # 4-byte Folded Reload 33*137d3474SHsiangkai Wang; RV32I-NEXT: lw s1, 52(sp) # 4-byte Folded Reload 34524d8fa9SRoger Ferrer Ibanez; RV32I-NEXT: addi sp, sp, 64 35cf6cf0cdSShiva Chen; RV32I-NEXT: ret 36cf6cf0cdSShiva Chen; 37cf6cf0cdSShiva Chen; RV64I-LABEL: caller: 38cf6cf0cdSShiva Chen; RV64I: # %bb.0: 39524d8fa9SRoger Ferrer Ibanez; RV64I-NEXT: addi sp, sp, -64 40524d8fa9SRoger Ferrer Ibanez; RV64I-NEXT: .cfi_def_cfa_offset 64 41524d8fa9SRoger Ferrer Ibanez; RV64I-NEXT: sd ra, 56(sp) # 8-byte Folded Spill 42524d8fa9SRoger Ferrer Ibanez; RV64I-NEXT: sd s0, 48(sp) # 8-byte Folded Spill 43524d8fa9SRoger Ferrer Ibanez; RV64I-NEXT: sd s1, 40(sp) # 8-byte Folded Spill 44cf6cf0cdSShiva Chen; RV64I-NEXT: .cfi_offset ra, -8 45cf6cf0cdSShiva Chen; RV64I-NEXT: .cfi_offset s0, -16 46cf6cf0cdSShiva Chen; RV64I-NEXT: .cfi_offset s1, -24 47524d8fa9SRoger Ferrer Ibanez; RV64I-NEXT: addi s0, sp, 64 48cf6cf0cdSShiva Chen; RV64I-NEXT: .cfi_def_cfa s0, 0 49cf6cf0cdSShiva Chen; RV64I-NEXT: andi sp, sp, -64 50cf6cf0cdSShiva Chen; RV64I-NEXT: mv s1, sp 51cf6cf0cdSShiva Chen; RV64I-NEXT: slli a0, a0, 32 52cf6cf0cdSShiva Chen; RV64I-NEXT: srli a0, a0, 32 53cf6cf0cdSShiva Chen; RV64I-NEXT: addi a0, a0, 15 5486e604c4SCraig Topper; RV64I-NEXT: andi a0, a0, -16 55cf6cf0cdSShiva Chen; RV64I-NEXT: sub a0, sp, a0 56cf6cf0cdSShiva Chen; RV64I-NEXT: mv sp, a0 57524d8fa9SRoger Ferrer Ibanez; RV64I-NEXT: mv a1, s1 58e28b6a60SMichael Munday; RV64I-NEXT: call callee@plt 59524d8fa9SRoger Ferrer Ibanez; RV64I-NEXT: addi sp, s0, -64 60524d8fa9SRoger Ferrer Ibanez; RV64I-NEXT: ld ra, 56(sp) # 8-byte Folded Reload 61*137d3474SHsiangkai Wang; RV64I-NEXT: ld s0, 48(sp) # 8-byte Folded Reload 62*137d3474SHsiangkai Wang; RV64I-NEXT: ld s1, 40(sp) # 8-byte Folded Reload 63524d8fa9SRoger Ferrer Ibanez; RV64I-NEXT: addi sp, sp, 64 64cf6cf0cdSShiva Chen; RV64I-NEXT: ret 65cf6cf0cdSShiva Chen %1 = alloca i8, i32 %n 66cf6cf0cdSShiva Chen %2 = alloca i32, align 64 67cf6cf0cdSShiva Chen call void @callee(i8* %1, i32 *%2) 68cf6cf0cdSShiva Chen ret void 69cf6cf0cdSShiva Chen} 70