1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+d,+experimental-zfh,+experimental-v \
3; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV32
4; RUN: llc -mtriple=riscv64 -mattr=+d,+experimental-zfh,+experimental-v \
5; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV64
6
7declare void @llvm.vp.scatter.nxv1i8.nxv1p0i8(<vscale x 1 x i8>, <vscale x 1 x i8*>, <vscale x 1 x i1>, i32)
8
9define void @vpscatter_nxv1i8(<vscale x 1 x i8> %val, <vscale x 1 x i8*> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) {
10; RV32-LABEL: vpscatter_nxv1i8:
11; RV32:       # %bb.0:
12; RV32-NEXT:    vsetvli zero, a0, e8, mf8, ta, mu
13; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t
14; RV32-NEXT:    ret
15;
16; RV64-LABEL: vpscatter_nxv1i8:
17; RV64:       # %bb.0:
18; RV64-NEXT:    vsetvli zero, a0, e8, mf8, ta, mu
19; RV64-NEXT:    vsoxei64.v v8, (zero), v9, v0.t
20; RV64-NEXT:    ret
21  call void @llvm.vp.scatter.nxv1i8.nxv1p0i8(<vscale x 1 x i8> %val, <vscale x 1 x i8*> %ptrs, <vscale x 1 x i1> %m, i32 %evl)
22  ret void
23}
24
25declare void @llvm.vp.scatter.nxv2i8.nxv2p0i8(<vscale x 2 x i8>, <vscale x 2 x i8*>, <vscale x 2 x i1>, i32)
26
27define void @vpscatter_nxv2i8(<vscale x 2 x i8> %val, <vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {
28; RV32-LABEL: vpscatter_nxv2i8:
29; RV32:       # %bb.0:
30; RV32-NEXT:    vsetvli zero, a0, e8, mf4, ta, mu
31; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t
32; RV32-NEXT:    ret
33;
34; RV64-LABEL: vpscatter_nxv2i8:
35; RV64:       # %bb.0:
36; RV64-NEXT:    vsetvli zero, a0, e8, mf4, ta, mu
37; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t
38; RV64-NEXT:    ret
39  call void @llvm.vp.scatter.nxv2i8.nxv2p0i8(<vscale x 2 x i8> %val, <vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 %evl)
40  ret void
41}
42
43define void @vpscatter_nxv2i16_truncstore_nxv2i8(<vscale x 2 x i16> %val, <vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {
44; RV32-LABEL: vpscatter_nxv2i16_truncstore_nxv2i8:
45; RV32:       # %bb.0:
46; RV32-NEXT:    vsetvli a1, zero, e8, mf4, ta, mu
47; RV32-NEXT:    vnsrl.wi v8, v8, 0
48; RV32-NEXT:    vsetvli zero, a0, e8, mf4, ta, mu
49; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t
50; RV32-NEXT:    ret
51;
52; RV64-LABEL: vpscatter_nxv2i16_truncstore_nxv2i8:
53; RV64:       # %bb.0:
54; RV64-NEXT:    vsetvli a1, zero, e8, mf4, ta, mu
55; RV64-NEXT:    vnsrl.wi v8, v8, 0
56; RV64-NEXT:    vsetvli zero, a0, e8, mf4, ta, mu
57; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t
58; RV64-NEXT:    ret
59  %tval = trunc <vscale x 2 x i16> %val to <vscale x 2 x i8>
60  call void @llvm.vp.scatter.nxv2i8.nxv2p0i8(<vscale x 2 x i8> %tval, <vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 %evl)
61  ret void
62}
63
64define void @vpscatter_nxv2i32_truncstore_nxv2i8(<vscale x 2 x i32> %val, <vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {
65; RV32-LABEL: vpscatter_nxv2i32_truncstore_nxv2i8:
66; RV32:       # %bb.0:
67; RV32-NEXT:    vsetvli a1, zero, e16, mf2, ta, mu
68; RV32-NEXT:    vnsrl.wi v8, v8, 0
69; RV32-NEXT:    vsetvli zero, zero, e8, mf4, ta, mu
70; RV32-NEXT:    vnsrl.wi v8, v8, 0
71; RV32-NEXT:    vsetvli zero, a0, e8, mf4, ta, mu
72; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t
73; RV32-NEXT:    ret
74;
75; RV64-LABEL: vpscatter_nxv2i32_truncstore_nxv2i8:
76; RV64:       # %bb.0:
77; RV64-NEXT:    vsetvli a1, zero, e16, mf2, ta, mu
78; RV64-NEXT:    vnsrl.wi v8, v8, 0
79; RV64-NEXT:    vsetvli zero, zero, e8, mf4, ta, mu
80; RV64-NEXT:    vnsrl.wi v8, v8, 0
81; RV64-NEXT:    vsetvli zero, a0, e8, mf4, ta, mu
82; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t
83; RV64-NEXT:    ret
84  %tval = trunc <vscale x 2 x i32> %val to <vscale x 2 x i8>
85  call void @llvm.vp.scatter.nxv2i8.nxv2p0i8(<vscale x 2 x i8> %tval, <vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 %evl)
86  ret void
87}
88
89define void @vpscatter_nxv2i64_truncstore_nxv2i8(<vscale x 2 x i64> %val, <vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {
90; RV32-LABEL: vpscatter_nxv2i64_truncstore_nxv2i8:
91; RV32:       # %bb.0:
92; RV32-NEXT:    vsetvli a1, zero, e32, m1, ta, mu
93; RV32-NEXT:    vnsrl.wi v11, v8, 0
94; RV32-NEXT:    vsetvli zero, zero, e16, mf2, ta, mu
95; RV32-NEXT:    vnsrl.wi v8, v11, 0
96; RV32-NEXT:    vsetvli zero, zero, e8, mf4, ta, mu
97; RV32-NEXT:    vnsrl.wi v8, v8, 0
98; RV32-NEXT:    vsetvli zero, a0, e8, mf4, ta, mu
99; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t
100; RV32-NEXT:    ret
101;
102; RV64-LABEL: vpscatter_nxv2i64_truncstore_nxv2i8:
103; RV64:       # %bb.0:
104; RV64-NEXT:    vsetvli a1, zero, e32, m1, ta, mu
105; RV64-NEXT:    vnsrl.wi v12, v8, 0
106; RV64-NEXT:    vsetvli zero, zero, e16, mf2, ta, mu
107; RV64-NEXT:    vnsrl.wi v8, v12, 0
108; RV64-NEXT:    vsetvli zero, zero, e8, mf4, ta, mu
109; RV64-NEXT:    vnsrl.wi v8, v8, 0
110; RV64-NEXT:    vsetvli zero, a0, e8, mf4, ta, mu
111; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t
112; RV64-NEXT:    ret
113  %tval = trunc <vscale x 2 x i64> %val to <vscale x 2 x i8>
114  call void @llvm.vp.scatter.nxv2i8.nxv2p0i8(<vscale x 2 x i8> %tval, <vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 %evl)
115  ret void
116}
117
118declare void @llvm.vp.scatter.nxv4i8.nxv4p0i8(<vscale x 4 x i8>, <vscale x 4 x i8*>, <vscale x 4 x i1>, i32)
119
120define void @vpscatter_nxv4i8(<vscale x 4 x i8> %val, <vscale x 4 x i8*> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) {
121; RV32-LABEL: vpscatter_nxv4i8:
122; RV32:       # %bb.0:
123; RV32-NEXT:    vsetvli zero, a0, e8, mf2, ta, mu
124; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t
125; RV32-NEXT:    ret
126;
127; RV64-LABEL: vpscatter_nxv4i8:
128; RV64:       # %bb.0:
129; RV64-NEXT:    vsetvli zero, a0, e8, mf2, ta, mu
130; RV64-NEXT:    vsoxei64.v v8, (zero), v12, v0.t
131; RV64-NEXT:    ret
132  call void @llvm.vp.scatter.nxv4i8.nxv4p0i8(<vscale x 4 x i8> %val, <vscale x 4 x i8*> %ptrs, <vscale x 4 x i1> %m, i32 %evl)
133  ret void
134}
135
136define void @vpscatter_truemask_nxv4i8(<vscale x 4 x i8> %val, <vscale x 4 x i8*> %ptrs, i32 zeroext %evl) {
137; RV32-LABEL: vpscatter_truemask_nxv4i8:
138; RV32:       # %bb.0:
139; RV32-NEXT:    vsetvli zero, a0, e8, mf2, ta, mu
140; RV32-NEXT:    vsoxei32.v v8, (zero), v10
141; RV32-NEXT:    ret
142;
143; RV64-LABEL: vpscatter_truemask_nxv4i8:
144; RV64:       # %bb.0:
145; RV64-NEXT:    vsetvli zero, a0, e8, mf2, ta, mu
146; RV64-NEXT:    vsoxei64.v v8, (zero), v12
147; RV64-NEXT:    ret
148  %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0
149  %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
150  call void @llvm.vp.scatter.nxv4i8.nxv4p0i8(<vscale x 4 x i8> %val, <vscale x 4 x i8*> %ptrs, <vscale x 4 x i1> %mtrue, i32 %evl)
151  ret void
152}
153
154declare void @llvm.vp.scatter.nxv8i8.nxv8p0i8(<vscale x 8 x i8>, <vscale x 8 x i8*>, <vscale x 8 x i1>, i32)
155
156define void @vpscatter_nxv8i8(<vscale x 8 x i8> %val, <vscale x 8 x i8*> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
157; RV32-LABEL: vpscatter_nxv8i8:
158; RV32:       # %bb.0:
159; RV32-NEXT:    vsetvli zero, a0, e8, m1, ta, mu
160; RV32-NEXT:    vsoxei32.v v8, (zero), v12, v0.t
161; RV32-NEXT:    ret
162;
163; RV64-LABEL: vpscatter_nxv8i8:
164; RV64:       # %bb.0:
165; RV64-NEXT:    vsetvli zero, a0, e8, m1, ta, mu
166; RV64-NEXT:    vsoxei64.v v8, (zero), v16, v0.t
167; RV64-NEXT:    ret
168  call void @llvm.vp.scatter.nxv8i8.nxv8p0i8(<vscale x 8 x i8> %val, <vscale x 8 x i8*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
169  ret void
170}
171
172define void @vpscatter_baseidx_nxv8i8(<vscale x 8 x i8> %val, i8* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
173; RV32-LABEL: vpscatter_baseidx_nxv8i8:
174; RV32:       # %bb.0:
175; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
176; RV32-NEXT:    vsext.vf4 v12, v9
177; RV32-NEXT:    vsetvli zero, a1, e8, m1, ta, mu
178; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t
179; RV32-NEXT:    ret
180;
181; RV64-LABEL: vpscatter_baseidx_nxv8i8:
182; RV64:       # %bb.0:
183; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
184; RV64-NEXT:    vsext.vf8 v16, v9
185; RV64-NEXT:    vsetvli zero, a1, e8, m1, ta, mu
186; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
187; RV64-NEXT:    ret
188  %ptrs = getelementptr inbounds i8, i8* %base, <vscale x 8 x i8> %idxs
189  call void @llvm.vp.scatter.nxv8i8.nxv8p0i8(<vscale x 8 x i8> %val, <vscale x 8 x i8*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
190  ret void
191}
192
193declare void @llvm.vp.scatter.nxv1i16.nxv1p0i16(<vscale x 1 x i16>, <vscale x 1 x i16*>, <vscale x 1 x i1>, i32)
194
195define void @vpscatter_nxv1i16(<vscale x 1 x i16> %val, <vscale x 1 x i16*> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) {
196; RV32-LABEL: vpscatter_nxv1i16:
197; RV32:       # %bb.0:
198; RV32-NEXT:    vsetvli zero, a0, e16, mf4, ta, mu
199; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t
200; RV32-NEXT:    ret
201;
202; RV64-LABEL: vpscatter_nxv1i16:
203; RV64:       # %bb.0:
204; RV64-NEXT:    vsetvli zero, a0, e16, mf4, ta, mu
205; RV64-NEXT:    vsoxei64.v v8, (zero), v9, v0.t
206; RV64-NEXT:    ret
207  call void @llvm.vp.scatter.nxv1i16.nxv1p0i16(<vscale x 1 x i16> %val, <vscale x 1 x i16*> %ptrs, <vscale x 1 x i1> %m, i32 %evl)
208  ret void
209}
210
211declare void @llvm.vp.scatter.nxv2i16.nxv2p0i16(<vscale x 2 x i16>, <vscale x 2 x i16*>, <vscale x 2 x i1>, i32)
212
213define void @vpscatter_nxv2i16(<vscale x 2 x i16> %val, <vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {
214; RV32-LABEL: vpscatter_nxv2i16:
215; RV32:       # %bb.0:
216; RV32-NEXT:    vsetvli zero, a0, e16, mf2, ta, mu
217; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t
218; RV32-NEXT:    ret
219;
220; RV64-LABEL: vpscatter_nxv2i16:
221; RV64:       # %bb.0:
222; RV64-NEXT:    vsetvli zero, a0, e16, mf2, ta, mu
223; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t
224; RV64-NEXT:    ret
225  call void @llvm.vp.scatter.nxv2i16.nxv2p0i16(<vscale x 2 x i16> %val, <vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, i32 %evl)
226  ret void
227}
228
229define void @vpscatter_nxv2i32_truncstore_nxv2i16(<vscale x 2 x i32> %val, <vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {
230; RV32-LABEL: vpscatter_nxv2i32_truncstore_nxv2i16:
231; RV32:       # %bb.0:
232; RV32-NEXT:    vsetvli a1, zero, e16, mf2, ta, mu
233; RV32-NEXT:    vnsrl.wi v8, v8, 0
234; RV32-NEXT:    vsetvli zero, a0, e16, mf2, ta, mu
235; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t
236; RV32-NEXT:    ret
237;
238; RV64-LABEL: vpscatter_nxv2i32_truncstore_nxv2i16:
239; RV64:       # %bb.0:
240; RV64-NEXT:    vsetvli a1, zero, e16, mf2, ta, mu
241; RV64-NEXT:    vnsrl.wi v8, v8, 0
242; RV64-NEXT:    vsetvli zero, a0, e16, mf2, ta, mu
243; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t
244; RV64-NEXT:    ret
245  %tval = trunc <vscale x 2 x i32> %val to <vscale x 2 x i16>
246  call void @llvm.vp.scatter.nxv2i16.nxv2p0i16(<vscale x 2 x i16> %tval, <vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, i32 %evl)
247  ret void
248}
249
250define void @vpscatter_nxv2i64_truncstore_nxv2i16(<vscale x 2 x i64> %val, <vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {
251; RV32-LABEL: vpscatter_nxv2i64_truncstore_nxv2i16:
252; RV32:       # %bb.0:
253; RV32-NEXT:    vsetvli a1, zero, e32, m1, ta, mu
254; RV32-NEXT:    vnsrl.wi v11, v8, 0
255; RV32-NEXT:    vsetvli zero, zero, e16, mf2, ta, mu
256; RV32-NEXT:    vnsrl.wi v8, v11, 0
257; RV32-NEXT:    vsetvli zero, a0, e16, mf2, ta, mu
258; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t
259; RV32-NEXT:    ret
260;
261; RV64-LABEL: vpscatter_nxv2i64_truncstore_nxv2i16:
262; RV64:       # %bb.0:
263; RV64-NEXT:    vsetvli a1, zero, e32, m1, ta, mu
264; RV64-NEXT:    vnsrl.wi v12, v8, 0
265; RV64-NEXT:    vsetvli zero, zero, e16, mf2, ta, mu
266; RV64-NEXT:    vnsrl.wi v8, v12, 0
267; RV64-NEXT:    vsetvli zero, a0, e16, mf2, ta, mu
268; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t
269; RV64-NEXT:    ret
270  %tval = trunc <vscale x 2 x i64> %val to <vscale x 2 x i16>
271  call void @llvm.vp.scatter.nxv2i16.nxv2p0i16(<vscale x 2 x i16> %tval, <vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, i32 %evl)
272  ret void
273}
274
275declare void @llvm.vp.scatter.nxv4i16.nxv4p0i16(<vscale x 4 x i16>, <vscale x 4 x i16*>, <vscale x 4 x i1>, i32)
276
277define void @vpscatter_nxv4i16(<vscale x 4 x i16> %val, <vscale x 4 x i16*> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) {
278; RV32-LABEL: vpscatter_nxv4i16:
279; RV32:       # %bb.0:
280; RV32-NEXT:    vsetvli zero, a0, e16, m1, ta, mu
281; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t
282; RV32-NEXT:    ret
283;
284; RV64-LABEL: vpscatter_nxv4i16:
285; RV64:       # %bb.0:
286; RV64-NEXT:    vsetvli zero, a0, e16, m1, ta, mu
287; RV64-NEXT:    vsoxei64.v v8, (zero), v12, v0.t
288; RV64-NEXT:    ret
289  call void @llvm.vp.scatter.nxv4i16.nxv4p0i16(<vscale x 4 x i16> %val, <vscale x 4 x i16*> %ptrs, <vscale x 4 x i1> %m, i32 %evl)
290  ret void
291}
292
293define void @vpscatter_truemask_nxv4i16(<vscale x 4 x i16> %val, <vscale x 4 x i16*> %ptrs, i32 zeroext %evl) {
294; RV32-LABEL: vpscatter_truemask_nxv4i16:
295; RV32:       # %bb.0:
296; RV32-NEXT:    vsetvli zero, a0, e16, m1, ta, mu
297; RV32-NEXT:    vsoxei32.v v8, (zero), v10
298; RV32-NEXT:    ret
299;
300; RV64-LABEL: vpscatter_truemask_nxv4i16:
301; RV64:       # %bb.0:
302; RV64-NEXT:    vsetvli zero, a0, e16, m1, ta, mu
303; RV64-NEXT:    vsoxei64.v v8, (zero), v12
304; RV64-NEXT:    ret
305  %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0
306  %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
307  call void @llvm.vp.scatter.nxv4i16.nxv4p0i16(<vscale x 4 x i16> %val, <vscale x 4 x i16*> %ptrs, <vscale x 4 x i1> %mtrue, i32 %evl)
308  ret void
309}
310
311declare void @llvm.vp.scatter.nxv8i16.nxv8p0i16(<vscale x 8 x i16>, <vscale x 8 x i16*>, <vscale x 8 x i1>, i32)
312
313define void @vpscatter_nxv8i16(<vscale x 8 x i16> %val, <vscale x 8 x i16*> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
314; RV32-LABEL: vpscatter_nxv8i16:
315; RV32:       # %bb.0:
316; RV32-NEXT:    vsetvli zero, a0, e16, m2, ta, mu
317; RV32-NEXT:    vsoxei32.v v8, (zero), v12, v0.t
318; RV32-NEXT:    ret
319;
320; RV64-LABEL: vpscatter_nxv8i16:
321; RV64:       # %bb.0:
322; RV64-NEXT:    vsetvli zero, a0, e16, m2, ta, mu
323; RV64-NEXT:    vsoxei64.v v8, (zero), v16, v0.t
324; RV64-NEXT:    ret
325  call void @llvm.vp.scatter.nxv8i16.nxv8p0i16(<vscale x 8 x i16> %val, <vscale x 8 x i16*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
326  ret void
327}
328
329define void @vpscatter_baseidx_nxv8i8_nxv8i16(<vscale x 8 x i16> %val, i16* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
330; RV32-LABEL: vpscatter_baseidx_nxv8i8_nxv8i16:
331; RV32:       # %bb.0:
332; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
333; RV32-NEXT:    vsext.vf4 v12, v10
334; RV32-NEXT:    vadd.vv v12, v12, v12
335; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, mu
336; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t
337; RV32-NEXT:    ret
338;
339; RV64-LABEL: vpscatter_baseidx_nxv8i8_nxv8i16:
340; RV64:       # %bb.0:
341; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
342; RV64-NEXT:    vsext.vf8 v16, v10
343; RV64-NEXT:    vadd.vv v16, v16, v16
344; RV64-NEXT:    vsetvli zero, a1, e16, m2, ta, mu
345; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
346; RV64-NEXT:    ret
347  %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i8> %idxs
348  call void @llvm.vp.scatter.nxv8i16.nxv8p0i16(<vscale x 8 x i16> %val, <vscale x 8 x i16*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
349  ret void
350}
351
352define void @vpscatter_baseidx_sext_nxv8i8_nxv8i16(<vscale x 8 x i16> %val, i16* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
353; RV32-LABEL: vpscatter_baseidx_sext_nxv8i8_nxv8i16:
354; RV32:       # %bb.0:
355; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
356; RV32-NEXT:    vsext.vf4 v12, v10
357; RV32-NEXT:    vadd.vv v12, v12, v12
358; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, mu
359; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t
360; RV32-NEXT:    ret
361;
362; RV64-LABEL: vpscatter_baseidx_sext_nxv8i8_nxv8i16:
363; RV64:       # %bb.0:
364; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
365; RV64-NEXT:    vsext.vf8 v16, v10
366; RV64-NEXT:    vadd.vv v16, v16, v16
367; RV64-NEXT:    vsetvli zero, a1, e16, m2, ta, mu
368; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
369; RV64-NEXT:    ret
370  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>
371  %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i16> %eidxs
372  call void @llvm.vp.scatter.nxv8i16.nxv8p0i16(<vscale x 8 x i16> %val, <vscale x 8 x i16*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
373  ret void
374}
375
376define void @vpscatter_baseidx_zext_nxv8i8_nxv8i16(<vscale x 8 x i16> %val, i16* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
377; RV32-LABEL: vpscatter_baseidx_zext_nxv8i8_nxv8i16:
378; RV32:       # %bb.0:
379; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
380; RV32-NEXT:    vzext.vf4 v12, v10
381; RV32-NEXT:    vadd.vv v12, v12, v12
382; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, mu
383; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t
384; RV32-NEXT:    ret
385;
386; RV64-LABEL: vpscatter_baseidx_zext_nxv8i8_nxv8i16:
387; RV64:       # %bb.0:
388; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
389; RV64-NEXT:    vzext.vf8 v16, v10
390; RV64-NEXT:    vadd.vv v16, v16, v16
391; RV64-NEXT:    vsetvli zero, a1, e16, m2, ta, mu
392; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
393; RV64-NEXT:    ret
394  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>
395  %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i16> %eidxs
396  call void @llvm.vp.scatter.nxv8i16.nxv8p0i16(<vscale x 8 x i16> %val, <vscale x 8 x i16*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
397  ret void
398}
399
400define void @vpscatter_baseidx_nxv8i16(<vscale x 8 x i16> %val, i16* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
401; RV32-LABEL: vpscatter_baseidx_nxv8i16:
402; RV32:       # %bb.0:
403; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
404; RV32-NEXT:    vsext.vf2 v12, v10
405; RV32-NEXT:    vadd.vv v12, v12, v12
406; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, mu
407; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t
408; RV32-NEXT:    ret
409;
410; RV64-LABEL: vpscatter_baseidx_nxv8i16:
411; RV64:       # %bb.0:
412; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
413; RV64-NEXT:    vsext.vf4 v16, v10
414; RV64-NEXT:    vadd.vv v16, v16, v16
415; RV64-NEXT:    vsetvli zero, a1, e16, m2, ta, mu
416; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
417; RV64-NEXT:    ret
418  %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i16> %idxs
419  call void @llvm.vp.scatter.nxv8i16.nxv8p0i16(<vscale x 8 x i16> %val, <vscale x 8 x i16*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
420  ret void
421}
422
423declare void @llvm.vp.scatter.nxv1i32.nxv1p0i32(<vscale x 1 x i32>, <vscale x 1 x i32*>, <vscale x 1 x i1>, i32)
424
425define void @vpscatter_nxv1i32(<vscale x 1 x i32> %val, <vscale x 1 x i32*> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) {
426; RV32-LABEL: vpscatter_nxv1i32:
427; RV32:       # %bb.0:
428; RV32-NEXT:    vsetvli zero, a0, e32, mf2, ta, mu
429; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t
430; RV32-NEXT:    ret
431;
432; RV64-LABEL: vpscatter_nxv1i32:
433; RV64:       # %bb.0:
434; RV64-NEXT:    vsetvli zero, a0, e32, mf2, ta, mu
435; RV64-NEXT:    vsoxei64.v v8, (zero), v9, v0.t
436; RV64-NEXT:    ret
437  call void @llvm.vp.scatter.nxv1i32.nxv1p0i32(<vscale x 1 x i32> %val, <vscale x 1 x i32*> %ptrs, <vscale x 1 x i1> %m, i32 %evl)
438  ret void
439}
440
441declare void @llvm.vp.scatter.nxv2i32.nxv2p0i32(<vscale x 2 x i32>, <vscale x 2 x i32*>, <vscale x 2 x i1>, i32)
442
443define void @vpscatter_nxv2i32(<vscale x 2 x i32> %val, <vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {
444; RV32-LABEL: vpscatter_nxv2i32:
445; RV32:       # %bb.0:
446; RV32-NEXT:    vsetvli zero, a0, e32, m1, ta, mu
447; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t
448; RV32-NEXT:    ret
449;
450; RV64-LABEL: vpscatter_nxv2i32:
451; RV64:       # %bb.0:
452; RV64-NEXT:    vsetvli zero, a0, e32, m1, ta, mu
453; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t
454; RV64-NEXT:    ret
455  call void @llvm.vp.scatter.nxv2i32.nxv2p0i32(<vscale x 2 x i32> %val, <vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, i32 %evl)
456  ret void
457}
458
459define void @vpscatter_nxv2i64_truncstore_nxv2i32(<vscale x 2 x i64> %val, <vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {
460; RV32-LABEL: vpscatter_nxv2i64_truncstore_nxv2i32:
461; RV32:       # %bb.0:
462; RV32-NEXT:    vsetvli a1, zero, e32, m1, ta, mu
463; RV32-NEXT:    vnsrl.wi v11, v8, 0
464; RV32-NEXT:    vsetvli zero, a0, e32, m1, ta, mu
465; RV32-NEXT:    vsoxei32.v v11, (zero), v10, v0.t
466; RV32-NEXT:    ret
467;
468; RV64-LABEL: vpscatter_nxv2i64_truncstore_nxv2i32:
469; RV64:       # %bb.0:
470; RV64-NEXT:    vsetvli a1, zero, e32, m1, ta, mu
471; RV64-NEXT:    vnsrl.wi v12, v8, 0
472; RV64-NEXT:    vsetvli zero, a0, e32, m1, ta, mu
473; RV64-NEXT:    vsoxei64.v v12, (zero), v10, v0.t
474; RV64-NEXT:    ret
475  %tval = trunc <vscale x 2 x i64> %val to <vscale x 2 x i32>
476  call void @llvm.vp.scatter.nxv2i32.nxv2p0i32(<vscale x 2 x i32> %tval, <vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, i32 %evl)
477  ret void
478}
479
480declare void @llvm.vp.scatter.nxv4i32.nxv4p0i32(<vscale x 4 x i32>, <vscale x 4 x i32*>, <vscale x 4 x i1>, i32)
481
482define void @vpscatter_nxv4i32(<vscale x 4 x i32> %val, <vscale x 4 x i32*> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) {
483; RV32-LABEL: vpscatter_nxv4i32:
484; RV32:       # %bb.0:
485; RV32-NEXT:    vsetvli zero, a0, e32, m2, ta, mu
486; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t
487; RV32-NEXT:    ret
488;
489; RV64-LABEL: vpscatter_nxv4i32:
490; RV64:       # %bb.0:
491; RV64-NEXT:    vsetvli zero, a0, e32, m2, ta, mu
492; RV64-NEXT:    vsoxei64.v v8, (zero), v12, v0.t
493; RV64-NEXT:    ret
494  call void @llvm.vp.scatter.nxv4i32.nxv4p0i32(<vscale x 4 x i32> %val, <vscale x 4 x i32*> %ptrs, <vscale x 4 x i1> %m, i32 %evl)
495  ret void
496}
497
498define void @vpscatter_truemask_nxv4i32(<vscale x 4 x i32> %val, <vscale x 4 x i32*> %ptrs, i32 zeroext %evl) {
499; RV32-LABEL: vpscatter_truemask_nxv4i32:
500; RV32:       # %bb.0:
501; RV32-NEXT:    vsetvli zero, a0, e32, m2, ta, mu
502; RV32-NEXT:    vsoxei32.v v8, (zero), v10
503; RV32-NEXT:    ret
504;
505; RV64-LABEL: vpscatter_truemask_nxv4i32:
506; RV64:       # %bb.0:
507; RV64-NEXT:    vsetvli zero, a0, e32, m2, ta, mu
508; RV64-NEXT:    vsoxei64.v v8, (zero), v12
509; RV64-NEXT:    ret
510  %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0
511  %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
512  call void @llvm.vp.scatter.nxv4i32.nxv4p0i32(<vscale x 4 x i32> %val, <vscale x 4 x i32*> %ptrs, <vscale x 4 x i1> %mtrue, i32 %evl)
513  ret void
514}
515
516declare void @llvm.vp.scatter.nxv8i32.nxv8p0i32(<vscale x 8 x i32>, <vscale x 8 x i32*>, <vscale x 8 x i1>, i32)
517
518define void @vpscatter_nxv8i32(<vscale x 8 x i32> %val, <vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
519; RV32-LABEL: vpscatter_nxv8i32:
520; RV32:       # %bb.0:
521; RV32-NEXT:    vsetvli zero, a0, e32, m4, ta, mu
522; RV32-NEXT:    vsoxei32.v v8, (zero), v12, v0.t
523; RV32-NEXT:    ret
524;
525; RV64-LABEL: vpscatter_nxv8i32:
526; RV64:       # %bb.0:
527; RV64-NEXT:    vsetvli zero, a0, e32, m4, ta, mu
528; RV64-NEXT:    vsoxei64.v v8, (zero), v16, v0.t
529; RV64-NEXT:    ret
530  call void @llvm.vp.scatter.nxv8i32.nxv8p0i32(<vscale x 8 x i32> %val, <vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
531  ret void
532}
533
534define void @vpscatter_baseidx_nxv8i8_nxv8i32(<vscale x 8 x i32> %val, i32* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
535; RV32-LABEL: vpscatter_baseidx_nxv8i8_nxv8i32:
536; RV32:       # %bb.0:
537; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
538; RV32-NEXT:    vsext.vf4 v16, v12
539; RV32-NEXT:    vsll.vi v12, v16, 2
540; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
541; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t
542; RV32-NEXT:    ret
543;
544; RV64-LABEL: vpscatter_baseidx_nxv8i8_nxv8i32:
545; RV64:       # %bb.0:
546; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
547; RV64-NEXT:    vsext.vf8 v16, v12
548; RV64-NEXT:    vsll.vi v16, v16, 2
549; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
550; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
551; RV64-NEXT:    ret
552  %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i8> %idxs
553  call void @llvm.vp.scatter.nxv8i32.nxv8p0i32(<vscale x 8 x i32> %val, <vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
554  ret void
555}
556
557define void @vpscatter_baseidx_sext_nxv8i8_nxv8i32(<vscale x 8 x i32> %val, i32* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
558; RV32-LABEL: vpscatter_baseidx_sext_nxv8i8_nxv8i32:
559; RV32:       # %bb.0:
560; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
561; RV32-NEXT:    vsext.vf4 v16, v12
562; RV32-NEXT:    vsll.vi v12, v16, 2
563; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
564; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t
565; RV32-NEXT:    ret
566;
567; RV64-LABEL: vpscatter_baseidx_sext_nxv8i8_nxv8i32:
568; RV64:       # %bb.0:
569; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
570; RV64-NEXT:    vsext.vf8 v16, v12
571; RV64-NEXT:    vsll.vi v16, v16, 2
572; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
573; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
574; RV64-NEXT:    ret
575  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>
576  %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs
577  call void @llvm.vp.scatter.nxv8i32.nxv8p0i32(<vscale x 8 x i32> %val, <vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
578  ret void
579}
580
581define void @vpscatter_baseidx_zext_nxv8i8_nxv8i32(<vscale x 8 x i32> %val, i32* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
582; RV32-LABEL: vpscatter_baseidx_zext_nxv8i8_nxv8i32:
583; RV32:       # %bb.0:
584; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
585; RV32-NEXT:    vzext.vf4 v16, v12
586; RV32-NEXT:    vsll.vi v12, v16, 2
587; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
588; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t
589; RV32-NEXT:    ret
590;
591; RV64-LABEL: vpscatter_baseidx_zext_nxv8i8_nxv8i32:
592; RV64:       # %bb.0:
593; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
594; RV64-NEXT:    vzext.vf8 v16, v12
595; RV64-NEXT:    vsll.vi v16, v16, 2
596; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
597; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
598; RV64-NEXT:    ret
599  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>
600  %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs
601  call void @llvm.vp.scatter.nxv8i32.nxv8p0i32(<vscale x 8 x i32> %val, <vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
602  ret void
603}
604
605define void @vpscatter_baseidx_nxv8i16_nxv8i32(<vscale x 8 x i32> %val, i32* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
606; RV32-LABEL: vpscatter_baseidx_nxv8i16_nxv8i32:
607; RV32:       # %bb.0:
608; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
609; RV32-NEXT:    vsext.vf2 v16, v12
610; RV32-NEXT:    vsll.vi v12, v16, 2
611; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
612; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t
613; RV32-NEXT:    ret
614;
615; RV64-LABEL: vpscatter_baseidx_nxv8i16_nxv8i32:
616; RV64:       # %bb.0:
617; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
618; RV64-NEXT:    vsext.vf4 v16, v12
619; RV64-NEXT:    vsll.vi v16, v16, 2
620; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
621; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
622; RV64-NEXT:    ret
623  %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i16> %idxs
624  call void @llvm.vp.scatter.nxv8i32.nxv8p0i32(<vscale x 8 x i32> %val, <vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
625  ret void
626}
627
628define void @vpscatter_baseidx_sext_nxv8i16_nxv8i32(<vscale x 8 x i32> %val, i32* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
629; RV32-LABEL: vpscatter_baseidx_sext_nxv8i16_nxv8i32:
630; RV32:       # %bb.0:
631; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
632; RV32-NEXT:    vsext.vf2 v16, v12
633; RV32-NEXT:    vsll.vi v12, v16, 2
634; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
635; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t
636; RV32-NEXT:    ret
637;
638; RV64-LABEL: vpscatter_baseidx_sext_nxv8i16_nxv8i32:
639; RV64:       # %bb.0:
640; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
641; RV64-NEXT:    vsext.vf4 v16, v12
642; RV64-NEXT:    vsll.vi v16, v16, 2
643; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
644; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
645; RV64-NEXT:    ret
646  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>
647  %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs
648  call void @llvm.vp.scatter.nxv8i32.nxv8p0i32(<vscale x 8 x i32> %val, <vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
649  ret void
650}
651
652define void @vpscatter_baseidx_zext_nxv8i16_nxv8i32(<vscale x 8 x i32> %val, i32* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
653; RV32-LABEL: vpscatter_baseidx_zext_nxv8i16_nxv8i32:
654; RV32:       # %bb.0:
655; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
656; RV32-NEXT:    vzext.vf2 v16, v12
657; RV32-NEXT:    vsll.vi v12, v16, 2
658; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
659; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t
660; RV32-NEXT:    ret
661;
662; RV64-LABEL: vpscatter_baseidx_zext_nxv8i16_nxv8i32:
663; RV64:       # %bb.0:
664; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
665; RV64-NEXT:    vzext.vf4 v16, v12
666; RV64-NEXT:    vsll.vi v16, v16, 2
667; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
668; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
669; RV64-NEXT:    ret
670  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>
671  %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs
672  call void @llvm.vp.scatter.nxv8i32.nxv8p0i32(<vscale x 8 x i32> %val, <vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
673  ret void
674}
675
676define void @vpscatter_baseidx_nxv8i32(<vscale x 8 x i32> %val, i32* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
677; RV32-LABEL: vpscatter_baseidx_nxv8i32:
678; RV32:       # %bb.0:
679; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
680; RV32-NEXT:    vsll.vi v12, v12, 2
681; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
682; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t
683; RV32-NEXT:    ret
684;
685; RV64-LABEL: vpscatter_baseidx_nxv8i32:
686; RV64:       # %bb.0:
687; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
688; RV64-NEXT:    vsext.vf2 v16, v12
689; RV64-NEXT:    vsll.vi v16, v16, 2
690; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
691; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
692; RV64-NEXT:    ret
693  %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %idxs
694  call void @llvm.vp.scatter.nxv8i32.nxv8p0i32(<vscale x 8 x i32> %val, <vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
695  ret void
696}
697
698declare void @llvm.vp.scatter.nxv1i64.nxv1p0i64(<vscale x 1 x i64>, <vscale x 1 x i64*>, <vscale x 1 x i1>, i32)
699
700define void @vpscatter_nxv1i64(<vscale x 1 x i64> %val, <vscale x 1 x i64*> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) {
701; RV32-LABEL: vpscatter_nxv1i64:
702; RV32:       # %bb.0:
703; RV32-NEXT:    vsetvli zero, a0, e64, m1, ta, mu
704; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t
705; RV32-NEXT:    ret
706;
707; RV64-LABEL: vpscatter_nxv1i64:
708; RV64:       # %bb.0:
709; RV64-NEXT:    vsetvli zero, a0, e64, m1, ta, mu
710; RV64-NEXT:    vsoxei64.v v8, (zero), v9, v0.t
711; RV64-NEXT:    ret
712  call void @llvm.vp.scatter.nxv1i64.nxv1p0i64(<vscale x 1 x i64> %val, <vscale x 1 x i64*> %ptrs, <vscale x 1 x i1> %m, i32 %evl)
713  ret void
714}
715
716declare void @llvm.vp.scatter.nxv2i64.nxv2p0i64(<vscale x 2 x i64>, <vscale x 2 x i64*>, <vscale x 2 x i1>, i32)
717
718define void @vpscatter_nxv2i64(<vscale x 2 x i64> %val, <vscale x 2 x i64*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {
719; RV32-LABEL: vpscatter_nxv2i64:
720; RV32:       # %bb.0:
721; RV32-NEXT:    vsetvli zero, a0, e64, m2, ta, mu
722; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t
723; RV32-NEXT:    ret
724;
725; RV64-LABEL: vpscatter_nxv2i64:
726; RV64:       # %bb.0:
727; RV64-NEXT:    vsetvli zero, a0, e64, m2, ta, mu
728; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t
729; RV64-NEXT:    ret
730  call void @llvm.vp.scatter.nxv2i64.nxv2p0i64(<vscale x 2 x i64> %val, <vscale x 2 x i64*> %ptrs, <vscale x 2 x i1> %m, i32 %evl)
731  ret void
732}
733
734declare void @llvm.vp.scatter.nxv4i64.nxv4p0i64(<vscale x 4 x i64>, <vscale x 4 x i64*>, <vscale x 4 x i1>, i32)
735
736define void @vpscatter_nxv4i64(<vscale x 4 x i64> %val, <vscale x 4 x i64*> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) {
737; RV32-LABEL: vpscatter_nxv4i64:
738; RV32:       # %bb.0:
739; RV32-NEXT:    vsetvli zero, a0, e64, m4, ta, mu
740; RV32-NEXT:    vsoxei32.v v8, (zero), v12, v0.t
741; RV32-NEXT:    ret
742;
743; RV64-LABEL: vpscatter_nxv4i64:
744; RV64:       # %bb.0:
745; RV64-NEXT:    vsetvli zero, a0, e64, m4, ta, mu
746; RV64-NEXT:    vsoxei64.v v8, (zero), v12, v0.t
747; RV64-NEXT:    ret
748  call void @llvm.vp.scatter.nxv4i64.nxv4p0i64(<vscale x 4 x i64> %val, <vscale x 4 x i64*> %ptrs, <vscale x 4 x i1> %m, i32 %evl)
749  ret void
750}
751
752define void @vpscatter_truemask_nxv4i64(<vscale x 4 x i64> %val, <vscale x 4 x i64*> %ptrs, i32 zeroext %evl) {
753; RV32-LABEL: vpscatter_truemask_nxv4i64:
754; RV32:       # %bb.0:
755; RV32-NEXT:    vsetvli zero, a0, e64, m4, ta, mu
756; RV32-NEXT:    vsoxei32.v v8, (zero), v12
757; RV32-NEXT:    ret
758;
759; RV64-LABEL: vpscatter_truemask_nxv4i64:
760; RV64:       # %bb.0:
761; RV64-NEXT:    vsetvli zero, a0, e64, m4, ta, mu
762; RV64-NEXT:    vsoxei64.v v8, (zero), v12
763; RV64-NEXT:    ret
764  %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0
765  %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
766  call void @llvm.vp.scatter.nxv4i64.nxv4p0i64(<vscale x 4 x i64> %val, <vscale x 4 x i64*> %ptrs, <vscale x 4 x i1> %mtrue, i32 %evl)
767  ret void
768}
769
770declare void @llvm.vp.scatter.nxv8i64.nxv8p0i64(<vscale x 8 x i64>, <vscale x 8 x i64*>, <vscale x 8 x i1>, i32)
771
772define void @vpscatter_nxv8i64(<vscale x 8 x i64> %val, <vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
773; RV32-LABEL: vpscatter_nxv8i64:
774; RV32:       # %bb.0:
775; RV32-NEXT:    vsetvli zero, a0, e64, m8, ta, mu
776; RV32-NEXT:    vsoxei32.v v8, (zero), v16, v0.t
777; RV32-NEXT:    ret
778;
779; RV64-LABEL: vpscatter_nxv8i64:
780; RV64:       # %bb.0:
781; RV64-NEXT:    vsetvli zero, a0, e64, m8, ta, mu
782; RV64-NEXT:    vsoxei64.v v8, (zero), v16, v0.t
783; RV64-NEXT:    ret
784  call void @llvm.vp.scatter.nxv8i64.nxv8p0i64(<vscale x 8 x i64> %val, <vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
785  ret void
786}
787
788define void @vpscatter_baseidx_nxv8i8_nxv8i64(<vscale x 8 x i64> %val, i64* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
789; RV32-LABEL: vpscatter_baseidx_nxv8i8_nxv8i64:
790; RV32:       # %bb.0:
791; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
792; RV32-NEXT:    vsext.vf4 v20, v16
793; RV32-NEXT:    vsll.vi v16, v20, 3
794; RV32-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
795; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t
796; RV32-NEXT:    ret
797;
798; RV64-LABEL: vpscatter_baseidx_nxv8i8_nxv8i64:
799; RV64:       # %bb.0:
800; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
801; RV64-NEXT:    vsext.vf8 v24, v16
802; RV64-NEXT:    vsll.vi v16, v24, 3
803; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
804; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
805; RV64-NEXT:    ret
806  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i8> %idxs
807  call void @llvm.vp.scatter.nxv8i64.nxv8p0i64(<vscale x 8 x i64> %val, <vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
808  ret void
809}
810
811define void @vpscatter_baseidx_sext_nxv8i8_nxv8i64(<vscale x 8 x i64> %val, i64* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
812; CHECK-LABEL: vpscatter_baseidx_sext_nxv8i8_nxv8i64:
813; CHECK:       # %bb.0:
814; CHECK-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
815; CHECK-NEXT:    vsext.vf8 v24, v16
816; CHECK-NEXT:    vsll.vi v16, v24, 3
817; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
818; CHECK-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
819; CHECK-NEXT:    ret
820  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>
821  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs
822  call void @llvm.vp.scatter.nxv8i64.nxv8p0i64(<vscale x 8 x i64> %val, <vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
823  ret void
824}
825
826define void @vpscatter_baseidx_zext_nxv8i8_nxv8i64(<vscale x 8 x i64> %val, i64* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
827; CHECK-LABEL: vpscatter_baseidx_zext_nxv8i8_nxv8i64:
828; CHECK:       # %bb.0:
829; CHECK-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
830; CHECK-NEXT:    vzext.vf8 v24, v16
831; CHECK-NEXT:    vsll.vi v16, v24, 3
832; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
833; CHECK-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
834; CHECK-NEXT:    ret
835  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>
836  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs
837  call void @llvm.vp.scatter.nxv8i64.nxv8p0i64(<vscale x 8 x i64> %val, <vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
838  ret void
839}
840
841define void @vpscatter_baseidx_nxv8i16_nxv8i64(<vscale x 8 x i64> %val, i64* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
842; RV32-LABEL: vpscatter_baseidx_nxv8i16_nxv8i64:
843; RV32:       # %bb.0:
844; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
845; RV32-NEXT:    vsext.vf2 v20, v16
846; RV32-NEXT:    vsll.vi v16, v20, 3
847; RV32-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
848; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t
849; RV32-NEXT:    ret
850;
851; RV64-LABEL: vpscatter_baseidx_nxv8i16_nxv8i64:
852; RV64:       # %bb.0:
853; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
854; RV64-NEXT:    vsext.vf4 v24, v16
855; RV64-NEXT:    vsll.vi v16, v24, 3
856; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
857; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
858; RV64-NEXT:    ret
859  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i16> %idxs
860  call void @llvm.vp.scatter.nxv8i64.nxv8p0i64(<vscale x 8 x i64> %val, <vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
861  ret void
862}
863
864define void @vpscatter_baseidx_sext_nxv8i16_nxv8i64(<vscale x 8 x i64> %val, i64* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
865; CHECK-LABEL: vpscatter_baseidx_sext_nxv8i16_nxv8i64:
866; CHECK:       # %bb.0:
867; CHECK-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
868; CHECK-NEXT:    vsext.vf4 v24, v16
869; CHECK-NEXT:    vsll.vi v16, v24, 3
870; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
871; CHECK-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
872; CHECK-NEXT:    ret
873  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>
874  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs
875  call void @llvm.vp.scatter.nxv8i64.nxv8p0i64(<vscale x 8 x i64> %val, <vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
876  ret void
877}
878
879define void @vpscatter_baseidx_zext_nxv8i16_nxv8i64(<vscale x 8 x i64> %val, i64* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
880; CHECK-LABEL: vpscatter_baseidx_zext_nxv8i16_nxv8i64:
881; CHECK:       # %bb.0:
882; CHECK-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
883; CHECK-NEXT:    vzext.vf4 v24, v16
884; CHECK-NEXT:    vsll.vi v16, v24, 3
885; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
886; CHECK-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
887; CHECK-NEXT:    ret
888  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>
889  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs
890  call void @llvm.vp.scatter.nxv8i64.nxv8p0i64(<vscale x 8 x i64> %val, <vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
891  ret void
892}
893
894define void @vpscatter_baseidx_nxv8i32_nxv8i64(<vscale x 8 x i64> %val, i64* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
895; RV32-LABEL: vpscatter_baseidx_nxv8i32_nxv8i64:
896; RV32:       # %bb.0:
897; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
898; RV32-NEXT:    vsll.vi v16, v16, 3
899; RV32-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
900; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t
901; RV32-NEXT:    ret
902;
903; RV64-LABEL: vpscatter_baseidx_nxv8i32_nxv8i64:
904; RV64:       # %bb.0:
905; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
906; RV64-NEXT:    vsext.vf2 v24, v16
907; RV64-NEXT:    vsll.vi v16, v24, 3
908; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
909; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
910; RV64-NEXT:    ret
911  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i32> %idxs
912  call void @llvm.vp.scatter.nxv8i64.nxv8p0i64(<vscale x 8 x i64> %val, <vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
913  ret void
914}
915
916define void @vpscatter_baseidx_sext_nxv8i32_nxv8i64(<vscale x 8 x i64> %val, i64* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
917; CHECK-LABEL: vpscatter_baseidx_sext_nxv8i32_nxv8i64:
918; CHECK:       # %bb.0:
919; CHECK-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
920; CHECK-NEXT:    vsext.vf2 v24, v16
921; CHECK-NEXT:    vsll.vi v16, v24, 3
922; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
923; CHECK-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
924; CHECK-NEXT:    ret
925  %eidxs = sext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>
926  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs
927  call void @llvm.vp.scatter.nxv8i64.nxv8p0i64(<vscale x 8 x i64> %val, <vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
928  ret void
929}
930
931define void @vpscatter_baseidx_zext_nxv8i32_nxv8i64(<vscale x 8 x i64> %val, i64* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
932; CHECK-LABEL: vpscatter_baseidx_zext_nxv8i32_nxv8i64:
933; CHECK:       # %bb.0:
934; CHECK-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
935; CHECK-NEXT:    vzext.vf2 v24, v16
936; CHECK-NEXT:    vsll.vi v16, v24, 3
937; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
938; CHECK-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
939; CHECK-NEXT:    ret
940  %eidxs = zext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>
941  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs
942  call void @llvm.vp.scatter.nxv8i64.nxv8p0i64(<vscale x 8 x i64> %val, <vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
943  ret void
944}
945
946define void @vpscatter_baseidx_nxv8i64(<vscale x 8 x i64> %val, i64* %base, <vscale x 8 x i64> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
947; CHECK-LABEL: vpscatter_baseidx_nxv8i64:
948; CHECK:       # %bb.0:
949; CHECK-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
950; CHECK-NEXT:    vsll.vi v16, v16, 3
951; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
952; CHECK-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
953; CHECK-NEXT:    ret
954  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %idxs
955  call void @llvm.vp.scatter.nxv8i64.nxv8p0i64(<vscale x 8 x i64> %val, <vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
956  ret void
957}
958
959declare void @llvm.vp.scatter.nxv1f16.nxv1p0f16(<vscale x 1 x half>, <vscale x 1 x half*>, <vscale x 1 x i1>, i32)
960
961define void @vpscatter_nxv1f16(<vscale x 1 x half> %val, <vscale x 1 x half*> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) {
962; RV32-LABEL: vpscatter_nxv1f16:
963; RV32:       # %bb.0:
964; RV32-NEXT:    vsetvli zero, a0, e16, mf4, ta, mu
965; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t
966; RV32-NEXT:    ret
967;
968; RV64-LABEL: vpscatter_nxv1f16:
969; RV64:       # %bb.0:
970; RV64-NEXT:    vsetvli zero, a0, e16, mf4, ta, mu
971; RV64-NEXT:    vsoxei64.v v8, (zero), v9, v0.t
972; RV64-NEXT:    ret
973  call void @llvm.vp.scatter.nxv1f16.nxv1p0f16(<vscale x 1 x half> %val, <vscale x 1 x half*> %ptrs, <vscale x 1 x i1> %m, i32 %evl)
974  ret void
975}
976
977declare void @llvm.vp.scatter.nxv2f16.nxv2p0f16(<vscale x 2 x half>, <vscale x 2 x half*>, <vscale x 2 x i1>, i32)
978
979define void @vpscatter_nxv2f16(<vscale x 2 x half> %val, <vscale x 2 x half*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {
980; RV32-LABEL: vpscatter_nxv2f16:
981; RV32:       # %bb.0:
982; RV32-NEXT:    vsetvli zero, a0, e16, mf2, ta, mu
983; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t
984; RV32-NEXT:    ret
985;
986; RV64-LABEL: vpscatter_nxv2f16:
987; RV64:       # %bb.0:
988; RV64-NEXT:    vsetvli zero, a0, e16, mf2, ta, mu
989; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t
990; RV64-NEXT:    ret
991  call void @llvm.vp.scatter.nxv2f16.nxv2p0f16(<vscale x 2 x half> %val, <vscale x 2 x half*> %ptrs, <vscale x 2 x i1> %m, i32 %evl)
992  ret void
993}
994
995declare void @llvm.vp.scatter.nxv4f16.nxv4p0f16(<vscale x 4 x half>, <vscale x 4 x half*>, <vscale x 4 x i1>, i32)
996
997define void @vpscatter_nxv4f16(<vscale x 4 x half> %val, <vscale x 4 x half*> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) {
998; RV32-LABEL: vpscatter_nxv4f16:
999; RV32:       # %bb.0:
1000; RV32-NEXT:    vsetvli zero, a0, e16, m1, ta, mu
1001; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t
1002; RV32-NEXT:    ret
1003;
1004; RV64-LABEL: vpscatter_nxv4f16:
1005; RV64:       # %bb.0:
1006; RV64-NEXT:    vsetvli zero, a0, e16, m1, ta, mu
1007; RV64-NEXT:    vsoxei64.v v8, (zero), v12, v0.t
1008; RV64-NEXT:    ret
1009  call void @llvm.vp.scatter.nxv4f16.nxv4p0f16(<vscale x 4 x half> %val, <vscale x 4 x half*> %ptrs, <vscale x 4 x i1> %m, i32 %evl)
1010  ret void
1011}
1012
1013define void @vpscatter_truemask_nxv4f16(<vscale x 4 x half> %val, <vscale x 4 x half*> %ptrs, i32 zeroext %evl) {
1014; RV32-LABEL: vpscatter_truemask_nxv4f16:
1015; RV32:       # %bb.0:
1016; RV32-NEXT:    vsetvli zero, a0, e16, m1, ta, mu
1017; RV32-NEXT:    vsoxei32.v v8, (zero), v10
1018; RV32-NEXT:    ret
1019;
1020; RV64-LABEL: vpscatter_truemask_nxv4f16:
1021; RV64:       # %bb.0:
1022; RV64-NEXT:    vsetvli zero, a0, e16, m1, ta, mu
1023; RV64-NEXT:    vsoxei64.v v8, (zero), v12
1024; RV64-NEXT:    ret
1025  %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0
1026  %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
1027  call void @llvm.vp.scatter.nxv4f16.nxv4p0f16(<vscale x 4 x half> %val, <vscale x 4 x half*> %ptrs, <vscale x 4 x i1> %mtrue, i32 %evl)
1028  ret void
1029}
1030
1031declare void @llvm.vp.scatter.nxv8f16.nxv8p0f16(<vscale x 8 x half>, <vscale x 8 x half*>, <vscale x 8 x i1>, i32)
1032
1033define void @vpscatter_nxv8f16(<vscale x 8 x half> %val, <vscale x 8 x half*> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1034; RV32-LABEL: vpscatter_nxv8f16:
1035; RV32:       # %bb.0:
1036; RV32-NEXT:    vsetvli zero, a0, e16, m2, ta, mu
1037; RV32-NEXT:    vsoxei32.v v8, (zero), v12, v0.t
1038; RV32-NEXT:    ret
1039;
1040; RV64-LABEL: vpscatter_nxv8f16:
1041; RV64:       # %bb.0:
1042; RV64-NEXT:    vsetvli zero, a0, e16, m2, ta, mu
1043; RV64-NEXT:    vsoxei64.v v8, (zero), v16, v0.t
1044; RV64-NEXT:    ret
1045  call void @llvm.vp.scatter.nxv8f16.nxv8p0f16(<vscale x 8 x half> %val, <vscale x 8 x half*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
1046  ret void
1047}
1048
1049define void @vpscatter_baseidx_nxv8i8_nxv8f16(<vscale x 8 x half> %val, half* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1050; RV32-LABEL: vpscatter_baseidx_nxv8i8_nxv8f16:
1051; RV32:       # %bb.0:
1052; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
1053; RV32-NEXT:    vsext.vf4 v12, v10
1054; RV32-NEXT:    vadd.vv v12, v12, v12
1055; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, mu
1056; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t
1057; RV32-NEXT:    ret
1058;
1059; RV64-LABEL: vpscatter_baseidx_nxv8i8_nxv8f16:
1060; RV64:       # %bb.0:
1061; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
1062; RV64-NEXT:    vsext.vf8 v16, v10
1063; RV64-NEXT:    vadd.vv v16, v16, v16
1064; RV64-NEXT:    vsetvli zero, a1, e16, m2, ta, mu
1065; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
1066; RV64-NEXT:    ret
1067  %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i8> %idxs
1068  call void @llvm.vp.scatter.nxv8f16.nxv8p0f16(<vscale x 8 x half> %val, <vscale x 8 x half*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
1069  ret void
1070}
1071
1072define void @vpscatter_baseidx_sext_nxv8i8_nxv8f16(<vscale x 8 x half> %val, half* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1073; RV32-LABEL: vpscatter_baseidx_sext_nxv8i8_nxv8f16:
1074; RV32:       # %bb.0:
1075; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
1076; RV32-NEXT:    vsext.vf4 v12, v10
1077; RV32-NEXT:    vadd.vv v12, v12, v12
1078; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, mu
1079; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t
1080; RV32-NEXT:    ret
1081;
1082; RV64-LABEL: vpscatter_baseidx_sext_nxv8i8_nxv8f16:
1083; RV64:       # %bb.0:
1084; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
1085; RV64-NEXT:    vsext.vf8 v16, v10
1086; RV64-NEXT:    vadd.vv v16, v16, v16
1087; RV64-NEXT:    vsetvli zero, a1, e16, m2, ta, mu
1088; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
1089; RV64-NEXT:    ret
1090  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>
1091  %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i16> %eidxs
1092  call void @llvm.vp.scatter.nxv8f16.nxv8p0f16(<vscale x 8 x half> %val, <vscale x 8 x half*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
1093  ret void
1094}
1095
1096define void @vpscatter_baseidx_zext_nxv8i8_nxv8f16(<vscale x 8 x half> %val, half* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1097; RV32-LABEL: vpscatter_baseidx_zext_nxv8i8_nxv8f16:
1098; RV32:       # %bb.0:
1099; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
1100; RV32-NEXT:    vzext.vf4 v12, v10
1101; RV32-NEXT:    vadd.vv v12, v12, v12
1102; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, mu
1103; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t
1104; RV32-NEXT:    ret
1105;
1106; RV64-LABEL: vpscatter_baseidx_zext_nxv8i8_nxv8f16:
1107; RV64:       # %bb.0:
1108; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
1109; RV64-NEXT:    vzext.vf8 v16, v10
1110; RV64-NEXT:    vadd.vv v16, v16, v16
1111; RV64-NEXT:    vsetvli zero, a1, e16, m2, ta, mu
1112; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
1113; RV64-NEXT:    ret
1114  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>
1115  %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i16> %eidxs
1116  call void @llvm.vp.scatter.nxv8f16.nxv8p0f16(<vscale x 8 x half> %val, <vscale x 8 x half*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
1117  ret void
1118}
1119
1120define void @vpscatter_baseidx_nxv8f16(<vscale x 8 x half> %val, half* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1121; RV32-LABEL: vpscatter_baseidx_nxv8f16:
1122; RV32:       # %bb.0:
1123; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
1124; RV32-NEXT:    vsext.vf2 v12, v10
1125; RV32-NEXT:    vadd.vv v12, v12, v12
1126; RV32-NEXT:    vsetvli zero, a1, e16, m2, ta, mu
1127; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t
1128; RV32-NEXT:    ret
1129;
1130; RV64-LABEL: vpscatter_baseidx_nxv8f16:
1131; RV64:       # %bb.0:
1132; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
1133; RV64-NEXT:    vsext.vf4 v16, v10
1134; RV64-NEXT:    vadd.vv v16, v16, v16
1135; RV64-NEXT:    vsetvli zero, a1, e16, m2, ta, mu
1136; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
1137; RV64-NEXT:    ret
1138  %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i16> %idxs
1139  call void @llvm.vp.scatter.nxv8f16.nxv8p0f16(<vscale x 8 x half> %val, <vscale x 8 x half*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
1140  ret void
1141}
1142
1143declare void @llvm.vp.scatter.nxv1f32.nxv1p0f32(<vscale x 1 x float>, <vscale x 1 x float*>, <vscale x 1 x i1>, i32)
1144
1145define void @vpscatter_nxv1f32(<vscale x 1 x float> %val, <vscale x 1 x float*> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1146; RV32-LABEL: vpscatter_nxv1f32:
1147; RV32:       # %bb.0:
1148; RV32-NEXT:    vsetvli zero, a0, e32, mf2, ta, mu
1149; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t
1150; RV32-NEXT:    ret
1151;
1152; RV64-LABEL: vpscatter_nxv1f32:
1153; RV64:       # %bb.0:
1154; RV64-NEXT:    vsetvli zero, a0, e32, mf2, ta, mu
1155; RV64-NEXT:    vsoxei64.v v8, (zero), v9, v0.t
1156; RV64-NEXT:    ret
1157  call void @llvm.vp.scatter.nxv1f32.nxv1p0f32(<vscale x 1 x float> %val, <vscale x 1 x float*> %ptrs, <vscale x 1 x i1> %m, i32 %evl)
1158  ret void
1159}
1160
1161declare void @llvm.vp.scatter.nxv2f32.nxv2p0f32(<vscale x 2 x float>, <vscale x 2 x float*>, <vscale x 2 x i1>, i32)
1162
1163define void @vpscatter_nxv2f32(<vscale x 2 x float> %val, <vscale x 2 x float*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {
1164; RV32-LABEL: vpscatter_nxv2f32:
1165; RV32:       # %bb.0:
1166; RV32-NEXT:    vsetvli zero, a0, e32, m1, ta, mu
1167; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t
1168; RV32-NEXT:    ret
1169;
1170; RV64-LABEL: vpscatter_nxv2f32:
1171; RV64:       # %bb.0:
1172; RV64-NEXT:    vsetvli zero, a0, e32, m1, ta, mu
1173; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t
1174; RV64-NEXT:    ret
1175  call void @llvm.vp.scatter.nxv2f32.nxv2p0f32(<vscale x 2 x float> %val, <vscale x 2 x float*> %ptrs, <vscale x 2 x i1> %m, i32 %evl)
1176  ret void
1177}
1178
1179declare void @llvm.vp.scatter.nxv4f32.nxv4p0f32(<vscale x 4 x float>, <vscale x 4 x float*>, <vscale x 4 x i1>, i32)
1180
1181define void @vpscatter_nxv4f32(<vscale x 4 x float> %val, <vscale x 4 x float*> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) {
1182; RV32-LABEL: vpscatter_nxv4f32:
1183; RV32:       # %bb.0:
1184; RV32-NEXT:    vsetvli zero, a0, e32, m2, ta, mu
1185; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t
1186; RV32-NEXT:    ret
1187;
1188; RV64-LABEL: vpscatter_nxv4f32:
1189; RV64:       # %bb.0:
1190; RV64-NEXT:    vsetvli zero, a0, e32, m2, ta, mu
1191; RV64-NEXT:    vsoxei64.v v8, (zero), v12, v0.t
1192; RV64-NEXT:    ret
1193  call void @llvm.vp.scatter.nxv4f32.nxv4p0f32(<vscale x 4 x float> %val, <vscale x 4 x float*> %ptrs, <vscale x 4 x i1> %m, i32 %evl)
1194  ret void
1195}
1196
1197define void @vpscatter_truemask_nxv4f32(<vscale x 4 x float> %val, <vscale x 4 x float*> %ptrs, i32 zeroext %evl) {
1198; RV32-LABEL: vpscatter_truemask_nxv4f32:
1199; RV32:       # %bb.0:
1200; RV32-NEXT:    vsetvli zero, a0, e32, m2, ta, mu
1201; RV32-NEXT:    vsoxei32.v v8, (zero), v10
1202; RV32-NEXT:    ret
1203;
1204; RV64-LABEL: vpscatter_truemask_nxv4f32:
1205; RV64:       # %bb.0:
1206; RV64-NEXT:    vsetvli zero, a0, e32, m2, ta, mu
1207; RV64-NEXT:    vsoxei64.v v8, (zero), v12
1208; RV64-NEXT:    ret
1209  %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0
1210  %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
1211  call void @llvm.vp.scatter.nxv4f32.nxv4p0f32(<vscale x 4 x float> %val, <vscale x 4 x float*> %ptrs, <vscale x 4 x i1> %mtrue, i32 %evl)
1212  ret void
1213}
1214
1215declare void @llvm.vp.scatter.nxv8f32.nxv8p0f32(<vscale x 8 x float>, <vscale x 8 x float*>, <vscale x 8 x i1>, i32)
1216
1217define void @vpscatter_nxv8f32(<vscale x 8 x float> %val, <vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1218; RV32-LABEL: vpscatter_nxv8f32:
1219; RV32:       # %bb.0:
1220; RV32-NEXT:    vsetvli zero, a0, e32, m4, ta, mu
1221; RV32-NEXT:    vsoxei32.v v8, (zero), v12, v0.t
1222; RV32-NEXT:    ret
1223;
1224; RV64-LABEL: vpscatter_nxv8f32:
1225; RV64:       # %bb.0:
1226; RV64-NEXT:    vsetvli zero, a0, e32, m4, ta, mu
1227; RV64-NEXT:    vsoxei64.v v8, (zero), v16, v0.t
1228; RV64-NEXT:    ret
1229  call void @llvm.vp.scatter.nxv8f32.nxv8p0f32(<vscale x 8 x float> %val, <vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
1230  ret void
1231}
1232
1233define void @vpscatter_baseidx_nxv8i8_nxv8f32(<vscale x 8 x float> %val, float* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1234; RV32-LABEL: vpscatter_baseidx_nxv8i8_nxv8f32:
1235; RV32:       # %bb.0:
1236; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
1237; RV32-NEXT:    vsext.vf4 v16, v12
1238; RV32-NEXT:    vsll.vi v12, v16, 2
1239; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
1240; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t
1241; RV32-NEXT:    ret
1242;
1243; RV64-LABEL: vpscatter_baseidx_nxv8i8_nxv8f32:
1244; RV64:       # %bb.0:
1245; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
1246; RV64-NEXT:    vsext.vf8 v16, v12
1247; RV64-NEXT:    vsll.vi v16, v16, 2
1248; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
1249; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
1250; RV64-NEXT:    ret
1251  %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i8> %idxs
1252  call void @llvm.vp.scatter.nxv8f32.nxv8p0f32(<vscale x 8 x float> %val, <vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
1253  ret void
1254}
1255
1256define void @vpscatter_baseidx_sext_nxv8i8_nxv8f32(<vscale x 8 x float> %val, float* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1257; RV32-LABEL: vpscatter_baseidx_sext_nxv8i8_nxv8f32:
1258; RV32:       # %bb.0:
1259; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
1260; RV32-NEXT:    vsext.vf4 v16, v12
1261; RV32-NEXT:    vsll.vi v12, v16, 2
1262; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
1263; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t
1264; RV32-NEXT:    ret
1265;
1266; RV64-LABEL: vpscatter_baseidx_sext_nxv8i8_nxv8f32:
1267; RV64:       # %bb.0:
1268; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
1269; RV64-NEXT:    vsext.vf8 v16, v12
1270; RV64-NEXT:    vsll.vi v16, v16, 2
1271; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
1272; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
1273; RV64-NEXT:    ret
1274  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>
1275  %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs
1276  call void @llvm.vp.scatter.nxv8f32.nxv8p0f32(<vscale x 8 x float> %val, <vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
1277  ret void
1278}
1279
1280define void @vpscatter_baseidx_zext_nxv8i8_nxv8f32(<vscale x 8 x float> %val, float* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1281; RV32-LABEL: vpscatter_baseidx_zext_nxv8i8_nxv8f32:
1282; RV32:       # %bb.0:
1283; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
1284; RV32-NEXT:    vzext.vf4 v16, v12
1285; RV32-NEXT:    vsll.vi v12, v16, 2
1286; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
1287; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t
1288; RV32-NEXT:    ret
1289;
1290; RV64-LABEL: vpscatter_baseidx_zext_nxv8i8_nxv8f32:
1291; RV64:       # %bb.0:
1292; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
1293; RV64-NEXT:    vzext.vf8 v16, v12
1294; RV64-NEXT:    vsll.vi v16, v16, 2
1295; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
1296; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
1297; RV64-NEXT:    ret
1298  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>
1299  %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs
1300  call void @llvm.vp.scatter.nxv8f32.nxv8p0f32(<vscale x 8 x float> %val, <vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
1301  ret void
1302}
1303
1304define void @vpscatter_baseidx_nxv8i16_nxv8f32(<vscale x 8 x float> %val, float* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1305; RV32-LABEL: vpscatter_baseidx_nxv8i16_nxv8f32:
1306; RV32:       # %bb.0:
1307; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
1308; RV32-NEXT:    vsext.vf2 v16, v12
1309; RV32-NEXT:    vsll.vi v12, v16, 2
1310; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
1311; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t
1312; RV32-NEXT:    ret
1313;
1314; RV64-LABEL: vpscatter_baseidx_nxv8i16_nxv8f32:
1315; RV64:       # %bb.0:
1316; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
1317; RV64-NEXT:    vsext.vf4 v16, v12
1318; RV64-NEXT:    vsll.vi v16, v16, 2
1319; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
1320; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
1321; RV64-NEXT:    ret
1322  %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i16> %idxs
1323  call void @llvm.vp.scatter.nxv8f32.nxv8p0f32(<vscale x 8 x float> %val, <vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
1324  ret void
1325}
1326
1327define void @vpscatter_baseidx_sext_nxv8i16_nxv8f32(<vscale x 8 x float> %val, float* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1328; RV32-LABEL: vpscatter_baseidx_sext_nxv8i16_nxv8f32:
1329; RV32:       # %bb.0:
1330; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
1331; RV32-NEXT:    vsext.vf2 v16, v12
1332; RV32-NEXT:    vsll.vi v12, v16, 2
1333; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
1334; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t
1335; RV32-NEXT:    ret
1336;
1337; RV64-LABEL: vpscatter_baseidx_sext_nxv8i16_nxv8f32:
1338; RV64:       # %bb.0:
1339; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
1340; RV64-NEXT:    vsext.vf4 v16, v12
1341; RV64-NEXT:    vsll.vi v16, v16, 2
1342; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
1343; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
1344; RV64-NEXT:    ret
1345  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>
1346  %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs
1347  call void @llvm.vp.scatter.nxv8f32.nxv8p0f32(<vscale x 8 x float> %val, <vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
1348  ret void
1349}
1350
1351define void @vpscatter_baseidx_zext_nxv8i16_nxv8f32(<vscale x 8 x float> %val, float* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1352; RV32-LABEL: vpscatter_baseidx_zext_nxv8i16_nxv8f32:
1353; RV32:       # %bb.0:
1354; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
1355; RV32-NEXT:    vzext.vf2 v16, v12
1356; RV32-NEXT:    vsll.vi v12, v16, 2
1357; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
1358; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t
1359; RV32-NEXT:    ret
1360;
1361; RV64-LABEL: vpscatter_baseidx_zext_nxv8i16_nxv8f32:
1362; RV64:       # %bb.0:
1363; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
1364; RV64-NEXT:    vzext.vf4 v16, v12
1365; RV64-NEXT:    vsll.vi v16, v16, 2
1366; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
1367; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
1368; RV64-NEXT:    ret
1369  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>
1370  %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs
1371  call void @llvm.vp.scatter.nxv8f32.nxv8p0f32(<vscale x 8 x float> %val, <vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
1372  ret void
1373}
1374
1375define void @vpscatter_baseidx_nxv8f32(<vscale x 8 x float> %val, float* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1376; RV32-LABEL: vpscatter_baseidx_nxv8f32:
1377; RV32:       # %bb.0:
1378; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
1379; RV32-NEXT:    vsll.vi v12, v12, 2
1380; RV32-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
1381; RV32-NEXT:    vsoxei32.v v8, (a0), v12, v0.t
1382; RV32-NEXT:    ret
1383;
1384; RV64-LABEL: vpscatter_baseidx_nxv8f32:
1385; RV64:       # %bb.0:
1386; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
1387; RV64-NEXT:    vsext.vf2 v16, v12
1388; RV64-NEXT:    vsll.vi v16, v16, 2
1389; RV64-NEXT:    vsetvli zero, a1, e32, m4, ta, mu
1390; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
1391; RV64-NEXT:    ret
1392  %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %idxs
1393  call void @llvm.vp.scatter.nxv8f32.nxv8p0f32(<vscale x 8 x float> %val, <vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
1394  ret void
1395}
1396
1397declare void @llvm.vp.scatter.nxv1f64.nxv1p0f64(<vscale x 1 x double>, <vscale x 1 x double*>, <vscale x 1 x i1>, i32)
1398
1399define void @vpscatter_nxv1f64(<vscale x 1 x double> %val, <vscale x 1 x double*> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) {
1400; RV32-LABEL: vpscatter_nxv1f64:
1401; RV32:       # %bb.0:
1402; RV32-NEXT:    vsetvli zero, a0, e64, m1, ta, mu
1403; RV32-NEXT:    vsoxei32.v v8, (zero), v9, v0.t
1404; RV32-NEXT:    ret
1405;
1406; RV64-LABEL: vpscatter_nxv1f64:
1407; RV64:       # %bb.0:
1408; RV64-NEXT:    vsetvli zero, a0, e64, m1, ta, mu
1409; RV64-NEXT:    vsoxei64.v v8, (zero), v9, v0.t
1410; RV64-NEXT:    ret
1411  call void @llvm.vp.scatter.nxv1f64.nxv1p0f64(<vscale x 1 x double> %val, <vscale x 1 x double*> %ptrs, <vscale x 1 x i1> %m, i32 %evl)
1412  ret void
1413}
1414
1415declare void @llvm.vp.scatter.nxv2f64.nxv2p0f64(<vscale x 2 x double>, <vscale x 2 x double*>, <vscale x 2 x i1>, i32)
1416
1417define void @vpscatter_nxv2f64(<vscale x 2 x double> %val, <vscale x 2 x double*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) {
1418; RV32-LABEL: vpscatter_nxv2f64:
1419; RV32:       # %bb.0:
1420; RV32-NEXT:    vsetvli zero, a0, e64, m2, ta, mu
1421; RV32-NEXT:    vsoxei32.v v8, (zero), v10, v0.t
1422; RV32-NEXT:    ret
1423;
1424; RV64-LABEL: vpscatter_nxv2f64:
1425; RV64:       # %bb.0:
1426; RV64-NEXT:    vsetvli zero, a0, e64, m2, ta, mu
1427; RV64-NEXT:    vsoxei64.v v8, (zero), v10, v0.t
1428; RV64-NEXT:    ret
1429  call void @llvm.vp.scatter.nxv2f64.nxv2p0f64(<vscale x 2 x double> %val, <vscale x 2 x double*> %ptrs, <vscale x 2 x i1> %m, i32 %evl)
1430  ret void
1431}
1432
1433declare void @llvm.vp.scatter.nxv4f64.nxv4p0f64(<vscale x 4 x double>, <vscale x 4 x double*>, <vscale x 4 x i1>, i32)
1434
1435define void @vpscatter_nxv4f64(<vscale x 4 x double> %val, <vscale x 4 x double*> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) {
1436; RV32-LABEL: vpscatter_nxv4f64:
1437; RV32:       # %bb.0:
1438; RV32-NEXT:    vsetvli zero, a0, e64, m4, ta, mu
1439; RV32-NEXT:    vsoxei32.v v8, (zero), v12, v0.t
1440; RV32-NEXT:    ret
1441;
1442; RV64-LABEL: vpscatter_nxv4f64:
1443; RV64:       # %bb.0:
1444; RV64-NEXT:    vsetvli zero, a0, e64, m4, ta, mu
1445; RV64-NEXT:    vsoxei64.v v8, (zero), v12, v0.t
1446; RV64-NEXT:    ret
1447  call void @llvm.vp.scatter.nxv4f64.nxv4p0f64(<vscale x 4 x double> %val, <vscale x 4 x double*> %ptrs, <vscale x 4 x i1> %m, i32 %evl)
1448  ret void
1449}
1450
1451define void @vpscatter_truemask_nxv4f64(<vscale x 4 x double> %val, <vscale x 4 x double*> %ptrs, i32 zeroext %evl) {
1452; RV32-LABEL: vpscatter_truemask_nxv4f64:
1453; RV32:       # %bb.0:
1454; RV32-NEXT:    vsetvli zero, a0, e64, m4, ta, mu
1455; RV32-NEXT:    vsoxei32.v v8, (zero), v12
1456; RV32-NEXT:    ret
1457;
1458; RV64-LABEL: vpscatter_truemask_nxv4f64:
1459; RV64:       # %bb.0:
1460; RV64-NEXT:    vsetvli zero, a0, e64, m4, ta, mu
1461; RV64-NEXT:    vsoxei64.v v8, (zero), v12
1462; RV64-NEXT:    ret
1463  %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0
1464  %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
1465  call void @llvm.vp.scatter.nxv4f64.nxv4p0f64(<vscale x 4 x double> %val, <vscale x 4 x double*> %ptrs, <vscale x 4 x i1> %mtrue, i32 %evl)
1466  ret void
1467}
1468
1469declare void @llvm.vp.scatter.nxv8f64.nxv8p0f64(<vscale x 8 x double>, <vscale x 8 x double*>, <vscale x 8 x i1>, i32)
1470
1471define void @vpscatter_nxv8f64(<vscale x 8 x double> %val, <vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1472; RV32-LABEL: vpscatter_nxv8f64:
1473; RV32:       # %bb.0:
1474; RV32-NEXT:    vsetvli zero, a0, e64, m8, ta, mu
1475; RV32-NEXT:    vsoxei32.v v8, (zero), v16, v0.t
1476; RV32-NEXT:    ret
1477;
1478; RV64-LABEL: vpscatter_nxv8f64:
1479; RV64:       # %bb.0:
1480; RV64-NEXT:    vsetvli zero, a0, e64, m8, ta, mu
1481; RV64-NEXT:    vsoxei64.v v8, (zero), v16, v0.t
1482; RV64-NEXT:    ret
1483  call void @llvm.vp.scatter.nxv8f64.nxv8p0f64(<vscale x 8 x double> %val, <vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
1484  ret void
1485}
1486
1487define void @vpscatter_baseidx_nxv8i8_nxv8f64(<vscale x 8 x double> %val, double* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1488; RV32-LABEL: vpscatter_baseidx_nxv8i8_nxv8f64:
1489; RV32:       # %bb.0:
1490; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
1491; RV32-NEXT:    vsext.vf4 v20, v16
1492; RV32-NEXT:    vsll.vi v16, v20, 3
1493; RV32-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
1494; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t
1495; RV32-NEXT:    ret
1496;
1497; RV64-LABEL: vpscatter_baseidx_nxv8i8_nxv8f64:
1498; RV64:       # %bb.0:
1499; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
1500; RV64-NEXT:    vsext.vf8 v24, v16
1501; RV64-NEXT:    vsll.vi v16, v24, 3
1502; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
1503; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
1504; RV64-NEXT:    ret
1505  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i8> %idxs
1506  call void @llvm.vp.scatter.nxv8f64.nxv8p0f64(<vscale x 8 x double> %val, <vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
1507  ret void
1508}
1509
1510define void @vpscatter_baseidx_sext_nxv8i8_nxv8f64(<vscale x 8 x double> %val, double* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1511; CHECK-LABEL: vpscatter_baseidx_sext_nxv8i8_nxv8f64:
1512; CHECK:       # %bb.0:
1513; CHECK-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
1514; CHECK-NEXT:    vsext.vf8 v24, v16
1515; CHECK-NEXT:    vsll.vi v16, v24, 3
1516; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
1517; CHECK-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
1518; CHECK-NEXT:    ret
1519  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>
1520  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs
1521  call void @llvm.vp.scatter.nxv8f64.nxv8p0f64(<vscale x 8 x double> %val, <vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
1522  ret void
1523}
1524
1525define void @vpscatter_baseidx_zext_nxv8i8_nxv8f64(<vscale x 8 x double> %val, double* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1526; CHECK-LABEL: vpscatter_baseidx_zext_nxv8i8_nxv8f64:
1527; CHECK:       # %bb.0:
1528; CHECK-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
1529; CHECK-NEXT:    vzext.vf8 v24, v16
1530; CHECK-NEXT:    vsll.vi v16, v24, 3
1531; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
1532; CHECK-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
1533; CHECK-NEXT:    ret
1534  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>
1535  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs
1536  call void @llvm.vp.scatter.nxv8f64.nxv8p0f64(<vscale x 8 x double> %val, <vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
1537  ret void
1538}
1539
1540define void @vpscatter_baseidx_nxv8i16_nxv8f64(<vscale x 8 x double> %val, double* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1541; RV32-LABEL: vpscatter_baseidx_nxv8i16_nxv8f64:
1542; RV32:       # %bb.0:
1543; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
1544; RV32-NEXT:    vsext.vf2 v20, v16
1545; RV32-NEXT:    vsll.vi v16, v20, 3
1546; RV32-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
1547; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t
1548; RV32-NEXT:    ret
1549;
1550; RV64-LABEL: vpscatter_baseidx_nxv8i16_nxv8f64:
1551; RV64:       # %bb.0:
1552; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
1553; RV64-NEXT:    vsext.vf4 v24, v16
1554; RV64-NEXT:    vsll.vi v16, v24, 3
1555; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
1556; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
1557; RV64-NEXT:    ret
1558  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i16> %idxs
1559  call void @llvm.vp.scatter.nxv8f64.nxv8p0f64(<vscale x 8 x double> %val, <vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
1560  ret void
1561}
1562
1563define void @vpscatter_baseidx_sext_nxv8i16_nxv8f64(<vscale x 8 x double> %val, double* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1564; CHECK-LABEL: vpscatter_baseidx_sext_nxv8i16_nxv8f64:
1565; CHECK:       # %bb.0:
1566; CHECK-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
1567; CHECK-NEXT:    vsext.vf4 v24, v16
1568; CHECK-NEXT:    vsll.vi v16, v24, 3
1569; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
1570; CHECK-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
1571; CHECK-NEXT:    ret
1572  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>
1573  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs
1574  call void @llvm.vp.scatter.nxv8f64.nxv8p0f64(<vscale x 8 x double> %val, <vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
1575  ret void
1576}
1577
1578define void @vpscatter_baseidx_zext_nxv8i16_nxv8f64(<vscale x 8 x double> %val, double* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1579; CHECK-LABEL: vpscatter_baseidx_zext_nxv8i16_nxv8f64:
1580; CHECK:       # %bb.0:
1581; CHECK-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
1582; CHECK-NEXT:    vzext.vf4 v24, v16
1583; CHECK-NEXT:    vsll.vi v16, v24, 3
1584; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
1585; CHECK-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
1586; CHECK-NEXT:    ret
1587  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>
1588  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs
1589  call void @llvm.vp.scatter.nxv8f64.nxv8p0f64(<vscale x 8 x double> %val, <vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
1590  ret void
1591}
1592
1593define void @vpscatter_baseidx_nxv8i32_nxv8f64(<vscale x 8 x double> %val, double* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1594; RV32-LABEL: vpscatter_baseidx_nxv8i32_nxv8f64:
1595; RV32:       # %bb.0:
1596; RV32-NEXT:    vsetvli a2, zero, e32, m4, ta, mu
1597; RV32-NEXT:    vsll.vi v16, v16, 3
1598; RV32-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
1599; RV32-NEXT:    vsoxei32.v v8, (a0), v16, v0.t
1600; RV32-NEXT:    ret
1601;
1602; RV64-LABEL: vpscatter_baseidx_nxv8i32_nxv8f64:
1603; RV64:       # %bb.0:
1604; RV64-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
1605; RV64-NEXT:    vsext.vf2 v24, v16
1606; RV64-NEXT:    vsll.vi v16, v24, 3
1607; RV64-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
1608; RV64-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
1609; RV64-NEXT:    ret
1610  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i32> %idxs
1611  call void @llvm.vp.scatter.nxv8f64.nxv8p0f64(<vscale x 8 x double> %val, <vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
1612  ret void
1613}
1614
1615define void @vpscatter_baseidx_sext_nxv8i32_nxv8f64(<vscale x 8 x double> %val, double* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1616; CHECK-LABEL: vpscatter_baseidx_sext_nxv8i32_nxv8f64:
1617; CHECK:       # %bb.0:
1618; CHECK-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
1619; CHECK-NEXT:    vsext.vf2 v24, v16
1620; CHECK-NEXT:    vsll.vi v16, v24, 3
1621; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
1622; CHECK-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
1623; CHECK-NEXT:    ret
1624  %eidxs = sext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>
1625  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs
1626  call void @llvm.vp.scatter.nxv8f64.nxv8p0f64(<vscale x 8 x double> %val, <vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
1627  ret void
1628}
1629
1630define void @vpscatter_baseidx_zext_nxv8i32_nxv8f64(<vscale x 8 x double> %val, double* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1631; CHECK-LABEL: vpscatter_baseidx_zext_nxv8i32_nxv8f64:
1632; CHECK:       # %bb.0:
1633; CHECK-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
1634; CHECK-NEXT:    vzext.vf2 v24, v16
1635; CHECK-NEXT:    vsll.vi v16, v24, 3
1636; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
1637; CHECK-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
1638; CHECK-NEXT:    ret
1639  %eidxs = zext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>
1640  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs
1641  call void @llvm.vp.scatter.nxv8f64.nxv8p0f64(<vscale x 8 x double> %val, <vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
1642  ret void
1643}
1644
1645define void @vpscatter_baseidx_nxv8f64(<vscale x 8 x double> %val, double* %base, <vscale x 8 x i64> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) {
1646; CHECK-LABEL: vpscatter_baseidx_nxv8f64:
1647; CHECK:       # %bb.0:
1648; CHECK-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
1649; CHECK-NEXT:    vsll.vi v16, v16, 3
1650; CHECK-NEXT:    vsetvli zero, a1, e64, m8, ta, mu
1651; CHECK-NEXT:    vsoxei64.v v8, (a0), v16, v0.t
1652; CHECK-NEXT:    ret
1653  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %idxs
1654  call void @llvm.vp.scatter.nxv8f64.nxv8p0f64(<vscale x 8 x double> %val, <vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl)
1655  ret void
1656}
1657