1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+experimental-zvfh,+v \ 3; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RV32 4; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+experimental-zvfh,+v \ 5; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RV64 6 7declare <vscale x 1 x i8> @llvm.vp.gather.nxv1i8.nxv1p0i8(<vscale x 1 x i8*>, <vscale x 1 x i1>, i32) 8 9define <vscale x 1 x i8> @vpgather_nxv1i8(<vscale x 1 x i8*> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) { 10; RV32-LABEL: vpgather_nxv1i8: 11; RV32: # %bb.0: 12; RV32-NEXT: vsetvli zero, a0, e8, mf8, ta, mu 13; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 14; RV32-NEXT: vmv1r.v v8, v9 15; RV32-NEXT: ret 16; 17; RV64-LABEL: vpgather_nxv1i8: 18; RV64: # %bb.0: 19; RV64-NEXT: vsetvli zero, a0, e8, mf8, ta, mu 20; RV64-NEXT: vluxei64.v v9, (zero), v8, v0.t 21; RV64-NEXT: vmv1r.v v8, v9 22; RV64-NEXT: ret 23 %v = call <vscale x 1 x i8> @llvm.vp.gather.nxv1i8.nxv1p0i8(<vscale x 1 x i8*> %ptrs, <vscale x 1 x i1> %m, i32 %evl) 24 ret <vscale x 1 x i8> %v 25} 26 27declare <vscale x 2 x i8> @llvm.vp.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*>, <vscale x 2 x i1>, i32) 28 29define <vscale x 2 x i8> @vpgather_nxv2i8(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 30; RV32-LABEL: vpgather_nxv2i8: 31; RV32: # %bb.0: 32; RV32-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 33; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 34; RV32-NEXT: vmv1r.v v8, v9 35; RV32-NEXT: ret 36; 37; RV64-LABEL: vpgather_nxv2i8: 38; RV64: # %bb.0: 39; RV64-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 40; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 41; RV64-NEXT: vmv1r.v v8, v10 42; RV64-NEXT: ret 43 %v = call <vscale x 2 x i8> @llvm.vp.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 44 ret <vscale x 2 x i8> %v 45} 46 47define <vscale x 2 x i16> @vpgather_nxv2i8_sextload_nxv2i16(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 48; RV32-LABEL: vpgather_nxv2i8_sextload_nxv2i16: 49; RV32: # %bb.0: 50; RV32-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 51; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 52; RV32-NEXT: vsetvli a0, zero, e16, mf2, ta, mu 53; RV32-NEXT: vsext.vf2 v8, v9 54; RV32-NEXT: ret 55; 56; RV64-LABEL: vpgather_nxv2i8_sextload_nxv2i16: 57; RV64: # %bb.0: 58; RV64-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 59; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 60; RV64-NEXT: vsetvli a0, zero, e16, mf2, ta, mu 61; RV64-NEXT: vsext.vf2 v8, v10 62; RV64-NEXT: ret 63 %v = call <vscale x 2 x i8> @llvm.vp.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 64 %ev = sext <vscale x 2 x i8> %v to <vscale x 2 x i16> 65 ret <vscale x 2 x i16> %ev 66} 67 68define <vscale x 2 x i16> @vpgather_nxv2i8_zextload_nxv2i16(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 69; RV32-LABEL: vpgather_nxv2i8_zextload_nxv2i16: 70; RV32: # %bb.0: 71; RV32-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 72; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 73; RV32-NEXT: vsetvli a0, zero, e16, mf2, ta, mu 74; RV32-NEXT: vzext.vf2 v8, v9 75; RV32-NEXT: ret 76; 77; RV64-LABEL: vpgather_nxv2i8_zextload_nxv2i16: 78; RV64: # %bb.0: 79; RV64-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 80; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 81; RV64-NEXT: vsetvli a0, zero, e16, mf2, ta, mu 82; RV64-NEXT: vzext.vf2 v8, v10 83; RV64-NEXT: ret 84 %v = call <vscale x 2 x i8> @llvm.vp.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 85 %ev = zext <vscale x 2 x i8> %v to <vscale x 2 x i16> 86 ret <vscale x 2 x i16> %ev 87} 88 89define <vscale x 2 x i32> @vpgather_nxv2i8_sextload_nxv2i32(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 90; RV32-LABEL: vpgather_nxv2i8_sextload_nxv2i32: 91; RV32: # %bb.0: 92; RV32-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 93; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 94; RV32-NEXT: vsetvli a0, zero, e32, m1, ta, mu 95; RV32-NEXT: vsext.vf4 v8, v9 96; RV32-NEXT: ret 97; 98; RV64-LABEL: vpgather_nxv2i8_sextload_nxv2i32: 99; RV64: # %bb.0: 100; RV64-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 101; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 102; RV64-NEXT: vsetvli a0, zero, e32, m1, ta, mu 103; RV64-NEXT: vsext.vf4 v8, v10 104; RV64-NEXT: ret 105 %v = call <vscale x 2 x i8> @llvm.vp.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 106 %ev = sext <vscale x 2 x i8> %v to <vscale x 2 x i32> 107 ret <vscale x 2 x i32> %ev 108} 109 110define <vscale x 2 x i32> @vpgather_nxv2i8_zextload_nxv2i32(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 111; RV32-LABEL: vpgather_nxv2i8_zextload_nxv2i32: 112; RV32: # %bb.0: 113; RV32-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 114; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 115; RV32-NEXT: vsetvli a0, zero, e32, m1, ta, mu 116; RV32-NEXT: vzext.vf4 v8, v9 117; RV32-NEXT: ret 118; 119; RV64-LABEL: vpgather_nxv2i8_zextload_nxv2i32: 120; RV64: # %bb.0: 121; RV64-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 122; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 123; RV64-NEXT: vsetvli a0, zero, e32, m1, ta, mu 124; RV64-NEXT: vzext.vf4 v8, v10 125; RV64-NEXT: ret 126 %v = call <vscale x 2 x i8> @llvm.vp.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 127 %ev = zext <vscale x 2 x i8> %v to <vscale x 2 x i32> 128 ret <vscale x 2 x i32> %ev 129} 130 131define <vscale x 2 x i64> @vpgather_nxv2i8_sextload_nxv2i64(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 132; RV32-LABEL: vpgather_nxv2i8_sextload_nxv2i64: 133; RV32: # %bb.0: 134; RV32-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 135; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 136; RV32-NEXT: vsetvli a0, zero, e64, m2, ta, mu 137; RV32-NEXT: vsext.vf8 v8, v10 138; RV32-NEXT: ret 139; 140; RV64-LABEL: vpgather_nxv2i8_sextload_nxv2i64: 141; RV64: # %bb.0: 142; RV64-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 143; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 144; RV64-NEXT: vsetvli a0, zero, e64, m2, ta, mu 145; RV64-NEXT: vsext.vf8 v8, v10 146; RV64-NEXT: ret 147 %v = call <vscale x 2 x i8> @llvm.vp.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 148 %ev = sext <vscale x 2 x i8> %v to <vscale x 2 x i64> 149 ret <vscale x 2 x i64> %ev 150} 151 152define <vscale x 2 x i64> @vpgather_nxv2i8_zextload_nxv2i64(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 153; RV32-LABEL: vpgather_nxv2i8_zextload_nxv2i64: 154; RV32: # %bb.0: 155; RV32-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 156; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 157; RV32-NEXT: vsetvli a0, zero, e64, m2, ta, mu 158; RV32-NEXT: vzext.vf8 v8, v10 159; RV32-NEXT: ret 160; 161; RV64-LABEL: vpgather_nxv2i8_zextload_nxv2i64: 162; RV64: # %bb.0: 163; RV64-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 164; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 165; RV64-NEXT: vsetvli a0, zero, e64, m2, ta, mu 166; RV64-NEXT: vzext.vf8 v8, v10 167; RV64-NEXT: ret 168 %v = call <vscale x 2 x i8> @llvm.vp.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 169 %ev = zext <vscale x 2 x i8> %v to <vscale x 2 x i64> 170 ret <vscale x 2 x i64> %ev 171} 172 173declare <vscale x 4 x i8> @llvm.vp.gather.nxv4i8.nxv4p0i8(<vscale x 4 x i8*>, <vscale x 4 x i1>, i32) 174 175define <vscale x 4 x i8> @vpgather_nxv4i8(<vscale x 4 x i8*> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) { 176; RV32-LABEL: vpgather_nxv4i8: 177; RV32: # %bb.0: 178; RV32-NEXT: vsetvli zero, a0, e8, mf2, ta, mu 179; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 180; RV32-NEXT: vmv1r.v v8, v10 181; RV32-NEXT: ret 182; 183; RV64-LABEL: vpgather_nxv4i8: 184; RV64: # %bb.0: 185; RV64-NEXT: vsetvli zero, a0, e8, mf2, ta, mu 186; RV64-NEXT: vluxei64.v v12, (zero), v8, v0.t 187; RV64-NEXT: vmv1r.v v8, v12 188; RV64-NEXT: ret 189 %v = call <vscale x 4 x i8> @llvm.vp.gather.nxv4i8.nxv4p0i8(<vscale x 4 x i8*> %ptrs, <vscale x 4 x i1> %m, i32 %evl) 190 ret <vscale x 4 x i8> %v 191} 192 193define <vscale x 4 x i8> @vpgather_truemask_nxv4i8(<vscale x 4 x i8*> %ptrs, i32 zeroext %evl) { 194; RV32-LABEL: vpgather_truemask_nxv4i8: 195; RV32: # %bb.0: 196; RV32-NEXT: vsetvli zero, a0, e8, mf2, ta, mu 197; RV32-NEXT: vluxei32.v v10, (zero), v8 198; RV32-NEXT: vmv1r.v v8, v10 199; RV32-NEXT: ret 200; 201; RV64-LABEL: vpgather_truemask_nxv4i8: 202; RV64: # %bb.0: 203; RV64-NEXT: vsetvli zero, a0, e8, mf2, ta, mu 204; RV64-NEXT: vluxei64.v v12, (zero), v8 205; RV64-NEXT: vmv1r.v v8, v12 206; RV64-NEXT: ret 207 %mhead = insertelement <vscale x 4 x i1> poison, i1 1, i32 0 208 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer 209 %v = call <vscale x 4 x i8> @llvm.vp.gather.nxv4i8.nxv4p0i8(<vscale x 4 x i8*> %ptrs, <vscale x 4 x i1> %mtrue, i32 %evl) 210 ret <vscale x 4 x i8> %v 211} 212 213declare <vscale x 8 x i8> @llvm.vp.gather.nxv8i8.nxv8p0i8(<vscale x 8 x i8*>, <vscale x 8 x i1>, i32) 214 215define <vscale x 8 x i8> @vpgather_nxv8i8(<vscale x 8 x i8*> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 216; RV32-LABEL: vpgather_nxv8i8: 217; RV32: # %bb.0: 218; RV32-NEXT: vsetvli zero, a0, e8, m1, ta, mu 219; RV32-NEXT: vluxei32.v v12, (zero), v8, v0.t 220; RV32-NEXT: vmv.v.v v8, v12 221; RV32-NEXT: ret 222; 223; RV64-LABEL: vpgather_nxv8i8: 224; RV64: # %bb.0: 225; RV64-NEXT: vsetvli zero, a0, e8, m1, ta, mu 226; RV64-NEXT: vluxei64.v v16, (zero), v8, v0.t 227; RV64-NEXT: vmv.v.v v8, v16 228; RV64-NEXT: ret 229 %v = call <vscale x 8 x i8> @llvm.vp.gather.nxv8i8.nxv8p0i8(<vscale x 8 x i8*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 230 ret <vscale x 8 x i8> %v 231} 232 233define <vscale x 8 x i8> @vpgather_baseidx_nxv8i8(i8* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 234; RV32-LABEL: vpgather_baseidx_nxv8i8: 235; RV32: # %bb.0: 236; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 237; RV32-NEXT: vsext.vf4 v12, v8 238; RV32-NEXT: vsetvli zero, a1, e8, m1, ta, mu 239; RV32-NEXT: vluxei32.v v8, (a0), v12, v0.t 240; RV32-NEXT: ret 241; 242; RV64-LABEL: vpgather_baseidx_nxv8i8: 243; RV64: # %bb.0: 244; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 245; RV64-NEXT: vsext.vf8 v16, v8 246; RV64-NEXT: vsetvli zero, a1, e8, m1, ta, mu 247; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 248; RV64-NEXT: ret 249 %ptrs = getelementptr inbounds i8, i8* %base, <vscale x 8 x i8> %idxs 250 %v = call <vscale x 8 x i8> @llvm.vp.gather.nxv8i8.nxv8p0i8(<vscale x 8 x i8*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 251 ret <vscale x 8 x i8> %v 252} 253 254declare <vscale x 32 x i8> @llvm.vp.gather.nxv32i8.nxv32p0i8(<vscale x 32 x i8*>, <vscale x 32 x i1>, i32) 255 256define <vscale x 32 x i8> @vpgather_baseidx_nxv32i8(i8* %base, <vscale x 32 x i8> %idxs, <vscale x 32 x i1> %m, i32 zeroext %evl) { 257; RV32-LABEL: vpgather_baseidx_nxv32i8: 258; RV32: # %bb.0: 259; RV32-NEXT: vmv1r.v v12, v0 260; RV32-NEXT: li a3, 0 261; RV32-NEXT: csrr a2, vlenb 262; RV32-NEXT: srli a5, a2, 2 263; RV32-NEXT: vsetvli a4, zero, e8, mf2, ta, mu 264; RV32-NEXT: slli a2, a2, 1 265; RV32-NEXT: sub a4, a1, a2 266; RV32-NEXT: vslidedown.vx v0, v0, a5 267; RV32-NEXT: bltu a1, a4, .LBB12_2 268; RV32-NEXT: # %bb.1: 269; RV32-NEXT: mv a3, a4 270; RV32-NEXT: .LBB12_2: 271; RV32-NEXT: vsetvli a4, zero, e32, m8, ta, mu 272; RV32-NEXT: vsext.vf4 v16, v10 273; RV32-NEXT: vsetvli zero, a3, e8, m2, ta, mu 274; RV32-NEXT: vluxei32.v v10, (a0), v16, v0.t 275; RV32-NEXT: bltu a1, a2, .LBB12_4 276; RV32-NEXT: # %bb.3: 277; RV32-NEXT: mv a1, a2 278; RV32-NEXT: .LBB12_4: 279; RV32-NEXT: vsetvli a2, zero, e32, m8, ta, mu 280; RV32-NEXT: vsext.vf4 v16, v8 281; RV32-NEXT: vsetvli zero, a1, e8, m2, ta, mu 282; RV32-NEXT: vmv1r.v v0, v12 283; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 284; RV32-NEXT: ret 285; 286; RV64-LABEL: vpgather_baseidx_nxv32i8: 287; RV64: # %bb.0: 288; RV64-NEXT: csrr a3, vlenb 289; RV64-NEXT: slli a5, a3, 1 290; RV64-NEXT: sub a6, a1, a5 291; RV64-NEXT: vmv1r.v v12, v0 292; RV64-NEXT: li a4, 0 293; RV64-NEXT: li a2, 0 294; RV64-NEXT: bltu a1, a6, .LBB12_2 295; RV64-NEXT: # %bb.1: 296; RV64-NEXT: mv a2, a6 297; RV64-NEXT: .LBB12_2: 298; RV64-NEXT: sub a6, a2, a3 299; RV64-NEXT: mv a7, a4 300; RV64-NEXT: bltu a2, a6, .LBB12_4 301; RV64-NEXT: # %bb.3: 302; RV64-NEXT: mv a7, a6 303; RV64-NEXT: .LBB12_4: 304; RV64-NEXT: srli a6, a3, 2 305; RV64-NEXT: vsetvli t0, zero, e8, mf2, ta, mu 306; RV64-NEXT: vslidedown.vx v13, v12, a6 307; RV64-NEXT: srli a6, a3, 3 308; RV64-NEXT: vsetvli t0, zero, e8, mf4, ta, mu 309; RV64-NEXT: vslidedown.vx v0, v13, a6 310; RV64-NEXT: vsetvli t0, zero, e64, m8, ta, mu 311; RV64-NEXT: vsext.vf8 v16, v11 312; RV64-NEXT: vsetvli zero, a7, e8, m1, ta, mu 313; RV64-NEXT: vluxei64.v v11, (a0), v16, v0.t 314; RV64-NEXT: bltu a1, a5, .LBB12_6 315; RV64-NEXT: # %bb.5: 316; RV64-NEXT: mv a1, a5 317; RV64-NEXT: .LBB12_6: 318; RV64-NEXT: sub a5, a1, a3 319; RV64-NEXT: bltu a1, a5, .LBB12_8 320; RV64-NEXT: # %bb.7: 321; RV64-NEXT: mv a4, a5 322; RV64-NEXT: .LBB12_8: 323; RV64-NEXT: vsetvli a5, zero, e8, mf4, ta, mu 324; RV64-NEXT: vslidedown.vx v0, v12, a6 325; RV64-NEXT: vsetvli a5, zero, e64, m8, ta, mu 326; RV64-NEXT: vsext.vf8 v16, v9 327; RV64-NEXT: vsetvli zero, a4, e8, m1, ta, mu 328; RV64-NEXT: vluxei64.v v9, (a0), v16, v0.t 329; RV64-NEXT: bltu a1, a3, .LBB12_10 330; RV64-NEXT: # %bb.9: 331; RV64-NEXT: mv a1, a3 332; RV64-NEXT: .LBB12_10: 333; RV64-NEXT: vsetvli a4, zero, e64, m8, ta, mu 334; RV64-NEXT: vsext.vf8 v16, v8 335; RV64-NEXT: vsetvli zero, a1, e8, m1, ta, mu 336; RV64-NEXT: vmv1r.v v0, v12 337; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 338; RV64-NEXT: bltu a2, a3, .LBB12_12 339; RV64-NEXT: # %bb.11: 340; RV64-NEXT: mv a2, a3 341; RV64-NEXT: .LBB12_12: 342; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 343; RV64-NEXT: vsext.vf8 v16, v10 344; RV64-NEXT: vsetvli zero, a2, e8, m1, ta, mu 345; RV64-NEXT: vmv1r.v v0, v13 346; RV64-NEXT: vluxei64.v v10, (a0), v16, v0.t 347; RV64-NEXT: ret 348 %ptrs = getelementptr inbounds i8, i8* %base, <vscale x 32 x i8> %idxs 349 %v = call <vscale x 32 x i8> @llvm.vp.gather.nxv32i8.nxv32p0i8(<vscale x 32 x i8*> %ptrs, <vscale x 32 x i1> %m, i32 %evl) 350 ret <vscale x 32 x i8> %v 351} 352 353declare <vscale x 1 x i16> @llvm.vp.gather.nxv1i16.nxv1p0i16(<vscale x 1 x i16*>, <vscale x 1 x i1>, i32) 354 355define <vscale x 1 x i16> @vpgather_nxv1i16(<vscale x 1 x i16*> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) { 356; RV32-LABEL: vpgather_nxv1i16: 357; RV32: # %bb.0: 358; RV32-NEXT: vsetvli zero, a0, e16, mf4, ta, mu 359; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 360; RV32-NEXT: vmv1r.v v8, v9 361; RV32-NEXT: ret 362; 363; RV64-LABEL: vpgather_nxv1i16: 364; RV64: # %bb.0: 365; RV64-NEXT: vsetvli zero, a0, e16, mf4, ta, mu 366; RV64-NEXT: vluxei64.v v9, (zero), v8, v0.t 367; RV64-NEXT: vmv1r.v v8, v9 368; RV64-NEXT: ret 369 %v = call <vscale x 1 x i16> @llvm.vp.gather.nxv1i16.nxv1p0i16(<vscale x 1 x i16*> %ptrs, <vscale x 1 x i1> %m, i32 %evl) 370 ret <vscale x 1 x i16> %v 371} 372 373declare <vscale x 2 x i16> @llvm.vp.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*>, <vscale x 2 x i1>, i32) 374 375define <vscale x 2 x i16> @vpgather_nxv2i16(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 376; RV32-LABEL: vpgather_nxv2i16: 377; RV32: # %bb.0: 378; RV32-NEXT: vsetvli zero, a0, e16, mf2, ta, mu 379; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 380; RV32-NEXT: vmv1r.v v8, v9 381; RV32-NEXT: ret 382; 383; RV64-LABEL: vpgather_nxv2i16: 384; RV64: # %bb.0: 385; RV64-NEXT: vsetvli zero, a0, e16, mf2, ta, mu 386; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 387; RV64-NEXT: vmv1r.v v8, v10 388; RV64-NEXT: ret 389 %v = call <vscale x 2 x i16> @llvm.vp.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 390 ret <vscale x 2 x i16> %v 391} 392 393define <vscale x 2 x i32> @vpgather_nxv2i16_sextload_nxv2i32(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 394; RV32-LABEL: vpgather_nxv2i16_sextload_nxv2i32: 395; RV32: # %bb.0: 396; RV32-NEXT: vsetvli zero, a0, e16, mf2, ta, mu 397; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 398; RV32-NEXT: vsetvli a0, zero, e32, m1, ta, mu 399; RV32-NEXT: vsext.vf2 v8, v9 400; RV32-NEXT: ret 401; 402; RV64-LABEL: vpgather_nxv2i16_sextload_nxv2i32: 403; RV64: # %bb.0: 404; RV64-NEXT: vsetvli zero, a0, e16, mf2, ta, mu 405; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 406; RV64-NEXT: vsetvli a0, zero, e32, m1, ta, mu 407; RV64-NEXT: vsext.vf2 v8, v10 408; RV64-NEXT: ret 409 %v = call <vscale x 2 x i16> @llvm.vp.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 410 %ev = sext <vscale x 2 x i16> %v to <vscale x 2 x i32> 411 ret <vscale x 2 x i32> %ev 412} 413 414define <vscale x 2 x i32> @vpgather_nxv2i16_zextload_nxv2i32(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 415; RV32-LABEL: vpgather_nxv2i16_zextload_nxv2i32: 416; RV32: # %bb.0: 417; RV32-NEXT: vsetvli zero, a0, e16, mf2, ta, mu 418; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 419; RV32-NEXT: vsetvli a0, zero, e32, m1, ta, mu 420; RV32-NEXT: vzext.vf2 v8, v9 421; RV32-NEXT: ret 422; 423; RV64-LABEL: vpgather_nxv2i16_zextload_nxv2i32: 424; RV64: # %bb.0: 425; RV64-NEXT: vsetvli zero, a0, e16, mf2, ta, mu 426; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 427; RV64-NEXT: vsetvli a0, zero, e32, m1, ta, mu 428; RV64-NEXT: vzext.vf2 v8, v10 429; RV64-NEXT: ret 430 %v = call <vscale x 2 x i16> @llvm.vp.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 431 %ev = zext <vscale x 2 x i16> %v to <vscale x 2 x i32> 432 ret <vscale x 2 x i32> %ev 433} 434 435define <vscale x 2 x i64> @vpgather_nxv2i16_sextload_nxv2i64(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 436; RV32-LABEL: vpgather_nxv2i16_sextload_nxv2i64: 437; RV32: # %bb.0: 438; RV32-NEXT: vsetvli zero, a0, e16, mf2, ta, mu 439; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 440; RV32-NEXT: vsetvli a0, zero, e64, m2, ta, mu 441; RV32-NEXT: vsext.vf4 v8, v10 442; RV32-NEXT: ret 443; 444; RV64-LABEL: vpgather_nxv2i16_sextload_nxv2i64: 445; RV64: # %bb.0: 446; RV64-NEXT: vsetvli zero, a0, e16, mf2, ta, mu 447; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 448; RV64-NEXT: vsetvli a0, zero, e64, m2, ta, mu 449; RV64-NEXT: vsext.vf4 v8, v10 450; RV64-NEXT: ret 451 %v = call <vscale x 2 x i16> @llvm.vp.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 452 %ev = sext <vscale x 2 x i16> %v to <vscale x 2 x i64> 453 ret <vscale x 2 x i64> %ev 454} 455 456define <vscale x 2 x i64> @vpgather_nxv2i16_zextload_nxv2i64(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 457; RV32-LABEL: vpgather_nxv2i16_zextload_nxv2i64: 458; RV32: # %bb.0: 459; RV32-NEXT: vsetvli zero, a0, e16, mf2, ta, mu 460; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 461; RV32-NEXT: vsetvli a0, zero, e64, m2, ta, mu 462; RV32-NEXT: vzext.vf4 v8, v10 463; RV32-NEXT: ret 464; 465; RV64-LABEL: vpgather_nxv2i16_zextload_nxv2i64: 466; RV64: # %bb.0: 467; RV64-NEXT: vsetvli zero, a0, e16, mf2, ta, mu 468; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 469; RV64-NEXT: vsetvli a0, zero, e64, m2, ta, mu 470; RV64-NEXT: vzext.vf4 v8, v10 471; RV64-NEXT: ret 472 %v = call <vscale x 2 x i16> @llvm.vp.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 473 %ev = zext <vscale x 2 x i16> %v to <vscale x 2 x i64> 474 ret <vscale x 2 x i64> %ev 475} 476 477declare <vscale x 4 x i16> @llvm.vp.gather.nxv4i16.nxv4p0i16(<vscale x 4 x i16*>, <vscale x 4 x i1>, i32) 478 479define <vscale x 4 x i16> @vpgather_nxv4i16(<vscale x 4 x i16*> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) { 480; RV32-LABEL: vpgather_nxv4i16: 481; RV32: # %bb.0: 482; RV32-NEXT: vsetvli zero, a0, e16, m1, ta, mu 483; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 484; RV32-NEXT: vmv.v.v v8, v10 485; RV32-NEXT: ret 486; 487; RV64-LABEL: vpgather_nxv4i16: 488; RV64: # %bb.0: 489; RV64-NEXT: vsetvli zero, a0, e16, m1, ta, mu 490; RV64-NEXT: vluxei64.v v12, (zero), v8, v0.t 491; RV64-NEXT: vmv.v.v v8, v12 492; RV64-NEXT: ret 493 %v = call <vscale x 4 x i16> @llvm.vp.gather.nxv4i16.nxv4p0i16(<vscale x 4 x i16*> %ptrs, <vscale x 4 x i1> %m, i32 %evl) 494 ret <vscale x 4 x i16> %v 495} 496 497define <vscale x 4 x i16> @vpgather_truemask_nxv4i16(<vscale x 4 x i16*> %ptrs, i32 zeroext %evl) { 498; RV32-LABEL: vpgather_truemask_nxv4i16: 499; RV32: # %bb.0: 500; RV32-NEXT: vsetvli zero, a0, e16, m1, ta, mu 501; RV32-NEXT: vluxei32.v v10, (zero), v8 502; RV32-NEXT: vmv.v.v v8, v10 503; RV32-NEXT: ret 504; 505; RV64-LABEL: vpgather_truemask_nxv4i16: 506; RV64: # %bb.0: 507; RV64-NEXT: vsetvli zero, a0, e16, m1, ta, mu 508; RV64-NEXT: vluxei64.v v12, (zero), v8 509; RV64-NEXT: vmv.v.v v8, v12 510; RV64-NEXT: ret 511 %mhead = insertelement <vscale x 4 x i1> poison, i1 1, i32 0 512 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer 513 %v = call <vscale x 4 x i16> @llvm.vp.gather.nxv4i16.nxv4p0i16(<vscale x 4 x i16*> %ptrs, <vscale x 4 x i1> %mtrue, i32 %evl) 514 ret <vscale x 4 x i16> %v 515} 516 517declare <vscale x 8 x i16> @llvm.vp.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*>, <vscale x 8 x i1>, i32) 518 519define <vscale x 8 x i16> @vpgather_nxv8i16(<vscale x 8 x i16*> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 520; RV32-LABEL: vpgather_nxv8i16: 521; RV32: # %bb.0: 522; RV32-NEXT: vsetvli zero, a0, e16, m2, ta, mu 523; RV32-NEXT: vluxei32.v v12, (zero), v8, v0.t 524; RV32-NEXT: vmv.v.v v8, v12 525; RV32-NEXT: ret 526; 527; RV64-LABEL: vpgather_nxv8i16: 528; RV64: # %bb.0: 529; RV64-NEXT: vsetvli zero, a0, e16, m2, ta, mu 530; RV64-NEXT: vluxei64.v v16, (zero), v8, v0.t 531; RV64-NEXT: vmv.v.v v8, v16 532; RV64-NEXT: ret 533 %v = call <vscale x 8 x i16> @llvm.vp.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 534 ret <vscale x 8 x i16> %v 535} 536 537define <vscale x 8 x i16> @vpgather_baseidx_nxv8i8_nxv8i16(i16* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 538; RV32-LABEL: vpgather_baseidx_nxv8i8_nxv8i16: 539; RV32: # %bb.0: 540; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 541; RV32-NEXT: vsext.vf4 v12, v8 542; RV32-NEXT: vadd.vv v12, v12, v12 543; RV32-NEXT: vsetvli zero, a1, e16, m2, ta, mu 544; RV32-NEXT: vluxei32.v v8, (a0), v12, v0.t 545; RV32-NEXT: ret 546; 547; RV64-LABEL: vpgather_baseidx_nxv8i8_nxv8i16: 548; RV64: # %bb.0: 549; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 550; RV64-NEXT: vsext.vf8 v16, v8 551; RV64-NEXT: vadd.vv v16, v16, v16 552; RV64-NEXT: vsetvli zero, a1, e16, m2, ta, mu 553; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 554; RV64-NEXT: ret 555 %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i8> %idxs 556 %v = call <vscale x 8 x i16> @llvm.vp.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 557 ret <vscale x 8 x i16> %v 558} 559 560define <vscale x 8 x i16> @vpgather_baseidx_sext_nxv8i8_nxv8i16(i16* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 561; RV32-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8i16: 562; RV32: # %bb.0: 563; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 564; RV32-NEXT: vsext.vf4 v12, v8 565; RV32-NEXT: vadd.vv v12, v12, v12 566; RV32-NEXT: vsetvli zero, a1, e16, m2, ta, mu 567; RV32-NEXT: vluxei32.v v8, (a0), v12, v0.t 568; RV32-NEXT: ret 569; 570; RV64-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8i16: 571; RV64: # %bb.0: 572; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 573; RV64-NEXT: vsext.vf8 v16, v8 574; RV64-NEXT: vadd.vv v16, v16, v16 575; RV64-NEXT: vsetvli zero, a1, e16, m2, ta, mu 576; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 577; RV64-NEXT: ret 578 %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i16> 579 %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i16> %eidxs 580 %v = call <vscale x 8 x i16> @llvm.vp.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 581 ret <vscale x 8 x i16> %v 582} 583 584define <vscale x 8 x i16> @vpgather_baseidx_zext_nxv8i8_nxv8i16(i16* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 585; RV32-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8i16: 586; RV32: # %bb.0: 587; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 588; RV32-NEXT: vzext.vf4 v12, v8 589; RV32-NEXT: vadd.vv v12, v12, v12 590; RV32-NEXT: vsetvli zero, a1, e16, m2, ta, mu 591; RV32-NEXT: vluxei32.v v8, (a0), v12, v0.t 592; RV32-NEXT: ret 593; 594; RV64-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8i16: 595; RV64: # %bb.0: 596; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 597; RV64-NEXT: vzext.vf8 v16, v8 598; RV64-NEXT: vadd.vv v16, v16, v16 599; RV64-NEXT: vsetvli zero, a1, e16, m2, ta, mu 600; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 601; RV64-NEXT: ret 602 %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i16> 603 %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i16> %eidxs 604 %v = call <vscale x 8 x i16> @llvm.vp.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 605 ret <vscale x 8 x i16> %v 606} 607 608define <vscale x 8 x i16> @vpgather_baseidx_nxv8i16(i16* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 609; RV32-LABEL: vpgather_baseidx_nxv8i16: 610; RV32: # %bb.0: 611; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 612; RV32-NEXT: vsext.vf2 v12, v8 613; RV32-NEXT: vadd.vv v12, v12, v12 614; RV32-NEXT: vsetvli zero, a1, e16, m2, ta, mu 615; RV32-NEXT: vluxei32.v v8, (a0), v12, v0.t 616; RV32-NEXT: ret 617; 618; RV64-LABEL: vpgather_baseidx_nxv8i16: 619; RV64: # %bb.0: 620; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 621; RV64-NEXT: vsext.vf4 v16, v8 622; RV64-NEXT: vadd.vv v16, v16, v16 623; RV64-NEXT: vsetvli zero, a1, e16, m2, ta, mu 624; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 625; RV64-NEXT: ret 626 %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i16> %idxs 627 %v = call <vscale x 8 x i16> @llvm.vp.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 628 ret <vscale x 8 x i16> %v 629} 630 631declare <vscale x 1 x i32> @llvm.vp.gather.nxv1i32.nxv1p0i32(<vscale x 1 x i32*>, <vscale x 1 x i1>, i32) 632 633define <vscale x 1 x i32> @vpgather_nxv1i32(<vscale x 1 x i32*> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) { 634; RV32-LABEL: vpgather_nxv1i32: 635; RV32: # %bb.0: 636; RV32-NEXT: vsetvli zero, a0, e32, mf2, ta, mu 637; RV32-NEXT: vluxei32.v v8, (zero), v8, v0.t 638; RV32-NEXT: ret 639; 640; RV64-LABEL: vpgather_nxv1i32: 641; RV64: # %bb.0: 642; RV64-NEXT: vsetvli zero, a0, e32, mf2, ta, mu 643; RV64-NEXT: vluxei64.v v9, (zero), v8, v0.t 644; RV64-NEXT: vmv1r.v v8, v9 645; RV64-NEXT: ret 646 %v = call <vscale x 1 x i32> @llvm.vp.gather.nxv1i32.nxv1p0i32(<vscale x 1 x i32*> %ptrs, <vscale x 1 x i1> %m, i32 %evl) 647 ret <vscale x 1 x i32> %v 648} 649 650declare <vscale x 2 x i32> @llvm.vp.gather.nxv2i32.nxv2p0i32(<vscale x 2 x i32*>, <vscale x 2 x i1>, i32) 651 652define <vscale x 2 x i32> @vpgather_nxv2i32(<vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 653; RV32-LABEL: vpgather_nxv2i32: 654; RV32: # %bb.0: 655; RV32-NEXT: vsetvli zero, a0, e32, m1, ta, mu 656; RV32-NEXT: vluxei32.v v8, (zero), v8, v0.t 657; RV32-NEXT: ret 658; 659; RV64-LABEL: vpgather_nxv2i32: 660; RV64: # %bb.0: 661; RV64-NEXT: vsetvli zero, a0, e32, m1, ta, mu 662; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 663; RV64-NEXT: vmv.v.v v8, v10 664; RV64-NEXT: ret 665 %v = call <vscale x 2 x i32> @llvm.vp.gather.nxv2i32.nxv2p0i32(<vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 666 ret <vscale x 2 x i32> %v 667} 668 669define <vscale x 2 x i64> @vpgather_nxv2i32_sextload_nxv2i64(<vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 670; RV32-LABEL: vpgather_nxv2i32_sextload_nxv2i64: 671; RV32: # %bb.0: 672; RV32-NEXT: vsetvli zero, a0, e32, m1, ta, mu 673; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 674; RV32-NEXT: vsetvli a0, zero, e64, m2, ta, mu 675; RV32-NEXT: vsext.vf2 v8, v10 676; RV32-NEXT: ret 677; 678; RV64-LABEL: vpgather_nxv2i32_sextload_nxv2i64: 679; RV64: # %bb.0: 680; RV64-NEXT: vsetvli zero, a0, e32, m1, ta, mu 681; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 682; RV64-NEXT: vsetvli a0, zero, e64, m2, ta, mu 683; RV64-NEXT: vsext.vf2 v8, v10 684; RV64-NEXT: ret 685 %v = call <vscale x 2 x i32> @llvm.vp.gather.nxv2i32.nxv2p0i32(<vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 686 %ev = sext <vscale x 2 x i32> %v to <vscale x 2 x i64> 687 ret <vscale x 2 x i64> %ev 688} 689 690define <vscale x 2 x i64> @vpgather_nxv2i32_zextload_nxv2i64(<vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 691; RV32-LABEL: vpgather_nxv2i32_zextload_nxv2i64: 692; RV32: # %bb.0: 693; RV32-NEXT: vsetvli zero, a0, e32, m1, ta, mu 694; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 695; RV32-NEXT: vsetvli a0, zero, e64, m2, ta, mu 696; RV32-NEXT: vzext.vf2 v8, v10 697; RV32-NEXT: ret 698; 699; RV64-LABEL: vpgather_nxv2i32_zextload_nxv2i64: 700; RV64: # %bb.0: 701; RV64-NEXT: vsetvli zero, a0, e32, m1, ta, mu 702; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 703; RV64-NEXT: vsetvli a0, zero, e64, m2, ta, mu 704; RV64-NEXT: vzext.vf2 v8, v10 705; RV64-NEXT: ret 706 %v = call <vscale x 2 x i32> @llvm.vp.gather.nxv2i32.nxv2p0i32(<vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 707 %ev = zext <vscale x 2 x i32> %v to <vscale x 2 x i64> 708 ret <vscale x 2 x i64> %ev 709} 710 711declare <vscale x 4 x i32> @llvm.vp.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*>, <vscale x 4 x i1>, i32) 712 713define <vscale x 4 x i32> @vpgather_nxv4i32(<vscale x 4 x i32*> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) { 714; RV32-LABEL: vpgather_nxv4i32: 715; RV32: # %bb.0: 716; RV32-NEXT: vsetvli zero, a0, e32, m2, ta, mu 717; RV32-NEXT: vluxei32.v v8, (zero), v8, v0.t 718; RV32-NEXT: ret 719; 720; RV64-LABEL: vpgather_nxv4i32: 721; RV64: # %bb.0: 722; RV64-NEXT: vsetvli zero, a0, e32, m2, ta, mu 723; RV64-NEXT: vluxei64.v v12, (zero), v8, v0.t 724; RV64-NEXT: vmv.v.v v8, v12 725; RV64-NEXT: ret 726 %v = call <vscale x 4 x i32> @llvm.vp.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*> %ptrs, <vscale x 4 x i1> %m, i32 %evl) 727 ret <vscale x 4 x i32> %v 728} 729 730define <vscale x 4 x i32> @vpgather_truemask_nxv4i32(<vscale x 4 x i32*> %ptrs, i32 zeroext %evl) { 731; RV32-LABEL: vpgather_truemask_nxv4i32: 732; RV32: # %bb.0: 733; RV32-NEXT: vsetvli zero, a0, e32, m2, ta, mu 734; RV32-NEXT: vluxei32.v v8, (zero), v8 735; RV32-NEXT: ret 736; 737; RV64-LABEL: vpgather_truemask_nxv4i32: 738; RV64: # %bb.0: 739; RV64-NEXT: vsetvli zero, a0, e32, m2, ta, mu 740; RV64-NEXT: vluxei64.v v12, (zero), v8 741; RV64-NEXT: vmv.v.v v8, v12 742; RV64-NEXT: ret 743 %mhead = insertelement <vscale x 4 x i1> poison, i1 1, i32 0 744 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer 745 %v = call <vscale x 4 x i32> @llvm.vp.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*> %ptrs, <vscale x 4 x i1> %mtrue, i32 %evl) 746 ret <vscale x 4 x i32> %v 747} 748 749declare <vscale x 8 x i32> @llvm.vp.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*>, <vscale x 8 x i1>, i32) 750 751define <vscale x 8 x i32> @vpgather_nxv8i32(<vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 752; RV32-LABEL: vpgather_nxv8i32: 753; RV32: # %bb.0: 754; RV32-NEXT: vsetvli zero, a0, e32, m4, ta, mu 755; RV32-NEXT: vluxei32.v v8, (zero), v8, v0.t 756; RV32-NEXT: ret 757; 758; RV64-LABEL: vpgather_nxv8i32: 759; RV64: # %bb.0: 760; RV64-NEXT: vsetvli zero, a0, e32, m4, ta, mu 761; RV64-NEXT: vluxei64.v v16, (zero), v8, v0.t 762; RV64-NEXT: vmv.v.v v8, v16 763; RV64-NEXT: ret 764 %v = call <vscale x 8 x i32> @llvm.vp.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 765 ret <vscale x 8 x i32> %v 766} 767 768define <vscale x 8 x i32> @vpgather_baseidx_nxv8i8_nxv8i32(i32* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 769; RV32-LABEL: vpgather_baseidx_nxv8i8_nxv8i32: 770; RV32: # %bb.0: 771; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 772; RV32-NEXT: vsext.vf4 v12, v8 773; RV32-NEXT: vsll.vi v8, v12, 2 774; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 775; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 776; RV32-NEXT: ret 777; 778; RV64-LABEL: vpgather_baseidx_nxv8i8_nxv8i32: 779; RV64: # %bb.0: 780; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 781; RV64-NEXT: vsext.vf8 v16, v8 782; RV64-NEXT: vsll.vi v16, v16, 2 783; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 784; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 785; RV64-NEXT: ret 786 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i8> %idxs 787 %v = call <vscale x 8 x i32> @llvm.vp.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 788 ret <vscale x 8 x i32> %v 789} 790 791define <vscale x 8 x i32> @vpgather_baseidx_sext_nxv8i8_nxv8i32(i32* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 792; RV32-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8i32: 793; RV32: # %bb.0: 794; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 795; RV32-NEXT: vsext.vf4 v12, v8 796; RV32-NEXT: vsll.vi v8, v12, 2 797; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 798; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 799; RV32-NEXT: ret 800; 801; RV64-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8i32: 802; RV64: # %bb.0: 803; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 804; RV64-NEXT: vsext.vf8 v16, v8 805; RV64-NEXT: vsll.vi v16, v16, 2 806; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 807; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 808; RV64-NEXT: ret 809 %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i32> 810 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs 811 %v = call <vscale x 8 x i32> @llvm.vp.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 812 ret <vscale x 8 x i32> %v 813} 814 815define <vscale x 8 x i32> @vpgather_baseidx_zext_nxv8i8_nxv8i32(i32* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 816; RV32-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8i32: 817; RV32: # %bb.0: 818; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 819; RV32-NEXT: vzext.vf4 v12, v8 820; RV32-NEXT: vsll.vi v8, v12, 2 821; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 822; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 823; RV32-NEXT: ret 824; 825; RV64-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8i32: 826; RV64: # %bb.0: 827; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 828; RV64-NEXT: vzext.vf8 v16, v8 829; RV64-NEXT: vsll.vi v16, v16, 2 830; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 831; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 832; RV64-NEXT: ret 833 %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i32> 834 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs 835 %v = call <vscale x 8 x i32> @llvm.vp.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 836 ret <vscale x 8 x i32> %v 837} 838 839define <vscale x 8 x i32> @vpgather_baseidx_nxv8i16_nxv8i32(i32* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 840; RV32-LABEL: vpgather_baseidx_nxv8i16_nxv8i32: 841; RV32: # %bb.0: 842; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 843; RV32-NEXT: vsext.vf2 v12, v8 844; RV32-NEXT: vsll.vi v8, v12, 2 845; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 846; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 847; RV32-NEXT: ret 848; 849; RV64-LABEL: vpgather_baseidx_nxv8i16_nxv8i32: 850; RV64: # %bb.0: 851; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 852; RV64-NEXT: vsext.vf4 v16, v8 853; RV64-NEXT: vsll.vi v16, v16, 2 854; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 855; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 856; RV64-NEXT: ret 857 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i16> %idxs 858 %v = call <vscale x 8 x i32> @llvm.vp.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 859 ret <vscale x 8 x i32> %v 860} 861 862define <vscale x 8 x i32> @vpgather_baseidx_sext_nxv8i16_nxv8i32(i32* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 863; RV32-LABEL: vpgather_baseidx_sext_nxv8i16_nxv8i32: 864; RV32: # %bb.0: 865; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 866; RV32-NEXT: vsext.vf2 v12, v8 867; RV32-NEXT: vsll.vi v8, v12, 2 868; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 869; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 870; RV32-NEXT: ret 871; 872; RV64-LABEL: vpgather_baseidx_sext_nxv8i16_nxv8i32: 873; RV64: # %bb.0: 874; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 875; RV64-NEXT: vsext.vf4 v16, v8 876; RV64-NEXT: vsll.vi v16, v16, 2 877; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 878; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 879; RV64-NEXT: ret 880 %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i32> 881 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs 882 %v = call <vscale x 8 x i32> @llvm.vp.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 883 ret <vscale x 8 x i32> %v 884} 885 886define <vscale x 8 x i32> @vpgather_baseidx_zext_nxv8i16_nxv8i32(i32* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 887; RV32-LABEL: vpgather_baseidx_zext_nxv8i16_nxv8i32: 888; RV32: # %bb.0: 889; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 890; RV32-NEXT: vzext.vf2 v12, v8 891; RV32-NEXT: vsll.vi v8, v12, 2 892; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 893; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 894; RV32-NEXT: ret 895; 896; RV64-LABEL: vpgather_baseidx_zext_nxv8i16_nxv8i32: 897; RV64: # %bb.0: 898; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 899; RV64-NEXT: vzext.vf4 v16, v8 900; RV64-NEXT: vsll.vi v16, v16, 2 901; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 902; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 903; RV64-NEXT: ret 904 %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i32> 905 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs 906 %v = call <vscale x 8 x i32> @llvm.vp.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 907 ret <vscale x 8 x i32> %v 908} 909 910define <vscale x 8 x i32> @vpgather_baseidx_nxv8i32(i32* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 911; RV32-LABEL: vpgather_baseidx_nxv8i32: 912; RV32: # %bb.0: 913; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 914; RV32-NEXT: vsll.vi v8, v8, 2 915; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 916; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 917; RV32-NEXT: ret 918; 919; RV64-LABEL: vpgather_baseidx_nxv8i32: 920; RV64: # %bb.0: 921; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 922; RV64-NEXT: vsext.vf2 v16, v8 923; RV64-NEXT: vsll.vi v16, v16, 2 924; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 925; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 926; RV64-NEXT: ret 927 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %idxs 928 %v = call <vscale x 8 x i32> @llvm.vp.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 929 ret <vscale x 8 x i32> %v 930} 931 932declare <vscale x 1 x i64> @llvm.vp.gather.nxv1i64.nxv1p0i64(<vscale x 1 x i64*>, <vscale x 1 x i1>, i32) 933 934define <vscale x 1 x i64> @vpgather_nxv1i64(<vscale x 1 x i64*> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) { 935; RV32-LABEL: vpgather_nxv1i64: 936; RV32: # %bb.0: 937; RV32-NEXT: vsetvli zero, a0, e64, m1, ta, mu 938; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 939; RV32-NEXT: vmv.v.v v8, v9 940; RV32-NEXT: ret 941; 942; RV64-LABEL: vpgather_nxv1i64: 943; RV64: # %bb.0: 944; RV64-NEXT: vsetvli zero, a0, e64, m1, ta, mu 945; RV64-NEXT: vluxei64.v v8, (zero), v8, v0.t 946; RV64-NEXT: ret 947 %v = call <vscale x 1 x i64> @llvm.vp.gather.nxv1i64.nxv1p0i64(<vscale x 1 x i64*> %ptrs, <vscale x 1 x i1> %m, i32 %evl) 948 ret <vscale x 1 x i64> %v 949} 950 951declare <vscale x 2 x i64> @llvm.vp.gather.nxv2i64.nxv2p0i64(<vscale x 2 x i64*>, <vscale x 2 x i1>, i32) 952 953define <vscale x 2 x i64> @vpgather_nxv2i64(<vscale x 2 x i64*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 954; RV32-LABEL: vpgather_nxv2i64: 955; RV32: # %bb.0: 956; RV32-NEXT: vsetvli zero, a0, e64, m2, ta, mu 957; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 958; RV32-NEXT: vmv.v.v v8, v10 959; RV32-NEXT: ret 960; 961; RV64-LABEL: vpgather_nxv2i64: 962; RV64: # %bb.0: 963; RV64-NEXT: vsetvli zero, a0, e64, m2, ta, mu 964; RV64-NEXT: vluxei64.v v8, (zero), v8, v0.t 965; RV64-NEXT: ret 966 %v = call <vscale x 2 x i64> @llvm.vp.gather.nxv2i64.nxv2p0i64(<vscale x 2 x i64*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 967 ret <vscale x 2 x i64> %v 968} 969 970declare <vscale x 4 x i64> @llvm.vp.gather.nxv4i64.nxv4p0i64(<vscale x 4 x i64*>, <vscale x 4 x i1>, i32) 971 972define <vscale x 4 x i64> @vpgather_nxv4i64(<vscale x 4 x i64*> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) { 973; RV32-LABEL: vpgather_nxv4i64: 974; RV32: # %bb.0: 975; RV32-NEXT: vsetvli zero, a0, e64, m4, ta, mu 976; RV32-NEXT: vluxei32.v v12, (zero), v8, v0.t 977; RV32-NEXT: vmv.v.v v8, v12 978; RV32-NEXT: ret 979; 980; RV64-LABEL: vpgather_nxv4i64: 981; RV64: # %bb.0: 982; RV64-NEXT: vsetvli zero, a0, e64, m4, ta, mu 983; RV64-NEXT: vluxei64.v v8, (zero), v8, v0.t 984; RV64-NEXT: ret 985 %v = call <vscale x 4 x i64> @llvm.vp.gather.nxv4i64.nxv4p0i64(<vscale x 4 x i64*> %ptrs, <vscale x 4 x i1> %m, i32 %evl) 986 ret <vscale x 4 x i64> %v 987} 988 989define <vscale x 4 x i64> @vpgather_truemask_nxv4i64(<vscale x 4 x i64*> %ptrs, i32 zeroext %evl) { 990; RV32-LABEL: vpgather_truemask_nxv4i64: 991; RV32: # %bb.0: 992; RV32-NEXT: vsetvli zero, a0, e64, m4, ta, mu 993; RV32-NEXT: vluxei32.v v12, (zero), v8 994; RV32-NEXT: vmv.v.v v8, v12 995; RV32-NEXT: ret 996; 997; RV64-LABEL: vpgather_truemask_nxv4i64: 998; RV64: # %bb.0: 999; RV64-NEXT: vsetvli zero, a0, e64, m4, ta, mu 1000; RV64-NEXT: vluxei64.v v8, (zero), v8 1001; RV64-NEXT: ret 1002 %mhead = insertelement <vscale x 4 x i1> poison, i1 1, i32 0 1003 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer 1004 %v = call <vscale x 4 x i64> @llvm.vp.gather.nxv4i64.nxv4p0i64(<vscale x 4 x i64*> %ptrs, <vscale x 4 x i1> %mtrue, i32 %evl) 1005 ret <vscale x 4 x i64> %v 1006} 1007 1008declare <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*>, <vscale x 8 x i1>, i32) 1009 1010define <vscale x 8 x i64> @vpgather_nxv8i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1011; RV32-LABEL: vpgather_nxv8i64: 1012; RV32: # %bb.0: 1013; RV32-NEXT: vsetvli zero, a0, e64, m8, ta, mu 1014; RV32-NEXT: vluxei32.v v16, (zero), v8, v0.t 1015; RV32-NEXT: vmv.v.v v8, v16 1016; RV32-NEXT: ret 1017; 1018; RV64-LABEL: vpgather_nxv8i64: 1019; RV64: # %bb.0: 1020; RV64-NEXT: vsetvli zero, a0, e64, m8, ta, mu 1021; RV64-NEXT: vluxei64.v v8, (zero), v8, v0.t 1022; RV64-NEXT: ret 1023 %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1024 ret <vscale x 8 x i64> %v 1025} 1026 1027define <vscale x 8 x i64> @vpgather_baseidx_nxv8i8_nxv8i64(i64* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1028; RV32-LABEL: vpgather_baseidx_nxv8i8_nxv8i64: 1029; RV32: # %bb.0: 1030; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1031; RV32-NEXT: vsext.vf4 v12, v8 1032; RV32-NEXT: vsll.vi v16, v12, 3 1033; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1034; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1035; RV32-NEXT: ret 1036; 1037; RV64-LABEL: vpgather_baseidx_nxv8i8_nxv8i64: 1038; RV64: # %bb.0: 1039; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1040; RV64-NEXT: vsext.vf8 v16, v8 1041; RV64-NEXT: vsll.vi v8, v16, 3 1042; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1043; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1044; RV64-NEXT: ret 1045 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i8> %idxs 1046 %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1047 ret <vscale x 8 x i64> %v 1048} 1049 1050define <vscale x 8 x i64> @vpgather_baseidx_sext_nxv8i8_nxv8i64(i64* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1051; RV32-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8i64: 1052; RV32: # %bb.0: 1053; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1054; RV32-NEXT: vsext.vf8 v16, v8 1055; RV32-NEXT: vsll.vi v8, v16, 3 1056; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1057; RV32-NEXT: vncvt.x.x.w v16, v8 1058; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 1059; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1060; RV32-NEXT: ret 1061; 1062; RV64-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8i64: 1063; RV64: # %bb.0: 1064; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1065; RV64-NEXT: vsext.vf8 v16, v8 1066; RV64-NEXT: vsll.vi v8, v16, 3 1067; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1068; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1069; RV64-NEXT: ret 1070 %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i64> 1071 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs 1072 %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1073 ret <vscale x 8 x i64> %v 1074} 1075 1076define <vscale x 8 x i64> @vpgather_baseidx_zext_nxv8i8_nxv8i64(i64* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1077; RV32-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8i64: 1078; RV32: # %bb.0: 1079; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1080; RV32-NEXT: vzext.vf8 v16, v8 1081; RV32-NEXT: vsll.vi v8, v16, 3 1082; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1083; RV32-NEXT: vncvt.x.x.w v16, v8 1084; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 1085; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1086; RV32-NEXT: ret 1087; 1088; RV64-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8i64: 1089; RV64: # %bb.0: 1090; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1091; RV64-NEXT: vzext.vf8 v16, v8 1092; RV64-NEXT: vsll.vi v8, v16, 3 1093; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1094; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1095; RV64-NEXT: ret 1096 %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i64> 1097 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs 1098 %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1099 ret <vscale x 8 x i64> %v 1100} 1101 1102define <vscale x 8 x i64> @vpgather_baseidx_nxv8i16_nxv8i64(i64* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1103; RV32-LABEL: vpgather_baseidx_nxv8i16_nxv8i64: 1104; RV32: # %bb.0: 1105; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1106; RV32-NEXT: vsext.vf2 v12, v8 1107; RV32-NEXT: vsll.vi v16, v12, 3 1108; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1109; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1110; RV32-NEXT: ret 1111; 1112; RV64-LABEL: vpgather_baseidx_nxv8i16_nxv8i64: 1113; RV64: # %bb.0: 1114; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1115; RV64-NEXT: vsext.vf4 v16, v8 1116; RV64-NEXT: vsll.vi v8, v16, 3 1117; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1118; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1119; RV64-NEXT: ret 1120 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i16> %idxs 1121 %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1122 ret <vscale x 8 x i64> %v 1123} 1124 1125define <vscale x 8 x i64> @vpgather_baseidx_sext_nxv8i16_nxv8i64(i64* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1126; RV32-LABEL: vpgather_baseidx_sext_nxv8i16_nxv8i64: 1127; RV32: # %bb.0: 1128; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1129; RV32-NEXT: vsext.vf4 v16, v8 1130; RV32-NEXT: vsll.vi v8, v16, 3 1131; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1132; RV32-NEXT: vncvt.x.x.w v16, v8 1133; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 1134; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1135; RV32-NEXT: ret 1136; 1137; RV64-LABEL: vpgather_baseidx_sext_nxv8i16_nxv8i64: 1138; RV64: # %bb.0: 1139; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1140; RV64-NEXT: vsext.vf4 v16, v8 1141; RV64-NEXT: vsll.vi v8, v16, 3 1142; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1143; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1144; RV64-NEXT: ret 1145 %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i64> 1146 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs 1147 %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1148 ret <vscale x 8 x i64> %v 1149} 1150 1151define <vscale x 8 x i64> @vpgather_baseidx_zext_nxv8i16_nxv8i64(i64* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1152; RV32-LABEL: vpgather_baseidx_zext_nxv8i16_nxv8i64: 1153; RV32: # %bb.0: 1154; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1155; RV32-NEXT: vzext.vf4 v16, v8 1156; RV32-NEXT: vsll.vi v8, v16, 3 1157; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1158; RV32-NEXT: vncvt.x.x.w v16, v8 1159; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 1160; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1161; RV32-NEXT: ret 1162; 1163; RV64-LABEL: vpgather_baseidx_zext_nxv8i16_nxv8i64: 1164; RV64: # %bb.0: 1165; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1166; RV64-NEXT: vzext.vf4 v16, v8 1167; RV64-NEXT: vsll.vi v8, v16, 3 1168; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1169; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1170; RV64-NEXT: ret 1171 %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i64> 1172 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs 1173 %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1174 ret <vscale x 8 x i64> %v 1175} 1176 1177define <vscale x 8 x i64> @vpgather_baseidx_nxv8i32_nxv8i64(i64* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1178; RV32-LABEL: vpgather_baseidx_nxv8i32_nxv8i64: 1179; RV32: # %bb.0: 1180; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1181; RV32-NEXT: vsll.vi v16, v8, 3 1182; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1183; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1184; RV32-NEXT: ret 1185; 1186; RV64-LABEL: vpgather_baseidx_nxv8i32_nxv8i64: 1187; RV64: # %bb.0: 1188; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1189; RV64-NEXT: vsext.vf2 v16, v8 1190; RV64-NEXT: vsll.vi v8, v16, 3 1191; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1192; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1193; RV64-NEXT: ret 1194 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i32> %idxs 1195 %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1196 ret <vscale x 8 x i64> %v 1197} 1198 1199define <vscale x 8 x i64> @vpgather_baseidx_sext_nxv8i32_nxv8i64(i64* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1200; RV32-LABEL: vpgather_baseidx_sext_nxv8i32_nxv8i64: 1201; RV32: # %bb.0: 1202; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1203; RV32-NEXT: vsext.vf2 v16, v8 1204; RV32-NEXT: vsll.vi v8, v16, 3 1205; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1206; RV32-NEXT: vncvt.x.x.w v16, v8 1207; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 1208; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1209; RV32-NEXT: ret 1210; 1211; RV64-LABEL: vpgather_baseidx_sext_nxv8i32_nxv8i64: 1212; RV64: # %bb.0: 1213; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1214; RV64-NEXT: vsext.vf2 v16, v8 1215; RV64-NEXT: vsll.vi v8, v16, 3 1216; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1217; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1218; RV64-NEXT: ret 1219 %eidxs = sext <vscale x 8 x i32> %idxs to <vscale x 8 x i64> 1220 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs 1221 %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1222 ret <vscale x 8 x i64> %v 1223} 1224 1225define <vscale x 8 x i64> @vpgather_baseidx_zext_nxv8i32_nxv8i64(i64* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1226; RV32-LABEL: vpgather_baseidx_zext_nxv8i32_nxv8i64: 1227; RV32: # %bb.0: 1228; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1229; RV32-NEXT: vzext.vf2 v16, v8 1230; RV32-NEXT: vsll.vi v8, v16, 3 1231; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1232; RV32-NEXT: vncvt.x.x.w v16, v8 1233; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 1234; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1235; RV32-NEXT: ret 1236; 1237; RV64-LABEL: vpgather_baseidx_zext_nxv8i32_nxv8i64: 1238; RV64: # %bb.0: 1239; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1240; RV64-NEXT: vzext.vf2 v16, v8 1241; RV64-NEXT: vsll.vi v8, v16, 3 1242; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1243; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1244; RV64-NEXT: ret 1245 %eidxs = zext <vscale x 8 x i32> %idxs to <vscale x 8 x i64> 1246 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs 1247 %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1248 ret <vscale x 8 x i64> %v 1249} 1250 1251define <vscale x 8 x i64> @vpgather_baseidx_nxv8i64(i64* %base, <vscale x 8 x i64> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1252; RV32-LABEL: vpgather_baseidx_nxv8i64: 1253; RV32: # %bb.0: 1254; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1255; RV32-NEXT: vsll.vi v8, v8, 3 1256; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1257; RV32-NEXT: vncvt.x.x.w v16, v8 1258; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 1259; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1260; RV32-NEXT: ret 1261; 1262; RV64-LABEL: vpgather_baseidx_nxv8i64: 1263; RV64: # %bb.0: 1264; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1265; RV64-NEXT: vsll.vi v8, v8, 3 1266; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1267; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1268; RV64-NEXT: ret 1269 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %idxs 1270 %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1271 ret <vscale x 8 x i64> %v 1272} 1273 1274declare <vscale x 1 x half> @llvm.vp.gather.nxv1f16.nxv1p0f16(<vscale x 1 x half*>, <vscale x 1 x i1>, i32) 1275 1276define <vscale x 1 x half> @vpgather_nxv1f16(<vscale x 1 x half*> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) { 1277; RV32-LABEL: vpgather_nxv1f16: 1278; RV32: # %bb.0: 1279; RV32-NEXT: vsetvli zero, a0, e16, mf4, ta, mu 1280; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 1281; RV32-NEXT: vmv1r.v v8, v9 1282; RV32-NEXT: ret 1283; 1284; RV64-LABEL: vpgather_nxv1f16: 1285; RV64: # %bb.0: 1286; RV64-NEXT: vsetvli zero, a0, e16, mf4, ta, mu 1287; RV64-NEXT: vluxei64.v v9, (zero), v8, v0.t 1288; RV64-NEXT: vmv1r.v v8, v9 1289; RV64-NEXT: ret 1290 %v = call <vscale x 1 x half> @llvm.vp.gather.nxv1f16.nxv1p0f16(<vscale x 1 x half*> %ptrs, <vscale x 1 x i1> %m, i32 %evl) 1291 ret <vscale x 1 x half> %v 1292} 1293 1294declare <vscale x 2 x half> @llvm.vp.gather.nxv2f16.nxv2p0f16(<vscale x 2 x half*>, <vscale x 2 x i1>, i32) 1295 1296define <vscale x 2 x half> @vpgather_nxv2f16(<vscale x 2 x half*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 1297; RV32-LABEL: vpgather_nxv2f16: 1298; RV32: # %bb.0: 1299; RV32-NEXT: vsetvli zero, a0, e16, mf2, ta, mu 1300; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 1301; RV32-NEXT: vmv1r.v v8, v9 1302; RV32-NEXT: ret 1303; 1304; RV64-LABEL: vpgather_nxv2f16: 1305; RV64: # %bb.0: 1306; RV64-NEXT: vsetvli zero, a0, e16, mf2, ta, mu 1307; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 1308; RV64-NEXT: vmv1r.v v8, v10 1309; RV64-NEXT: ret 1310 %v = call <vscale x 2 x half> @llvm.vp.gather.nxv2f16.nxv2p0f16(<vscale x 2 x half*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 1311 ret <vscale x 2 x half> %v 1312} 1313 1314declare <vscale x 4 x half> @llvm.vp.gather.nxv4f16.nxv4p0f16(<vscale x 4 x half*>, <vscale x 4 x i1>, i32) 1315 1316define <vscale x 4 x half> @vpgather_nxv4f16(<vscale x 4 x half*> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) { 1317; RV32-LABEL: vpgather_nxv4f16: 1318; RV32: # %bb.0: 1319; RV32-NEXT: vsetvli zero, a0, e16, m1, ta, mu 1320; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 1321; RV32-NEXT: vmv.v.v v8, v10 1322; RV32-NEXT: ret 1323; 1324; RV64-LABEL: vpgather_nxv4f16: 1325; RV64: # %bb.0: 1326; RV64-NEXT: vsetvli zero, a0, e16, m1, ta, mu 1327; RV64-NEXT: vluxei64.v v12, (zero), v8, v0.t 1328; RV64-NEXT: vmv.v.v v8, v12 1329; RV64-NEXT: ret 1330 %v = call <vscale x 4 x half> @llvm.vp.gather.nxv4f16.nxv4p0f16(<vscale x 4 x half*> %ptrs, <vscale x 4 x i1> %m, i32 %evl) 1331 ret <vscale x 4 x half> %v 1332} 1333 1334define <vscale x 4 x half> @vpgather_truemask_nxv4f16(<vscale x 4 x half*> %ptrs, i32 zeroext %evl) { 1335; RV32-LABEL: vpgather_truemask_nxv4f16: 1336; RV32: # %bb.0: 1337; RV32-NEXT: vsetvli zero, a0, e16, m1, ta, mu 1338; RV32-NEXT: vluxei32.v v10, (zero), v8 1339; RV32-NEXT: vmv.v.v v8, v10 1340; RV32-NEXT: ret 1341; 1342; RV64-LABEL: vpgather_truemask_nxv4f16: 1343; RV64: # %bb.0: 1344; RV64-NEXT: vsetvli zero, a0, e16, m1, ta, mu 1345; RV64-NEXT: vluxei64.v v12, (zero), v8 1346; RV64-NEXT: vmv.v.v v8, v12 1347; RV64-NEXT: ret 1348 %mhead = insertelement <vscale x 4 x i1> poison, i1 1, i32 0 1349 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer 1350 %v = call <vscale x 4 x half> @llvm.vp.gather.nxv4f16.nxv4p0f16(<vscale x 4 x half*> %ptrs, <vscale x 4 x i1> %mtrue, i32 %evl) 1351 ret <vscale x 4 x half> %v 1352} 1353 1354declare <vscale x 8 x half> @llvm.vp.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*>, <vscale x 8 x i1>, i32) 1355 1356define <vscale x 8 x half> @vpgather_nxv8f16(<vscale x 8 x half*> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1357; RV32-LABEL: vpgather_nxv8f16: 1358; RV32: # %bb.0: 1359; RV32-NEXT: vsetvli zero, a0, e16, m2, ta, mu 1360; RV32-NEXT: vluxei32.v v12, (zero), v8, v0.t 1361; RV32-NEXT: vmv.v.v v8, v12 1362; RV32-NEXT: ret 1363; 1364; RV64-LABEL: vpgather_nxv8f16: 1365; RV64: # %bb.0: 1366; RV64-NEXT: vsetvli zero, a0, e16, m2, ta, mu 1367; RV64-NEXT: vluxei64.v v16, (zero), v8, v0.t 1368; RV64-NEXT: vmv.v.v v8, v16 1369; RV64-NEXT: ret 1370 %v = call <vscale x 8 x half> @llvm.vp.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1371 ret <vscale x 8 x half> %v 1372} 1373 1374define <vscale x 8 x half> @vpgather_baseidx_nxv8i8_nxv8f16(half* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1375; RV32-LABEL: vpgather_baseidx_nxv8i8_nxv8f16: 1376; RV32: # %bb.0: 1377; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1378; RV32-NEXT: vsext.vf4 v12, v8 1379; RV32-NEXT: vadd.vv v12, v12, v12 1380; RV32-NEXT: vsetvli zero, a1, e16, m2, ta, mu 1381; RV32-NEXT: vluxei32.v v8, (a0), v12, v0.t 1382; RV32-NEXT: ret 1383; 1384; RV64-LABEL: vpgather_baseidx_nxv8i8_nxv8f16: 1385; RV64: # %bb.0: 1386; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1387; RV64-NEXT: vsext.vf8 v16, v8 1388; RV64-NEXT: vadd.vv v16, v16, v16 1389; RV64-NEXT: vsetvli zero, a1, e16, m2, ta, mu 1390; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 1391; RV64-NEXT: ret 1392 %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i8> %idxs 1393 %v = call <vscale x 8 x half> @llvm.vp.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1394 ret <vscale x 8 x half> %v 1395} 1396 1397define <vscale x 8 x half> @vpgather_baseidx_sext_nxv8i8_nxv8f16(half* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1398; RV32-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8f16: 1399; RV32: # %bb.0: 1400; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1401; RV32-NEXT: vsext.vf4 v12, v8 1402; RV32-NEXT: vadd.vv v12, v12, v12 1403; RV32-NEXT: vsetvli zero, a1, e16, m2, ta, mu 1404; RV32-NEXT: vluxei32.v v8, (a0), v12, v0.t 1405; RV32-NEXT: ret 1406; 1407; RV64-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8f16: 1408; RV64: # %bb.0: 1409; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1410; RV64-NEXT: vsext.vf8 v16, v8 1411; RV64-NEXT: vadd.vv v16, v16, v16 1412; RV64-NEXT: vsetvli zero, a1, e16, m2, ta, mu 1413; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 1414; RV64-NEXT: ret 1415 %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i16> 1416 %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i16> %eidxs 1417 %v = call <vscale x 8 x half> @llvm.vp.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1418 ret <vscale x 8 x half> %v 1419} 1420 1421define <vscale x 8 x half> @vpgather_baseidx_zext_nxv8i8_nxv8f16(half* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1422; RV32-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8f16: 1423; RV32: # %bb.0: 1424; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1425; RV32-NEXT: vzext.vf4 v12, v8 1426; RV32-NEXT: vadd.vv v12, v12, v12 1427; RV32-NEXT: vsetvli zero, a1, e16, m2, ta, mu 1428; RV32-NEXT: vluxei32.v v8, (a0), v12, v0.t 1429; RV32-NEXT: ret 1430; 1431; RV64-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8f16: 1432; RV64: # %bb.0: 1433; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1434; RV64-NEXT: vzext.vf8 v16, v8 1435; RV64-NEXT: vadd.vv v16, v16, v16 1436; RV64-NEXT: vsetvli zero, a1, e16, m2, ta, mu 1437; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 1438; RV64-NEXT: ret 1439 %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i16> 1440 %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i16> %eidxs 1441 %v = call <vscale x 8 x half> @llvm.vp.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1442 ret <vscale x 8 x half> %v 1443} 1444 1445define <vscale x 8 x half> @vpgather_baseidx_nxv8f16(half* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1446; RV32-LABEL: vpgather_baseidx_nxv8f16: 1447; RV32: # %bb.0: 1448; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1449; RV32-NEXT: vsext.vf2 v12, v8 1450; RV32-NEXT: vadd.vv v12, v12, v12 1451; RV32-NEXT: vsetvli zero, a1, e16, m2, ta, mu 1452; RV32-NEXT: vluxei32.v v8, (a0), v12, v0.t 1453; RV32-NEXT: ret 1454; 1455; RV64-LABEL: vpgather_baseidx_nxv8f16: 1456; RV64: # %bb.0: 1457; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1458; RV64-NEXT: vsext.vf4 v16, v8 1459; RV64-NEXT: vadd.vv v16, v16, v16 1460; RV64-NEXT: vsetvli zero, a1, e16, m2, ta, mu 1461; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 1462; RV64-NEXT: ret 1463 %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i16> %idxs 1464 %v = call <vscale x 8 x half> @llvm.vp.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1465 ret <vscale x 8 x half> %v 1466} 1467 1468declare <vscale x 1 x float> @llvm.vp.gather.nxv1f32.nxv1p0f32(<vscale x 1 x float*>, <vscale x 1 x i1>, i32) 1469 1470define <vscale x 1 x float> @vpgather_nxv1f32(<vscale x 1 x float*> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) { 1471; RV32-LABEL: vpgather_nxv1f32: 1472; RV32: # %bb.0: 1473; RV32-NEXT: vsetvli zero, a0, e32, mf2, ta, mu 1474; RV32-NEXT: vluxei32.v v8, (zero), v8, v0.t 1475; RV32-NEXT: ret 1476; 1477; RV64-LABEL: vpgather_nxv1f32: 1478; RV64: # %bb.0: 1479; RV64-NEXT: vsetvli zero, a0, e32, mf2, ta, mu 1480; RV64-NEXT: vluxei64.v v9, (zero), v8, v0.t 1481; RV64-NEXT: vmv1r.v v8, v9 1482; RV64-NEXT: ret 1483 %v = call <vscale x 1 x float> @llvm.vp.gather.nxv1f32.nxv1p0f32(<vscale x 1 x float*> %ptrs, <vscale x 1 x i1> %m, i32 %evl) 1484 ret <vscale x 1 x float> %v 1485} 1486 1487declare <vscale x 2 x float> @llvm.vp.gather.nxv2f32.nxv2p0f32(<vscale x 2 x float*>, <vscale x 2 x i1>, i32) 1488 1489define <vscale x 2 x float> @vpgather_nxv2f32(<vscale x 2 x float*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 1490; RV32-LABEL: vpgather_nxv2f32: 1491; RV32: # %bb.0: 1492; RV32-NEXT: vsetvli zero, a0, e32, m1, ta, mu 1493; RV32-NEXT: vluxei32.v v8, (zero), v8, v0.t 1494; RV32-NEXT: ret 1495; 1496; RV64-LABEL: vpgather_nxv2f32: 1497; RV64: # %bb.0: 1498; RV64-NEXT: vsetvli zero, a0, e32, m1, ta, mu 1499; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 1500; RV64-NEXT: vmv.v.v v8, v10 1501; RV64-NEXT: ret 1502 %v = call <vscale x 2 x float> @llvm.vp.gather.nxv2f32.nxv2p0f32(<vscale x 2 x float*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 1503 ret <vscale x 2 x float> %v 1504} 1505 1506declare <vscale x 4 x float> @llvm.vp.gather.nxv4f32.nxv4p0f32(<vscale x 4 x float*>, <vscale x 4 x i1>, i32) 1507 1508define <vscale x 4 x float> @vpgather_nxv4f32(<vscale x 4 x float*> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) { 1509; RV32-LABEL: vpgather_nxv4f32: 1510; RV32: # %bb.0: 1511; RV32-NEXT: vsetvli zero, a0, e32, m2, ta, mu 1512; RV32-NEXT: vluxei32.v v8, (zero), v8, v0.t 1513; RV32-NEXT: ret 1514; 1515; RV64-LABEL: vpgather_nxv4f32: 1516; RV64: # %bb.0: 1517; RV64-NEXT: vsetvli zero, a0, e32, m2, ta, mu 1518; RV64-NEXT: vluxei64.v v12, (zero), v8, v0.t 1519; RV64-NEXT: vmv.v.v v8, v12 1520; RV64-NEXT: ret 1521 %v = call <vscale x 4 x float> @llvm.vp.gather.nxv4f32.nxv4p0f32(<vscale x 4 x float*> %ptrs, <vscale x 4 x i1> %m, i32 %evl) 1522 ret <vscale x 4 x float> %v 1523} 1524 1525define <vscale x 4 x float> @vpgather_truemask_nxv4f32(<vscale x 4 x float*> %ptrs, i32 zeroext %evl) { 1526; RV32-LABEL: vpgather_truemask_nxv4f32: 1527; RV32: # %bb.0: 1528; RV32-NEXT: vsetvli zero, a0, e32, m2, ta, mu 1529; RV32-NEXT: vluxei32.v v8, (zero), v8 1530; RV32-NEXT: ret 1531; 1532; RV64-LABEL: vpgather_truemask_nxv4f32: 1533; RV64: # %bb.0: 1534; RV64-NEXT: vsetvli zero, a0, e32, m2, ta, mu 1535; RV64-NEXT: vluxei64.v v12, (zero), v8 1536; RV64-NEXT: vmv.v.v v8, v12 1537; RV64-NEXT: ret 1538 %mhead = insertelement <vscale x 4 x i1> poison, i1 1, i32 0 1539 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer 1540 %v = call <vscale x 4 x float> @llvm.vp.gather.nxv4f32.nxv4p0f32(<vscale x 4 x float*> %ptrs, <vscale x 4 x i1> %mtrue, i32 %evl) 1541 ret <vscale x 4 x float> %v 1542} 1543 1544declare <vscale x 8 x float> @llvm.vp.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*>, <vscale x 8 x i1>, i32) 1545 1546define <vscale x 8 x float> @vpgather_nxv8f32(<vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1547; RV32-LABEL: vpgather_nxv8f32: 1548; RV32: # %bb.0: 1549; RV32-NEXT: vsetvli zero, a0, e32, m4, ta, mu 1550; RV32-NEXT: vluxei32.v v8, (zero), v8, v0.t 1551; RV32-NEXT: ret 1552; 1553; RV64-LABEL: vpgather_nxv8f32: 1554; RV64: # %bb.0: 1555; RV64-NEXT: vsetvli zero, a0, e32, m4, ta, mu 1556; RV64-NEXT: vluxei64.v v16, (zero), v8, v0.t 1557; RV64-NEXT: vmv.v.v v8, v16 1558; RV64-NEXT: ret 1559 %v = call <vscale x 8 x float> @llvm.vp.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1560 ret <vscale x 8 x float> %v 1561} 1562 1563define <vscale x 8 x float> @vpgather_baseidx_nxv8i8_nxv8f32(float* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1564; RV32-LABEL: vpgather_baseidx_nxv8i8_nxv8f32: 1565; RV32: # %bb.0: 1566; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1567; RV32-NEXT: vsext.vf4 v12, v8 1568; RV32-NEXT: vsll.vi v8, v12, 2 1569; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1570; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 1571; RV32-NEXT: ret 1572; 1573; RV64-LABEL: vpgather_baseidx_nxv8i8_nxv8f32: 1574; RV64: # %bb.0: 1575; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1576; RV64-NEXT: vsext.vf8 v16, v8 1577; RV64-NEXT: vsll.vi v16, v16, 2 1578; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1579; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 1580; RV64-NEXT: ret 1581 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i8> %idxs 1582 %v = call <vscale x 8 x float> @llvm.vp.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1583 ret <vscale x 8 x float> %v 1584} 1585 1586define <vscale x 8 x float> @vpgather_baseidx_sext_nxv8i8_nxv8f32(float* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1587; RV32-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8f32: 1588; RV32: # %bb.0: 1589; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1590; RV32-NEXT: vsext.vf4 v12, v8 1591; RV32-NEXT: vsll.vi v8, v12, 2 1592; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1593; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 1594; RV32-NEXT: ret 1595; 1596; RV64-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8f32: 1597; RV64: # %bb.0: 1598; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1599; RV64-NEXT: vsext.vf8 v16, v8 1600; RV64-NEXT: vsll.vi v16, v16, 2 1601; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1602; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 1603; RV64-NEXT: ret 1604 %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i32> 1605 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs 1606 %v = call <vscale x 8 x float> @llvm.vp.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1607 ret <vscale x 8 x float> %v 1608} 1609 1610define <vscale x 8 x float> @vpgather_baseidx_zext_nxv8i8_nxv8f32(float* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1611; RV32-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8f32: 1612; RV32: # %bb.0: 1613; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1614; RV32-NEXT: vzext.vf4 v12, v8 1615; RV32-NEXT: vsll.vi v8, v12, 2 1616; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1617; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 1618; RV32-NEXT: ret 1619; 1620; RV64-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8f32: 1621; RV64: # %bb.0: 1622; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1623; RV64-NEXT: vzext.vf8 v16, v8 1624; RV64-NEXT: vsll.vi v16, v16, 2 1625; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1626; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 1627; RV64-NEXT: ret 1628 %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i32> 1629 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs 1630 %v = call <vscale x 8 x float> @llvm.vp.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1631 ret <vscale x 8 x float> %v 1632} 1633 1634define <vscale x 8 x float> @vpgather_baseidx_nxv8i16_nxv8f32(float* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1635; RV32-LABEL: vpgather_baseidx_nxv8i16_nxv8f32: 1636; RV32: # %bb.0: 1637; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1638; RV32-NEXT: vsext.vf2 v12, v8 1639; RV32-NEXT: vsll.vi v8, v12, 2 1640; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1641; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 1642; RV32-NEXT: ret 1643; 1644; RV64-LABEL: vpgather_baseidx_nxv8i16_nxv8f32: 1645; RV64: # %bb.0: 1646; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1647; RV64-NEXT: vsext.vf4 v16, v8 1648; RV64-NEXT: vsll.vi v16, v16, 2 1649; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1650; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 1651; RV64-NEXT: ret 1652 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i16> %idxs 1653 %v = call <vscale x 8 x float> @llvm.vp.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1654 ret <vscale x 8 x float> %v 1655} 1656 1657define <vscale x 8 x float> @vpgather_baseidx_sext_nxv8i16_nxv8f32(float* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1658; RV32-LABEL: vpgather_baseidx_sext_nxv8i16_nxv8f32: 1659; RV32: # %bb.0: 1660; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1661; RV32-NEXT: vsext.vf2 v12, v8 1662; RV32-NEXT: vsll.vi v8, v12, 2 1663; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1664; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 1665; RV32-NEXT: ret 1666; 1667; RV64-LABEL: vpgather_baseidx_sext_nxv8i16_nxv8f32: 1668; RV64: # %bb.0: 1669; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1670; RV64-NEXT: vsext.vf4 v16, v8 1671; RV64-NEXT: vsll.vi v16, v16, 2 1672; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1673; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 1674; RV64-NEXT: ret 1675 %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i32> 1676 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs 1677 %v = call <vscale x 8 x float> @llvm.vp.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1678 ret <vscale x 8 x float> %v 1679} 1680 1681define <vscale x 8 x float> @vpgather_baseidx_zext_nxv8i16_nxv8f32(float* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1682; RV32-LABEL: vpgather_baseidx_zext_nxv8i16_nxv8f32: 1683; RV32: # %bb.0: 1684; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1685; RV32-NEXT: vzext.vf2 v12, v8 1686; RV32-NEXT: vsll.vi v8, v12, 2 1687; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1688; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 1689; RV32-NEXT: ret 1690; 1691; RV64-LABEL: vpgather_baseidx_zext_nxv8i16_nxv8f32: 1692; RV64: # %bb.0: 1693; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1694; RV64-NEXT: vzext.vf4 v16, v8 1695; RV64-NEXT: vsll.vi v16, v16, 2 1696; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1697; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 1698; RV64-NEXT: ret 1699 %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i32> 1700 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs 1701 %v = call <vscale x 8 x float> @llvm.vp.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1702 ret <vscale x 8 x float> %v 1703} 1704 1705define <vscale x 8 x float> @vpgather_baseidx_nxv8f32(float* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1706; RV32-LABEL: vpgather_baseidx_nxv8f32: 1707; RV32: # %bb.0: 1708; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1709; RV32-NEXT: vsll.vi v8, v8, 2 1710; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1711; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 1712; RV32-NEXT: ret 1713; 1714; RV64-LABEL: vpgather_baseidx_nxv8f32: 1715; RV64: # %bb.0: 1716; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1717; RV64-NEXT: vsext.vf2 v16, v8 1718; RV64-NEXT: vsll.vi v16, v16, 2 1719; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1720; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 1721; RV64-NEXT: ret 1722 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %idxs 1723 %v = call <vscale x 8 x float> @llvm.vp.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1724 ret <vscale x 8 x float> %v 1725} 1726 1727declare <vscale x 1 x double> @llvm.vp.gather.nxv1f64.nxv1p0f64(<vscale x 1 x double*>, <vscale x 1 x i1>, i32) 1728 1729define <vscale x 1 x double> @vpgather_nxv1f64(<vscale x 1 x double*> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) { 1730; RV32-LABEL: vpgather_nxv1f64: 1731; RV32: # %bb.0: 1732; RV32-NEXT: vsetvli zero, a0, e64, m1, ta, mu 1733; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 1734; RV32-NEXT: vmv.v.v v8, v9 1735; RV32-NEXT: ret 1736; 1737; RV64-LABEL: vpgather_nxv1f64: 1738; RV64: # %bb.0: 1739; RV64-NEXT: vsetvli zero, a0, e64, m1, ta, mu 1740; RV64-NEXT: vluxei64.v v8, (zero), v8, v0.t 1741; RV64-NEXT: ret 1742 %v = call <vscale x 1 x double> @llvm.vp.gather.nxv1f64.nxv1p0f64(<vscale x 1 x double*> %ptrs, <vscale x 1 x i1> %m, i32 %evl) 1743 ret <vscale x 1 x double> %v 1744} 1745 1746declare <vscale x 2 x double> @llvm.vp.gather.nxv2f64.nxv2p0f64(<vscale x 2 x double*>, <vscale x 2 x i1>, i32) 1747 1748define <vscale x 2 x double> @vpgather_nxv2f64(<vscale x 2 x double*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 1749; RV32-LABEL: vpgather_nxv2f64: 1750; RV32: # %bb.0: 1751; RV32-NEXT: vsetvli zero, a0, e64, m2, ta, mu 1752; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 1753; RV32-NEXT: vmv.v.v v8, v10 1754; RV32-NEXT: ret 1755; 1756; RV64-LABEL: vpgather_nxv2f64: 1757; RV64: # %bb.0: 1758; RV64-NEXT: vsetvli zero, a0, e64, m2, ta, mu 1759; RV64-NEXT: vluxei64.v v8, (zero), v8, v0.t 1760; RV64-NEXT: ret 1761 %v = call <vscale x 2 x double> @llvm.vp.gather.nxv2f64.nxv2p0f64(<vscale x 2 x double*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 1762 ret <vscale x 2 x double> %v 1763} 1764 1765declare <vscale x 4 x double> @llvm.vp.gather.nxv4f64.nxv4p0f64(<vscale x 4 x double*>, <vscale x 4 x i1>, i32) 1766 1767define <vscale x 4 x double> @vpgather_nxv4f64(<vscale x 4 x double*> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) { 1768; RV32-LABEL: vpgather_nxv4f64: 1769; RV32: # %bb.0: 1770; RV32-NEXT: vsetvli zero, a0, e64, m4, ta, mu 1771; RV32-NEXT: vluxei32.v v12, (zero), v8, v0.t 1772; RV32-NEXT: vmv.v.v v8, v12 1773; RV32-NEXT: ret 1774; 1775; RV64-LABEL: vpgather_nxv4f64: 1776; RV64: # %bb.0: 1777; RV64-NEXT: vsetvli zero, a0, e64, m4, ta, mu 1778; RV64-NEXT: vluxei64.v v8, (zero), v8, v0.t 1779; RV64-NEXT: ret 1780 %v = call <vscale x 4 x double> @llvm.vp.gather.nxv4f64.nxv4p0f64(<vscale x 4 x double*> %ptrs, <vscale x 4 x i1> %m, i32 %evl) 1781 ret <vscale x 4 x double> %v 1782} 1783 1784define <vscale x 4 x double> @vpgather_truemask_nxv4f64(<vscale x 4 x double*> %ptrs, i32 zeroext %evl) { 1785; RV32-LABEL: vpgather_truemask_nxv4f64: 1786; RV32: # %bb.0: 1787; RV32-NEXT: vsetvli zero, a0, e64, m4, ta, mu 1788; RV32-NEXT: vluxei32.v v12, (zero), v8 1789; RV32-NEXT: vmv.v.v v8, v12 1790; RV32-NEXT: ret 1791; 1792; RV64-LABEL: vpgather_truemask_nxv4f64: 1793; RV64: # %bb.0: 1794; RV64-NEXT: vsetvli zero, a0, e64, m4, ta, mu 1795; RV64-NEXT: vluxei64.v v8, (zero), v8 1796; RV64-NEXT: ret 1797 %mhead = insertelement <vscale x 4 x i1> poison, i1 1, i32 0 1798 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer 1799 %v = call <vscale x 4 x double> @llvm.vp.gather.nxv4f64.nxv4p0f64(<vscale x 4 x double*> %ptrs, <vscale x 4 x i1> %mtrue, i32 %evl) 1800 ret <vscale x 4 x double> %v 1801} 1802 1803declare <vscale x 6 x double> @llvm.vp.gather.nxv6f64.nxv6p0f64(<vscale x 6 x double*>, <vscale x 6 x i1>, i32) 1804 1805define <vscale x 6 x double> @vpgather_nxv6f64(<vscale x 6 x double*> %ptrs, <vscale x 6 x i1> %m, i32 zeroext %evl) { 1806; RV32-LABEL: vpgather_nxv6f64: 1807; RV32: # %bb.0: 1808; RV32-NEXT: vsetvli zero, a0, e64, m8, ta, mu 1809; RV32-NEXT: vluxei32.v v16, (zero), v8, v0.t 1810; RV32-NEXT: vmv.v.v v8, v16 1811; RV32-NEXT: ret 1812; 1813; RV64-LABEL: vpgather_nxv6f64: 1814; RV64: # %bb.0: 1815; RV64-NEXT: vsetvli zero, a0, e64, m8, ta, mu 1816; RV64-NEXT: vluxei64.v v8, (zero), v8, v0.t 1817; RV64-NEXT: ret 1818 %v = call <vscale x 6 x double> @llvm.vp.gather.nxv6f64.nxv6p0f64(<vscale x 6 x double*> %ptrs, <vscale x 6 x i1> %m, i32 %evl) 1819 ret <vscale x 6 x double> %v 1820} 1821 1822define <vscale x 6 x double> @vpgather_baseidx_nxv6i8_nxv6f64(double* %base, <vscale x 6 x i8> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) { 1823; RV32-LABEL: vpgather_baseidx_nxv6i8_nxv6f64: 1824; RV32: # %bb.0: 1825; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1826; RV32-NEXT: vsext.vf4 v12, v8 1827; RV32-NEXT: vsll.vi v16, v12, 3 1828; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1829; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1830; RV32-NEXT: ret 1831; 1832; RV64-LABEL: vpgather_baseidx_nxv6i8_nxv6f64: 1833; RV64: # %bb.0: 1834; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1835; RV64-NEXT: vsext.vf8 v16, v8 1836; RV64-NEXT: vsll.vi v8, v16, 3 1837; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1838; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1839; RV64-NEXT: ret 1840 %ptrs = getelementptr inbounds double, double* %base, <vscale x 6 x i8> %idxs 1841 %v = call <vscale x 6 x double> @llvm.vp.gather.nxv6f64.nxv6p0f64(<vscale x 6 x double*> %ptrs, <vscale x 6 x i1> %m, i32 %evl) 1842 ret <vscale x 6 x double> %v 1843} 1844 1845define <vscale x 6 x double> @vpgather_baseidx_sext_nxv6i8_nxv6f64(double* %base, <vscale x 6 x i8> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) { 1846; RV32-LABEL: vpgather_baseidx_sext_nxv6i8_nxv6f64: 1847; RV32: # %bb.0: 1848; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1849; RV32-NEXT: vsext.vf8 v16, v8 1850; RV32-NEXT: vsll.vi v8, v16, 3 1851; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1852; RV32-NEXT: vncvt.x.x.w v16, v8 1853; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 1854; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1855; RV32-NEXT: ret 1856; 1857; RV64-LABEL: vpgather_baseidx_sext_nxv6i8_nxv6f64: 1858; RV64: # %bb.0: 1859; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1860; RV64-NEXT: vsext.vf8 v16, v8 1861; RV64-NEXT: vsll.vi v8, v16, 3 1862; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1863; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1864; RV64-NEXT: ret 1865 %eidxs = sext <vscale x 6 x i8> %idxs to <vscale x 6 x i64> 1866 %ptrs = getelementptr inbounds double, double* %base, <vscale x 6 x i64> %eidxs 1867 %v = call <vscale x 6 x double> @llvm.vp.gather.nxv6f64.nxv6p0f64(<vscale x 6 x double*> %ptrs, <vscale x 6 x i1> %m, i32 %evl) 1868 ret <vscale x 6 x double> %v 1869} 1870 1871define <vscale x 6 x double> @vpgather_baseidx_zext_nxv6i8_nxv6f64(double* %base, <vscale x 6 x i8> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) { 1872; RV32-LABEL: vpgather_baseidx_zext_nxv6i8_nxv6f64: 1873; RV32: # %bb.0: 1874; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1875; RV32-NEXT: vzext.vf8 v16, v8 1876; RV32-NEXT: vsll.vi v8, v16, 3 1877; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1878; RV32-NEXT: vncvt.x.x.w v16, v8 1879; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 1880; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1881; RV32-NEXT: ret 1882; 1883; RV64-LABEL: vpgather_baseidx_zext_nxv6i8_nxv6f64: 1884; RV64: # %bb.0: 1885; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1886; RV64-NEXT: vzext.vf8 v16, v8 1887; RV64-NEXT: vsll.vi v8, v16, 3 1888; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1889; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1890; RV64-NEXT: ret 1891 %eidxs = zext <vscale x 6 x i8> %idxs to <vscale x 6 x i64> 1892 %ptrs = getelementptr inbounds double, double* %base, <vscale x 6 x i64> %eidxs 1893 %v = call <vscale x 6 x double> @llvm.vp.gather.nxv6f64.nxv6p0f64(<vscale x 6 x double*> %ptrs, <vscale x 6 x i1> %m, i32 %evl) 1894 ret <vscale x 6 x double> %v 1895} 1896 1897define <vscale x 6 x double> @vpgather_baseidx_nxv6i16_nxv6f64(double* %base, <vscale x 6 x i16> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) { 1898; RV32-LABEL: vpgather_baseidx_nxv6i16_nxv6f64: 1899; RV32: # %bb.0: 1900; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1901; RV32-NEXT: vsext.vf2 v12, v8 1902; RV32-NEXT: vsll.vi v16, v12, 3 1903; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1904; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1905; RV32-NEXT: ret 1906; 1907; RV64-LABEL: vpgather_baseidx_nxv6i16_nxv6f64: 1908; RV64: # %bb.0: 1909; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1910; RV64-NEXT: vsext.vf4 v16, v8 1911; RV64-NEXT: vsll.vi v8, v16, 3 1912; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1913; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1914; RV64-NEXT: ret 1915 %ptrs = getelementptr inbounds double, double* %base, <vscale x 6 x i16> %idxs 1916 %v = call <vscale x 6 x double> @llvm.vp.gather.nxv6f64.nxv6p0f64(<vscale x 6 x double*> %ptrs, <vscale x 6 x i1> %m, i32 %evl) 1917 ret <vscale x 6 x double> %v 1918} 1919 1920define <vscale x 6 x double> @vpgather_baseidx_sext_nxv6i16_nxv6f64(double* %base, <vscale x 6 x i16> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) { 1921; RV32-LABEL: vpgather_baseidx_sext_nxv6i16_nxv6f64: 1922; RV32: # %bb.0: 1923; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1924; RV32-NEXT: vsext.vf4 v16, v8 1925; RV32-NEXT: vsll.vi v8, v16, 3 1926; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1927; RV32-NEXT: vncvt.x.x.w v16, v8 1928; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 1929; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1930; RV32-NEXT: ret 1931; 1932; RV64-LABEL: vpgather_baseidx_sext_nxv6i16_nxv6f64: 1933; RV64: # %bb.0: 1934; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1935; RV64-NEXT: vsext.vf4 v16, v8 1936; RV64-NEXT: vsll.vi v8, v16, 3 1937; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1938; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1939; RV64-NEXT: ret 1940 %eidxs = sext <vscale x 6 x i16> %idxs to <vscale x 6 x i64> 1941 %ptrs = getelementptr inbounds double, double* %base, <vscale x 6 x i64> %eidxs 1942 %v = call <vscale x 6 x double> @llvm.vp.gather.nxv6f64.nxv6p0f64(<vscale x 6 x double*> %ptrs, <vscale x 6 x i1> %m, i32 %evl) 1943 ret <vscale x 6 x double> %v 1944} 1945 1946define <vscale x 6 x double> @vpgather_baseidx_zext_nxv6i16_nxv6f64(double* %base, <vscale x 6 x i16> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) { 1947; RV32-LABEL: vpgather_baseidx_zext_nxv6i16_nxv6f64: 1948; RV32: # %bb.0: 1949; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1950; RV32-NEXT: vzext.vf4 v16, v8 1951; RV32-NEXT: vsll.vi v8, v16, 3 1952; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1953; RV32-NEXT: vncvt.x.x.w v16, v8 1954; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 1955; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1956; RV32-NEXT: ret 1957; 1958; RV64-LABEL: vpgather_baseidx_zext_nxv6i16_nxv6f64: 1959; RV64: # %bb.0: 1960; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1961; RV64-NEXT: vzext.vf4 v16, v8 1962; RV64-NEXT: vsll.vi v8, v16, 3 1963; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1964; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1965; RV64-NEXT: ret 1966 %eidxs = zext <vscale x 6 x i16> %idxs to <vscale x 6 x i64> 1967 %ptrs = getelementptr inbounds double, double* %base, <vscale x 6 x i64> %eidxs 1968 %v = call <vscale x 6 x double> @llvm.vp.gather.nxv6f64.nxv6p0f64(<vscale x 6 x double*> %ptrs, <vscale x 6 x i1> %m, i32 %evl) 1969 ret <vscale x 6 x double> %v 1970} 1971 1972define <vscale x 6 x double> @vpgather_baseidx_nxv6i32_nxv6f64(double* %base, <vscale x 6 x i32> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) { 1973; RV32-LABEL: vpgather_baseidx_nxv6i32_nxv6f64: 1974; RV32: # %bb.0: 1975; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1976; RV32-NEXT: vsll.vi v16, v8, 3 1977; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1978; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1979; RV32-NEXT: ret 1980; 1981; RV64-LABEL: vpgather_baseidx_nxv6i32_nxv6f64: 1982; RV64: # %bb.0: 1983; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1984; RV64-NEXT: vsext.vf2 v16, v8 1985; RV64-NEXT: vsll.vi v8, v16, 3 1986; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1987; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1988; RV64-NEXT: ret 1989 %ptrs = getelementptr inbounds double, double* %base, <vscale x 6 x i32> %idxs 1990 %v = call <vscale x 6 x double> @llvm.vp.gather.nxv6f64.nxv6p0f64(<vscale x 6 x double*> %ptrs, <vscale x 6 x i1> %m, i32 %evl) 1991 ret <vscale x 6 x double> %v 1992} 1993 1994define <vscale x 6 x double> @vpgather_baseidx_sext_nxv6i32_nxv6f64(double* %base, <vscale x 6 x i32> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) { 1995; RV32-LABEL: vpgather_baseidx_sext_nxv6i32_nxv6f64: 1996; RV32: # %bb.0: 1997; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1998; RV32-NEXT: vsext.vf2 v16, v8 1999; RV32-NEXT: vsll.vi v8, v16, 3 2000; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 2001; RV32-NEXT: vncvt.x.x.w v16, v8 2002; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 2003; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 2004; RV32-NEXT: ret 2005; 2006; RV64-LABEL: vpgather_baseidx_sext_nxv6i32_nxv6f64: 2007; RV64: # %bb.0: 2008; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2009; RV64-NEXT: vsext.vf2 v16, v8 2010; RV64-NEXT: vsll.vi v8, v16, 3 2011; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 2012; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 2013; RV64-NEXT: ret 2014 %eidxs = sext <vscale x 6 x i32> %idxs to <vscale x 6 x i64> 2015 %ptrs = getelementptr inbounds double, double* %base, <vscale x 6 x i64> %eidxs 2016 %v = call <vscale x 6 x double> @llvm.vp.gather.nxv6f64.nxv6p0f64(<vscale x 6 x double*> %ptrs, <vscale x 6 x i1> %m, i32 %evl) 2017 ret <vscale x 6 x double> %v 2018} 2019 2020define <vscale x 6 x double> @vpgather_baseidx_zext_nxv6i32_nxv6f64(double* %base, <vscale x 6 x i32> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) { 2021; RV32-LABEL: vpgather_baseidx_zext_nxv6i32_nxv6f64: 2022; RV32: # %bb.0: 2023; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2024; RV32-NEXT: vzext.vf2 v16, v8 2025; RV32-NEXT: vsll.vi v8, v16, 3 2026; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 2027; RV32-NEXT: vncvt.x.x.w v16, v8 2028; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 2029; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 2030; RV32-NEXT: ret 2031; 2032; RV64-LABEL: vpgather_baseidx_zext_nxv6i32_nxv6f64: 2033; RV64: # %bb.0: 2034; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2035; RV64-NEXT: vzext.vf2 v16, v8 2036; RV64-NEXT: vsll.vi v8, v16, 3 2037; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 2038; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 2039; RV64-NEXT: ret 2040 %eidxs = zext <vscale x 6 x i32> %idxs to <vscale x 6 x i64> 2041 %ptrs = getelementptr inbounds double, double* %base, <vscale x 6 x i64> %eidxs 2042 %v = call <vscale x 6 x double> @llvm.vp.gather.nxv6f64.nxv6p0f64(<vscale x 6 x double*> %ptrs, <vscale x 6 x i1> %m, i32 %evl) 2043 ret <vscale x 6 x double> %v 2044} 2045 2046define <vscale x 6 x double> @vpgather_baseidx_nxv6f64(double* %base, <vscale x 6 x i64> %idxs, <vscale x 6 x i1> %m, i32 zeroext %evl) { 2047; RV32-LABEL: vpgather_baseidx_nxv6f64: 2048; RV32: # %bb.0: 2049; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2050; RV32-NEXT: vsll.vi v8, v8, 3 2051; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 2052; RV32-NEXT: vncvt.x.x.w v16, v8 2053; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 2054; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 2055; RV32-NEXT: ret 2056; 2057; RV64-LABEL: vpgather_baseidx_nxv6f64: 2058; RV64: # %bb.0: 2059; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2060; RV64-NEXT: vsll.vi v8, v8, 3 2061; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 2062; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 2063; RV64-NEXT: ret 2064 %ptrs = getelementptr inbounds double, double* %base, <vscale x 6 x i64> %idxs 2065 %v = call <vscale x 6 x double> @llvm.vp.gather.nxv6f64.nxv6p0f64(<vscale x 6 x double*> %ptrs, <vscale x 6 x i1> %m, i32 %evl) 2066 ret <vscale x 6 x double> %v 2067} 2068 2069declare <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*>, <vscale x 8 x i1>, i32) 2070 2071define <vscale x 8 x double> @vpgather_nxv8f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 2072; RV32-LABEL: vpgather_nxv8f64: 2073; RV32: # %bb.0: 2074; RV32-NEXT: vsetvli zero, a0, e64, m8, ta, mu 2075; RV32-NEXT: vluxei32.v v16, (zero), v8, v0.t 2076; RV32-NEXT: vmv.v.v v8, v16 2077; RV32-NEXT: ret 2078; 2079; RV64-LABEL: vpgather_nxv8f64: 2080; RV64: # %bb.0: 2081; RV64-NEXT: vsetvli zero, a0, e64, m8, ta, mu 2082; RV64-NEXT: vluxei64.v v8, (zero), v8, v0.t 2083; RV64-NEXT: ret 2084 %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 2085 ret <vscale x 8 x double> %v 2086} 2087 2088define <vscale x 8 x double> @vpgather_baseidx_nxv8i8_nxv8f64(double* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 2089; RV32-LABEL: vpgather_baseidx_nxv8i8_nxv8f64: 2090; RV32: # %bb.0: 2091; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 2092; RV32-NEXT: vsext.vf4 v12, v8 2093; RV32-NEXT: vsll.vi v16, v12, 3 2094; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 2095; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 2096; RV32-NEXT: ret 2097; 2098; RV64-LABEL: vpgather_baseidx_nxv8i8_nxv8f64: 2099; RV64: # %bb.0: 2100; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2101; RV64-NEXT: vsext.vf8 v16, v8 2102; RV64-NEXT: vsll.vi v8, v16, 3 2103; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 2104; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 2105; RV64-NEXT: ret 2106 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i8> %idxs 2107 %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 2108 ret <vscale x 8 x double> %v 2109} 2110 2111define <vscale x 8 x double> @vpgather_baseidx_sext_nxv8i8_nxv8f64(double* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 2112; RV32-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8f64: 2113; RV32: # %bb.0: 2114; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2115; RV32-NEXT: vsext.vf8 v16, v8 2116; RV32-NEXT: vsll.vi v8, v16, 3 2117; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 2118; RV32-NEXT: vncvt.x.x.w v16, v8 2119; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 2120; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 2121; RV32-NEXT: ret 2122; 2123; RV64-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8f64: 2124; RV64: # %bb.0: 2125; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2126; RV64-NEXT: vsext.vf8 v16, v8 2127; RV64-NEXT: vsll.vi v8, v16, 3 2128; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 2129; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 2130; RV64-NEXT: ret 2131 %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i64> 2132 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs 2133 %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 2134 ret <vscale x 8 x double> %v 2135} 2136 2137define <vscale x 8 x double> @vpgather_baseidx_zext_nxv8i8_nxv8f64(double* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 2138; RV32-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8f64: 2139; RV32: # %bb.0: 2140; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2141; RV32-NEXT: vzext.vf8 v16, v8 2142; RV32-NEXT: vsll.vi v8, v16, 3 2143; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 2144; RV32-NEXT: vncvt.x.x.w v16, v8 2145; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 2146; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 2147; RV32-NEXT: ret 2148; 2149; RV64-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8f64: 2150; RV64: # %bb.0: 2151; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2152; RV64-NEXT: vzext.vf8 v16, v8 2153; RV64-NEXT: vsll.vi v8, v16, 3 2154; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 2155; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 2156; RV64-NEXT: ret 2157 %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i64> 2158 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs 2159 %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 2160 ret <vscale x 8 x double> %v 2161} 2162 2163define <vscale x 8 x double> @vpgather_baseidx_nxv8i16_nxv8f64(double* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 2164; RV32-LABEL: vpgather_baseidx_nxv8i16_nxv8f64: 2165; RV32: # %bb.0: 2166; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 2167; RV32-NEXT: vsext.vf2 v12, v8 2168; RV32-NEXT: vsll.vi v16, v12, 3 2169; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 2170; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 2171; RV32-NEXT: ret 2172; 2173; RV64-LABEL: vpgather_baseidx_nxv8i16_nxv8f64: 2174; RV64: # %bb.0: 2175; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2176; RV64-NEXT: vsext.vf4 v16, v8 2177; RV64-NEXT: vsll.vi v8, v16, 3 2178; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 2179; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 2180; RV64-NEXT: ret 2181 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i16> %idxs 2182 %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 2183 ret <vscale x 8 x double> %v 2184} 2185 2186define <vscale x 8 x double> @vpgather_baseidx_sext_nxv8i16_nxv8f64(double* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 2187; RV32-LABEL: vpgather_baseidx_sext_nxv8i16_nxv8f64: 2188; RV32: # %bb.0: 2189; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2190; RV32-NEXT: vsext.vf4 v16, v8 2191; RV32-NEXT: vsll.vi v8, v16, 3 2192; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 2193; RV32-NEXT: vncvt.x.x.w v16, v8 2194; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 2195; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 2196; RV32-NEXT: ret 2197; 2198; RV64-LABEL: vpgather_baseidx_sext_nxv8i16_nxv8f64: 2199; RV64: # %bb.0: 2200; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2201; RV64-NEXT: vsext.vf4 v16, v8 2202; RV64-NEXT: vsll.vi v8, v16, 3 2203; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 2204; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 2205; RV64-NEXT: ret 2206 %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i64> 2207 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs 2208 %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 2209 ret <vscale x 8 x double> %v 2210} 2211 2212define <vscale x 8 x double> @vpgather_baseidx_zext_nxv8i16_nxv8f64(double* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 2213; RV32-LABEL: vpgather_baseidx_zext_nxv8i16_nxv8f64: 2214; RV32: # %bb.0: 2215; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2216; RV32-NEXT: vzext.vf4 v16, v8 2217; RV32-NEXT: vsll.vi v8, v16, 3 2218; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 2219; RV32-NEXT: vncvt.x.x.w v16, v8 2220; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 2221; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 2222; RV32-NEXT: ret 2223; 2224; RV64-LABEL: vpgather_baseidx_zext_nxv8i16_nxv8f64: 2225; RV64: # %bb.0: 2226; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2227; RV64-NEXT: vzext.vf4 v16, v8 2228; RV64-NEXT: vsll.vi v8, v16, 3 2229; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 2230; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 2231; RV64-NEXT: ret 2232 %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i64> 2233 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs 2234 %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 2235 ret <vscale x 8 x double> %v 2236} 2237 2238define <vscale x 8 x double> @vpgather_baseidx_nxv8i32_nxv8f64(double* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 2239; RV32-LABEL: vpgather_baseidx_nxv8i32_nxv8f64: 2240; RV32: # %bb.0: 2241; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 2242; RV32-NEXT: vsll.vi v16, v8, 3 2243; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 2244; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 2245; RV32-NEXT: ret 2246; 2247; RV64-LABEL: vpgather_baseidx_nxv8i32_nxv8f64: 2248; RV64: # %bb.0: 2249; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2250; RV64-NEXT: vsext.vf2 v16, v8 2251; RV64-NEXT: vsll.vi v8, v16, 3 2252; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 2253; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 2254; RV64-NEXT: ret 2255 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i32> %idxs 2256 %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 2257 ret <vscale x 8 x double> %v 2258} 2259 2260define <vscale x 8 x double> @vpgather_baseidx_sext_nxv8i32_nxv8f64(double* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 2261; RV32-LABEL: vpgather_baseidx_sext_nxv8i32_nxv8f64: 2262; RV32: # %bb.0: 2263; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2264; RV32-NEXT: vsext.vf2 v16, v8 2265; RV32-NEXT: vsll.vi v8, v16, 3 2266; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 2267; RV32-NEXT: vncvt.x.x.w v16, v8 2268; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 2269; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 2270; RV32-NEXT: ret 2271; 2272; RV64-LABEL: vpgather_baseidx_sext_nxv8i32_nxv8f64: 2273; RV64: # %bb.0: 2274; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2275; RV64-NEXT: vsext.vf2 v16, v8 2276; RV64-NEXT: vsll.vi v8, v16, 3 2277; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 2278; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 2279; RV64-NEXT: ret 2280 %eidxs = sext <vscale x 8 x i32> %idxs to <vscale x 8 x i64> 2281 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs 2282 %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 2283 ret <vscale x 8 x double> %v 2284} 2285 2286define <vscale x 8 x double> @vpgather_baseidx_zext_nxv8i32_nxv8f64(double* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 2287; RV32-LABEL: vpgather_baseidx_zext_nxv8i32_nxv8f64: 2288; RV32: # %bb.0: 2289; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2290; RV32-NEXT: vzext.vf2 v16, v8 2291; RV32-NEXT: vsll.vi v8, v16, 3 2292; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 2293; RV32-NEXT: vncvt.x.x.w v16, v8 2294; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 2295; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 2296; RV32-NEXT: ret 2297; 2298; RV64-LABEL: vpgather_baseidx_zext_nxv8i32_nxv8f64: 2299; RV64: # %bb.0: 2300; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2301; RV64-NEXT: vzext.vf2 v16, v8 2302; RV64-NEXT: vsll.vi v8, v16, 3 2303; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 2304; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 2305; RV64-NEXT: ret 2306 %eidxs = zext <vscale x 8 x i32> %idxs to <vscale x 8 x i64> 2307 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs 2308 %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 2309 ret <vscale x 8 x double> %v 2310} 2311 2312define <vscale x 8 x double> @vpgather_baseidx_nxv8f64(double* %base, <vscale x 8 x i64> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 2313; RV32-LABEL: vpgather_baseidx_nxv8f64: 2314; RV32: # %bb.0: 2315; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2316; RV32-NEXT: vsll.vi v8, v8, 3 2317; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 2318; RV32-NEXT: vncvt.x.x.w v16, v8 2319; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 2320; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 2321; RV32-NEXT: ret 2322; 2323; RV64-LABEL: vpgather_baseidx_nxv8f64: 2324; RV64: # %bb.0: 2325; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2326; RV64-NEXT: vsll.vi v8, v8, 3 2327; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 2328; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 2329; RV64-NEXT: ret 2330 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %idxs 2331 %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 2332 ret <vscale x 8 x double> %v 2333} 2334 2335declare <vscale x 16 x double> @llvm.vp.gather.nxv16f64.nxv16p0f64(<vscale x 16 x double*>, <vscale x 16 x i1>, i32) 2336 2337define <vscale x 16 x double> @vpgather_nxv16f64(<vscale x 16 x double*> %ptrs, <vscale x 16 x i1> %m, i32 zeroext %evl) { 2338; RV32-LABEL: vpgather_nxv16f64: 2339; RV32: # %bb.0: 2340; RV32-NEXT: vmv1r.v v24, v0 2341; RV32-NEXT: li a2, 0 2342; RV32-NEXT: csrr a1, vlenb 2343; RV32-NEXT: srli a4, a1, 3 2344; RV32-NEXT: vsetvli a3, zero, e8, mf4, ta, mu 2345; RV32-NEXT: sub a3, a0, a1 2346; RV32-NEXT: vslidedown.vx v0, v0, a4 2347; RV32-NEXT: bltu a0, a3, .LBB102_2 2348; RV32-NEXT: # %bb.1: 2349; RV32-NEXT: mv a2, a3 2350; RV32-NEXT: .LBB102_2: 2351; RV32-NEXT: vsetvli zero, a2, e64, m8, ta, mu 2352; RV32-NEXT: vluxei32.v v16, (zero), v12, v0.t 2353; RV32-NEXT: bltu a0, a1, .LBB102_4 2354; RV32-NEXT: # %bb.3: 2355; RV32-NEXT: mv a0, a1 2356; RV32-NEXT: .LBB102_4: 2357; RV32-NEXT: vsetvli zero, a0, e64, m8, ta, mu 2358; RV32-NEXT: vmv1r.v v0, v24 2359; RV32-NEXT: vluxei32.v v24, (zero), v8, v0.t 2360; RV32-NEXT: vmv.v.v v8, v24 2361; RV32-NEXT: ret 2362; 2363; RV64-LABEL: vpgather_nxv16f64: 2364; RV64: # %bb.0: 2365; RV64-NEXT: vmv1r.v v24, v0 2366; RV64-NEXT: li a2, 0 2367; RV64-NEXT: csrr a1, vlenb 2368; RV64-NEXT: srli a4, a1, 3 2369; RV64-NEXT: vsetvli a3, zero, e8, mf4, ta, mu 2370; RV64-NEXT: sub a3, a0, a1 2371; RV64-NEXT: vslidedown.vx v0, v0, a4 2372; RV64-NEXT: bltu a0, a3, .LBB102_2 2373; RV64-NEXT: # %bb.1: 2374; RV64-NEXT: mv a2, a3 2375; RV64-NEXT: .LBB102_2: 2376; RV64-NEXT: vsetvli zero, a2, e64, m8, ta, mu 2377; RV64-NEXT: vluxei64.v v16, (zero), v16, v0.t 2378; RV64-NEXT: bltu a0, a1, .LBB102_4 2379; RV64-NEXT: # %bb.3: 2380; RV64-NEXT: mv a0, a1 2381; RV64-NEXT: .LBB102_4: 2382; RV64-NEXT: vsetvli zero, a0, e64, m8, ta, mu 2383; RV64-NEXT: vmv1r.v v0, v24 2384; RV64-NEXT: vluxei64.v v8, (zero), v8, v0.t 2385; RV64-NEXT: ret 2386 %v = call <vscale x 16 x double> @llvm.vp.gather.nxv16f64.nxv16p0f64(<vscale x 16 x double*> %ptrs, <vscale x 16 x i1> %m, i32 %evl) 2387 ret <vscale x 16 x double> %v 2388} 2389 2390define <vscale x 16 x double> @vpgather_baseidx_nxv16i16_nxv16f64(double* %base, <vscale x 16 x i16> %idxs, <vscale x 16 x i1> %m, i32 zeroext %evl) { 2391; RV32-LABEL: vpgather_baseidx_nxv16i16_nxv16f64: 2392; RV32: # %bb.0: 2393; RV32-NEXT: vmv1r.v v12, v0 2394; RV32-NEXT: li a3, 0 2395; RV32-NEXT: csrr a2, vlenb 2396; RV32-NEXT: srli a5, a2, 3 2397; RV32-NEXT: vsetvli a4, zero, e8, mf4, ta, mu 2398; RV32-NEXT: sub a4, a1, a2 2399; RV32-NEXT: vslidedown.vx v0, v0, a5 2400; RV32-NEXT: bltu a1, a4, .LBB103_2 2401; RV32-NEXT: # %bb.1: 2402; RV32-NEXT: mv a3, a4 2403; RV32-NEXT: .LBB103_2: 2404; RV32-NEXT: vsetvli a4, zero, e32, m8, ta, mu 2405; RV32-NEXT: vsext.vf2 v16, v8 2406; RV32-NEXT: vsll.vi v24, v16, 3 2407; RV32-NEXT: vsetvli zero, a3, e64, m8, ta, mu 2408; RV32-NEXT: vluxei32.v v16, (a0), v28, v0.t 2409; RV32-NEXT: bltu a1, a2, .LBB103_4 2410; RV32-NEXT: # %bb.3: 2411; RV32-NEXT: mv a1, a2 2412; RV32-NEXT: .LBB103_4: 2413; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 2414; RV32-NEXT: vmv1r.v v0, v12 2415; RV32-NEXT: vluxei32.v v8, (a0), v24, v0.t 2416; RV32-NEXT: ret 2417; 2418; RV64-LABEL: vpgather_baseidx_nxv16i16_nxv16f64: 2419; RV64: # %bb.0: 2420; RV64-NEXT: vmv1r.v v12, v0 2421; RV64-NEXT: li a3, 0 2422; RV64-NEXT: csrr a2, vlenb 2423; RV64-NEXT: srli a5, a2, 3 2424; RV64-NEXT: vsetvli a4, zero, e8, mf4, ta, mu 2425; RV64-NEXT: sub a4, a1, a2 2426; RV64-NEXT: vslidedown.vx v0, v0, a5 2427; RV64-NEXT: bltu a1, a4, .LBB103_2 2428; RV64-NEXT: # %bb.1: 2429; RV64-NEXT: mv a3, a4 2430; RV64-NEXT: .LBB103_2: 2431; RV64-NEXT: vsetvli a4, zero, e64, m8, ta, mu 2432; RV64-NEXT: vsext.vf4 v16, v10 2433; RV64-NEXT: vsll.vi v16, v16, 3 2434; RV64-NEXT: vsetvli zero, a3, e64, m8, ta, mu 2435; RV64-NEXT: vluxei64.v v16, (a0), v16, v0.t 2436; RV64-NEXT: bltu a1, a2, .LBB103_4 2437; RV64-NEXT: # %bb.3: 2438; RV64-NEXT: mv a1, a2 2439; RV64-NEXT: .LBB103_4: 2440; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2441; RV64-NEXT: vsext.vf4 v24, v8 2442; RV64-NEXT: vsll.vi v24, v24, 3 2443; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 2444; RV64-NEXT: vmv1r.v v0, v12 2445; RV64-NEXT: vluxei64.v v8, (a0), v24, v0.t 2446; RV64-NEXT: ret 2447 %ptrs = getelementptr inbounds double, double* %base, <vscale x 16 x i16> %idxs 2448 %v = call <vscale x 16 x double> @llvm.vp.gather.nxv16f64.nxv16p0f64(<vscale x 16 x double*> %ptrs, <vscale x 16 x i1> %m, i32 %evl) 2449 ret <vscale x 16 x double> %v 2450} 2451 2452define <vscale x 16 x double> @vpgather_baseidx_sext_nxv16i16_nxv16f64(double* %base, <vscale x 16 x i16> %idxs, <vscale x 16 x i1> %m, i32 zeroext %evl) { 2453; RV32-LABEL: vpgather_baseidx_sext_nxv16i16_nxv16f64: 2454; RV32: # %bb.0: 2455; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2456; RV32-NEXT: csrr a2, vlenb 2457; RV32-NEXT: vsext.vf4 v16, v8 2458; RV32-NEXT: mv a3, a1 2459; RV32-NEXT: bltu a1, a2, .LBB104_2 2460; RV32-NEXT: # %bb.1: 2461; RV32-NEXT: mv a3, a2 2462; RV32-NEXT: .LBB104_2: 2463; RV32-NEXT: li a4, 0 2464; RV32-NEXT: vsext.vf4 v24, v10 2465; RV32-NEXT: vsll.vi v8, v16, 3 2466; RV32-NEXT: vsetvli zero, a3, e32, m4, ta, mu 2467; RV32-NEXT: vncvt.x.x.w v16, v8 2468; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 2469; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 2470; RV32-NEXT: srli a3, a2, 3 2471; RV32-NEXT: vsetvli a5, zero, e8, mf4, ta, mu 2472; RV32-NEXT: sub a2, a1, a2 2473; RV32-NEXT: vslidedown.vx v0, v0, a3 2474; RV32-NEXT: bltu a1, a2, .LBB104_4 2475; RV32-NEXT: # %bb.3: 2476; RV32-NEXT: mv a4, a2 2477; RV32-NEXT: .LBB104_4: 2478; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, mu 2479; RV32-NEXT: vsll.vi v16, v24, 3 2480; RV32-NEXT: vsetvli zero, a4, e32, m4, ta, mu 2481; RV32-NEXT: vncvt.x.x.w v24, v16 2482; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 2483; RV32-NEXT: vluxei32.v v16, (a0), v24, v0.t 2484; RV32-NEXT: ret 2485; 2486; RV64-LABEL: vpgather_baseidx_sext_nxv16i16_nxv16f64: 2487; RV64: # %bb.0: 2488; RV64-NEXT: vmv1r.v v12, v0 2489; RV64-NEXT: li a3, 0 2490; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2491; RV64-NEXT: vsext.vf4 v16, v10 2492; RV64-NEXT: csrr a2, vlenb 2493; RV64-NEXT: srli a5, a2, 3 2494; RV64-NEXT: vsetvli a4, zero, e8, mf4, ta, mu 2495; RV64-NEXT: sub a4, a1, a2 2496; RV64-NEXT: vslidedown.vx v0, v0, a5 2497; RV64-NEXT: bltu a1, a4, .LBB104_2 2498; RV64-NEXT: # %bb.1: 2499; RV64-NEXT: mv a3, a4 2500; RV64-NEXT: .LBB104_2: 2501; RV64-NEXT: vsetvli a4, zero, e64, m8, ta, mu 2502; RV64-NEXT: vsext.vf4 v24, v8 2503; RV64-NEXT: vsll.vi v16, v16, 3 2504; RV64-NEXT: vsetvli zero, a3, e64, m8, ta, mu 2505; RV64-NEXT: vluxei64.v v16, (a0), v16, v0.t 2506; RV64-NEXT: bltu a1, a2, .LBB104_4 2507; RV64-NEXT: # %bb.3: 2508; RV64-NEXT: mv a1, a2 2509; RV64-NEXT: .LBB104_4: 2510; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2511; RV64-NEXT: vsll.vi v24, v24, 3 2512; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 2513; RV64-NEXT: vmv1r.v v0, v12 2514; RV64-NEXT: vluxei64.v v8, (a0), v24, v0.t 2515; RV64-NEXT: ret 2516 %eidxs = sext <vscale x 16 x i16> %idxs to <vscale x 16 x i64> 2517 %ptrs = getelementptr inbounds double, double* %base, <vscale x 16 x i64> %eidxs 2518 %v = call <vscale x 16 x double> @llvm.vp.gather.nxv16f64.nxv16p0f64(<vscale x 16 x double*> %ptrs, <vscale x 16 x i1> %m, i32 %evl) 2519 ret <vscale x 16 x double> %v 2520} 2521 2522define <vscale x 16 x double> @vpgather_baseidx_zext_nxv16i16_nxv16f64(double* %base, <vscale x 16 x i16> %idxs, <vscale x 16 x i1> %m, i32 zeroext %evl) { 2523; RV32-LABEL: vpgather_baseidx_zext_nxv16i16_nxv16f64: 2524; RV32: # %bb.0: 2525; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2526; RV32-NEXT: csrr a2, vlenb 2527; RV32-NEXT: vzext.vf4 v16, v8 2528; RV32-NEXT: mv a3, a1 2529; RV32-NEXT: bltu a1, a2, .LBB105_2 2530; RV32-NEXT: # %bb.1: 2531; RV32-NEXT: mv a3, a2 2532; RV32-NEXT: .LBB105_2: 2533; RV32-NEXT: li a4, 0 2534; RV32-NEXT: vzext.vf4 v24, v10 2535; RV32-NEXT: vsll.vi v8, v16, 3 2536; RV32-NEXT: vsetvli zero, a3, e32, m4, ta, mu 2537; RV32-NEXT: vncvt.x.x.w v16, v8 2538; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 2539; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 2540; RV32-NEXT: srli a3, a2, 3 2541; RV32-NEXT: vsetvli a5, zero, e8, mf4, ta, mu 2542; RV32-NEXT: sub a2, a1, a2 2543; RV32-NEXT: vslidedown.vx v0, v0, a3 2544; RV32-NEXT: bltu a1, a2, .LBB105_4 2545; RV32-NEXT: # %bb.3: 2546; RV32-NEXT: mv a4, a2 2547; RV32-NEXT: .LBB105_4: 2548; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, mu 2549; RV32-NEXT: vsll.vi v16, v24, 3 2550; RV32-NEXT: vsetvli zero, a4, e32, m4, ta, mu 2551; RV32-NEXT: vncvt.x.x.w v24, v16 2552; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 2553; RV32-NEXT: vluxei32.v v16, (a0), v24, v0.t 2554; RV32-NEXT: ret 2555; 2556; RV64-LABEL: vpgather_baseidx_zext_nxv16i16_nxv16f64: 2557; RV64: # %bb.0: 2558; RV64-NEXT: vmv1r.v v12, v0 2559; RV64-NEXT: li a3, 0 2560; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2561; RV64-NEXT: vzext.vf4 v16, v10 2562; RV64-NEXT: csrr a2, vlenb 2563; RV64-NEXT: srli a5, a2, 3 2564; RV64-NEXT: vsetvli a4, zero, e8, mf4, ta, mu 2565; RV64-NEXT: sub a4, a1, a2 2566; RV64-NEXT: vslidedown.vx v0, v0, a5 2567; RV64-NEXT: bltu a1, a4, .LBB105_2 2568; RV64-NEXT: # %bb.1: 2569; RV64-NEXT: mv a3, a4 2570; RV64-NEXT: .LBB105_2: 2571; RV64-NEXT: vsetvli a4, zero, e64, m8, ta, mu 2572; RV64-NEXT: vzext.vf4 v24, v8 2573; RV64-NEXT: vsll.vi v16, v16, 3 2574; RV64-NEXT: vsetvli zero, a3, e64, m8, ta, mu 2575; RV64-NEXT: vluxei64.v v16, (a0), v16, v0.t 2576; RV64-NEXT: bltu a1, a2, .LBB105_4 2577; RV64-NEXT: # %bb.3: 2578; RV64-NEXT: mv a1, a2 2579; RV64-NEXT: .LBB105_4: 2580; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 2581; RV64-NEXT: vsll.vi v24, v24, 3 2582; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 2583; RV64-NEXT: vmv1r.v v0, v12 2584; RV64-NEXT: vluxei64.v v8, (a0), v24, v0.t 2585; RV64-NEXT: ret 2586 %eidxs = zext <vscale x 16 x i16> %idxs to <vscale x 16 x i64> 2587 %ptrs = getelementptr inbounds double, double* %base, <vscale x 16 x i64> %eidxs 2588 %v = call <vscale x 16 x double> @llvm.vp.gather.nxv16f64.nxv16p0f64(<vscale x 16 x double*> %ptrs, <vscale x 16 x i1> %m, i32 %evl) 2589 ret <vscale x 16 x double> %v 2590} 2591