1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -mattr=+d,+experimental-zfh,+experimental-v \ 3; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RV32 4; RUN: llc -mtriple=riscv64 -mattr=+d,+experimental-zfh,+experimental-v \ 5; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=RV64 6 7declare <vscale x 1 x i8> @llvm.vp.gather.nxv1i8.nxv1p0i8(<vscale x 1 x i8*>, <vscale x 1 x i1>, i32) 8 9define <vscale x 1 x i8> @vpgather_nxv1i8(<vscale x 1 x i8*> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) { 10; RV32-LABEL: vpgather_nxv1i8: 11; RV32: # %bb.0: 12; RV32-NEXT: vsetvli zero, a0, e8, mf8, ta, mu 13; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 14; RV32-NEXT: vmv1r.v v8, v9 15; RV32-NEXT: ret 16; 17; RV64-LABEL: vpgather_nxv1i8: 18; RV64: # %bb.0: 19; RV64-NEXT: vsetvli zero, a0, e8, mf8, ta, mu 20; RV64-NEXT: vluxei64.v v9, (zero), v8, v0.t 21; RV64-NEXT: vmv1r.v v8, v9 22; RV64-NEXT: ret 23 %v = call <vscale x 1 x i8> @llvm.vp.gather.nxv1i8.nxv1p0i8(<vscale x 1 x i8*> %ptrs, <vscale x 1 x i1> %m, i32 %evl) 24 ret <vscale x 1 x i8> %v 25} 26 27declare <vscale x 2 x i8> @llvm.vp.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*>, <vscale x 2 x i1>, i32) 28 29define <vscale x 2 x i8> @vpgather_nxv2i8(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 30; RV32-LABEL: vpgather_nxv2i8: 31; RV32: # %bb.0: 32; RV32-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 33; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 34; RV32-NEXT: vmv1r.v v8, v9 35; RV32-NEXT: ret 36; 37; RV64-LABEL: vpgather_nxv2i8: 38; RV64: # %bb.0: 39; RV64-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 40; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 41; RV64-NEXT: vmv1r.v v8, v10 42; RV64-NEXT: ret 43 %v = call <vscale x 2 x i8> @llvm.vp.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 44 ret <vscale x 2 x i8> %v 45} 46 47define <vscale x 2 x i16> @vpgather_nxv2i8_sextload_nxv2i16(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 48; RV32-LABEL: vpgather_nxv2i8_sextload_nxv2i16: 49; RV32: # %bb.0: 50; RV32-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 51; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 52; RV32-NEXT: vsetvli a0, zero, e16, mf2, ta, mu 53; RV32-NEXT: vsext.vf2 v8, v9 54; RV32-NEXT: ret 55; 56; RV64-LABEL: vpgather_nxv2i8_sextload_nxv2i16: 57; RV64: # %bb.0: 58; RV64-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 59; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 60; RV64-NEXT: vsetvli a0, zero, e16, mf2, ta, mu 61; RV64-NEXT: vsext.vf2 v8, v10 62; RV64-NEXT: ret 63 %v = call <vscale x 2 x i8> @llvm.vp.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 64 %ev = sext <vscale x 2 x i8> %v to <vscale x 2 x i16> 65 ret <vscale x 2 x i16> %ev 66} 67 68define <vscale x 2 x i16> @vpgather_nxv2i8_zextload_nxv2i16(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 69; RV32-LABEL: vpgather_nxv2i8_zextload_nxv2i16: 70; RV32: # %bb.0: 71; RV32-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 72; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 73; RV32-NEXT: vsetvli a0, zero, e16, mf2, ta, mu 74; RV32-NEXT: vzext.vf2 v8, v9 75; RV32-NEXT: ret 76; 77; RV64-LABEL: vpgather_nxv2i8_zextload_nxv2i16: 78; RV64: # %bb.0: 79; RV64-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 80; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 81; RV64-NEXT: vsetvli a0, zero, e16, mf2, ta, mu 82; RV64-NEXT: vzext.vf2 v8, v10 83; RV64-NEXT: ret 84 %v = call <vscale x 2 x i8> @llvm.vp.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 85 %ev = zext <vscale x 2 x i8> %v to <vscale x 2 x i16> 86 ret <vscale x 2 x i16> %ev 87} 88 89define <vscale x 2 x i32> @vpgather_nxv2i8_sextload_nxv2i32(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 90; RV32-LABEL: vpgather_nxv2i8_sextload_nxv2i32: 91; RV32: # %bb.0: 92; RV32-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 93; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 94; RV32-NEXT: vsetvli a0, zero, e32, m1, ta, mu 95; RV32-NEXT: vsext.vf4 v8, v9 96; RV32-NEXT: ret 97; 98; RV64-LABEL: vpgather_nxv2i8_sextload_nxv2i32: 99; RV64: # %bb.0: 100; RV64-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 101; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 102; RV64-NEXT: vsetvli a0, zero, e32, m1, ta, mu 103; RV64-NEXT: vsext.vf4 v8, v10 104; RV64-NEXT: ret 105 %v = call <vscale x 2 x i8> @llvm.vp.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 106 %ev = sext <vscale x 2 x i8> %v to <vscale x 2 x i32> 107 ret <vscale x 2 x i32> %ev 108} 109 110define <vscale x 2 x i32> @vpgather_nxv2i8_zextload_nxv2i32(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 111; RV32-LABEL: vpgather_nxv2i8_zextload_nxv2i32: 112; RV32: # %bb.0: 113; RV32-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 114; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 115; RV32-NEXT: vsetvli a0, zero, e32, m1, ta, mu 116; RV32-NEXT: vzext.vf4 v8, v9 117; RV32-NEXT: ret 118; 119; RV64-LABEL: vpgather_nxv2i8_zextload_nxv2i32: 120; RV64: # %bb.0: 121; RV64-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 122; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 123; RV64-NEXT: vsetvli a0, zero, e32, m1, ta, mu 124; RV64-NEXT: vzext.vf4 v8, v10 125; RV64-NEXT: ret 126 %v = call <vscale x 2 x i8> @llvm.vp.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 127 %ev = zext <vscale x 2 x i8> %v to <vscale x 2 x i32> 128 ret <vscale x 2 x i32> %ev 129} 130 131define <vscale x 2 x i64> @vpgather_nxv2i8_sextload_nxv2i64(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 132; RV32-LABEL: vpgather_nxv2i8_sextload_nxv2i64: 133; RV32: # %bb.0: 134; RV32-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 135; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 136; RV32-NEXT: vsetvli a0, zero, e64, m2, ta, mu 137; RV32-NEXT: vsext.vf8 v8, v10 138; RV32-NEXT: ret 139; 140; RV64-LABEL: vpgather_nxv2i8_sextload_nxv2i64: 141; RV64: # %bb.0: 142; RV64-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 143; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 144; RV64-NEXT: vsetvli a0, zero, e64, m2, ta, mu 145; RV64-NEXT: vsext.vf8 v8, v10 146; RV64-NEXT: ret 147 %v = call <vscale x 2 x i8> @llvm.vp.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 148 %ev = sext <vscale x 2 x i8> %v to <vscale x 2 x i64> 149 ret <vscale x 2 x i64> %ev 150} 151 152define <vscale x 2 x i64> @vpgather_nxv2i8_zextload_nxv2i64(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 153; RV32-LABEL: vpgather_nxv2i8_zextload_nxv2i64: 154; RV32: # %bb.0: 155; RV32-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 156; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 157; RV32-NEXT: vsetvli a0, zero, e64, m2, ta, mu 158; RV32-NEXT: vzext.vf8 v8, v10 159; RV32-NEXT: ret 160; 161; RV64-LABEL: vpgather_nxv2i8_zextload_nxv2i64: 162; RV64: # %bb.0: 163; RV64-NEXT: vsetvli zero, a0, e8, mf4, ta, mu 164; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 165; RV64-NEXT: vsetvli a0, zero, e64, m2, ta, mu 166; RV64-NEXT: vzext.vf8 v8, v10 167; RV64-NEXT: ret 168 %v = call <vscale x 2 x i8> @llvm.vp.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 169 %ev = zext <vscale x 2 x i8> %v to <vscale x 2 x i64> 170 ret <vscale x 2 x i64> %ev 171} 172 173declare <vscale x 4 x i8> @llvm.vp.gather.nxv4i8.nxv4p0i8(<vscale x 4 x i8*>, <vscale x 4 x i1>, i32) 174 175define <vscale x 4 x i8> @vpgather_nxv4i8(<vscale x 4 x i8*> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) { 176; RV32-LABEL: vpgather_nxv4i8: 177; RV32: # %bb.0: 178; RV32-NEXT: vsetvli zero, a0, e8, mf2, ta, mu 179; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 180; RV32-NEXT: vmv1r.v v8, v10 181; RV32-NEXT: ret 182; 183; RV64-LABEL: vpgather_nxv4i8: 184; RV64: # %bb.0: 185; RV64-NEXT: vsetvli zero, a0, e8, mf2, ta, mu 186; RV64-NEXT: vluxei64.v v12, (zero), v8, v0.t 187; RV64-NEXT: vmv1r.v v8, v12 188; RV64-NEXT: ret 189 %v = call <vscale x 4 x i8> @llvm.vp.gather.nxv4i8.nxv4p0i8(<vscale x 4 x i8*> %ptrs, <vscale x 4 x i1> %m, i32 %evl) 190 ret <vscale x 4 x i8> %v 191} 192 193define <vscale x 4 x i8> @vpgather_truemask_nxv4i8(<vscale x 4 x i8*> %ptrs, i32 zeroext %evl) { 194; RV32-LABEL: vpgather_truemask_nxv4i8: 195; RV32: # %bb.0: 196; RV32-NEXT: vsetvli zero, a0, e8, mf2, ta, mu 197; RV32-NEXT: vluxei32.v v10, (zero), v8 198; RV32-NEXT: vmv1r.v v8, v10 199; RV32-NEXT: ret 200; 201; RV64-LABEL: vpgather_truemask_nxv4i8: 202; RV64: # %bb.0: 203; RV64-NEXT: vsetvli zero, a0, e8, mf2, ta, mu 204; RV64-NEXT: vluxei64.v v12, (zero), v8 205; RV64-NEXT: vmv1r.v v8, v12 206; RV64-NEXT: ret 207 %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0 208 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer 209 %v = call <vscale x 4 x i8> @llvm.vp.gather.nxv4i8.nxv4p0i8(<vscale x 4 x i8*> %ptrs, <vscale x 4 x i1> %mtrue, i32 %evl) 210 ret <vscale x 4 x i8> %v 211} 212 213declare <vscale x 8 x i8> @llvm.vp.gather.nxv8i8.nxv8p0i8(<vscale x 8 x i8*>, <vscale x 8 x i1>, i32) 214 215define <vscale x 8 x i8> @vpgather_nxv8i8(<vscale x 8 x i8*> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 216; RV32-LABEL: vpgather_nxv8i8: 217; RV32: # %bb.0: 218; RV32-NEXT: vsetvli zero, a0, e8, m1, ta, mu 219; RV32-NEXT: vluxei32.v v12, (zero), v8, v0.t 220; RV32-NEXT: vmv.v.v v8, v12 221; RV32-NEXT: ret 222; 223; RV64-LABEL: vpgather_nxv8i8: 224; RV64: # %bb.0: 225; RV64-NEXT: vsetvli zero, a0, e8, m1, ta, mu 226; RV64-NEXT: vluxei64.v v16, (zero), v8, v0.t 227; RV64-NEXT: vmv.v.v v8, v16 228; RV64-NEXT: ret 229 %v = call <vscale x 8 x i8> @llvm.vp.gather.nxv8i8.nxv8p0i8(<vscale x 8 x i8*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 230 ret <vscale x 8 x i8> %v 231} 232 233define <vscale x 8 x i8> @vpgather_baseidx_nxv8i8(i8* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 234; RV32-LABEL: vpgather_baseidx_nxv8i8: 235; RV32: # %bb.0: 236; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 237; RV32-NEXT: vsext.vf4 v12, v8 238; RV32-NEXT: vsetvli zero, a1, e8, m1, ta, mu 239; RV32-NEXT: vluxei32.v v8, (a0), v12, v0.t 240; RV32-NEXT: ret 241; 242; RV64-LABEL: vpgather_baseidx_nxv8i8: 243; RV64: # %bb.0: 244; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 245; RV64-NEXT: vsext.vf8 v16, v8 246; RV64-NEXT: vsetvli zero, a1, e8, m1, ta, mu 247; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 248; RV64-NEXT: ret 249 %ptrs = getelementptr inbounds i8, i8* %base, <vscale x 8 x i8> %idxs 250 %v = call <vscale x 8 x i8> @llvm.vp.gather.nxv8i8.nxv8p0i8(<vscale x 8 x i8*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 251 ret <vscale x 8 x i8> %v 252} 253 254declare <vscale x 1 x i16> @llvm.vp.gather.nxv1i16.nxv1p0i16(<vscale x 1 x i16*>, <vscale x 1 x i1>, i32) 255 256define <vscale x 1 x i16> @vpgather_nxv1i16(<vscale x 1 x i16*> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) { 257; RV32-LABEL: vpgather_nxv1i16: 258; RV32: # %bb.0: 259; RV32-NEXT: vsetvli zero, a0, e16, mf4, ta, mu 260; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 261; RV32-NEXT: vmv1r.v v8, v9 262; RV32-NEXT: ret 263; 264; RV64-LABEL: vpgather_nxv1i16: 265; RV64: # %bb.0: 266; RV64-NEXT: vsetvli zero, a0, e16, mf4, ta, mu 267; RV64-NEXT: vluxei64.v v9, (zero), v8, v0.t 268; RV64-NEXT: vmv1r.v v8, v9 269; RV64-NEXT: ret 270 %v = call <vscale x 1 x i16> @llvm.vp.gather.nxv1i16.nxv1p0i16(<vscale x 1 x i16*> %ptrs, <vscale x 1 x i1> %m, i32 %evl) 271 ret <vscale x 1 x i16> %v 272} 273 274declare <vscale x 2 x i16> @llvm.vp.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*>, <vscale x 2 x i1>, i32) 275 276define <vscale x 2 x i16> @vpgather_nxv2i16(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 277; RV32-LABEL: vpgather_nxv2i16: 278; RV32: # %bb.0: 279; RV32-NEXT: vsetvli zero, a0, e16, mf2, ta, mu 280; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 281; RV32-NEXT: vmv1r.v v8, v9 282; RV32-NEXT: ret 283; 284; RV64-LABEL: vpgather_nxv2i16: 285; RV64: # %bb.0: 286; RV64-NEXT: vsetvli zero, a0, e16, mf2, ta, mu 287; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 288; RV64-NEXT: vmv1r.v v8, v10 289; RV64-NEXT: ret 290 %v = call <vscale x 2 x i16> @llvm.vp.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 291 ret <vscale x 2 x i16> %v 292} 293 294define <vscale x 2 x i32> @vpgather_nxv2i16_sextload_nxv2i32(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 295; RV32-LABEL: vpgather_nxv2i16_sextload_nxv2i32: 296; RV32: # %bb.0: 297; RV32-NEXT: vsetvli zero, a0, e16, mf2, ta, mu 298; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 299; RV32-NEXT: vsetvli a0, zero, e32, m1, ta, mu 300; RV32-NEXT: vsext.vf2 v8, v9 301; RV32-NEXT: ret 302; 303; RV64-LABEL: vpgather_nxv2i16_sextload_nxv2i32: 304; RV64: # %bb.0: 305; RV64-NEXT: vsetvli zero, a0, e16, mf2, ta, mu 306; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 307; RV64-NEXT: vsetvli a0, zero, e32, m1, ta, mu 308; RV64-NEXT: vsext.vf2 v8, v10 309; RV64-NEXT: ret 310 %v = call <vscale x 2 x i16> @llvm.vp.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 311 %ev = sext <vscale x 2 x i16> %v to <vscale x 2 x i32> 312 ret <vscale x 2 x i32> %ev 313} 314 315define <vscale x 2 x i32> @vpgather_nxv2i16_zextload_nxv2i32(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 316; RV32-LABEL: vpgather_nxv2i16_zextload_nxv2i32: 317; RV32: # %bb.0: 318; RV32-NEXT: vsetvli zero, a0, e16, mf2, ta, mu 319; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 320; RV32-NEXT: vsetvli a0, zero, e32, m1, ta, mu 321; RV32-NEXT: vzext.vf2 v8, v9 322; RV32-NEXT: ret 323; 324; RV64-LABEL: vpgather_nxv2i16_zextload_nxv2i32: 325; RV64: # %bb.0: 326; RV64-NEXT: vsetvli zero, a0, e16, mf2, ta, mu 327; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 328; RV64-NEXT: vsetvli a0, zero, e32, m1, ta, mu 329; RV64-NEXT: vzext.vf2 v8, v10 330; RV64-NEXT: ret 331 %v = call <vscale x 2 x i16> @llvm.vp.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 332 %ev = zext <vscale x 2 x i16> %v to <vscale x 2 x i32> 333 ret <vscale x 2 x i32> %ev 334} 335 336define <vscale x 2 x i64> @vpgather_nxv2i16_sextload_nxv2i64(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 337; RV32-LABEL: vpgather_nxv2i16_sextload_nxv2i64: 338; RV32: # %bb.0: 339; RV32-NEXT: vsetvli zero, a0, e16, mf2, ta, mu 340; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 341; RV32-NEXT: vsetvli a0, zero, e64, m2, ta, mu 342; RV32-NEXT: vsext.vf4 v8, v10 343; RV32-NEXT: ret 344; 345; RV64-LABEL: vpgather_nxv2i16_sextload_nxv2i64: 346; RV64: # %bb.0: 347; RV64-NEXT: vsetvli zero, a0, e16, mf2, ta, mu 348; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 349; RV64-NEXT: vsetvli a0, zero, e64, m2, ta, mu 350; RV64-NEXT: vsext.vf4 v8, v10 351; RV64-NEXT: ret 352 %v = call <vscale x 2 x i16> @llvm.vp.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 353 %ev = sext <vscale x 2 x i16> %v to <vscale x 2 x i64> 354 ret <vscale x 2 x i64> %ev 355} 356 357define <vscale x 2 x i64> @vpgather_nxv2i16_zextload_nxv2i64(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 358; RV32-LABEL: vpgather_nxv2i16_zextload_nxv2i64: 359; RV32: # %bb.0: 360; RV32-NEXT: vsetvli zero, a0, e16, mf2, ta, mu 361; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 362; RV32-NEXT: vsetvli a0, zero, e64, m2, ta, mu 363; RV32-NEXT: vzext.vf4 v8, v10 364; RV32-NEXT: ret 365; 366; RV64-LABEL: vpgather_nxv2i16_zextload_nxv2i64: 367; RV64: # %bb.0: 368; RV64-NEXT: vsetvli zero, a0, e16, mf2, ta, mu 369; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 370; RV64-NEXT: vsetvli a0, zero, e64, m2, ta, mu 371; RV64-NEXT: vzext.vf4 v8, v10 372; RV64-NEXT: ret 373 %v = call <vscale x 2 x i16> @llvm.vp.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 374 %ev = zext <vscale x 2 x i16> %v to <vscale x 2 x i64> 375 ret <vscale x 2 x i64> %ev 376} 377 378declare <vscale x 4 x i16> @llvm.vp.gather.nxv4i16.nxv4p0i16(<vscale x 4 x i16*>, <vscale x 4 x i1>, i32) 379 380define <vscale x 4 x i16> @vpgather_nxv4i16(<vscale x 4 x i16*> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) { 381; RV32-LABEL: vpgather_nxv4i16: 382; RV32: # %bb.0: 383; RV32-NEXT: vsetvli zero, a0, e16, m1, ta, mu 384; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 385; RV32-NEXT: vmv.v.v v8, v10 386; RV32-NEXT: ret 387; 388; RV64-LABEL: vpgather_nxv4i16: 389; RV64: # %bb.0: 390; RV64-NEXT: vsetvli zero, a0, e16, m1, ta, mu 391; RV64-NEXT: vluxei64.v v12, (zero), v8, v0.t 392; RV64-NEXT: vmv.v.v v8, v12 393; RV64-NEXT: ret 394 %v = call <vscale x 4 x i16> @llvm.vp.gather.nxv4i16.nxv4p0i16(<vscale x 4 x i16*> %ptrs, <vscale x 4 x i1> %m, i32 %evl) 395 ret <vscale x 4 x i16> %v 396} 397 398define <vscale x 4 x i16> @vpgather_truemask_nxv4i16(<vscale x 4 x i16*> %ptrs, i32 zeroext %evl) { 399; RV32-LABEL: vpgather_truemask_nxv4i16: 400; RV32: # %bb.0: 401; RV32-NEXT: vsetvli zero, a0, e16, m1, ta, mu 402; RV32-NEXT: vluxei32.v v10, (zero), v8 403; RV32-NEXT: vmv.v.v v8, v10 404; RV32-NEXT: ret 405; 406; RV64-LABEL: vpgather_truemask_nxv4i16: 407; RV64: # %bb.0: 408; RV64-NEXT: vsetvli zero, a0, e16, m1, ta, mu 409; RV64-NEXT: vluxei64.v v12, (zero), v8 410; RV64-NEXT: vmv.v.v v8, v12 411; RV64-NEXT: ret 412 %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0 413 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer 414 %v = call <vscale x 4 x i16> @llvm.vp.gather.nxv4i16.nxv4p0i16(<vscale x 4 x i16*> %ptrs, <vscale x 4 x i1> %mtrue, i32 %evl) 415 ret <vscale x 4 x i16> %v 416} 417 418declare <vscale x 8 x i16> @llvm.vp.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*>, <vscale x 8 x i1>, i32) 419 420define <vscale x 8 x i16> @vpgather_nxv8i16(<vscale x 8 x i16*> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 421; RV32-LABEL: vpgather_nxv8i16: 422; RV32: # %bb.0: 423; RV32-NEXT: vsetvli zero, a0, e16, m2, ta, mu 424; RV32-NEXT: vluxei32.v v12, (zero), v8, v0.t 425; RV32-NEXT: vmv.v.v v8, v12 426; RV32-NEXT: ret 427; 428; RV64-LABEL: vpgather_nxv8i16: 429; RV64: # %bb.0: 430; RV64-NEXT: vsetvli zero, a0, e16, m2, ta, mu 431; RV64-NEXT: vluxei64.v v16, (zero), v8, v0.t 432; RV64-NEXT: vmv.v.v v8, v16 433; RV64-NEXT: ret 434 %v = call <vscale x 8 x i16> @llvm.vp.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 435 ret <vscale x 8 x i16> %v 436} 437 438define <vscale x 8 x i16> @vpgather_baseidx_nxv8i8_nxv8i16(i16* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 439; RV32-LABEL: vpgather_baseidx_nxv8i8_nxv8i16: 440; RV32: # %bb.0: 441; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 442; RV32-NEXT: vsext.vf4 v12, v8 443; RV32-NEXT: vadd.vv v12, v12, v12 444; RV32-NEXT: vsetvli zero, a1, e16, m2, ta, mu 445; RV32-NEXT: vluxei32.v v8, (a0), v12, v0.t 446; RV32-NEXT: ret 447; 448; RV64-LABEL: vpgather_baseidx_nxv8i8_nxv8i16: 449; RV64: # %bb.0: 450; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 451; RV64-NEXT: vsext.vf8 v16, v8 452; RV64-NEXT: vadd.vv v16, v16, v16 453; RV64-NEXT: vsetvli zero, a1, e16, m2, ta, mu 454; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 455; RV64-NEXT: ret 456 %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i8> %idxs 457 %v = call <vscale x 8 x i16> @llvm.vp.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 458 ret <vscale x 8 x i16> %v 459} 460 461define <vscale x 8 x i16> @vpgather_baseidx_sext_nxv8i8_nxv8i16(i16* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 462; RV32-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8i16: 463; RV32: # %bb.0: 464; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 465; RV32-NEXT: vsext.vf4 v12, v8 466; RV32-NEXT: vadd.vv v12, v12, v12 467; RV32-NEXT: vsetvli zero, a1, e16, m2, ta, mu 468; RV32-NEXT: vluxei32.v v8, (a0), v12, v0.t 469; RV32-NEXT: ret 470; 471; RV64-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8i16: 472; RV64: # %bb.0: 473; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 474; RV64-NEXT: vsext.vf8 v16, v8 475; RV64-NEXT: vadd.vv v16, v16, v16 476; RV64-NEXT: vsetvli zero, a1, e16, m2, ta, mu 477; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 478; RV64-NEXT: ret 479 %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i16> 480 %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i16> %eidxs 481 %v = call <vscale x 8 x i16> @llvm.vp.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 482 ret <vscale x 8 x i16> %v 483} 484 485define <vscale x 8 x i16> @vpgather_baseidx_zext_nxv8i8_nxv8i16(i16* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 486; RV32-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8i16: 487; RV32: # %bb.0: 488; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 489; RV32-NEXT: vzext.vf4 v12, v8 490; RV32-NEXT: vadd.vv v12, v12, v12 491; RV32-NEXT: vsetvli zero, a1, e16, m2, ta, mu 492; RV32-NEXT: vluxei32.v v8, (a0), v12, v0.t 493; RV32-NEXT: ret 494; 495; RV64-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8i16: 496; RV64: # %bb.0: 497; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 498; RV64-NEXT: vzext.vf8 v16, v8 499; RV64-NEXT: vadd.vv v16, v16, v16 500; RV64-NEXT: vsetvli zero, a1, e16, m2, ta, mu 501; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 502; RV64-NEXT: ret 503 %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i16> 504 %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i16> %eidxs 505 %v = call <vscale x 8 x i16> @llvm.vp.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 506 ret <vscale x 8 x i16> %v 507} 508 509define <vscale x 8 x i16> @vpgather_baseidx_nxv8i16(i16* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 510; RV32-LABEL: vpgather_baseidx_nxv8i16: 511; RV32: # %bb.0: 512; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 513; RV32-NEXT: vsext.vf2 v12, v8 514; RV32-NEXT: vadd.vv v12, v12, v12 515; RV32-NEXT: vsetvli zero, a1, e16, m2, ta, mu 516; RV32-NEXT: vluxei32.v v8, (a0), v12, v0.t 517; RV32-NEXT: ret 518; 519; RV64-LABEL: vpgather_baseidx_nxv8i16: 520; RV64: # %bb.0: 521; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 522; RV64-NEXT: vsext.vf4 v16, v8 523; RV64-NEXT: vadd.vv v16, v16, v16 524; RV64-NEXT: vsetvli zero, a1, e16, m2, ta, mu 525; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 526; RV64-NEXT: ret 527 %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i16> %idxs 528 %v = call <vscale x 8 x i16> @llvm.vp.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 529 ret <vscale x 8 x i16> %v 530} 531 532declare <vscale x 1 x i32> @llvm.vp.gather.nxv1i32.nxv1p0i32(<vscale x 1 x i32*>, <vscale x 1 x i1>, i32) 533 534define <vscale x 1 x i32> @vpgather_nxv1i32(<vscale x 1 x i32*> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) { 535; RV32-LABEL: vpgather_nxv1i32: 536; RV32: # %bb.0: 537; RV32-NEXT: vsetvli zero, a0, e32, mf2, ta, mu 538; RV32-NEXT: vluxei32.v v8, (zero), v8, v0.t 539; RV32-NEXT: ret 540; 541; RV64-LABEL: vpgather_nxv1i32: 542; RV64: # %bb.0: 543; RV64-NEXT: vsetvli zero, a0, e32, mf2, ta, mu 544; RV64-NEXT: vluxei64.v v9, (zero), v8, v0.t 545; RV64-NEXT: vmv1r.v v8, v9 546; RV64-NEXT: ret 547 %v = call <vscale x 1 x i32> @llvm.vp.gather.nxv1i32.nxv1p0i32(<vscale x 1 x i32*> %ptrs, <vscale x 1 x i1> %m, i32 %evl) 548 ret <vscale x 1 x i32> %v 549} 550 551declare <vscale x 2 x i32> @llvm.vp.gather.nxv2i32.nxv2p0i32(<vscale x 2 x i32*>, <vscale x 2 x i1>, i32) 552 553define <vscale x 2 x i32> @vpgather_nxv2i32(<vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 554; RV32-LABEL: vpgather_nxv2i32: 555; RV32: # %bb.0: 556; RV32-NEXT: vsetvli zero, a0, e32, m1, ta, mu 557; RV32-NEXT: vluxei32.v v8, (zero), v8, v0.t 558; RV32-NEXT: ret 559; 560; RV64-LABEL: vpgather_nxv2i32: 561; RV64: # %bb.0: 562; RV64-NEXT: vsetvli zero, a0, e32, m1, ta, mu 563; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 564; RV64-NEXT: vmv.v.v v8, v10 565; RV64-NEXT: ret 566 %v = call <vscale x 2 x i32> @llvm.vp.gather.nxv2i32.nxv2p0i32(<vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 567 ret <vscale x 2 x i32> %v 568} 569 570define <vscale x 2 x i64> @vpgather_nxv2i32_sextload_nxv2i64(<vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 571; RV32-LABEL: vpgather_nxv2i32_sextload_nxv2i64: 572; RV32: # %bb.0: 573; RV32-NEXT: vsetvli zero, a0, e32, m1, ta, mu 574; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 575; RV32-NEXT: vsetvli a0, zero, e64, m2, ta, mu 576; RV32-NEXT: vsext.vf2 v8, v10 577; RV32-NEXT: ret 578; 579; RV64-LABEL: vpgather_nxv2i32_sextload_nxv2i64: 580; RV64: # %bb.0: 581; RV64-NEXT: vsetvli zero, a0, e32, m1, ta, mu 582; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 583; RV64-NEXT: vsetvli a0, zero, e64, m2, ta, mu 584; RV64-NEXT: vsext.vf2 v8, v10 585; RV64-NEXT: ret 586 %v = call <vscale x 2 x i32> @llvm.vp.gather.nxv2i32.nxv2p0i32(<vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 587 %ev = sext <vscale x 2 x i32> %v to <vscale x 2 x i64> 588 ret <vscale x 2 x i64> %ev 589} 590 591define <vscale x 2 x i64> @vpgather_nxv2i32_zextload_nxv2i64(<vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 592; RV32-LABEL: vpgather_nxv2i32_zextload_nxv2i64: 593; RV32: # %bb.0: 594; RV32-NEXT: vsetvli zero, a0, e32, m1, ta, mu 595; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 596; RV32-NEXT: vsetvli a0, zero, e64, m2, ta, mu 597; RV32-NEXT: vzext.vf2 v8, v10 598; RV32-NEXT: ret 599; 600; RV64-LABEL: vpgather_nxv2i32_zextload_nxv2i64: 601; RV64: # %bb.0: 602; RV64-NEXT: vsetvli zero, a0, e32, m1, ta, mu 603; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 604; RV64-NEXT: vsetvli a0, zero, e64, m2, ta, mu 605; RV64-NEXT: vzext.vf2 v8, v10 606; RV64-NEXT: ret 607 %v = call <vscale x 2 x i32> @llvm.vp.gather.nxv2i32.nxv2p0i32(<vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 608 %ev = zext <vscale x 2 x i32> %v to <vscale x 2 x i64> 609 ret <vscale x 2 x i64> %ev 610} 611 612declare <vscale x 4 x i32> @llvm.vp.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*>, <vscale x 4 x i1>, i32) 613 614define <vscale x 4 x i32> @vpgather_nxv4i32(<vscale x 4 x i32*> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) { 615; RV32-LABEL: vpgather_nxv4i32: 616; RV32: # %bb.0: 617; RV32-NEXT: vsetvli zero, a0, e32, m2, ta, mu 618; RV32-NEXT: vluxei32.v v8, (zero), v8, v0.t 619; RV32-NEXT: ret 620; 621; RV64-LABEL: vpgather_nxv4i32: 622; RV64: # %bb.0: 623; RV64-NEXT: vsetvli zero, a0, e32, m2, ta, mu 624; RV64-NEXT: vluxei64.v v12, (zero), v8, v0.t 625; RV64-NEXT: vmv.v.v v8, v12 626; RV64-NEXT: ret 627 %v = call <vscale x 4 x i32> @llvm.vp.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*> %ptrs, <vscale x 4 x i1> %m, i32 %evl) 628 ret <vscale x 4 x i32> %v 629} 630 631define <vscale x 4 x i32> @vpgather_truemask_nxv4i32(<vscale x 4 x i32*> %ptrs, i32 zeroext %evl) { 632; RV32-LABEL: vpgather_truemask_nxv4i32: 633; RV32: # %bb.0: 634; RV32-NEXT: vsetvli zero, a0, e32, m2, ta, mu 635; RV32-NEXT: vluxei32.v v8, (zero), v8 636; RV32-NEXT: ret 637; 638; RV64-LABEL: vpgather_truemask_nxv4i32: 639; RV64: # %bb.0: 640; RV64-NEXT: vsetvli zero, a0, e32, m2, ta, mu 641; RV64-NEXT: vluxei64.v v12, (zero), v8 642; RV64-NEXT: vmv.v.v v8, v12 643; RV64-NEXT: ret 644 %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0 645 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer 646 %v = call <vscale x 4 x i32> @llvm.vp.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*> %ptrs, <vscale x 4 x i1> %mtrue, i32 %evl) 647 ret <vscale x 4 x i32> %v 648} 649 650declare <vscale x 8 x i32> @llvm.vp.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*>, <vscale x 8 x i1>, i32) 651 652define <vscale x 8 x i32> @vpgather_nxv8i32(<vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 653; RV32-LABEL: vpgather_nxv8i32: 654; RV32: # %bb.0: 655; RV32-NEXT: vsetvli zero, a0, e32, m4, ta, mu 656; RV32-NEXT: vluxei32.v v8, (zero), v8, v0.t 657; RV32-NEXT: ret 658; 659; RV64-LABEL: vpgather_nxv8i32: 660; RV64: # %bb.0: 661; RV64-NEXT: vsetvli zero, a0, e32, m4, ta, mu 662; RV64-NEXT: vluxei64.v v16, (zero), v8, v0.t 663; RV64-NEXT: vmv.v.v v8, v16 664; RV64-NEXT: ret 665 %v = call <vscale x 8 x i32> @llvm.vp.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 666 ret <vscale x 8 x i32> %v 667} 668 669define <vscale x 8 x i32> @vpgather_baseidx_nxv8i8_nxv8i32(i32* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 670; RV32-LABEL: vpgather_baseidx_nxv8i8_nxv8i32: 671; RV32: # %bb.0: 672; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 673; RV32-NEXT: vsext.vf4 v12, v8 674; RV32-NEXT: vsll.vi v8, v12, 2 675; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 676; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 677; RV32-NEXT: ret 678; 679; RV64-LABEL: vpgather_baseidx_nxv8i8_nxv8i32: 680; RV64: # %bb.0: 681; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 682; RV64-NEXT: vsext.vf8 v16, v8 683; RV64-NEXT: vsll.vi v16, v16, 2 684; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 685; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 686; RV64-NEXT: ret 687 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i8> %idxs 688 %v = call <vscale x 8 x i32> @llvm.vp.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 689 ret <vscale x 8 x i32> %v 690} 691 692define <vscale x 8 x i32> @vpgather_baseidx_sext_nxv8i8_nxv8i32(i32* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 693; RV32-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8i32: 694; RV32: # %bb.0: 695; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 696; RV32-NEXT: vsext.vf4 v12, v8 697; RV32-NEXT: vsll.vi v8, v12, 2 698; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 699; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 700; RV32-NEXT: ret 701; 702; RV64-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8i32: 703; RV64: # %bb.0: 704; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 705; RV64-NEXT: vsext.vf8 v16, v8 706; RV64-NEXT: vsll.vi v16, v16, 2 707; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 708; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 709; RV64-NEXT: ret 710 %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i32> 711 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs 712 %v = call <vscale x 8 x i32> @llvm.vp.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 713 ret <vscale x 8 x i32> %v 714} 715 716define <vscale x 8 x i32> @vpgather_baseidx_zext_nxv8i8_nxv8i32(i32* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 717; RV32-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8i32: 718; RV32: # %bb.0: 719; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 720; RV32-NEXT: vzext.vf4 v12, v8 721; RV32-NEXT: vsll.vi v8, v12, 2 722; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 723; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 724; RV32-NEXT: ret 725; 726; RV64-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8i32: 727; RV64: # %bb.0: 728; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 729; RV64-NEXT: vzext.vf8 v16, v8 730; RV64-NEXT: vsll.vi v16, v16, 2 731; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 732; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 733; RV64-NEXT: ret 734 %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i32> 735 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs 736 %v = call <vscale x 8 x i32> @llvm.vp.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 737 ret <vscale x 8 x i32> %v 738} 739 740define <vscale x 8 x i32> @vpgather_baseidx_nxv8i16_nxv8i32(i32* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 741; RV32-LABEL: vpgather_baseidx_nxv8i16_nxv8i32: 742; RV32: # %bb.0: 743; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 744; RV32-NEXT: vsext.vf2 v12, v8 745; RV32-NEXT: vsll.vi v8, v12, 2 746; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 747; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 748; RV32-NEXT: ret 749; 750; RV64-LABEL: vpgather_baseidx_nxv8i16_nxv8i32: 751; RV64: # %bb.0: 752; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 753; RV64-NEXT: vsext.vf4 v16, v8 754; RV64-NEXT: vsll.vi v16, v16, 2 755; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 756; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 757; RV64-NEXT: ret 758 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i16> %idxs 759 %v = call <vscale x 8 x i32> @llvm.vp.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 760 ret <vscale x 8 x i32> %v 761} 762 763define <vscale x 8 x i32> @vpgather_baseidx_sext_nxv8i16_nxv8i32(i32* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 764; RV32-LABEL: vpgather_baseidx_sext_nxv8i16_nxv8i32: 765; RV32: # %bb.0: 766; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 767; RV32-NEXT: vsext.vf2 v12, v8 768; RV32-NEXT: vsll.vi v8, v12, 2 769; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 770; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 771; RV32-NEXT: ret 772; 773; RV64-LABEL: vpgather_baseidx_sext_nxv8i16_nxv8i32: 774; RV64: # %bb.0: 775; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 776; RV64-NEXT: vsext.vf4 v16, v8 777; RV64-NEXT: vsll.vi v16, v16, 2 778; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 779; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 780; RV64-NEXT: ret 781 %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i32> 782 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs 783 %v = call <vscale x 8 x i32> @llvm.vp.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 784 ret <vscale x 8 x i32> %v 785} 786 787define <vscale x 8 x i32> @vpgather_baseidx_zext_nxv8i16_nxv8i32(i32* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 788; RV32-LABEL: vpgather_baseidx_zext_nxv8i16_nxv8i32: 789; RV32: # %bb.0: 790; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 791; RV32-NEXT: vzext.vf2 v12, v8 792; RV32-NEXT: vsll.vi v8, v12, 2 793; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 794; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 795; RV32-NEXT: ret 796; 797; RV64-LABEL: vpgather_baseidx_zext_nxv8i16_nxv8i32: 798; RV64: # %bb.0: 799; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 800; RV64-NEXT: vzext.vf4 v16, v8 801; RV64-NEXT: vsll.vi v16, v16, 2 802; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 803; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 804; RV64-NEXT: ret 805 %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i32> 806 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs 807 %v = call <vscale x 8 x i32> @llvm.vp.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 808 ret <vscale x 8 x i32> %v 809} 810 811define <vscale x 8 x i32> @vpgather_baseidx_nxv8i32(i32* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 812; RV32-LABEL: vpgather_baseidx_nxv8i32: 813; RV32: # %bb.0: 814; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 815; RV32-NEXT: vsll.vi v8, v8, 2 816; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 817; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 818; RV32-NEXT: ret 819; 820; RV64-LABEL: vpgather_baseidx_nxv8i32: 821; RV64: # %bb.0: 822; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 823; RV64-NEXT: vsext.vf2 v16, v8 824; RV64-NEXT: vsll.vi v16, v16, 2 825; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 826; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 827; RV64-NEXT: ret 828 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %idxs 829 %v = call <vscale x 8 x i32> @llvm.vp.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 830 ret <vscale x 8 x i32> %v 831} 832 833declare <vscale x 1 x i64> @llvm.vp.gather.nxv1i64.nxv1p0i64(<vscale x 1 x i64*>, <vscale x 1 x i1>, i32) 834 835define <vscale x 1 x i64> @vpgather_nxv1i64(<vscale x 1 x i64*> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) { 836; RV32-LABEL: vpgather_nxv1i64: 837; RV32: # %bb.0: 838; RV32-NEXT: vsetvli zero, a0, e64, m1, ta, mu 839; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 840; RV32-NEXT: vmv.v.v v8, v9 841; RV32-NEXT: ret 842; 843; RV64-LABEL: vpgather_nxv1i64: 844; RV64: # %bb.0: 845; RV64-NEXT: vsetvli zero, a0, e64, m1, ta, mu 846; RV64-NEXT: vluxei64.v v8, (zero), v8, v0.t 847; RV64-NEXT: ret 848 %v = call <vscale x 1 x i64> @llvm.vp.gather.nxv1i64.nxv1p0i64(<vscale x 1 x i64*> %ptrs, <vscale x 1 x i1> %m, i32 %evl) 849 ret <vscale x 1 x i64> %v 850} 851 852declare <vscale x 2 x i64> @llvm.vp.gather.nxv2i64.nxv2p0i64(<vscale x 2 x i64*>, <vscale x 2 x i1>, i32) 853 854define <vscale x 2 x i64> @vpgather_nxv2i64(<vscale x 2 x i64*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 855; RV32-LABEL: vpgather_nxv2i64: 856; RV32: # %bb.0: 857; RV32-NEXT: vsetvli zero, a0, e64, m2, ta, mu 858; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 859; RV32-NEXT: vmv.v.v v8, v10 860; RV32-NEXT: ret 861; 862; RV64-LABEL: vpgather_nxv2i64: 863; RV64: # %bb.0: 864; RV64-NEXT: vsetvli zero, a0, e64, m2, ta, mu 865; RV64-NEXT: vluxei64.v v8, (zero), v8, v0.t 866; RV64-NEXT: ret 867 %v = call <vscale x 2 x i64> @llvm.vp.gather.nxv2i64.nxv2p0i64(<vscale x 2 x i64*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 868 ret <vscale x 2 x i64> %v 869} 870 871declare <vscale x 4 x i64> @llvm.vp.gather.nxv4i64.nxv4p0i64(<vscale x 4 x i64*>, <vscale x 4 x i1>, i32) 872 873define <vscale x 4 x i64> @vpgather_nxv4i64(<vscale x 4 x i64*> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) { 874; RV32-LABEL: vpgather_nxv4i64: 875; RV32: # %bb.0: 876; RV32-NEXT: vsetvli zero, a0, e64, m4, ta, mu 877; RV32-NEXT: vluxei32.v v12, (zero), v8, v0.t 878; RV32-NEXT: vmv.v.v v8, v12 879; RV32-NEXT: ret 880; 881; RV64-LABEL: vpgather_nxv4i64: 882; RV64: # %bb.0: 883; RV64-NEXT: vsetvli zero, a0, e64, m4, ta, mu 884; RV64-NEXT: vluxei64.v v8, (zero), v8, v0.t 885; RV64-NEXT: ret 886 %v = call <vscale x 4 x i64> @llvm.vp.gather.nxv4i64.nxv4p0i64(<vscale x 4 x i64*> %ptrs, <vscale x 4 x i1> %m, i32 %evl) 887 ret <vscale x 4 x i64> %v 888} 889 890define <vscale x 4 x i64> @vpgather_truemask_nxv4i64(<vscale x 4 x i64*> %ptrs, i32 zeroext %evl) { 891; RV32-LABEL: vpgather_truemask_nxv4i64: 892; RV32: # %bb.0: 893; RV32-NEXT: vsetvli zero, a0, e64, m4, ta, mu 894; RV32-NEXT: vluxei32.v v12, (zero), v8 895; RV32-NEXT: vmv.v.v v8, v12 896; RV32-NEXT: ret 897; 898; RV64-LABEL: vpgather_truemask_nxv4i64: 899; RV64: # %bb.0: 900; RV64-NEXT: vsetvli zero, a0, e64, m4, ta, mu 901; RV64-NEXT: vluxei64.v v8, (zero), v8 902; RV64-NEXT: ret 903 %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0 904 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer 905 %v = call <vscale x 4 x i64> @llvm.vp.gather.nxv4i64.nxv4p0i64(<vscale x 4 x i64*> %ptrs, <vscale x 4 x i1> %mtrue, i32 %evl) 906 ret <vscale x 4 x i64> %v 907} 908 909declare <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*>, <vscale x 8 x i1>, i32) 910 911define <vscale x 8 x i64> @vpgather_nxv8i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 912; RV32-LABEL: vpgather_nxv8i64: 913; RV32: # %bb.0: 914; RV32-NEXT: vsetvli zero, a0, e64, m8, ta, mu 915; RV32-NEXT: vluxei32.v v16, (zero), v8, v0.t 916; RV32-NEXT: vmv.v.v v8, v16 917; RV32-NEXT: ret 918; 919; RV64-LABEL: vpgather_nxv8i64: 920; RV64: # %bb.0: 921; RV64-NEXT: vsetvli zero, a0, e64, m8, ta, mu 922; RV64-NEXT: vluxei64.v v8, (zero), v8, v0.t 923; RV64-NEXT: ret 924 %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 925 ret <vscale x 8 x i64> %v 926} 927 928define <vscale x 8 x i64> @vpgather_baseidx_nxv8i8_nxv8i64(i64* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 929; RV32-LABEL: vpgather_baseidx_nxv8i8_nxv8i64: 930; RV32: # %bb.0: 931; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 932; RV32-NEXT: vsext.vf4 v12, v8 933; RV32-NEXT: vsll.vi v16, v12, 3 934; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 935; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 936; RV32-NEXT: ret 937; 938; RV64-LABEL: vpgather_baseidx_nxv8i8_nxv8i64: 939; RV64: # %bb.0: 940; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 941; RV64-NEXT: vsext.vf8 v16, v8 942; RV64-NEXT: vsll.vi v8, v16, 3 943; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 944; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 945; RV64-NEXT: ret 946 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i8> %idxs 947 %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 948 ret <vscale x 8 x i64> %v 949} 950 951define <vscale x 8 x i64> @vpgather_baseidx_sext_nxv8i8_nxv8i64(i64* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 952; RV32-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8i64: 953; RV32: # %bb.0: 954; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 955; RV32-NEXT: vsext.vf8 v16, v8 956; RV32-NEXT: vsll.vi v8, v16, 3 957; RV32-NEXT: vsetvli zero, zero, e32, m4, ta, mu 958; RV32-NEXT: vnsrl.wi v16, v8, 0 959; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 960; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 961; RV32-NEXT: ret 962; 963; RV64-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8i64: 964; RV64: # %bb.0: 965; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 966; RV64-NEXT: vsext.vf8 v16, v8 967; RV64-NEXT: vsll.vi v8, v16, 3 968; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 969; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 970; RV64-NEXT: ret 971 %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i64> 972 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs 973 %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 974 ret <vscale x 8 x i64> %v 975} 976 977define <vscale x 8 x i64> @vpgather_baseidx_zext_nxv8i8_nxv8i64(i64* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 978; RV32-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8i64: 979; RV32: # %bb.0: 980; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 981; RV32-NEXT: vzext.vf8 v16, v8 982; RV32-NEXT: vsll.vi v8, v16, 3 983; RV32-NEXT: vsetvli zero, zero, e32, m4, ta, mu 984; RV32-NEXT: vnsrl.wi v16, v8, 0 985; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 986; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 987; RV32-NEXT: ret 988; 989; RV64-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8i64: 990; RV64: # %bb.0: 991; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 992; RV64-NEXT: vzext.vf8 v16, v8 993; RV64-NEXT: vsll.vi v8, v16, 3 994; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 995; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 996; RV64-NEXT: ret 997 %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i64> 998 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs 999 %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1000 ret <vscale x 8 x i64> %v 1001} 1002 1003define <vscale x 8 x i64> @vpgather_baseidx_nxv8i16_nxv8i64(i64* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1004; RV32-LABEL: vpgather_baseidx_nxv8i16_nxv8i64: 1005; RV32: # %bb.0: 1006; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1007; RV32-NEXT: vsext.vf2 v12, v8 1008; RV32-NEXT: vsll.vi v16, v12, 3 1009; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1010; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1011; RV32-NEXT: ret 1012; 1013; RV64-LABEL: vpgather_baseidx_nxv8i16_nxv8i64: 1014; RV64: # %bb.0: 1015; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1016; RV64-NEXT: vsext.vf4 v16, v8 1017; RV64-NEXT: vsll.vi v8, v16, 3 1018; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1019; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1020; RV64-NEXT: ret 1021 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i16> %idxs 1022 %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1023 ret <vscale x 8 x i64> %v 1024} 1025 1026define <vscale x 8 x i64> @vpgather_baseidx_sext_nxv8i16_nxv8i64(i64* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1027; RV32-LABEL: vpgather_baseidx_sext_nxv8i16_nxv8i64: 1028; RV32: # %bb.0: 1029; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1030; RV32-NEXT: vsext.vf4 v16, v8 1031; RV32-NEXT: vsll.vi v8, v16, 3 1032; RV32-NEXT: vsetvli zero, zero, e32, m4, ta, mu 1033; RV32-NEXT: vnsrl.wi v16, v8, 0 1034; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1035; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1036; RV32-NEXT: ret 1037; 1038; RV64-LABEL: vpgather_baseidx_sext_nxv8i16_nxv8i64: 1039; RV64: # %bb.0: 1040; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1041; RV64-NEXT: vsext.vf4 v16, v8 1042; RV64-NEXT: vsll.vi v8, v16, 3 1043; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1044; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1045; RV64-NEXT: ret 1046 %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i64> 1047 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs 1048 %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1049 ret <vscale x 8 x i64> %v 1050} 1051 1052define <vscale x 8 x i64> @vpgather_baseidx_zext_nxv8i16_nxv8i64(i64* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1053; RV32-LABEL: vpgather_baseidx_zext_nxv8i16_nxv8i64: 1054; RV32: # %bb.0: 1055; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1056; RV32-NEXT: vzext.vf4 v16, v8 1057; RV32-NEXT: vsll.vi v8, v16, 3 1058; RV32-NEXT: vsetvli zero, zero, e32, m4, ta, mu 1059; RV32-NEXT: vnsrl.wi v16, v8, 0 1060; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1061; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1062; RV32-NEXT: ret 1063; 1064; RV64-LABEL: vpgather_baseidx_zext_nxv8i16_nxv8i64: 1065; RV64: # %bb.0: 1066; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1067; RV64-NEXT: vzext.vf4 v16, v8 1068; RV64-NEXT: vsll.vi v8, v16, 3 1069; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1070; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1071; RV64-NEXT: ret 1072 %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i64> 1073 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs 1074 %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1075 ret <vscale x 8 x i64> %v 1076} 1077 1078define <vscale x 8 x i64> @vpgather_baseidx_nxv8i32_nxv8i64(i64* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1079; RV32-LABEL: vpgather_baseidx_nxv8i32_nxv8i64: 1080; RV32: # %bb.0: 1081; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1082; RV32-NEXT: vsll.vi v16, v8, 3 1083; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1084; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1085; RV32-NEXT: ret 1086; 1087; RV64-LABEL: vpgather_baseidx_nxv8i32_nxv8i64: 1088; RV64: # %bb.0: 1089; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1090; RV64-NEXT: vsext.vf2 v16, v8 1091; RV64-NEXT: vsll.vi v8, v16, 3 1092; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1093; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1094; RV64-NEXT: ret 1095 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i32> %idxs 1096 %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1097 ret <vscale x 8 x i64> %v 1098} 1099 1100define <vscale x 8 x i64> @vpgather_baseidx_sext_nxv8i32_nxv8i64(i64* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1101; RV32-LABEL: vpgather_baseidx_sext_nxv8i32_nxv8i64: 1102; RV32: # %bb.0: 1103; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1104; RV32-NEXT: vsext.vf2 v16, v8 1105; RV32-NEXT: vsll.vi v8, v16, 3 1106; RV32-NEXT: vsetvli zero, zero, e32, m4, ta, mu 1107; RV32-NEXT: vnsrl.wi v16, v8, 0 1108; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1109; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1110; RV32-NEXT: ret 1111; 1112; RV64-LABEL: vpgather_baseidx_sext_nxv8i32_nxv8i64: 1113; RV64: # %bb.0: 1114; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1115; RV64-NEXT: vsext.vf2 v16, v8 1116; RV64-NEXT: vsll.vi v8, v16, 3 1117; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1118; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1119; RV64-NEXT: ret 1120 %eidxs = sext <vscale x 8 x i32> %idxs to <vscale x 8 x i64> 1121 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs 1122 %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1123 ret <vscale x 8 x i64> %v 1124} 1125 1126define <vscale x 8 x i64> @vpgather_baseidx_zext_nxv8i32_nxv8i64(i64* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1127; RV32-LABEL: vpgather_baseidx_zext_nxv8i32_nxv8i64: 1128; RV32: # %bb.0: 1129; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1130; RV32-NEXT: vzext.vf2 v16, v8 1131; RV32-NEXT: vsll.vi v8, v16, 3 1132; RV32-NEXT: vsetvli zero, zero, e32, m4, ta, mu 1133; RV32-NEXT: vnsrl.wi v16, v8, 0 1134; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1135; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1136; RV32-NEXT: ret 1137; 1138; RV64-LABEL: vpgather_baseidx_zext_nxv8i32_nxv8i64: 1139; RV64: # %bb.0: 1140; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1141; RV64-NEXT: vzext.vf2 v16, v8 1142; RV64-NEXT: vsll.vi v8, v16, 3 1143; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1144; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1145; RV64-NEXT: ret 1146 %eidxs = zext <vscale x 8 x i32> %idxs to <vscale x 8 x i64> 1147 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs 1148 %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1149 ret <vscale x 8 x i64> %v 1150} 1151 1152define <vscale x 8 x i64> @vpgather_baseidx_nxv8i64(i64* %base, <vscale x 8 x i64> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1153; RV32-LABEL: vpgather_baseidx_nxv8i64: 1154; RV32: # %bb.0: 1155; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1156; RV32-NEXT: vsll.vi v8, v8, 3 1157; RV32-NEXT: vsetvli zero, zero, e32, m4, ta, mu 1158; RV32-NEXT: vnsrl.wi v16, v8, 0 1159; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1160; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1161; RV32-NEXT: ret 1162; 1163; RV64-LABEL: vpgather_baseidx_nxv8i64: 1164; RV64: # %bb.0: 1165; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1166; RV64-NEXT: vsll.vi v8, v8, 3 1167; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1168; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1169; RV64-NEXT: ret 1170 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %idxs 1171 %v = call <vscale x 8 x i64> @llvm.vp.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1172 ret <vscale x 8 x i64> %v 1173} 1174 1175declare <vscale x 1 x half> @llvm.vp.gather.nxv1f16.nxv1p0f16(<vscale x 1 x half*>, <vscale x 1 x i1>, i32) 1176 1177define <vscale x 1 x half> @vpgather_nxv1f16(<vscale x 1 x half*> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) { 1178; RV32-LABEL: vpgather_nxv1f16: 1179; RV32: # %bb.0: 1180; RV32-NEXT: vsetvli zero, a0, e16, mf4, ta, mu 1181; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 1182; RV32-NEXT: vmv1r.v v8, v9 1183; RV32-NEXT: ret 1184; 1185; RV64-LABEL: vpgather_nxv1f16: 1186; RV64: # %bb.0: 1187; RV64-NEXT: vsetvli zero, a0, e16, mf4, ta, mu 1188; RV64-NEXT: vluxei64.v v9, (zero), v8, v0.t 1189; RV64-NEXT: vmv1r.v v8, v9 1190; RV64-NEXT: ret 1191 %v = call <vscale x 1 x half> @llvm.vp.gather.nxv1f16.nxv1p0f16(<vscale x 1 x half*> %ptrs, <vscale x 1 x i1> %m, i32 %evl) 1192 ret <vscale x 1 x half> %v 1193} 1194 1195declare <vscale x 2 x half> @llvm.vp.gather.nxv2f16.nxv2p0f16(<vscale x 2 x half*>, <vscale x 2 x i1>, i32) 1196 1197define <vscale x 2 x half> @vpgather_nxv2f16(<vscale x 2 x half*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 1198; RV32-LABEL: vpgather_nxv2f16: 1199; RV32: # %bb.0: 1200; RV32-NEXT: vsetvli zero, a0, e16, mf2, ta, mu 1201; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 1202; RV32-NEXT: vmv1r.v v8, v9 1203; RV32-NEXT: ret 1204; 1205; RV64-LABEL: vpgather_nxv2f16: 1206; RV64: # %bb.0: 1207; RV64-NEXT: vsetvli zero, a0, e16, mf2, ta, mu 1208; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 1209; RV64-NEXT: vmv1r.v v8, v10 1210; RV64-NEXT: ret 1211 %v = call <vscale x 2 x half> @llvm.vp.gather.nxv2f16.nxv2p0f16(<vscale x 2 x half*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 1212 ret <vscale x 2 x half> %v 1213} 1214 1215declare <vscale x 4 x half> @llvm.vp.gather.nxv4f16.nxv4p0f16(<vscale x 4 x half*>, <vscale x 4 x i1>, i32) 1216 1217define <vscale x 4 x half> @vpgather_nxv4f16(<vscale x 4 x half*> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) { 1218; RV32-LABEL: vpgather_nxv4f16: 1219; RV32: # %bb.0: 1220; RV32-NEXT: vsetvli zero, a0, e16, m1, ta, mu 1221; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 1222; RV32-NEXT: vmv.v.v v8, v10 1223; RV32-NEXT: ret 1224; 1225; RV64-LABEL: vpgather_nxv4f16: 1226; RV64: # %bb.0: 1227; RV64-NEXT: vsetvli zero, a0, e16, m1, ta, mu 1228; RV64-NEXT: vluxei64.v v12, (zero), v8, v0.t 1229; RV64-NEXT: vmv.v.v v8, v12 1230; RV64-NEXT: ret 1231 %v = call <vscale x 4 x half> @llvm.vp.gather.nxv4f16.nxv4p0f16(<vscale x 4 x half*> %ptrs, <vscale x 4 x i1> %m, i32 %evl) 1232 ret <vscale x 4 x half> %v 1233} 1234 1235define <vscale x 4 x half> @vpgather_truemask_nxv4f16(<vscale x 4 x half*> %ptrs, i32 zeroext %evl) { 1236; RV32-LABEL: vpgather_truemask_nxv4f16: 1237; RV32: # %bb.0: 1238; RV32-NEXT: vsetvli zero, a0, e16, m1, ta, mu 1239; RV32-NEXT: vluxei32.v v10, (zero), v8 1240; RV32-NEXT: vmv.v.v v8, v10 1241; RV32-NEXT: ret 1242; 1243; RV64-LABEL: vpgather_truemask_nxv4f16: 1244; RV64: # %bb.0: 1245; RV64-NEXT: vsetvli zero, a0, e16, m1, ta, mu 1246; RV64-NEXT: vluxei64.v v12, (zero), v8 1247; RV64-NEXT: vmv.v.v v8, v12 1248; RV64-NEXT: ret 1249 %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0 1250 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer 1251 %v = call <vscale x 4 x half> @llvm.vp.gather.nxv4f16.nxv4p0f16(<vscale x 4 x half*> %ptrs, <vscale x 4 x i1> %mtrue, i32 %evl) 1252 ret <vscale x 4 x half> %v 1253} 1254 1255declare <vscale x 8 x half> @llvm.vp.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*>, <vscale x 8 x i1>, i32) 1256 1257define <vscale x 8 x half> @vpgather_nxv8f16(<vscale x 8 x half*> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1258; RV32-LABEL: vpgather_nxv8f16: 1259; RV32: # %bb.0: 1260; RV32-NEXT: vsetvli zero, a0, e16, m2, ta, mu 1261; RV32-NEXT: vluxei32.v v12, (zero), v8, v0.t 1262; RV32-NEXT: vmv.v.v v8, v12 1263; RV32-NEXT: ret 1264; 1265; RV64-LABEL: vpgather_nxv8f16: 1266; RV64: # %bb.0: 1267; RV64-NEXT: vsetvli zero, a0, e16, m2, ta, mu 1268; RV64-NEXT: vluxei64.v v16, (zero), v8, v0.t 1269; RV64-NEXT: vmv.v.v v8, v16 1270; RV64-NEXT: ret 1271 %v = call <vscale x 8 x half> @llvm.vp.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1272 ret <vscale x 8 x half> %v 1273} 1274 1275define <vscale x 8 x half> @vpgather_baseidx_nxv8i8_nxv8f16(half* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1276; RV32-LABEL: vpgather_baseidx_nxv8i8_nxv8f16: 1277; RV32: # %bb.0: 1278; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1279; RV32-NEXT: vsext.vf4 v12, v8 1280; RV32-NEXT: vadd.vv v12, v12, v12 1281; RV32-NEXT: vsetvli zero, a1, e16, m2, ta, mu 1282; RV32-NEXT: vluxei32.v v8, (a0), v12, v0.t 1283; RV32-NEXT: ret 1284; 1285; RV64-LABEL: vpgather_baseidx_nxv8i8_nxv8f16: 1286; RV64: # %bb.0: 1287; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1288; RV64-NEXT: vsext.vf8 v16, v8 1289; RV64-NEXT: vadd.vv v16, v16, v16 1290; RV64-NEXT: vsetvli zero, a1, e16, m2, ta, mu 1291; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 1292; RV64-NEXT: ret 1293 %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i8> %idxs 1294 %v = call <vscale x 8 x half> @llvm.vp.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1295 ret <vscale x 8 x half> %v 1296} 1297 1298define <vscale x 8 x half> @vpgather_baseidx_sext_nxv8i8_nxv8f16(half* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1299; RV32-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8f16: 1300; RV32: # %bb.0: 1301; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1302; RV32-NEXT: vsext.vf4 v12, v8 1303; RV32-NEXT: vadd.vv v12, v12, v12 1304; RV32-NEXT: vsetvli zero, a1, e16, m2, ta, mu 1305; RV32-NEXT: vluxei32.v v8, (a0), v12, v0.t 1306; RV32-NEXT: ret 1307; 1308; RV64-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8f16: 1309; RV64: # %bb.0: 1310; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1311; RV64-NEXT: vsext.vf8 v16, v8 1312; RV64-NEXT: vadd.vv v16, v16, v16 1313; RV64-NEXT: vsetvli zero, a1, e16, m2, ta, mu 1314; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 1315; RV64-NEXT: ret 1316 %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i16> 1317 %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i16> %eidxs 1318 %v = call <vscale x 8 x half> @llvm.vp.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1319 ret <vscale x 8 x half> %v 1320} 1321 1322define <vscale x 8 x half> @vpgather_baseidx_zext_nxv8i8_nxv8f16(half* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1323; RV32-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8f16: 1324; RV32: # %bb.0: 1325; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1326; RV32-NEXT: vzext.vf4 v12, v8 1327; RV32-NEXT: vadd.vv v12, v12, v12 1328; RV32-NEXT: vsetvli zero, a1, e16, m2, ta, mu 1329; RV32-NEXT: vluxei32.v v8, (a0), v12, v0.t 1330; RV32-NEXT: ret 1331; 1332; RV64-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8f16: 1333; RV64: # %bb.0: 1334; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1335; RV64-NEXT: vzext.vf8 v16, v8 1336; RV64-NEXT: vadd.vv v16, v16, v16 1337; RV64-NEXT: vsetvli zero, a1, e16, m2, ta, mu 1338; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 1339; RV64-NEXT: ret 1340 %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i16> 1341 %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i16> %eidxs 1342 %v = call <vscale x 8 x half> @llvm.vp.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1343 ret <vscale x 8 x half> %v 1344} 1345 1346define <vscale x 8 x half> @vpgather_baseidx_nxv8f16(half* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1347; RV32-LABEL: vpgather_baseidx_nxv8f16: 1348; RV32: # %bb.0: 1349; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1350; RV32-NEXT: vsext.vf2 v12, v8 1351; RV32-NEXT: vadd.vv v12, v12, v12 1352; RV32-NEXT: vsetvli zero, a1, e16, m2, ta, mu 1353; RV32-NEXT: vluxei32.v v8, (a0), v12, v0.t 1354; RV32-NEXT: ret 1355; 1356; RV64-LABEL: vpgather_baseidx_nxv8f16: 1357; RV64: # %bb.0: 1358; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1359; RV64-NEXT: vsext.vf4 v16, v8 1360; RV64-NEXT: vadd.vv v16, v16, v16 1361; RV64-NEXT: vsetvli zero, a1, e16, m2, ta, mu 1362; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 1363; RV64-NEXT: ret 1364 %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i16> %idxs 1365 %v = call <vscale x 8 x half> @llvm.vp.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1366 ret <vscale x 8 x half> %v 1367} 1368 1369declare <vscale x 1 x float> @llvm.vp.gather.nxv1f32.nxv1p0f32(<vscale x 1 x float*>, <vscale x 1 x i1>, i32) 1370 1371define <vscale x 1 x float> @vpgather_nxv1f32(<vscale x 1 x float*> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) { 1372; RV32-LABEL: vpgather_nxv1f32: 1373; RV32: # %bb.0: 1374; RV32-NEXT: vsetvli zero, a0, e32, mf2, ta, mu 1375; RV32-NEXT: vluxei32.v v8, (zero), v8, v0.t 1376; RV32-NEXT: ret 1377; 1378; RV64-LABEL: vpgather_nxv1f32: 1379; RV64: # %bb.0: 1380; RV64-NEXT: vsetvli zero, a0, e32, mf2, ta, mu 1381; RV64-NEXT: vluxei64.v v9, (zero), v8, v0.t 1382; RV64-NEXT: vmv1r.v v8, v9 1383; RV64-NEXT: ret 1384 %v = call <vscale x 1 x float> @llvm.vp.gather.nxv1f32.nxv1p0f32(<vscale x 1 x float*> %ptrs, <vscale x 1 x i1> %m, i32 %evl) 1385 ret <vscale x 1 x float> %v 1386} 1387 1388declare <vscale x 2 x float> @llvm.vp.gather.nxv2f32.nxv2p0f32(<vscale x 2 x float*>, <vscale x 2 x i1>, i32) 1389 1390define <vscale x 2 x float> @vpgather_nxv2f32(<vscale x 2 x float*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 1391; RV32-LABEL: vpgather_nxv2f32: 1392; RV32: # %bb.0: 1393; RV32-NEXT: vsetvli zero, a0, e32, m1, ta, mu 1394; RV32-NEXT: vluxei32.v v8, (zero), v8, v0.t 1395; RV32-NEXT: ret 1396; 1397; RV64-LABEL: vpgather_nxv2f32: 1398; RV64: # %bb.0: 1399; RV64-NEXT: vsetvli zero, a0, e32, m1, ta, mu 1400; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 1401; RV64-NEXT: vmv.v.v v8, v10 1402; RV64-NEXT: ret 1403 %v = call <vscale x 2 x float> @llvm.vp.gather.nxv2f32.nxv2p0f32(<vscale x 2 x float*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 1404 ret <vscale x 2 x float> %v 1405} 1406 1407declare <vscale x 4 x float> @llvm.vp.gather.nxv4f32.nxv4p0f32(<vscale x 4 x float*>, <vscale x 4 x i1>, i32) 1408 1409define <vscale x 4 x float> @vpgather_nxv4f32(<vscale x 4 x float*> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) { 1410; RV32-LABEL: vpgather_nxv4f32: 1411; RV32: # %bb.0: 1412; RV32-NEXT: vsetvli zero, a0, e32, m2, ta, mu 1413; RV32-NEXT: vluxei32.v v8, (zero), v8, v0.t 1414; RV32-NEXT: ret 1415; 1416; RV64-LABEL: vpgather_nxv4f32: 1417; RV64: # %bb.0: 1418; RV64-NEXT: vsetvli zero, a0, e32, m2, ta, mu 1419; RV64-NEXT: vluxei64.v v12, (zero), v8, v0.t 1420; RV64-NEXT: vmv.v.v v8, v12 1421; RV64-NEXT: ret 1422 %v = call <vscale x 4 x float> @llvm.vp.gather.nxv4f32.nxv4p0f32(<vscale x 4 x float*> %ptrs, <vscale x 4 x i1> %m, i32 %evl) 1423 ret <vscale x 4 x float> %v 1424} 1425 1426define <vscale x 4 x float> @vpgather_truemask_nxv4f32(<vscale x 4 x float*> %ptrs, i32 zeroext %evl) { 1427; RV32-LABEL: vpgather_truemask_nxv4f32: 1428; RV32: # %bb.0: 1429; RV32-NEXT: vsetvli zero, a0, e32, m2, ta, mu 1430; RV32-NEXT: vluxei32.v v8, (zero), v8 1431; RV32-NEXT: ret 1432; 1433; RV64-LABEL: vpgather_truemask_nxv4f32: 1434; RV64: # %bb.0: 1435; RV64-NEXT: vsetvli zero, a0, e32, m2, ta, mu 1436; RV64-NEXT: vluxei64.v v12, (zero), v8 1437; RV64-NEXT: vmv.v.v v8, v12 1438; RV64-NEXT: ret 1439 %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0 1440 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer 1441 %v = call <vscale x 4 x float> @llvm.vp.gather.nxv4f32.nxv4p0f32(<vscale x 4 x float*> %ptrs, <vscale x 4 x i1> %mtrue, i32 %evl) 1442 ret <vscale x 4 x float> %v 1443} 1444 1445declare <vscale x 8 x float> @llvm.vp.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*>, <vscale x 8 x i1>, i32) 1446 1447define <vscale x 8 x float> @vpgather_nxv8f32(<vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1448; RV32-LABEL: vpgather_nxv8f32: 1449; RV32: # %bb.0: 1450; RV32-NEXT: vsetvli zero, a0, e32, m4, ta, mu 1451; RV32-NEXT: vluxei32.v v8, (zero), v8, v0.t 1452; RV32-NEXT: ret 1453; 1454; RV64-LABEL: vpgather_nxv8f32: 1455; RV64: # %bb.0: 1456; RV64-NEXT: vsetvli zero, a0, e32, m4, ta, mu 1457; RV64-NEXT: vluxei64.v v16, (zero), v8, v0.t 1458; RV64-NEXT: vmv.v.v v8, v16 1459; RV64-NEXT: ret 1460 %v = call <vscale x 8 x float> @llvm.vp.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1461 ret <vscale x 8 x float> %v 1462} 1463 1464define <vscale x 8 x float> @vpgather_baseidx_nxv8i8_nxv8f32(float* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1465; RV32-LABEL: vpgather_baseidx_nxv8i8_nxv8f32: 1466; RV32: # %bb.0: 1467; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1468; RV32-NEXT: vsext.vf4 v12, v8 1469; RV32-NEXT: vsll.vi v8, v12, 2 1470; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1471; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 1472; RV32-NEXT: ret 1473; 1474; RV64-LABEL: vpgather_baseidx_nxv8i8_nxv8f32: 1475; RV64: # %bb.0: 1476; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1477; RV64-NEXT: vsext.vf8 v16, v8 1478; RV64-NEXT: vsll.vi v16, v16, 2 1479; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1480; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 1481; RV64-NEXT: ret 1482 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i8> %idxs 1483 %v = call <vscale x 8 x float> @llvm.vp.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1484 ret <vscale x 8 x float> %v 1485} 1486 1487define <vscale x 8 x float> @vpgather_baseidx_sext_nxv8i8_nxv8f32(float* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1488; RV32-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8f32: 1489; RV32: # %bb.0: 1490; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1491; RV32-NEXT: vsext.vf4 v12, v8 1492; RV32-NEXT: vsll.vi v8, v12, 2 1493; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1494; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 1495; RV32-NEXT: ret 1496; 1497; RV64-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8f32: 1498; RV64: # %bb.0: 1499; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1500; RV64-NEXT: vsext.vf8 v16, v8 1501; RV64-NEXT: vsll.vi v16, v16, 2 1502; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1503; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 1504; RV64-NEXT: ret 1505 %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i32> 1506 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs 1507 %v = call <vscale x 8 x float> @llvm.vp.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1508 ret <vscale x 8 x float> %v 1509} 1510 1511define <vscale x 8 x float> @vpgather_baseidx_zext_nxv8i8_nxv8f32(float* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1512; RV32-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8f32: 1513; RV32: # %bb.0: 1514; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1515; RV32-NEXT: vzext.vf4 v12, v8 1516; RV32-NEXT: vsll.vi v8, v12, 2 1517; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1518; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 1519; RV32-NEXT: ret 1520; 1521; RV64-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8f32: 1522; RV64: # %bb.0: 1523; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1524; RV64-NEXT: vzext.vf8 v16, v8 1525; RV64-NEXT: vsll.vi v16, v16, 2 1526; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1527; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 1528; RV64-NEXT: ret 1529 %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i32> 1530 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs 1531 %v = call <vscale x 8 x float> @llvm.vp.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1532 ret <vscale x 8 x float> %v 1533} 1534 1535define <vscale x 8 x float> @vpgather_baseidx_nxv8i16_nxv8f32(float* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1536; RV32-LABEL: vpgather_baseidx_nxv8i16_nxv8f32: 1537; RV32: # %bb.0: 1538; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1539; RV32-NEXT: vsext.vf2 v12, v8 1540; RV32-NEXT: vsll.vi v8, v12, 2 1541; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1542; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 1543; RV32-NEXT: ret 1544; 1545; RV64-LABEL: vpgather_baseidx_nxv8i16_nxv8f32: 1546; RV64: # %bb.0: 1547; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1548; RV64-NEXT: vsext.vf4 v16, v8 1549; RV64-NEXT: vsll.vi v16, v16, 2 1550; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1551; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 1552; RV64-NEXT: ret 1553 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i16> %idxs 1554 %v = call <vscale x 8 x float> @llvm.vp.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1555 ret <vscale x 8 x float> %v 1556} 1557 1558define <vscale x 8 x float> @vpgather_baseidx_sext_nxv8i16_nxv8f32(float* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1559; RV32-LABEL: vpgather_baseidx_sext_nxv8i16_nxv8f32: 1560; RV32: # %bb.0: 1561; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1562; RV32-NEXT: vsext.vf2 v12, v8 1563; RV32-NEXT: vsll.vi v8, v12, 2 1564; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1565; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 1566; RV32-NEXT: ret 1567; 1568; RV64-LABEL: vpgather_baseidx_sext_nxv8i16_nxv8f32: 1569; RV64: # %bb.0: 1570; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1571; RV64-NEXT: vsext.vf4 v16, v8 1572; RV64-NEXT: vsll.vi v16, v16, 2 1573; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1574; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 1575; RV64-NEXT: ret 1576 %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i32> 1577 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs 1578 %v = call <vscale x 8 x float> @llvm.vp.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1579 ret <vscale x 8 x float> %v 1580} 1581 1582define <vscale x 8 x float> @vpgather_baseidx_zext_nxv8i16_nxv8f32(float* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1583; RV32-LABEL: vpgather_baseidx_zext_nxv8i16_nxv8f32: 1584; RV32: # %bb.0: 1585; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1586; RV32-NEXT: vzext.vf2 v12, v8 1587; RV32-NEXT: vsll.vi v8, v12, 2 1588; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1589; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 1590; RV32-NEXT: ret 1591; 1592; RV64-LABEL: vpgather_baseidx_zext_nxv8i16_nxv8f32: 1593; RV64: # %bb.0: 1594; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1595; RV64-NEXT: vzext.vf4 v16, v8 1596; RV64-NEXT: vsll.vi v16, v16, 2 1597; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1598; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 1599; RV64-NEXT: ret 1600 %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i32> 1601 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs 1602 %v = call <vscale x 8 x float> @llvm.vp.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1603 ret <vscale x 8 x float> %v 1604} 1605 1606define <vscale x 8 x float> @vpgather_baseidx_nxv8f32(float* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1607; RV32-LABEL: vpgather_baseidx_nxv8f32: 1608; RV32: # %bb.0: 1609; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1610; RV32-NEXT: vsll.vi v8, v8, 2 1611; RV32-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1612; RV32-NEXT: vluxei32.v v8, (a0), v8, v0.t 1613; RV32-NEXT: ret 1614; 1615; RV64-LABEL: vpgather_baseidx_nxv8f32: 1616; RV64: # %bb.0: 1617; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1618; RV64-NEXT: vsext.vf2 v16, v8 1619; RV64-NEXT: vsll.vi v16, v16, 2 1620; RV64-NEXT: vsetvli zero, a1, e32, m4, ta, mu 1621; RV64-NEXT: vluxei64.v v8, (a0), v16, v0.t 1622; RV64-NEXT: ret 1623 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %idxs 1624 %v = call <vscale x 8 x float> @llvm.vp.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1625 ret <vscale x 8 x float> %v 1626} 1627 1628declare <vscale x 1 x double> @llvm.vp.gather.nxv1f64.nxv1p0f64(<vscale x 1 x double*>, <vscale x 1 x i1>, i32) 1629 1630define <vscale x 1 x double> @vpgather_nxv1f64(<vscale x 1 x double*> %ptrs, <vscale x 1 x i1> %m, i32 zeroext %evl) { 1631; RV32-LABEL: vpgather_nxv1f64: 1632; RV32: # %bb.0: 1633; RV32-NEXT: vsetvli zero, a0, e64, m1, ta, mu 1634; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 1635; RV32-NEXT: vmv.v.v v8, v9 1636; RV32-NEXT: ret 1637; 1638; RV64-LABEL: vpgather_nxv1f64: 1639; RV64: # %bb.0: 1640; RV64-NEXT: vsetvli zero, a0, e64, m1, ta, mu 1641; RV64-NEXT: vluxei64.v v8, (zero), v8, v0.t 1642; RV64-NEXT: ret 1643 %v = call <vscale x 1 x double> @llvm.vp.gather.nxv1f64.nxv1p0f64(<vscale x 1 x double*> %ptrs, <vscale x 1 x i1> %m, i32 %evl) 1644 ret <vscale x 1 x double> %v 1645} 1646 1647declare <vscale x 2 x double> @llvm.vp.gather.nxv2f64.nxv2p0f64(<vscale x 2 x double*>, <vscale x 2 x i1>, i32) 1648 1649define <vscale x 2 x double> @vpgather_nxv2f64(<vscale x 2 x double*> %ptrs, <vscale x 2 x i1> %m, i32 zeroext %evl) { 1650; RV32-LABEL: vpgather_nxv2f64: 1651; RV32: # %bb.0: 1652; RV32-NEXT: vsetvli zero, a0, e64, m2, ta, mu 1653; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 1654; RV32-NEXT: vmv.v.v v8, v10 1655; RV32-NEXT: ret 1656; 1657; RV64-LABEL: vpgather_nxv2f64: 1658; RV64: # %bb.0: 1659; RV64-NEXT: vsetvli zero, a0, e64, m2, ta, mu 1660; RV64-NEXT: vluxei64.v v8, (zero), v8, v0.t 1661; RV64-NEXT: ret 1662 %v = call <vscale x 2 x double> @llvm.vp.gather.nxv2f64.nxv2p0f64(<vscale x 2 x double*> %ptrs, <vscale x 2 x i1> %m, i32 %evl) 1663 ret <vscale x 2 x double> %v 1664} 1665 1666declare <vscale x 4 x double> @llvm.vp.gather.nxv4f64.nxv4p0f64(<vscale x 4 x double*>, <vscale x 4 x i1>, i32) 1667 1668define <vscale x 4 x double> @vpgather_nxv4f64(<vscale x 4 x double*> %ptrs, <vscale x 4 x i1> %m, i32 zeroext %evl) { 1669; RV32-LABEL: vpgather_nxv4f64: 1670; RV32: # %bb.0: 1671; RV32-NEXT: vsetvli zero, a0, e64, m4, ta, mu 1672; RV32-NEXT: vluxei32.v v12, (zero), v8, v0.t 1673; RV32-NEXT: vmv.v.v v8, v12 1674; RV32-NEXT: ret 1675; 1676; RV64-LABEL: vpgather_nxv4f64: 1677; RV64: # %bb.0: 1678; RV64-NEXT: vsetvli zero, a0, e64, m4, ta, mu 1679; RV64-NEXT: vluxei64.v v8, (zero), v8, v0.t 1680; RV64-NEXT: ret 1681 %v = call <vscale x 4 x double> @llvm.vp.gather.nxv4f64.nxv4p0f64(<vscale x 4 x double*> %ptrs, <vscale x 4 x i1> %m, i32 %evl) 1682 ret <vscale x 4 x double> %v 1683} 1684 1685define <vscale x 4 x double> @vpgather_truemask_nxv4f64(<vscale x 4 x double*> %ptrs, i32 zeroext %evl) { 1686; RV32-LABEL: vpgather_truemask_nxv4f64: 1687; RV32: # %bb.0: 1688; RV32-NEXT: vsetvli zero, a0, e64, m4, ta, mu 1689; RV32-NEXT: vluxei32.v v12, (zero), v8 1690; RV32-NEXT: vmv.v.v v8, v12 1691; RV32-NEXT: ret 1692; 1693; RV64-LABEL: vpgather_truemask_nxv4f64: 1694; RV64: # %bb.0: 1695; RV64-NEXT: vsetvli zero, a0, e64, m4, ta, mu 1696; RV64-NEXT: vluxei64.v v8, (zero), v8 1697; RV64-NEXT: ret 1698 %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0 1699 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer 1700 %v = call <vscale x 4 x double> @llvm.vp.gather.nxv4f64.nxv4p0f64(<vscale x 4 x double*> %ptrs, <vscale x 4 x i1> %mtrue, i32 %evl) 1701 ret <vscale x 4 x double> %v 1702} 1703 1704declare <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*>, <vscale x 8 x i1>, i32) 1705 1706define <vscale x 8 x double> @vpgather_nxv8f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1707; RV32-LABEL: vpgather_nxv8f64: 1708; RV32: # %bb.0: 1709; RV32-NEXT: vsetvli zero, a0, e64, m8, ta, mu 1710; RV32-NEXT: vluxei32.v v16, (zero), v8, v0.t 1711; RV32-NEXT: vmv.v.v v8, v16 1712; RV32-NEXT: ret 1713; 1714; RV64-LABEL: vpgather_nxv8f64: 1715; RV64: # %bb.0: 1716; RV64-NEXT: vsetvli zero, a0, e64, m8, ta, mu 1717; RV64-NEXT: vluxei64.v v8, (zero), v8, v0.t 1718; RV64-NEXT: ret 1719 %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1720 ret <vscale x 8 x double> %v 1721} 1722 1723define <vscale x 8 x double> @vpgather_baseidx_nxv8i8_nxv8f64(double* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1724; RV32-LABEL: vpgather_baseidx_nxv8i8_nxv8f64: 1725; RV32: # %bb.0: 1726; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1727; RV32-NEXT: vsext.vf4 v12, v8 1728; RV32-NEXT: vsll.vi v16, v12, 3 1729; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1730; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1731; RV32-NEXT: ret 1732; 1733; RV64-LABEL: vpgather_baseidx_nxv8i8_nxv8f64: 1734; RV64: # %bb.0: 1735; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1736; RV64-NEXT: vsext.vf8 v16, v8 1737; RV64-NEXT: vsll.vi v8, v16, 3 1738; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1739; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1740; RV64-NEXT: ret 1741 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i8> %idxs 1742 %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1743 ret <vscale x 8 x double> %v 1744} 1745 1746define <vscale x 8 x double> @vpgather_baseidx_sext_nxv8i8_nxv8f64(double* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1747; RV32-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8f64: 1748; RV32: # %bb.0: 1749; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1750; RV32-NEXT: vsext.vf8 v16, v8 1751; RV32-NEXT: vsll.vi v8, v16, 3 1752; RV32-NEXT: vsetvli zero, zero, e32, m4, ta, mu 1753; RV32-NEXT: vnsrl.wi v16, v8, 0 1754; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1755; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1756; RV32-NEXT: ret 1757; 1758; RV64-LABEL: vpgather_baseidx_sext_nxv8i8_nxv8f64: 1759; RV64: # %bb.0: 1760; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1761; RV64-NEXT: vsext.vf8 v16, v8 1762; RV64-NEXT: vsll.vi v8, v16, 3 1763; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1764; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1765; RV64-NEXT: ret 1766 %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i64> 1767 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs 1768 %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1769 ret <vscale x 8 x double> %v 1770} 1771 1772define <vscale x 8 x double> @vpgather_baseidx_zext_nxv8i8_nxv8f64(double* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1773; RV32-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8f64: 1774; RV32: # %bb.0: 1775; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1776; RV32-NEXT: vzext.vf8 v16, v8 1777; RV32-NEXT: vsll.vi v8, v16, 3 1778; RV32-NEXT: vsetvli zero, zero, e32, m4, ta, mu 1779; RV32-NEXT: vnsrl.wi v16, v8, 0 1780; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1781; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1782; RV32-NEXT: ret 1783; 1784; RV64-LABEL: vpgather_baseidx_zext_nxv8i8_nxv8f64: 1785; RV64: # %bb.0: 1786; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1787; RV64-NEXT: vzext.vf8 v16, v8 1788; RV64-NEXT: vsll.vi v8, v16, 3 1789; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1790; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1791; RV64-NEXT: ret 1792 %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i64> 1793 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs 1794 %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1795 ret <vscale x 8 x double> %v 1796} 1797 1798define <vscale x 8 x double> @vpgather_baseidx_nxv8i16_nxv8f64(double* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1799; RV32-LABEL: vpgather_baseidx_nxv8i16_nxv8f64: 1800; RV32: # %bb.0: 1801; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1802; RV32-NEXT: vsext.vf2 v12, v8 1803; RV32-NEXT: vsll.vi v16, v12, 3 1804; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1805; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1806; RV32-NEXT: ret 1807; 1808; RV64-LABEL: vpgather_baseidx_nxv8i16_nxv8f64: 1809; RV64: # %bb.0: 1810; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1811; RV64-NEXT: vsext.vf4 v16, v8 1812; RV64-NEXT: vsll.vi v8, v16, 3 1813; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1814; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1815; RV64-NEXT: ret 1816 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i16> %idxs 1817 %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1818 ret <vscale x 8 x double> %v 1819} 1820 1821define <vscale x 8 x double> @vpgather_baseidx_sext_nxv8i16_nxv8f64(double* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1822; RV32-LABEL: vpgather_baseidx_sext_nxv8i16_nxv8f64: 1823; RV32: # %bb.0: 1824; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1825; RV32-NEXT: vsext.vf4 v16, v8 1826; RV32-NEXT: vsll.vi v8, v16, 3 1827; RV32-NEXT: vsetvli zero, zero, e32, m4, ta, mu 1828; RV32-NEXT: vnsrl.wi v16, v8, 0 1829; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1830; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1831; RV32-NEXT: ret 1832; 1833; RV64-LABEL: vpgather_baseidx_sext_nxv8i16_nxv8f64: 1834; RV64: # %bb.0: 1835; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1836; RV64-NEXT: vsext.vf4 v16, v8 1837; RV64-NEXT: vsll.vi v8, v16, 3 1838; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1839; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1840; RV64-NEXT: ret 1841 %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i64> 1842 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs 1843 %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1844 ret <vscale x 8 x double> %v 1845} 1846 1847define <vscale x 8 x double> @vpgather_baseidx_zext_nxv8i16_nxv8f64(double* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1848; RV32-LABEL: vpgather_baseidx_zext_nxv8i16_nxv8f64: 1849; RV32: # %bb.0: 1850; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1851; RV32-NEXT: vzext.vf4 v16, v8 1852; RV32-NEXT: vsll.vi v8, v16, 3 1853; RV32-NEXT: vsetvli zero, zero, e32, m4, ta, mu 1854; RV32-NEXT: vnsrl.wi v16, v8, 0 1855; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1856; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1857; RV32-NEXT: ret 1858; 1859; RV64-LABEL: vpgather_baseidx_zext_nxv8i16_nxv8f64: 1860; RV64: # %bb.0: 1861; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1862; RV64-NEXT: vzext.vf4 v16, v8 1863; RV64-NEXT: vsll.vi v8, v16, 3 1864; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1865; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1866; RV64-NEXT: ret 1867 %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i64> 1868 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs 1869 %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1870 ret <vscale x 8 x double> %v 1871} 1872 1873define <vscale x 8 x double> @vpgather_baseidx_nxv8i32_nxv8f64(double* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1874; RV32-LABEL: vpgather_baseidx_nxv8i32_nxv8f64: 1875; RV32: # %bb.0: 1876; RV32-NEXT: vsetvli a2, zero, e32, m4, ta, mu 1877; RV32-NEXT: vsll.vi v16, v8, 3 1878; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1879; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1880; RV32-NEXT: ret 1881; 1882; RV64-LABEL: vpgather_baseidx_nxv8i32_nxv8f64: 1883; RV64: # %bb.0: 1884; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1885; RV64-NEXT: vsext.vf2 v16, v8 1886; RV64-NEXT: vsll.vi v8, v16, 3 1887; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1888; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1889; RV64-NEXT: ret 1890 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i32> %idxs 1891 %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1892 ret <vscale x 8 x double> %v 1893} 1894 1895define <vscale x 8 x double> @vpgather_baseidx_sext_nxv8i32_nxv8f64(double* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1896; RV32-LABEL: vpgather_baseidx_sext_nxv8i32_nxv8f64: 1897; RV32: # %bb.0: 1898; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1899; RV32-NEXT: vsext.vf2 v16, v8 1900; RV32-NEXT: vsll.vi v8, v16, 3 1901; RV32-NEXT: vsetvli zero, zero, e32, m4, ta, mu 1902; RV32-NEXT: vnsrl.wi v16, v8, 0 1903; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1904; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1905; RV32-NEXT: ret 1906; 1907; RV64-LABEL: vpgather_baseidx_sext_nxv8i32_nxv8f64: 1908; RV64: # %bb.0: 1909; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1910; RV64-NEXT: vsext.vf2 v16, v8 1911; RV64-NEXT: vsll.vi v8, v16, 3 1912; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1913; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1914; RV64-NEXT: ret 1915 %eidxs = sext <vscale x 8 x i32> %idxs to <vscale x 8 x i64> 1916 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs 1917 %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1918 ret <vscale x 8 x double> %v 1919} 1920 1921define <vscale x 8 x double> @vpgather_baseidx_zext_nxv8i32_nxv8f64(double* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1922; RV32-LABEL: vpgather_baseidx_zext_nxv8i32_nxv8f64: 1923; RV32: # %bb.0: 1924; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1925; RV32-NEXT: vzext.vf2 v16, v8 1926; RV32-NEXT: vsll.vi v8, v16, 3 1927; RV32-NEXT: vsetvli zero, zero, e32, m4, ta, mu 1928; RV32-NEXT: vnsrl.wi v16, v8, 0 1929; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1930; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1931; RV32-NEXT: ret 1932; 1933; RV64-LABEL: vpgather_baseidx_zext_nxv8i32_nxv8f64: 1934; RV64: # %bb.0: 1935; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1936; RV64-NEXT: vzext.vf2 v16, v8 1937; RV64-NEXT: vsll.vi v8, v16, 3 1938; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1939; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1940; RV64-NEXT: ret 1941 %eidxs = zext <vscale x 8 x i32> %idxs to <vscale x 8 x i64> 1942 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs 1943 %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1944 ret <vscale x 8 x double> %v 1945} 1946 1947define <vscale x 8 x double> @vpgather_baseidx_nxv8f64(double* %base, <vscale x 8 x i64> %idxs, <vscale x 8 x i1> %m, i32 zeroext %evl) { 1948; RV32-LABEL: vpgather_baseidx_nxv8f64: 1949; RV32: # %bb.0: 1950; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1951; RV32-NEXT: vsll.vi v8, v8, 3 1952; RV32-NEXT: vsetvli zero, zero, e32, m4, ta, mu 1953; RV32-NEXT: vnsrl.wi v16, v8, 0 1954; RV32-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1955; RV32-NEXT: vluxei32.v v8, (a0), v16, v0.t 1956; RV32-NEXT: ret 1957; 1958; RV64-LABEL: vpgather_baseidx_nxv8f64: 1959; RV64: # %bb.0: 1960; RV64-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1961; RV64-NEXT: vsll.vi v8, v8, 3 1962; RV64-NEXT: vsetvli zero, a1, e64, m8, ta, mu 1963; RV64-NEXT: vluxei64.v v8, (a0), v8, v0.t 1964; RV64-NEXT: ret 1965 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %idxs 1966 %v = call <vscale x 8 x double> @llvm.vp.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, i32 %evl) 1967 ret <vscale x 8 x double> %v 1968} 1969