1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+v -target-abi=ilp32d \
3; RUN:     -verify-machineinstrs < %s | FileCheck %s
4; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+v -target-abi=lp64d \
5; RUN:     -verify-machineinstrs < %s | FileCheck %s
6
7define <vscale x 1 x double> @vfwsub_vv_nxv1f64(<vscale x 1 x float> %va, <vscale x 1 x float> %vb) {
8; CHECK-LABEL: vfwsub_vv_nxv1f64:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu
11; CHECK-NEXT:    vfwsub.vv v10, v8, v9
12; CHECK-NEXT:    vmv1r.v v8, v10
13; CHECK-NEXT:    ret
14  %vc = fpext <vscale x 1 x float> %va to <vscale x 1 x double>
15  %vd = fpext <vscale x 1 x float> %vb to <vscale x 1 x double>
16  %ve = fsub <vscale x 1 x double> %vc, %vd
17  ret <vscale x 1 x double> %ve
18}
19
20define <vscale x 1 x double> @vfwsub_vf_nxv1f64(<vscale x 1 x float> %va, float %b) {
21; CHECK-LABEL: vfwsub_vf_nxv1f64:
22; CHECK:       # %bb.0:
23; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu
24; CHECK-NEXT:    vfwsub.vf v9, v8, fa0
25; CHECK-NEXT:    vmv1r.v v8, v9
26; CHECK-NEXT:    ret
27  %head = insertelement <vscale x 1 x float> poison, float %b, i32 0
28  %splat = shufflevector <vscale x 1 x float> %head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
29  %vc = fpext <vscale x 1 x float> %va to <vscale x 1 x double>
30  %vd = fpext <vscale x 1 x float> %splat to <vscale x 1 x double>
31  %ve = fsub <vscale x 1 x double> %vc, %vd
32  ret <vscale x 1 x double> %ve
33}
34
35define <vscale x 1 x double> @vfwsub_wv_nxv1f64(<vscale x 1 x double> %va, <vscale x 1 x float> %vb) {
36; CHECK-LABEL: vfwsub_wv_nxv1f64:
37; CHECK:       # %bb.0:
38; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu
39; CHECK-NEXT:    vfwsub.wv v10, v8, v9
40; CHECK-NEXT:    vmv1r.v v8, v10
41; CHECK-NEXT:    ret
42  %vc = fpext <vscale x 1 x float> %vb to <vscale x 1 x double>
43  %vd = fsub <vscale x 1 x double> %va, %vc
44  ret <vscale x 1 x double> %vd
45}
46
47define <vscale x 1 x double> @vfwsub_wf_nxv1f64(<vscale x 1 x double> %va, float %b) {
48; CHECK-LABEL: vfwsub_wf_nxv1f64:
49; CHECK:       # %bb.0:
50; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu
51; CHECK-NEXT:    vfwsub.wf v8, v8, fa0
52; CHECK-NEXT:    ret
53  %head = insertelement <vscale x 1 x float> poison, float %b, i32 0
54  %splat = shufflevector <vscale x 1 x float> %head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
55  %vc = fpext <vscale x 1 x float> %splat to <vscale x 1 x double>
56  %vd = fsub <vscale x 1 x double> %va, %vc
57  ret <vscale x 1 x double> %vd
58}
59
60define <vscale x 2 x double> @vfwsub_vv_nxv2f64(<vscale x 2 x float> %va, <vscale x 2 x float> %vb) {
61; CHECK-LABEL: vfwsub_vv_nxv2f64:
62; CHECK:       # %bb.0:
63; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
64; CHECK-NEXT:    vfwsub.vv v10, v8, v9
65; CHECK-NEXT:    vmv2r.v v8, v10
66; CHECK-NEXT:    ret
67  %vc = fpext <vscale x 2 x float> %va to <vscale x 2 x double>
68  %vd = fpext <vscale x 2 x float> %vb to <vscale x 2 x double>
69  %ve = fsub <vscale x 2 x double> %vc, %vd
70  ret <vscale x 2 x double> %ve
71}
72
73define <vscale x 2 x double> @vfwsub_vf_nxv2f64(<vscale x 2 x float> %va, float %b) {
74; CHECK-LABEL: vfwsub_vf_nxv2f64:
75; CHECK:       # %bb.0:
76; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
77; CHECK-NEXT:    vfwsub.vf v10, v8, fa0
78; CHECK-NEXT:    vmv2r.v v8, v10
79; CHECK-NEXT:    ret
80  %head = insertelement <vscale x 2 x float> poison, float %b, i32 0
81  %splat = shufflevector <vscale x 2 x float> %head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
82  %vc = fpext <vscale x 2 x float> %va to <vscale x 2 x double>
83  %vd = fpext <vscale x 2 x float> %splat to <vscale x 2 x double>
84  %ve = fsub <vscale x 2 x double> %vc, %vd
85  ret <vscale x 2 x double> %ve
86}
87
88define <vscale x 2 x double> @vfwsub_wv_nxv2f64(<vscale x 2 x double> %va, <vscale x 2 x float> %vb) {
89; CHECK-LABEL: vfwsub_wv_nxv2f64:
90; CHECK:       # %bb.0:
91; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
92; CHECK-NEXT:    vfwsub.wv v12, v8, v10
93; CHECK-NEXT:    vmv2r.v v8, v12
94; CHECK-NEXT:    ret
95  %vc = fpext <vscale x 2 x float> %vb to <vscale x 2 x double>
96  %vd = fsub <vscale x 2 x double> %va, %vc
97  ret <vscale x 2 x double> %vd
98}
99
100define <vscale x 2 x double> @vfwsub_wf_nxv2f64(<vscale x 2 x double> %va, float %b) {
101; CHECK-LABEL: vfwsub_wf_nxv2f64:
102; CHECK:       # %bb.0:
103; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
104; CHECK-NEXT:    vfwsub.wf v8, v8, fa0
105; CHECK-NEXT:    ret
106  %head = insertelement <vscale x 2 x float> poison, float %b, i32 0
107  %splat = shufflevector <vscale x 2 x float> %head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
108  %vc = fpext <vscale x 2 x float> %splat to <vscale x 2 x double>
109  %vd = fsub <vscale x 2 x double> %va, %vc
110  ret <vscale x 2 x double> %vd
111}
112
113define <vscale x 4 x double> @vfwsub_vv_nxv4f64(<vscale x 4 x float> %va, <vscale x 4 x float> %vb) {
114; CHECK-LABEL: vfwsub_vv_nxv4f64:
115; CHECK:       # %bb.0:
116; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
117; CHECK-NEXT:    vfwsub.vv v12, v8, v10
118; CHECK-NEXT:    vmv4r.v v8, v12
119; CHECK-NEXT:    ret
120  %vc = fpext <vscale x 4 x float> %va to <vscale x 4 x double>
121  %vd = fpext <vscale x 4 x float> %vb to <vscale x 4 x double>
122  %ve = fsub <vscale x 4 x double> %vc, %vd
123  ret <vscale x 4 x double> %ve
124}
125
126define <vscale x 4 x double> @vfwsub_vf_nxv4f64(<vscale x 4 x float> %va, float %b) {
127; CHECK-LABEL: vfwsub_vf_nxv4f64:
128; CHECK:       # %bb.0:
129; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
130; CHECK-NEXT:    vfwsub.vf v12, v8, fa0
131; CHECK-NEXT:    vmv4r.v v8, v12
132; CHECK-NEXT:    ret
133  %head = insertelement <vscale x 4 x float> poison, float %b, i32 0
134  %splat = shufflevector <vscale x 4 x float> %head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
135  %vc = fpext <vscale x 4 x float> %va to <vscale x 4 x double>
136  %vd = fpext <vscale x 4 x float> %splat to <vscale x 4 x double>
137  %ve = fsub <vscale x 4 x double> %vc, %vd
138  ret <vscale x 4 x double> %ve
139}
140
141define <vscale x 4 x double> @vfwsub_wv_nxv4f64(<vscale x 4 x double> %va, <vscale x 4 x float> %vb) {
142; CHECK-LABEL: vfwsub_wv_nxv4f64:
143; CHECK:       # %bb.0:
144; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
145; CHECK-NEXT:    vfwsub.wv v16, v8, v12
146; CHECK-NEXT:    vmv4r.v v8, v16
147; CHECK-NEXT:    ret
148  %vc = fpext <vscale x 4 x float> %vb to <vscale x 4 x double>
149  %vd = fsub <vscale x 4 x double> %va, %vc
150  ret <vscale x 4 x double> %vd
151}
152
153define <vscale x 4 x double> @vfwsub_wf_nxv4f64(<vscale x 4 x double> %va, float %b) {
154; CHECK-LABEL: vfwsub_wf_nxv4f64:
155; CHECK:       # %bb.0:
156; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
157; CHECK-NEXT:    vfwsub.wf v8, v8, fa0
158; CHECK-NEXT:    ret
159  %head = insertelement <vscale x 4 x float> poison, float %b, i32 0
160  %splat = shufflevector <vscale x 4 x float> %head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
161  %vc = fpext <vscale x 4 x float> %splat to <vscale x 4 x double>
162  %vd = fsub <vscale x 4 x double> %va, %vc
163  ret <vscale x 4 x double> %vd
164}
165
166define <vscale x 8 x double> @vfwsub_vv_nxv8f64(<vscale x 8 x float> %va, <vscale x 8 x float> %vb) {
167; CHECK-LABEL: vfwsub_vv_nxv8f64:
168; CHECK:       # %bb.0:
169; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
170; CHECK-NEXT:    vfwsub.vv v16, v8, v12
171; CHECK-NEXT:    vmv8r.v v8, v16
172; CHECK-NEXT:    ret
173  %vc = fpext <vscale x 8 x float> %va to <vscale x 8 x double>
174  %vd = fpext <vscale x 8 x float> %vb to <vscale x 8 x double>
175  %ve = fsub <vscale x 8 x double> %vc, %vd
176  ret <vscale x 8 x double> %ve
177}
178
179define <vscale x 8 x double> @vfwsub_vf_nxv8f64(<vscale x 8 x float> %va, float %b) {
180; CHECK-LABEL: vfwsub_vf_nxv8f64:
181; CHECK:       # %bb.0:
182; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
183; CHECK-NEXT:    vfwsub.vf v16, v8, fa0
184; CHECK-NEXT:    vmv8r.v v8, v16
185; CHECK-NEXT:    ret
186  %head = insertelement <vscale x 8 x float> poison, float %b, i32 0
187  %splat = shufflevector <vscale x 8 x float> %head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
188  %vc = fpext <vscale x 8 x float> %va to <vscale x 8 x double>
189  %vd = fpext <vscale x 8 x float> %splat to <vscale x 8 x double>
190  %ve = fsub <vscale x 8 x double> %vc, %vd
191  ret <vscale x 8 x double> %ve
192}
193
194define <vscale x 8 x double> @vfwsub_wv_nxv8f64(<vscale x 8 x double> %va, <vscale x 8 x float> %vb) {
195; CHECK-LABEL: vfwsub_wv_nxv8f64:
196; CHECK:       # %bb.0:
197; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
198; CHECK-NEXT:    vfwsub.wv v24, v8, v16
199; CHECK-NEXT:    vmv8r.v v8, v24
200; CHECK-NEXT:    ret
201  %vc = fpext <vscale x 8 x float> %vb to <vscale x 8 x double>
202  %vd = fsub <vscale x 8 x double> %va, %vc
203  ret <vscale x 8 x double> %vd
204}
205
206define <vscale x 8 x double> @vfwsub_wf_nxv8f64(<vscale x 8 x double> %va, float %b) {
207; CHECK-LABEL: vfwsub_wf_nxv8f64:
208; CHECK:       # %bb.0:
209; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
210; CHECK-NEXT:    vfwsub.wf v8, v8, fa0
211; CHECK-NEXT:    ret
212  %head = insertelement <vscale x 8 x float> poison, float %b, i32 0
213  %splat = shufflevector <vscale x 8 x float> %head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
214  %vc = fpext <vscale x 8 x float> %splat to <vscale x 8 x double>
215  %vd = fsub <vscale x 8 x double> %va, %vc
216  ret <vscale x 8 x double> %vd
217}
218