1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=ilp32d \
3; RUN:     -verify-machineinstrs < %s | FileCheck %s
4; RUN: llc -mtriple=riscv64 -mattr=+d,+zfh,+experimental-zvfh,+v -target-abi=lp64d \
5; RUN:     -verify-machineinstrs < %s | FileCheck %s
6
7define <vscale x 1 x double> @vfwmul_vv_nxv1f64(<vscale x 1 x float> %va, <vscale x 1 x float> %vb) {
8; CHECK-LABEL: vfwmul_vv_nxv1f64:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu
11; CHECK-NEXT:    vfwmul.vv v10, v8, v9
12; CHECK-NEXT:    vmv1r.v v8, v10
13; CHECK-NEXT:    ret
14  %vc = fpext <vscale x 1 x float> %va to <vscale x 1 x double>
15  %vd = fpext <vscale x 1 x float> %vb to <vscale x 1 x double>
16  %ve = fmul <vscale x 1 x double> %vc, %vd
17  ret <vscale x 1 x double> %ve
18}
19
20define <vscale x 1 x double> @vfwmul_vf_nxv1f64(<vscale x 1 x float> %va, float %b) {
21; CHECK-LABEL: vfwmul_vf_nxv1f64:
22; CHECK:       # %bb.0:
23; CHECK-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu
24; CHECK-NEXT:    vfwmul.vf v9, v8, fa0
25; CHECK-NEXT:    vmv1r.v v8, v9
26; CHECK-NEXT:    ret
27  %head = insertelement <vscale x 1 x float> poison, float %b, i32 0
28  %splat = shufflevector <vscale x 1 x float> %head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
29  %vc = fpext <vscale x 1 x float> %va to <vscale x 1 x double>
30  %vd = fpext <vscale x 1 x float> %splat to <vscale x 1 x double>
31  %ve = fmul <vscale x 1 x double> %vc, %vd
32  ret <vscale x 1 x double> %ve
33}
34
35define <vscale x 2 x double> @vfwmul_vv_nxv2f64(<vscale x 2 x float> %va, <vscale x 2 x float> %vb) {
36; CHECK-LABEL: vfwmul_vv_nxv2f64:
37; CHECK:       # %bb.0:
38; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
39; CHECK-NEXT:    vfwmul.vv v10, v8, v9
40; CHECK-NEXT:    vmv2r.v v8, v10
41; CHECK-NEXT:    ret
42  %vc = fpext <vscale x 2 x float> %va to <vscale x 2 x double>
43  %vd = fpext <vscale x 2 x float> %vb to <vscale x 2 x double>
44  %ve = fmul <vscale x 2 x double> %vc, %vd
45  ret <vscale x 2 x double> %ve
46}
47
48define <vscale x 2 x double> @vfwmul_vf_nxv2f64(<vscale x 2 x float> %va, float %b) {
49; CHECK-LABEL: vfwmul_vf_nxv2f64:
50; CHECK:       # %bb.0:
51; CHECK-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
52; CHECK-NEXT:    vfwmul.vf v10, v8, fa0
53; CHECK-NEXT:    vmv2r.v v8, v10
54; CHECK-NEXT:    ret
55  %head = insertelement <vscale x 2 x float> poison, float %b, i32 0
56  %splat = shufflevector <vscale x 2 x float> %head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
57  %vc = fpext <vscale x 2 x float> %va to <vscale x 2 x double>
58  %vd = fpext <vscale x 2 x float> %splat to <vscale x 2 x double>
59  %ve = fmul <vscale x 2 x double> %vc, %vd
60  ret <vscale x 2 x double> %ve
61}
62
63define <vscale x 4 x double> @vfwmul_vv_nxv4f64(<vscale x 4 x float> %va, <vscale x 4 x float> %vb) {
64; CHECK-LABEL: vfwmul_vv_nxv4f64:
65; CHECK:       # %bb.0:
66; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
67; CHECK-NEXT:    vfwmul.vv v12, v8, v10
68; CHECK-NEXT:    vmv4r.v v8, v12
69; CHECK-NEXT:    ret
70  %vc = fpext <vscale x 4 x float> %va to <vscale x 4 x double>
71  %vd = fpext <vscale x 4 x float> %vb to <vscale x 4 x double>
72  %ve = fmul <vscale x 4 x double> %vc, %vd
73  ret <vscale x 4 x double> %ve
74}
75
76define <vscale x 4 x double> @vfwmul_vf_nxv4f64(<vscale x 4 x float> %va, float %b) {
77; CHECK-LABEL: vfwmul_vf_nxv4f64:
78; CHECK:       # %bb.0:
79; CHECK-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
80; CHECK-NEXT:    vfwmul.vf v12, v8, fa0
81; CHECK-NEXT:    vmv4r.v v8, v12
82; CHECK-NEXT:    ret
83  %head = insertelement <vscale x 4 x float> poison, float %b, i32 0
84  %splat = shufflevector <vscale x 4 x float> %head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
85  %vc = fpext <vscale x 4 x float> %va to <vscale x 4 x double>
86  %vd = fpext <vscale x 4 x float> %splat to <vscale x 4 x double>
87  %ve = fmul <vscale x 4 x double> %vc, %vd
88  ret <vscale x 4 x double> %ve
89}
90
91define <vscale x 8 x double> @vfwmul_vv_nxv8f64(<vscale x 8 x float> %va, <vscale x 8 x float> %vb) {
92; CHECK-LABEL: vfwmul_vv_nxv8f64:
93; CHECK:       # %bb.0:
94; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
95; CHECK-NEXT:    vfwmul.vv v16, v8, v12
96; CHECK-NEXT:    vmv8r.v v8, v16
97; CHECK-NEXT:    ret
98  %vc = fpext <vscale x 8 x float> %va to <vscale x 8 x double>
99  %vd = fpext <vscale x 8 x float> %vb to <vscale x 8 x double>
100  %ve = fmul <vscale x 8 x double> %vc, %vd
101  ret <vscale x 8 x double> %ve
102}
103
104define <vscale x 8 x double> @vfwmul_vf_nxv8f64(<vscale x 8 x float> %va, float %b) {
105; CHECK-LABEL: vfwmul_vf_nxv8f64:
106; CHECK:       # %bb.0:
107; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
108; CHECK-NEXT:    vfwmul.vf v16, v8, fa0
109; CHECK-NEXT:    vmv8r.v v8, v16
110; CHECK-NEXT:    ret
111  %head = insertelement <vscale x 8 x float> poison, float %b, i32 0
112  %splat = shufflevector <vscale x 8 x float> %head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
113  %vc = fpext <vscale x 8 x float> %va to <vscale x 8 x double>
114  %vd = fpext <vscale x 8 x float> %splat to <vscale x 8 x double>
115  %ve = fmul <vscale x 8 x double> %vc, %vd
116  ret <vscale x 8 x double> %ve
117}
118