1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -mattr=+m,+d,+experimental-zfh,+experimental-v -target-abi=ilp32d \ 3; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefix=RV32 4; RUN: llc -mtriple=riscv64 -mattr=+m,+d,+experimental-zfh,+experimental-v -target-abi=lp64d \ 5; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefix=RV64 6 7declare <vscale x 1 x i8> @llvm.masked.gather.nxv1i8.nxv1p0i8(<vscale x 1 x i8*>, i32, <vscale x 1 x i1>, <vscale x 1 x i8>) 8 9define <vscale x 1 x i8> @mgather_nxv1i8(<vscale x 1 x i8*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x i8> %passthru) { 10; RV32-LABEL: mgather_nxv1i8: 11; RV32: # %bb.0: 12; RV32-NEXT: vsetvli a0, zero, e8,mf8,tu,mu 13; RV32-NEXT: vloxei32.v v9, (zero), v8, v0.t 14; RV32-NEXT: vmv1r.v v8, v9 15; RV32-NEXT: ret 16; 17; RV64-LABEL: mgather_nxv1i8: 18; RV64: # %bb.0: 19; RV64-NEXT: vsetvli a0, zero, e8,mf8,tu,mu 20; RV64-NEXT: vloxei64.v v9, (zero), v8, v0.t 21; RV64-NEXT: vmv1r.v v8, v9 22; RV64-NEXT: ret 23 %v = call <vscale x 1 x i8> @llvm.masked.gather.nxv1i8.nxv1p0i8(<vscale x 1 x i8*> %ptrs, i32 1, <vscale x 1 x i1> %m, <vscale x 1 x i8> %passthru) 24 ret <vscale x 1 x i8> %v 25} 26 27declare <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*>, i32, <vscale x 2 x i1>, <vscale x 2 x i8>) 28 29define <vscale x 2 x i8> @mgather_nxv2i8(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) { 30; RV32-LABEL: mgather_nxv2i8: 31; RV32: # %bb.0: 32; RV32-NEXT: vsetvli a0, zero, e8,mf4,tu,mu 33; RV32-NEXT: vloxei32.v v9, (zero), v8, v0.t 34; RV32-NEXT: vmv1r.v v8, v9 35; RV32-NEXT: ret 36; 37; RV64-LABEL: mgather_nxv2i8: 38; RV64: # %bb.0: 39; RV64-NEXT: vsetvli a0, zero, e8,mf4,tu,mu 40; RV64-NEXT: vloxei64.v v10, (zero), v8, v0.t 41; RV64-NEXT: vmv1r.v v8, v10 42; RV64-NEXT: ret 43 %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) 44 ret <vscale x 2 x i8> %v 45} 46 47define <vscale x 2 x i16> @mgather_nxv2i8_sextload_nxv2i16(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) { 48; RV32-LABEL: mgather_nxv2i8_sextload_nxv2i16: 49; RV32: # %bb.0: 50; RV32-NEXT: vsetvli a0, zero, e8,mf4,tu,mu 51; RV32-NEXT: vloxei32.v v9, (zero), v8, v0.t 52; RV32-NEXT: vsetvli a0, zero, e16,mf2,ta,mu 53; RV32-NEXT: vsext.vf2 v8, v9 54; RV32-NEXT: ret 55; 56; RV64-LABEL: mgather_nxv2i8_sextload_nxv2i16: 57; RV64: # %bb.0: 58; RV64-NEXT: vsetvli a0, zero, e8,mf4,tu,mu 59; RV64-NEXT: vloxei64.v v10, (zero), v8, v0.t 60; RV64-NEXT: vsetvli a0, zero, e16,mf2,ta,mu 61; RV64-NEXT: vsext.vf2 v8, v10 62; RV64-NEXT: ret 63 %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) 64 %ev = sext <vscale x 2 x i8> %v to <vscale x 2 x i16> 65 ret <vscale x 2 x i16> %ev 66} 67 68define <vscale x 2 x i16> @mgather_nxv2i8_zextload_nxv2i16(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) { 69; RV32-LABEL: mgather_nxv2i8_zextload_nxv2i16: 70; RV32: # %bb.0: 71; RV32-NEXT: vsetvli a0, zero, e8,mf4,tu,mu 72; RV32-NEXT: vloxei32.v v9, (zero), v8, v0.t 73; RV32-NEXT: vsetvli a0, zero, e16,mf2,ta,mu 74; RV32-NEXT: vzext.vf2 v8, v9 75; RV32-NEXT: ret 76; 77; RV64-LABEL: mgather_nxv2i8_zextload_nxv2i16: 78; RV64: # %bb.0: 79; RV64-NEXT: vsetvli a0, zero, e8,mf4,tu,mu 80; RV64-NEXT: vloxei64.v v10, (zero), v8, v0.t 81; RV64-NEXT: vsetvli a0, zero, e16,mf2,ta,mu 82; RV64-NEXT: vzext.vf2 v8, v10 83; RV64-NEXT: ret 84 %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) 85 %ev = zext <vscale x 2 x i8> %v to <vscale x 2 x i16> 86 ret <vscale x 2 x i16> %ev 87} 88 89define <vscale x 2 x i32> @mgather_nxv2i8_sextload_nxv2i32(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) { 90; RV32-LABEL: mgather_nxv2i8_sextload_nxv2i32: 91; RV32: # %bb.0: 92; RV32-NEXT: vsetvli a0, zero, e8,mf4,tu,mu 93; RV32-NEXT: vloxei32.v v9, (zero), v8, v0.t 94; RV32-NEXT: vsetvli a0, zero, e32,m1,ta,mu 95; RV32-NEXT: vsext.vf4 v8, v9 96; RV32-NEXT: ret 97; 98; RV64-LABEL: mgather_nxv2i8_sextload_nxv2i32: 99; RV64: # %bb.0: 100; RV64-NEXT: vsetvli a0, zero, e8,mf4,tu,mu 101; RV64-NEXT: vloxei64.v v10, (zero), v8, v0.t 102; RV64-NEXT: vsetvli a0, zero, e32,m1,ta,mu 103; RV64-NEXT: vsext.vf4 v8, v10 104; RV64-NEXT: ret 105 %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) 106 %ev = sext <vscale x 2 x i8> %v to <vscale x 2 x i32> 107 ret <vscale x 2 x i32> %ev 108} 109 110define <vscale x 2 x i32> @mgather_nxv2i8_zextload_nxv2i32(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) { 111; RV32-LABEL: mgather_nxv2i8_zextload_nxv2i32: 112; RV32: # %bb.0: 113; RV32-NEXT: vsetvli a0, zero, e8,mf4,tu,mu 114; RV32-NEXT: vloxei32.v v9, (zero), v8, v0.t 115; RV32-NEXT: vsetvli a0, zero, e32,m1,ta,mu 116; RV32-NEXT: vzext.vf4 v8, v9 117; RV32-NEXT: ret 118; 119; RV64-LABEL: mgather_nxv2i8_zextload_nxv2i32: 120; RV64: # %bb.0: 121; RV64-NEXT: vsetvli a0, zero, e8,mf4,tu,mu 122; RV64-NEXT: vloxei64.v v10, (zero), v8, v0.t 123; RV64-NEXT: vsetvli a0, zero, e32,m1,ta,mu 124; RV64-NEXT: vzext.vf4 v8, v10 125; RV64-NEXT: ret 126 %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) 127 %ev = zext <vscale x 2 x i8> %v to <vscale x 2 x i32> 128 ret <vscale x 2 x i32> %ev 129} 130 131define <vscale x 2 x i64> @mgather_nxv2i8_sextload_nxv2i64(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) { 132; RV32-LABEL: mgather_nxv2i8_sextload_nxv2i64: 133; RV32: # %bb.0: 134; RV32-NEXT: vsetvli a0, zero, e8,mf4,tu,mu 135; RV32-NEXT: vloxei32.v v9, (zero), v8, v0.t 136; RV32-NEXT: vsetvli a0, zero, e64,m2,ta,mu 137; RV32-NEXT: vsext.vf8 v26, v9 138; RV32-NEXT: vmv2r.v v8, v26 139; RV32-NEXT: ret 140; 141; RV64-LABEL: mgather_nxv2i8_sextload_nxv2i64: 142; RV64: # %bb.0: 143; RV64-NEXT: vsetvli a0, zero, e8,mf4,tu,mu 144; RV64-NEXT: vloxei64.v v10, (zero), v8, v0.t 145; RV64-NEXT: vsetvli a0, zero, e64,m2,ta,mu 146; RV64-NEXT: vsext.vf8 v8, v10 147; RV64-NEXT: ret 148 %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) 149 %ev = sext <vscale x 2 x i8> %v to <vscale x 2 x i64> 150 ret <vscale x 2 x i64> %ev 151} 152 153define <vscale x 2 x i64> @mgather_nxv2i8_zextload_nxv2i64(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) { 154; RV32-LABEL: mgather_nxv2i8_zextload_nxv2i64: 155; RV32: # %bb.0: 156; RV32-NEXT: vsetvli a0, zero, e8,mf4,tu,mu 157; RV32-NEXT: vloxei32.v v9, (zero), v8, v0.t 158; RV32-NEXT: vsetvli a0, zero, e64,m2,ta,mu 159; RV32-NEXT: vzext.vf8 v26, v9 160; RV32-NEXT: vmv2r.v v8, v26 161; RV32-NEXT: ret 162; 163; RV64-LABEL: mgather_nxv2i8_zextload_nxv2i64: 164; RV64: # %bb.0: 165; RV64-NEXT: vsetvli a0, zero, e8,mf4,tu,mu 166; RV64-NEXT: vloxei64.v v10, (zero), v8, v0.t 167; RV64-NEXT: vsetvli a0, zero, e64,m2,ta,mu 168; RV64-NEXT: vzext.vf8 v8, v10 169; RV64-NEXT: ret 170 %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) 171 %ev = zext <vscale x 2 x i8> %v to <vscale x 2 x i64> 172 ret <vscale x 2 x i64> %ev 173} 174 175declare <vscale x 4 x i8> @llvm.masked.gather.nxv4i8.nxv4p0i8(<vscale x 4 x i8*>, i32, <vscale x 4 x i1>, <vscale x 4 x i8>) 176 177define <vscale x 4 x i8> @mgather_nxv4i8(<vscale x 4 x i8*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x i8> %passthru) { 178; RV32-LABEL: mgather_nxv4i8: 179; RV32: # %bb.0: 180; RV32-NEXT: vsetvli a0, zero, e8,mf2,tu,mu 181; RV32-NEXT: vloxei32.v v10, (zero), v8, v0.t 182; RV32-NEXT: vmv1r.v v8, v10 183; RV32-NEXT: ret 184; 185; RV64-LABEL: mgather_nxv4i8: 186; RV64: # %bb.0: 187; RV64-NEXT: vsetvli a0, zero, e8,mf2,tu,mu 188; RV64-NEXT: vloxei64.v v12, (zero), v8, v0.t 189; RV64-NEXT: vmv1r.v v8, v12 190; RV64-NEXT: ret 191 %v = call <vscale x 4 x i8> @llvm.masked.gather.nxv4i8.nxv4p0i8(<vscale x 4 x i8*> %ptrs, i32 1, <vscale x 4 x i1> %m, <vscale x 4 x i8> %passthru) 192 ret <vscale x 4 x i8> %v 193} 194 195define <vscale x 4 x i8> @mgather_truemask_nxv4i8(<vscale x 4 x i8*> %ptrs, <vscale x 4 x i8> %passthru) { 196; RV32-LABEL: mgather_truemask_nxv4i8: 197; RV32: # %bb.0: 198; RV32-NEXT: vsetvli a0, zero, e8,mf2,ta,mu 199; RV32-NEXT: vloxei32.v v8, (zero), v8 200; RV32-NEXT: ret 201; 202; RV64-LABEL: mgather_truemask_nxv4i8: 203; RV64: # %bb.0: 204; RV64-NEXT: vsetvli a0, zero, e8,mf2,ta,mu 205; RV64-NEXT: vloxei64.v v8, (zero), v8 206; RV64-NEXT: ret 207 %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0 208 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer 209 %v = call <vscale x 4 x i8> @llvm.masked.gather.nxv4i8.nxv4p0i8(<vscale x 4 x i8*> %ptrs, i32 1, <vscale x 4 x i1> %mtrue, <vscale x 4 x i8> %passthru) 210 ret <vscale x 4 x i8> %v 211} 212 213define <vscale x 4 x i8> @mgather_falsemask_nxv4i8(<vscale x 4 x i8*> %ptrs, <vscale x 4 x i8> %passthru) { 214; RV32-LABEL: mgather_falsemask_nxv4i8: 215; RV32: # %bb.0: 216; RV32-NEXT: vmv1r.v v8, v10 217; RV32-NEXT: ret 218; 219; RV64-LABEL: mgather_falsemask_nxv4i8: 220; RV64: # %bb.0: 221; RV64-NEXT: vmv1r.v v8, v12 222; RV64-NEXT: ret 223 %v = call <vscale x 4 x i8> @llvm.masked.gather.nxv4i8.nxv4p0i8(<vscale x 4 x i8*> %ptrs, i32 1, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x i8> %passthru) 224 ret <vscale x 4 x i8> %v 225} 226 227declare <vscale x 8 x i8> @llvm.masked.gather.nxv8i8.nxv8p0i8(<vscale x 8 x i8*>, i32, <vscale x 8 x i1>, <vscale x 8 x i8>) 228 229define <vscale x 8 x i8> @mgather_nxv8i8(<vscale x 8 x i8*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x i8> %passthru) { 230; RV32-LABEL: mgather_nxv8i8: 231; RV32: # %bb.0: 232; RV32-NEXT: vsetvli a0, zero, e8,m1,tu,mu 233; RV32-NEXT: vloxei32.v v12, (zero), v8, v0.t 234; RV32-NEXT: vmv1r.v v8, v12 235; RV32-NEXT: ret 236; 237; RV64-LABEL: mgather_nxv8i8: 238; RV64: # %bb.0: 239; RV64-NEXT: vsetvli a0, zero, e8,m1,tu,mu 240; RV64-NEXT: vloxei64.v v16, (zero), v8, v0.t 241; RV64-NEXT: vmv1r.v v8, v16 242; RV64-NEXT: ret 243 %v = call <vscale x 8 x i8> @llvm.masked.gather.nxv8i8.nxv8p0i8(<vscale x 8 x i8*> %ptrs, i32 1, <vscale x 8 x i1> %m, <vscale x 8 x i8> %passthru) 244 ret <vscale x 8 x i8> %v 245} 246 247define <vscale x 8 x i8> @mgather_baseidx_nxv8i8(i8* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i8> %passthru) { 248; RV32-LABEL: mgather_baseidx_nxv8i8: 249; RV32: # %bb.0: 250; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 251; RV32-NEXT: vsext.vf4 v28, v8 252; RV32-NEXT: vsetvli a1, zero, e8,m1,tu,mu 253; RV32-NEXT: vloxei32.v v9, (a0), v28, v0.t 254; RV32-NEXT: vmv1r.v v8, v9 255; RV32-NEXT: ret 256; 257; RV64-LABEL: mgather_baseidx_nxv8i8: 258; RV64: # %bb.0: 259; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 260; RV64-NEXT: vsext.vf8 v16, v8 261; RV64-NEXT: vsetvli a1, zero, e8,m1,tu,mu 262; RV64-NEXT: vloxei64.v v9, (a0), v16, v0.t 263; RV64-NEXT: vmv1r.v v8, v9 264; RV64-NEXT: ret 265 %ptrs = getelementptr inbounds i8, i8* %base, <vscale x 8 x i8> %idxs 266 %v = call <vscale x 8 x i8> @llvm.masked.gather.nxv8i8.nxv8p0i8(<vscale x 8 x i8*> %ptrs, i32 1, <vscale x 8 x i1> %m, <vscale x 8 x i8> %passthru) 267 ret <vscale x 8 x i8> %v 268} 269 270declare <vscale x 1 x i16> @llvm.masked.gather.nxv1i16.nxv1p0i16(<vscale x 1 x i16*>, i32, <vscale x 1 x i1>, <vscale x 1 x i16>) 271 272define <vscale x 1 x i16> @mgather_nxv1i16(<vscale x 1 x i16*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x i16> %passthru) { 273; RV32-LABEL: mgather_nxv1i16: 274; RV32: # %bb.0: 275; RV32-NEXT: vsetvli a0, zero, e16,mf4,tu,mu 276; RV32-NEXT: vloxei32.v v9, (zero), v8, v0.t 277; RV32-NEXT: vmv1r.v v8, v9 278; RV32-NEXT: ret 279; 280; RV64-LABEL: mgather_nxv1i16: 281; RV64: # %bb.0: 282; RV64-NEXT: vsetvli a0, zero, e16,mf4,tu,mu 283; RV64-NEXT: vloxei64.v v9, (zero), v8, v0.t 284; RV64-NEXT: vmv1r.v v8, v9 285; RV64-NEXT: ret 286 %v = call <vscale x 1 x i16> @llvm.masked.gather.nxv1i16.nxv1p0i16(<vscale x 1 x i16*> %ptrs, i32 2, <vscale x 1 x i1> %m, <vscale x 1 x i16> %passthru) 287 ret <vscale x 1 x i16> %v 288} 289 290declare <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*>, i32, <vscale x 2 x i1>, <vscale x 2 x i16>) 291 292define <vscale x 2 x i16> @mgather_nxv2i16(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) { 293; RV32-LABEL: mgather_nxv2i16: 294; RV32: # %bb.0: 295; RV32-NEXT: vsetvli a0, zero, e16,mf2,tu,mu 296; RV32-NEXT: vloxei32.v v9, (zero), v8, v0.t 297; RV32-NEXT: vmv1r.v v8, v9 298; RV32-NEXT: ret 299; 300; RV64-LABEL: mgather_nxv2i16: 301; RV64: # %bb.0: 302; RV64-NEXT: vsetvli a0, zero, e16,mf2,tu,mu 303; RV64-NEXT: vloxei64.v v10, (zero), v8, v0.t 304; RV64-NEXT: vmv1r.v v8, v10 305; RV64-NEXT: ret 306 %v = call <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) 307 ret <vscale x 2 x i16> %v 308} 309 310define <vscale x 2 x i32> @mgather_nxv2i16_sextload_nxv2i32(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) { 311; RV32-LABEL: mgather_nxv2i16_sextload_nxv2i32: 312; RV32: # %bb.0: 313; RV32-NEXT: vsetvli a0, zero, e16,mf2,tu,mu 314; RV32-NEXT: vloxei32.v v9, (zero), v8, v0.t 315; RV32-NEXT: vsetvli a0, zero, e32,m1,ta,mu 316; RV32-NEXT: vsext.vf2 v8, v9 317; RV32-NEXT: ret 318; 319; RV64-LABEL: mgather_nxv2i16_sextload_nxv2i32: 320; RV64: # %bb.0: 321; RV64-NEXT: vsetvli a0, zero, e16,mf2,tu,mu 322; RV64-NEXT: vloxei64.v v10, (zero), v8, v0.t 323; RV64-NEXT: vsetvli a0, zero, e32,m1,ta,mu 324; RV64-NEXT: vsext.vf2 v8, v10 325; RV64-NEXT: ret 326 %v = call <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) 327 %ev = sext <vscale x 2 x i16> %v to <vscale x 2 x i32> 328 ret <vscale x 2 x i32> %ev 329} 330 331define <vscale x 2 x i32> @mgather_nxv2i16_zextload_nxv2i32(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) { 332; RV32-LABEL: mgather_nxv2i16_zextload_nxv2i32: 333; RV32: # %bb.0: 334; RV32-NEXT: vsetvli a0, zero, e16,mf2,tu,mu 335; RV32-NEXT: vloxei32.v v9, (zero), v8, v0.t 336; RV32-NEXT: vsetvli a0, zero, e32,m1,ta,mu 337; RV32-NEXT: vzext.vf2 v8, v9 338; RV32-NEXT: ret 339; 340; RV64-LABEL: mgather_nxv2i16_zextload_nxv2i32: 341; RV64: # %bb.0: 342; RV64-NEXT: vsetvli a0, zero, e16,mf2,tu,mu 343; RV64-NEXT: vloxei64.v v10, (zero), v8, v0.t 344; RV64-NEXT: vsetvli a0, zero, e32,m1,ta,mu 345; RV64-NEXT: vzext.vf2 v8, v10 346; RV64-NEXT: ret 347 %v = call <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) 348 %ev = zext <vscale x 2 x i16> %v to <vscale x 2 x i32> 349 ret <vscale x 2 x i32> %ev 350} 351 352define <vscale x 2 x i64> @mgather_nxv2i16_sextload_nxv2i64(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) { 353; RV32-LABEL: mgather_nxv2i16_sextload_nxv2i64: 354; RV32: # %bb.0: 355; RV32-NEXT: vsetvli a0, zero, e16,mf2,tu,mu 356; RV32-NEXT: vloxei32.v v9, (zero), v8, v0.t 357; RV32-NEXT: vsetvli a0, zero, e64,m2,ta,mu 358; RV32-NEXT: vsext.vf4 v26, v9 359; RV32-NEXT: vmv2r.v v8, v26 360; RV32-NEXT: ret 361; 362; RV64-LABEL: mgather_nxv2i16_sextload_nxv2i64: 363; RV64: # %bb.0: 364; RV64-NEXT: vsetvli a0, zero, e16,mf2,tu,mu 365; RV64-NEXT: vloxei64.v v10, (zero), v8, v0.t 366; RV64-NEXT: vsetvli a0, zero, e64,m2,ta,mu 367; RV64-NEXT: vsext.vf4 v8, v10 368; RV64-NEXT: ret 369 %v = call <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) 370 %ev = sext <vscale x 2 x i16> %v to <vscale x 2 x i64> 371 ret <vscale x 2 x i64> %ev 372} 373 374define <vscale x 2 x i64> @mgather_nxv2i16_zextload_nxv2i64(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) { 375; RV32-LABEL: mgather_nxv2i16_zextload_nxv2i64: 376; RV32: # %bb.0: 377; RV32-NEXT: vsetvli a0, zero, e16,mf2,tu,mu 378; RV32-NEXT: vloxei32.v v9, (zero), v8, v0.t 379; RV32-NEXT: vsetvli a0, zero, e64,m2,ta,mu 380; RV32-NEXT: vzext.vf4 v26, v9 381; RV32-NEXT: vmv2r.v v8, v26 382; RV32-NEXT: ret 383; 384; RV64-LABEL: mgather_nxv2i16_zextload_nxv2i64: 385; RV64: # %bb.0: 386; RV64-NEXT: vsetvli a0, zero, e16,mf2,tu,mu 387; RV64-NEXT: vloxei64.v v10, (zero), v8, v0.t 388; RV64-NEXT: vsetvli a0, zero, e64,m2,ta,mu 389; RV64-NEXT: vzext.vf4 v8, v10 390; RV64-NEXT: ret 391 %v = call <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) 392 %ev = zext <vscale x 2 x i16> %v to <vscale x 2 x i64> 393 ret <vscale x 2 x i64> %ev 394} 395 396declare <vscale x 4 x i16> @llvm.masked.gather.nxv4i16.nxv4p0i16(<vscale x 4 x i16*>, i32, <vscale x 4 x i1>, <vscale x 4 x i16>) 397 398define <vscale x 4 x i16> @mgather_nxv4i16(<vscale x 4 x i16*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x i16> %passthru) { 399; RV32-LABEL: mgather_nxv4i16: 400; RV32: # %bb.0: 401; RV32-NEXT: vsetvli a0, zero, e16,m1,tu,mu 402; RV32-NEXT: vloxei32.v v10, (zero), v8, v0.t 403; RV32-NEXT: vmv1r.v v8, v10 404; RV32-NEXT: ret 405; 406; RV64-LABEL: mgather_nxv4i16: 407; RV64: # %bb.0: 408; RV64-NEXT: vsetvli a0, zero, e16,m1,tu,mu 409; RV64-NEXT: vloxei64.v v12, (zero), v8, v0.t 410; RV64-NEXT: vmv1r.v v8, v12 411; RV64-NEXT: ret 412 %v = call <vscale x 4 x i16> @llvm.masked.gather.nxv4i16.nxv4p0i16(<vscale x 4 x i16*> %ptrs, i32 2, <vscale x 4 x i1> %m, <vscale x 4 x i16> %passthru) 413 ret <vscale x 4 x i16> %v 414} 415 416define <vscale x 4 x i16> @mgather_truemask_nxv4i16(<vscale x 4 x i16*> %ptrs, <vscale x 4 x i16> %passthru) { 417; RV32-LABEL: mgather_truemask_nxv4i16: 418; RV32: # %bb.0: 419; RV32-NEXT: vsetvli a0, zero, e16,m1,ta,mu 420; RV32-NEXT: vloxei32.v v8, (zero), v8 421; RV32-NEXT: ret 422; 423; RV64-LABEL: mgather_truemask_nxv4i16: 424; RV64: # %bb.0: 425; RV64-NEXT: vsetvli a0, zero, e16,m1,ta,mu 426; RV64-NEXT: vloxei64.v v8, (zero), v8 427; RV64-NEXT: ret 428 %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0 429 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer 430 %v = call <vscale x 4 x i16> @llvm.masked.gather.nxv4i16.nxv4p0i16(<vscale x 4 x i16*> %ptrs, i32 2, <vscale x 4 x i1> %mtrue, <vscale x 4 x i16> %passthru) 431 ret <vscale x 4 x i16> %v 432} 433 434define <vscale x 4 x i16> @mgather_falsemask_nxv4i16(<vscale x 4 x i16*> %ptrs, <vscale x 4 x i16> %passthru) { 435; RV32-LABEL: mgather_falsemask_nxv4i16: 436; RV32: # %bb.0: 437; RV32-NEXT: vmv1r.v v8, v10 438; RV32-NEXT: ret 439; 440; RV64-LABEL: mgather_falsemask_nxv4i16: 441; RV64: # %bb.0: 442; RV64-NEXT: vmv1r.v v8, v12 443; RV64-NEXT: ret 444 %v = call <vscale x 4 x i16> @llvm.masked.gather.nxv4i16.nxv4p0i16(<vscale x 4 x i16*> %ptrs, i32 2, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x i16> %passthru) 445 ret <vscale x 4 x i16> %v 446} 447 448declare <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*>, i32, <vscale x 8 x i1>, <vscale x 8 x i16>) 449 450define <vscale x 8 x i16> @mgather_nxv8i16(<vscale x 8 x i16*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) { 451; RV32-LABEL: mgather_nxv8i16: 452; RV32: # %bb.0: 453; RV32-NEXT: vsetvli a0, zero, e16,m2,tu,mu 454; RV32-NEXT: vloxei32.v v12, (zero), v8, v0.t 455; RV32-NEXT: vmv2r.v v8, v12 456; RV32-NEXT: ret 457; 458; RV64-LABEL: mgather_nxv8i16: 459; RV64: # %bb.0: 460; RV64-NEXT: vsetvli a0, zero, e16,m2,tu,mu 461; RV64-NEXT: vloxei64.v v16, (zero), v8, v0.t 462; RV64-NEXT: vmv2r.v v8, v16 463; RV64-NEXT: ret 464 %v = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) 465 ret <vscale x 8 x i16> %v 466} 467 468define <vscale x 8 x i16> @mgather_baseidx_nxv8i8_nxv8i16(i16* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) { 469; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8i16: 470; RV32: # %bb.0: 471; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 472; RV32-NEXT: vsext.vf4 v28, v8 473; RV32-NEXT: vsll.vi v28, v28, 1 474; RV32-NEXT: vsetvli a1, zero, e16,m2,tu,mu 475; RV32-NEXT: vloxei32.v v10, (a0), v28, v0.t 476; RV32-NEXT: vmv2r.v v8, v10 477; RV32-NEXT: ret 478; 479; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8i16: 480; RV64: # %bb.0: 481; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 482; RV64-NEXT: vsext.vf8 v16, v8 483; RV64-NEXT: vsll.vi v16, v16, 1 484; RV64-NEXT: vsetvli a1, zero, e16,m2,tu,mu 485; RV64-NEXT: vloxei64.v v10, (a0), v16, v0.t 486; RV64-NEXT: vmv2r.v v8, v10 487; RV64-NEXT: ret 488 %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i8> %idxs 489 %v = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) 490 ret <vscale x 8 x i16> %v 491} 492 493define <vscale x 8 x i16> @mgather_baseidx_sext_nxv8i8_nxv8i16(i16* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) { 494; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i16: 495; RV32: # %bb.0: 496; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 497; RV32-NEXT: vsext.vf4 v28, v8 498; RV32-NEXT: vsll.vi v28, v28, 1 499; RV32-NEXT: vsetvli a1, zero, e16,m2,tu,mu 500; RV32-NEXT: vloxei32.v v10, (a0), v28, v0.t 501; RV32-NEXT: vmv2r.v v8, v10 502; RV32-NEXT: ret 503; 504; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i16: 505; RV64: # %bb.0: 506; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 507; RV64-NEXT: vsext.vf8 v16, v8 508; RV64-NEXT: vsll.vi v16, v16, 1 509; RV64-NEXT: vsetvli a1, zero, e16,m2,tu,mu 510; RV64-NEXT: vloxei64.v v10, (a0), v16, v0.t 511; RV64-NEXT: vmv2r.v v8, v10 512; RV64-NEXT: ret 513 %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i16> 514 %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i16> %eidxs 515 %v = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) 516 ret <vscale x 8 x i16> %v 517} 518 519define <vscale x 8 x i16> @mgather_baseidx_zext_nxv8i8_nxv8i16(i16* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) { 520; RV32-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i16: 521; RV32: # %bb.0: 522; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 523; RV32-NEXT: vzext.vf4 v28, v8 524; RV32-NEXT: vsll.vi v28, v28, 1 525; RV32-NEXT: vsetvli a1, zero, e16,m2,tu,mu 526; RV32-NEXT: vloxei32.v v10, (a0), v28, v0.t 527; RV32-NEXT: vmv2r.v v8, v10 528; RV32-NEXT: ret 529; 530; RV64-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i16: 531; RV64: # %bb.0: 532; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 533; RV64-NEXT: vzext.vf8 v16, v8 534; RV64-NEXT: vsll.vi v16, v16, 1 535; RV64-NEXT: vsetvli a1, zero, e16,m2,tu,mu 536; RV64-NEXT: vloxei64.v v10, (a0), v16, v0.t 537; RV64-NEXT: vmv2r.v v8, v10 538; RV64-NEXT: ret 539 %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i16> 540 %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i16> %eidxs 541 %v = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) 542 ret <vscale x 8 x i16> %v 543} 544 545define <vscale x 8 x i16> @mgather_baseidx_nxv8i16(i16* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) { 546; RV32-LABEL: mgather_baseidx_nxv8i16: 547; RV32: # %bb.0: 548; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 549; RV32-NEXT: vsext.vf2 v28, v8 550; RV32-NEXT: vsll.vi v28, v28, 1 551; RV32-NEXT: vsetvli a1, zero, e16,m2,tu,mu 552; RV32-NEXT: vloxei32.v v10, (a0), v28, v0.t 553; RV32-NEXT: vmv2r.v v8, v10 554; RV32-NEXT: ret 555; 556; RV64-LABEL: mgather_baseidx_nxv8i16: 557; RV64: # %bb.0: 558; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 559; RV64-NEXT: vsext.vf4 v16, v8 560; RV64-NEXT: vsll.vi v16, v16, 1 561; RV64-NEXT: vsetvli a1, zero, e16,m2,tu,mu 562; RV64-NEXT: vloxei64.v v10, (a0), v16, v0.t 563; RV64-NEXT: vmv2r.v v8, v10 564; RV64-NEXT: ret 565 %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i16> %idxs 566 %v = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) 567 ret <vscale x 8 x i16> %v 568} 569 570declare <vscale x 1 x i32> @llvm.masked.gather.nxv1i32.nxv1p0i32(<vscale x 1 x i32*>, i32, <vscale x 1 x i1>, <vscale x 1 x i32>) 571 572define <vscale x 1 x i32> @mgather_nxv1i32(<vscale x 1 x i32*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x i32> %passthru) { 573; RV32-LABEL: mgather_nxv1i32: 574; RV32: # %bb.0: 575; RV32-NEXT: vsetvli a0, zero, e32,mf2,tu,mu 576; RV32-NEXT: vloxei32.v v9, (zero), v8, v0.t 577; RV32-NEXT: vmv1r.v v8, v9 578; RV32-NEXT: ret 579; 580; RV64-LABEL: mgather_nxv1i32: 581; RV64: # %bb.0: 582; RV64-NEXT: vsetvli a0, zero, e32,mf2,tu,mu 583; RV64-NEXT: vloxei64.v v9, (zero), v8, v0.t 584; RV64-NEXT: vmv1r.v v8, v9 585; RV64-NEXT: ret 586 %v = call <vscale x 1 x i32> @llvm.masked.gather.nxv1i32.nxv1p0i32(<vscale x 1 x i32*> %ptrs, i32 4, <vscale x 1 x i1> %m, <vscale x 1 x i32> %passthru) 587 ret <vscale x 1 x i32> %v 588} 589 590declare <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0i32(<vscale x 2 x i32*>, i32, <vscale x 2 x i1>, <vscale x 2 x i32>) 591 592define <vscale x 2 x i32> @mgather_nxv2i32(<vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru) { 593; RV32-LABEL: mgather_nxv2i32: 594; RV32: # %bb.0: 595; RV32-NEXT: vsetvli a0, zero, e32,m1,tu,mu 596; RV32-NEXT: vloxei32.v v9, (zero), v8, v0.t 597; RV32-NEXT: vmv1r.v v8, v9 598; RV32-NEXT: ret 599; 600; RV64-LABEL: mgather_nxv2i32: 601; RV64: # %bb.0: 602; RV64-NEXT: vsetvli a0, zero, e32,m1,tu,mu 603; RV64-NEXT: vloxei64.v v10, (zero), v8, v0.t 604; RV64-NEXT: vmv1r.v v8, v10 605; RV64-NEXT: ret 606 %v = call <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0i32(<vscale x 2 x i32*> %ptrs, i32 4, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru) 607 ret <vscale x 2 x i32> %v 608} 609 610define <vscale x 2 x i64> @mgather_nxv2i32_sextload_nxv2i64(<vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru) { 611; RV32-LABEL: mgather_nxv2i32_sextload_nxv2i64: 612; RV32: # %bb.0: 613; RV32-NEXT: vsetvli a0, zero, e32,m1,tu,mu 614; RV32-NEXT: vloxei32.v v9, (zero), v8, v0.t 615; RV32-NEXT: vsetvli a0, zero, e64,m2,ta,mu 616; RV32-NEXT: vsext.vf2 v26, v9 617; RV32-NEXT: vmv2r.v v8, v26 618; RV32-NEXT: ret 619; 620; RV64-LABEL: mgather_nxv2i32_sextload_nxv2i64: 621; RV64: # %bb.0: 622; RV64-NEXT: vsetvli a0, zero, e32,m1,tu,mu 623; RV64-NEXT: vloxei64.v v10, (zero), v8, v0.t 624; RV64-NEXT: vsetvli a0, zero, e64,m2,ta,mu 625; RV64-NEXT: vsext.vf2 v8, v10 626; RV64-NEXT: ret 627 %v = call <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0i32(<vscale x 2 x i32*> %ptrs, i32 4, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru) 628 %ev = sext <vscale x 2 x i32> %v to <vscale x 2 x i64> 629 ret <vscale x 2 x i64> %ev 630} 631 632define <vscale x 2 x i64> @mgather_nxv2i32_zextload_nxv2i64(<vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru) { 633; RV32-LABEL: mgather_nxv2i32_zextload_nxv2i64: 634; RV32: # %bb.0: 635; RV32-NEXT: vsetvli a0, zero, e32,m1,tu,mu 636; RV32-NEXT: vloxei32.v v9, (zero), v8, v0.t 637; RV32-NEXT: vsetvli a0, zero, e64,m2,ta,mu 638; RV32-NEXT: vzext.vf2 v26, v9 639; RV32-NEXT: vmv2r.v v8, v26 640; RV32-NEXT: ret 641; 642; RV64-LABEL: mgather_nxv2i32_zextload_nxv2i64: 643; RV64: # %bb.0: 644; RV64-NEXT: vsetvli a0, zero, e32,m1,tu,mu 645; RV64-NEXT: vloxei64.v v10, (zero), v8, v0.t 646; RV64-NEXT: vsetvli a0, zero, e64,m2,ta,mu 647; RV64-NEXT: vzext.vf2 v8, v10 648; RV64-NEXT: ret 649 %v = call <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0i32(<vscale x 2 x i32*> %ptrs, i32 4, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru) 650 %ev = zext <vscale x 2 x i32> %v to <vscale x 2 x i64> 651 ret <vscale x 2 x i64> %ev 652} 653 654declare <vscale x 4 x i32> @llvm.masked.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*>, i32, <vscale x 4 x i1>, <vscale x 4 x i32>) 655 656define <vscale x 4 x i32> @mgather_nxv4i32(<vscale x 4 x i32*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x i32> %passthru) { 657; RV32-LABEL: mgather_nxv4i32: 658; RV32: # %bb.0: 659; RV32-NEXT: vsetvli a0, zero, e32,m2,tu,mu 660; RV32-NEXT: vloxei32.v v10, (zero), v8, v0.t 661; RV32-NEXT: vmv2r.v v8, v10 662; RV32-NEXT: ret 663; 664; RV64-LABEL: mgather_nxv4i32: 665; RV64: # %bb.0: 666; RV64-NEXT: vsetvli a0, zero, e32,m2,tu,mu 667; RV64-NEXT: vloxei64.v v12, (zero), v8, v0.t 668; RV64-NEXT: vmv2r.v v8, v12 669; RV64-NEXT: ret 670 %v = call <vscale x 4 x i32> @llvm.masked.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*> %ptrs, i32 4, <vscale x 4 x i1> %m, <vscale x 4 x i32> %passthru) 671 ret <vscale x 4 x i32> %v 672} 673 674define <vscale x 4 x i32> @mgather_truemask_nxv4i32(<vscale x 4 x i32*> %ptrs, <vscale x 4 x i32> %passthru) { 675; RV32-LABEL: mgather_truemask_nxv4i32: 676; RV32: # %bb.0: 677; RV32-NEXT: vsetvli a0, zero, e32,m2,ta,mu 678; RV32-NEXT: vloxei32.v v8, (zero), v8 679; RV32-NEXT: ret 680; 681; RV64-LABEL: mgather_truemask_nxv4i32: 682; RV64: # %bb.0: 683; RV64-NEXT: vsetvli a0, zero, e32,m2,ta,mu 684; RV64-NEXT: vloxei64.v v8, (zero), v8 685; RV64-NEXT: ret 686 %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0 687 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer 688 %v = call <vscale x 4 x i32> @llvm.masked.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*> %ptrs, i32 4, <vscale x 4 x i1> %mtrue, <vscale x 4 x i32> %passthru) 689 ret <vscale x 4 x i32> %v 690} 691 692define <vscale x 4 x i32> @mgather_falsemask_nxv4i32(<vscale x 4 x i32*> %ptrs, <vscale x 4 x i32> %passthru) { 693; RV32-LABEL: mgather_falsemask_nxv4i32: 694; RV32: # %bb.0: 695; RV32-NEXT: vmv2r.v v8, v10 696; RV32-NEXT: ret 697; 698; RV64-LABEL: mgather_falsemask_nxv4i32: 699; RV64: # %bb.0: 700; RV64-NEXT: vmv2r.v v8, v12 701; RV64-NEXT: ret 702 %v = call <vscale x 4 x i32> @llvm.masked.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*> %ptrs, i32 4, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x i32> %passthru) 703 ret <vscale x 4 x i32> %v 704} 705 706declare <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*>, i32, <vscale x 8 x i1>, <vscale x 8 x i32>) 707 708define <vscale x 8 x i32> @mgather_nxv8i32(<vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) { 709; RV32-LABEL: mgather_nxv8i32: 710; RV32: # %bb.0: 711; RV32-NEXT: vsetvli a0, zero, e32,m4,tu,mu 712; RV32-NEXT: vloxei32.v v12, (zero), v8, v0.t 713; RV32-NEXT: vmv4r.v v8, v12 714; RV32-NEXT: ret 715; 716; RV64-LABEL: mgather_nxv8i32: 717; RV64: # %bb.0: 718; RV64-NEXT: vsetvli a0, zero, e32,m4,tu,mu 719; RV64-NEXT: vloxei64.v v16, (zero), v8, v0.t 720; RV64-NEXT: vmv4r.v v8, v16 721; RV64-NEXT: ret 722 %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) 723 ret <vscale x 8 x i32> %v 724} 725 726define <vscale x 8 x i32> @mgather_baseidx_nxv8i8_nxv8i32(i32* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) { 727; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8i32: 728; RV32: # %bb.0: 729; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 730; RV32-NEXT: vsext.vf4 v28, v8 731; RV32-NEXT: vsll.vi v28, v28, 2 732; RV32-NEXT: vsetvli a1, zero, e32,m4,tu,mu 733; RV32-NEXT: vloxei32.v v12, (a0), v28, v0.t 734; RV32-NEXT: vmv4r.v v8, v12 735; RV32-NEXT: ret 736; 737; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8i32: 738; RV64: # %bb.0: 739; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 740; RV64-NEXT: vsext.vf8 v16, v8 741; RV64-NEXT: vsll.vi v16, v16, 2 742; RV64-NEXT: vsetvli a1, zero, e32,m4,tu,mu 743; RV64-NEXT: vloxei64.v v12, (a0), v16, v0.t 744; RV64-NEXT: vmv4r.v v8, v12 745; RV64-NEXT: ret 746 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i8> %idxs 747 %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) 748 ret <vscale x 8 x i32> %v 749} 750 751define <vscale x 8 x i32> @mgather_baseidx_sext_nxv8i8_nxv8i32(i32* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) { 752; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i32: 753; RV32: # %bb.0: 754; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 755; RV32-NEXT: vsext.vf4 v28, v8 756; RV32-NEXT: vsll.vi v28, v28, 2 757; RV32-NEXT: vsetvli a1, zero, e32,m4,tu,mu 758; RV32-NEXT: vloxei32.v v12, (a0), v28, v0.t 759; RV32-NEXT: vmv4r.v v8, v12 760; RV32-NEXT: ret 761; 762; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i32: 763; RV64: # %bb.0: 764; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 765; RV64-NEXT: vsext.vf8 v16, v8 766; RV64-NEXT: vsll.vi v16, v16, 2 767; RV64-NEXT: vsetvli a1, zero, e32,m4,tu,mu 768; RV64-NEXT: vloxei64.v v12, (a0), v16, v0.t 769; RV64-NEXT: vmv4r.v v8, v12 770; RV64-NEXT: ret 771 %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i32> 772 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs 773 %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) 774 ret <vscale x 8 x i32> %v 775} 776 777define <vscale x 8 x i32> @mgather_baseidx_zext_nxv8i8_nxv8i32(i32* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) { 778; RV32-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i32: 779; RV32: # %bb.0: 780; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 781; RV32-NEXT: vzext.vf4 v28, v8 782; RV32-NEXT: vsll.vi v28, v28, 2 783; RV32-NEXT: vsetvli a1, zero, e32,m4,tu,mu 784; RV32-NEXT: vloxei32.v v12, (a0), v28, v0.t 785; RV32-NEXT: vmv4r.v v8, v12 786; RV32-NEXT: ret 787; 788; RV64-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i32: 789; RV64: # %bb.0: 790; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 791; RV64-NEXT: vzext.vf8 v16, v8 792; RV64-NEXT: vsll.vi v16, v16, 2 793; RV64-NEXT: vsetvli a1, zero, e32,m4,tu,mu 794; RV64-NEXT: vloxei64.v v12, (a0), v16, v0.t 795; RV64-NEXT: vmv4r.v v8, v12 796; RV64-NEXT: ret 797 %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i32> 798 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs 799 %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) 800 ret <vscale x 8 x i32> %v 801} 802 803define <vscale x 8 x i32> @mgather_baseidx_nxv8i16_nxv8i32(i32* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) { 804; RV32-LABEL: mgather_baseidx_nxv8i16_nxv8i32: 805; RV32: # %bb.0: 806; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 807; RV32-NEXT: vsext.vf2 v28, v8 808; RV32-NEXT: vsll.vi v28, v28, 2 809; RV32-NEXT: vsetvli a1, zero, e32,m4,tu,mu 810; RV32-NEXT: vloxei32.v v12, (a0), v28, v0.t 811; RV32-NEXT: vmv4r.v v8, v12 812; RV32-NEXT: ret 813; 814; RV64-LABEL: mgather_baseidx_nxv8i16_nxv8i32: 815; RV64: # %bb.0: 816; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 817; RV64-NEXT: vsext.vf4 v16, v8 818; RV64-NEXT: vsll.vi v16, v16, 2 819; RV64-NEXT: vsetvli a1, zero, e32,m4,tu,mu 820; RV64-NEXT: vloxei64.v v12, (a0), v16, v0.t 821; RV64-NEXT: vmv4r.v v8, v12 822; RV64-NEXT: ret 823 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i16> %idxs 824 %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) 825 ret <vscale x 8 x i32> %v 826} 827 828define <vscale x 8 x i32> @mgather_baseidx_sext_nxv8i16_nxv8i32(i32* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) { 829; RV32-LABEL: mgather_baseidx_sext_nxv8i16_nxv8i32: 830; RV32: # %bb.0: 831; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 832; RV32-NEXT: vsext.vf2 v28, v8 833; RV32-NEXT: vsll.vi v28, v28, 2 834; RV32-NEXT: vsetvli a1, zero, e32,m4,tu,mu 835; RV32-NEXT: vloxei32.v v12, (a0), v28, v0.t 836; RV32-NEXT: vmv4r.v v8, v12 837; RV32-NEXT: ret 838; 839; RV64-LABEL: mgather_baseidx_sext_nxv8i16_nxv8i32: 840; RV64: # %bb.0: 841; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 842; RV64-NEXT: vsext.vf4 v16, v8 843; RV64-NEXT: vsll.vi v16, v16, 2 844; RV64-NEXT: vsetvli a1, zero, e32,m4,tu,mu 845; RV64-NEXT: vloxei64.v v12, (a0), v16, v0.t 846; RV64-NEXT: vmv4r.v v8, v12 847; RV64-NEXT: ret 848 %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i32> 849 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs 850 %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) 851 ret <vscale x 8 x i32> %v 852} 853 854define <vscale x 8 x i32> @mgather_baseidx_zext_nxv8i16_nxv8i32(i32* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) { 855; RV32-LABEL: mgather_baseidx_zext_nxv8i16_nxv8i32: 856; RV32: # %bb.0: 857; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 858; RV32-NEXT: vzext.vf2 v28, v8 859; RV32-NEXT: vsll.vi v28, v28, 2 860; RV32-NEXT: vsetvli a1, zero, e32,m4,tu,mu 861; RV32-NEXT: vloxei32.v v12, (a0), v28, v0.t 862; RV32-NEXT: vmv4r.v v8, v12 863; RV32-NEXT: ret 864; 865; RV64-LABEL: mgather_baseidx_zext_nxv8i16_nxv8i32: 866; RV64: # %bb.0: 867; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 868; RV64-NEXT: vzext.vf4 v16, v8 869; RV64-NEXT: vsll.vi v16, v16, 2 870; RV64-NEXT: vsetvli a1, zero, e32,m4,tu,mu 871; RV64-NEXT: vloxei64.v v12, (a0), v16, v0.t 872; RV64-NEXT: vmv4r.v v8, v12 873; RV64-NEXT: ret 874 %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i32> 875 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs 876 %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) 877 ret <vscale x 8 x i32> %v 878} 879 880define <vscale x 8 x i32> @mgather_baseidx_nxv8i32(i32* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) { 881; RV32-LABEL: mgather_baseidx_nxv8i32: 882; RV32: # %bb.0: 883; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 884; RV32-NEXT: vsll.vi v28, v8, 2 885; RV32-NEXT: vsetvli a1, zero, e32,m4,tu,mu 886; RV32-NEXT: vloxei32.v v12, (a0), v28, v0.t 887; RV32-NEXT: vmv4r.v v8, v12 888; RV32-NEXT: ret 889; 890; RV64-LABEL: mgather_baseidx_nxv8i32: 891; RV64: # %bb.0: 892; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 893; RV64-NEXT: vsext.vf2 v16, v8 894; RV64-NEXT: vsll.vi v16, v16, 2 895; RV64-NEXT: vsetvli a1, zero, e32,m4,tu,mu 896; RV64-NEXT: vloxei64.v v12, (a0), v16, v0.t 897; RV64-NEXT: vmv4r.v v8, v12 898; RV64-NEXT: ret 899 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %idxs 900 %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) 901 ret <vscale x 8 x i32> %v 902} 903 904declare <vscale x 1 x i64> @llvm.masked.gather.nxv1i64.nxv1p0i64(<vscale x 1 x i64*>, i32, <vscale x 1 x i1>, <vscale x 1 x i64>) 905 906define <vscale x 1 x i64> @mgather_nxv1i64(<vscale x 1 x i64*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x i64> %passthru) { 907; RV32-LABEL: mgather_nxv1i64: 908; RV32: # %bb.0: 909; RV32-NEXT: vsetvli a0, zero, e64,m1,tu,mu 910; RV32-NEXT: vloxei32.v v9, (zero), v8, v0.t 911; RV32-NEXT: vmv1r.v v8, v9 912; RV32-NEXT: ret 913; 914; RV64-LABEL: mgather_nxv1i64: 915; RV64: # %bb.0: 916; RV64-NEXT: vsetvli a0, zero, e64,m1,tu,mu 917; RV64-NEXT: vloxei64.v v9, (zero), v8, v0.t 918; RV64-NEXT: vmv1r.v v8, v9 919; RV64-NEXT: ret 920 %v = call <vscale x 1 x i64> @llvm.masked.gather.nxv1i64.nxv1p0i64(<vscale x 1 x i64*> %ptrs, i32 8, <vscale x 1 x i1> %m, <vscale x 1 x i64> %passthru) 921 ret <vscale x 1 x i64> %v 922} 923 924declare <vscale x 2 x i64> @llvm.masked.gather.nxv2i64.nxv2p0i64(<vscale x 2 x i64*>, i32, <vscale x 2 x i1>, <vscale x 2 x i64>) 925 926define <vscale x 2 x i64> @mgather_nxv2i64(<vscale x 2 x i64*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i64> %passthru) { 927; RV32-LABEL: mgather_nxv2i64: 928; RV32: # %bb.0: 929; RV32-NEXT: vsetvli a0, zero, e64,m2,tu,mu 930; RV32-NEXT: vloxei32.v v10, (zero), v8, v0.t 931; RV32-NEXT: vmv2r.v v8, v10 932; RV32-NEXT: ret 933; 934; RV64-LABEL: mgather_nxv2i64: 935; RV64: # %bb.0: 936; RV64-NEXT: vsetvli a0, zero, e64,m2,tu,mu 937; RV64-NEXT: vloxei64.v v10, (zero), v8, v0.t 938; RV64-NEXT: vmv2r.v v8, v10 939; RV64-NEXT: ret 940 %v = call <vscale x 2 x i64> @llvm.masked.gather.nxv2i64.nxv2p0i64(<vscale x 2 x i64*> %ptrs, i32 8, <vscale x 2 x i1> %m, <vscale x 2 x i64> %passthru) 941 ret <vscale x 2 x i64> %v 942} 943 944declare <vscale x 4 x i64> @llvm.masked.gather.nxv4i64.nxv4p0i64(<vscale x 4 x i64*>, i32, <vscale x 4 x i1>, <vscale x 4 x i64>) 945 946define <vscale x 4 x i64> @mgather_nxv4i64(<vscale x 4 x i64*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x i64> %passthru) { 947; RV32-LABEL: mgather_nxv4i64: 948; RV32: # %bb.0: 949; RV32-NEXT: vsetvli a0, zero, e64,m4,tu,mu 950; RV32-NEXT: vloxei32.v v12, (zero), v8, v0.t 951; RV32-NEXT: vmv4r.v v8, v12 952; RV32-NEXT: ret 953; 954; RV64-LABEL: mgather_nxv4i64: 955; RV64: # %bb.0: 956; RV64-NEXT: vsetvli a0, zero, e64,m4,tu,mu 957; RV64-NEXT: vloxei64.v v12, (zero), v8, v0.t 958; RV64-NEXT: vmv4r.v v8, v12 959; RV64-NEXT: ret 960 %v = call <vscale x 4 x i64> @llvm.masked.gather.nxv4i64.nxv4p0i64(<vscale x 4 x i64*> %ptrs, i32 8, <vscale x 4 x i1> %m, <vscale x 4 x i64> %passthru) 961 ret <vscale x 4 x i64> %v 962} 963 964define <vscale x 4 x i64> @mgather_truemask_nxv4i64(<vscale x 4 x i64*> %ptrs, <vscale x 4 x i64> %passthru) { 965; RV32-LABEL: mgather_truemask_nxv4i64: 966; RV32: # %bb.0: 967; RV32-NEXT: vsetvli a0, zero, e64,m4,ta,mu 968; RV32-NEXT: vloxei32.v v8, (zero), v8 969; RV32-NEXT: ret 970; 971; RV64-LABEL: mgather_truemask_nxv4i64: 972; RV64: # %bb.0: 973; RV64-NEXT: vsetvli a0, zero, e64,m4,ta,mu 974; RV64-NEXT: vloxei64.v v8, (zero), v8 975; RV64-NEXT: ret 976 %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0 977 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer 978 %v = call <vscale x 4 x i64> @llvm.masked.gather.nxv4i64.nxv4p0i64(<vscale x 4 x i64*> %ptrs, i32 8, <vscale x 4 x i1> %mtrue, <vscale x 4 x i64> %passthru) 979 ret <vscale x 4 x i64> %v 980} 981 982define <vscale x 4 x i64> @mgather_falsemask_nxv4i64(<vscale x 4 x i64*> %ptrs, <vscale x 4 x i64> %passthru) { 983; RV32-LABEL: mgather_falsemask_nxv4i64: 984; RV32: # %bb.0: 985; RV32-NEXT: vmv4r.v v8, v12 986; RV32-NEXT: ret 987; 988; RV64-LABEL: mgather_falsemask_nxv4i64: 989; RV64: # %bb.0: 990; RV64-NEXT: vmv4r.v v8, v12 991; RV64-NEXT: ret 992 %v = call <vscale x 4 x i64> @llvm.masked.gather.nxv4i64.nxv4p0i64(<vscale x 4 x i64*> %ptrs, i32 8, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x i64> %passthru) 993 ret <vscale x 4 x i64> %v 994} 995 996declare <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*>, i32, <vscale x 8 x i1>, <vscale x 8 x i64>) 997 998define <vscale x 8 x i64> @mgather_nxv8i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) { 999; RV32-LABEL: mgather_nxv8i64: 1000; RV32: # %bb.0: 1001; RV32-NEXT: vsetvli a0, zero, e64,m8,tu,mu 1002; RV32-NEXT: vloxei32.v v16, (zero), v8, v0.t 1003; RV32-NEXT: vmv8r.v v8, v16 1004; RV32-NEXT: ret 1005; 1006; RV64-LABEL: mgather_nxv8i64: 1007; RV64: # %bb.0: 1008; RV64-NEXT: vsetvli a0, zero, e64,m8,tu,mu 1009; RV64-NEXT: vloxei64.v v16, (zero), v8, v0.t 1010; RV64-NEXT: vmv8r.v v8, v16 1011; RV64-NEXT: ret 1012 %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) 1013 ret <vscale x 8 x i64> %v 1014} 1015 1016define <vscale x 8 x i64> @mgather_baseidx_nxv8i8_nxv8i64(i64* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) { 1017; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8i64: 1018; RV32: # %bb.0: 1019; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 1020; RV32-NEXT: vsext.vf4 v28, v8 1021; RV32-NEXT: vsll.vi v28, v28, 3 1022; RV32-NEXT: vsetvli a1, zero, e64,m8,tu,mu 1023; RV32-NEXT: vloxei32.v v16, (a0), v28, v0.t 1024; RV32-NEXT: vmv8r.v v8, v16 1025; RV32-NEXT: ret 1026; 1027; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8i64: 1028; RV64: # %bb.0: 1029; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1030; RV64-NEXT: vsext.vf8 v24, v8 1031; RV64-NEXT: vsll.vi v8, v24, 3 1032; RV64-NEXT: vsetvli a1, zero, e64,m8,tu,mu 1033; RV64-NEXT: vloxei64.v v16, (a0), v8, v0.t 1034; RV64-NEXT: vmv8r.v v8, v16 1035; RV64-NEXT: ret 1036 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i8> %idxs 1037 %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) 1038 ret <vscale x 8 x i64> %v 1039} 1040 1041define <vscale x 8 x i64> @mgather_baseidx_sext_nxv8i8_nxv8i64(i64* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) { 1042; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i64: 1043; RV32: # %bb.0: 1044; RV32-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1045; RV32-NEXT: vsext.vf8 v24, v8 1046; RV32-NEXT: vsll.vi v8, v24, 3 1047; RV32-NEXT: vsetvli a1, zero, e64,m8,tu,mu 1048; RV32-NEXT: vloxei64.v v16, (a0), v8, v0.t 1049; RV32-NEXT: vmv8r.v v8, v16 1050; RV32-NEXT: ret 1051; 1052; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i64: 1053; RV64: # %bb.0: 1054; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1055; RV64-NEXT: vsext.vf8 v24, v8 1056; RV64-NEXT: vsll.vi v8, v24, 3 1057; RV64-NEXT: vsetvli a1, zero, e64,m8,tu,mu 1058; RV64-NEXT: vloxei64.v v16, (a0), v8, v0.t 1059; RV64-NEXT: vmv8r.v v8, v16 1060; RV64-NEXT: ret 1061 %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i64> 1062 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs 1063 %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) 1064 ret <vscale x 8 x i64> %v 1065} 1066 1067define <vscale x 8 x i64> @mgather_baseidx_zext_nxv8i8_nxv8i64(i64* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) { 1068; RV32-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i64: 1069; RV32: # %bb.0: 1070; RV32-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1071; RV32-NEXT: vzext.vf8 v24, v8 1072; RV32-NEXT: vsll.vi v8, v24, 3 1073; RV32-NEXT: vsetvli a1, zero, e64,m8,tu,mu 1074; RV32-NEXT: vloxei64.v v16, (a0), v8, v0.t 1075; RV32-NEXT: vmv8r.v v8, v16 1076; RV32-NEXT: ret 1077; 1078; RV64-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i64: 1079; RV64: # %bb.0: 1080; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1081; RV64-NEXT: vzext.vf8 v24, v8 1082; RV64-NEXT: vsll.vi v8, v24, 3 1083; RV64-NEXT: vsetvli a1, zero, e64,m8,tu,mu 1084; RV64-NEXT: vloxei64.v v16, (a0), v8, v0.t 1085; RV64-NEXT: vmv8r.v v8, v16 1086; RV64-NEXT: ret 1087 %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i64> 1088 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs 1089 %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) 1090 ret <vscale x 8 x i64> %v 1091} 1092 1093define <vscale x 8 x i64> @mgather_baseidx_nxv8i16_nxv8i64(i64* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) { 1094; RV32-LABEL: mgather_baseidx_nxv8i16_nxv8i64: 1095; RV32: # %bb.0: 1096; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 1097; RV32-NEXT: vsext.vf2 v28, v8 1098; RV32-NEXT: vsll.vi v28, v28, 3 1099; RV32-NEXT: vsetvli a1, zero, e64,m8,tu,mu 1100; RV32-NEXT: vloxei32.v v16, (a0), v28, v0.t 1101; RV32-NEXT: vmv8r.v v8, v16 1102; RV32-NEXT: ret 1103; 1104; RV64-LABEL: mgather_baseidx_nxv8i16_nxv8i64: 1105; RV64: # %bb.0: 1106; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1107; RV64-NEXT: vsext.vf4 v24, v8 1108; RV64-NEXT: vsll.vi v8, v24, 3 1109; RV64-NEXT: vsetvli a1, zero, e64,m8,tu,mu 1110; RV64-NEXT: vloxei64.v v16, (a0), v8, v0.t 1111; RV64-NEXT: vmv8r.v v8, v16 1112; RV64-NEXT: ret 1113 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i16> %idxs 1114 %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) 1115 ret <vscale x 8 x i64> %v 1116} 1117 1118define <vscale x 8 x i64> @mgather_baseidx_sext_nxv8i16_nxv8i64(i64* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) { 1119; RV32-LABEL: mgather_baseidx_sext_nxv8i16_nxv8i64: 1120; RV32: # %bb.0: 1121; RV32-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1122; RV32-NEXT: vsext.vf4 v24, v8 1123; RV32-NEXT: vsll.vi v8, v24, 3 1124; RV32-NEXT: vsetvli a1, zero, e64,m8,tu,mu 1125; RV32-NEXT: vloxei64.v v16, (a0), v8, v0.t 1126; RV32-NEXT: vmv8r.v v8, v16 1127; RV32-NEXT: ret 1128; 1129; RV64-LABEL: mgather_baseidx_sext_nxv8i16_nxv8i64: 1130; RV64: # %bb.0: 1131; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1132; RV64-NEXT: vsext.vf4 v24, v8 1133; RV64-NEXT: vsll.vi v8, v24, 3 1134; RV64-NEXT: vsetvli a1, zero, e64,m8,tu,mu 1135; RV64-NEXT: vloxei64.v v16, (a0), v8, v0.t 1136; RV64-NEXT: vmv8r.v v8, v16 1137; RV64-NEXT: ret 1138 %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i64> 1139 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs 1140 %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) 1141 ret <vscale x 8 x i64> %v 1142} 1143 1144define <vscale x 8 x i64> @mgather_baseidx_zext_nxv8i16_nxv8i64(i64* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) { 1145; RV32-LABEL: mgather_baseidx_zext_nxv8i16_nxv8i64: 1146; RV32: # %bb.0: 1147; RV32-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1148; RV32-NEXT: vzext.vf4 v24, v8 1149; RV32-NEXT: vsll.vi v8, v24, 3 1150; RV32-NEXT: vsetvli a1, zero, e64,m8,tu,mu 1151; RV32-NEXT: vloxei64.v v16, (a0), v8, v0.t 1152; RV32-NEXT: vmv8r.v v8, v16 1153; RV32-NEXT: ret 1154; 1155; RV64-LABEL: mgather_baseidx_zext_nxv8i16_nxv8i64: 1156; RV64: # %bb.0: 1157; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1158; RV64-NEXT: vzext.vf4 v24, v8 1159; RV64-NEXT: vsll.vi v8, v24, 3 1160; RV64-NEXT: vsetvli a1, zero, e64,m8,tu,mu 1161; RV64-NEXT: vloxei64.v v16, (a0), v8, v0.t 1162; RV64-NEXT: vmv8r.v v8, v16 1163; RV64-NEXT: ret 1164 %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i64> 1165 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs 1166 %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) 1167 ret <vscale x 8 x i64> %v 1168} 1169 1170define <vscale x 8 x i64> @mgather_baseidx_nxv8i32_nxv8i64(i64* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) { 1171; RV32-LABEL: mgather_baseidx_nxv8i32_nxv8i64: 1172; RV32: # %bb.0: 1173; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 1174; RV32-NEXT: vsll.vi v28, v8, 3 1175; RV32-NEXT: vsetvli a1, zero, e64,m8,tu,mu 1176; RV32-NEXT: vloxei32.v v16, (a0), v28, v0.t 1177; RV32-NEXT: vmv8r.v v8, v16 1178; RV32-NEXT: ret 1179; 1180; RV64-LABEL: mgather_baseidx_nxv8i32_nxv8i64: 1181; RV64: # %bb.0: 1182; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1183; RV64-NEXT: vsext.vf2 v24, v8 1184; RV64-NEXT: vsll.vi v8, v24, 3 1185; RV64-NEXT: vsetvli a1, zero, e64,m8,tu,mu 1186; RV64-NEXT: vloxei64.v v16, (a0), v8, v0.t 1187; RV64-NEXT: vmv8r.v v8, v16 1188; RV64-NEXT: ret 1189 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i32> %idxs 1190 %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) 1191 ret <vscale x 8 x i64> %v 1192} 1193 1194define <vscale x 8 x i64> @mgather_baseidx_sext_nxv8i32_nxv8i64(i64* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) { 1195; RV32-LABEL: mgather_baseidx_sext_nxv8i32_nxv8i64: 1196; RV32: # %bb.0: 1197; RV32-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1198; RV32-NEXT: vsext.vf2 v24, v8 1199; RV32-NEXT: vsll.vi v8, v24, 3 1200; RV32-NEXT: vsetvli a1, zero, e64,m8,tu,mu 1201; RV32-NEXT: vloxei64.v v16, (a0), v8, v0.t 1202; RV32-NEXT: vmv8r.v v8, v16 1203; RV32-NEXT: ret 1204; 1205; RV64-LABEL: mgather_baseidx_sext_nxv8i32_nxv8i64: 1206; RV64: # %bb.0: 1207; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1208; RV64-NEXT: vsext.vf2 v24, v8 1209; RV64-NEXT: vsll.vi v8, v24, 3 1210; RV64-NEXT: vsetvli a1, zero, e64,m8,tu,mu 1211; RV64-NEXT: vloxei64.v v16, (a0), v8, v0.t 1212; RV64-NEXT: vmv8r.v v8, v16 1213; RV64-NEXT: ret 1214 %eidxs = sext <vscale x 8 x i32> %idxs to <vscale x 8 x i64> 1215 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs 1216 %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) 1217 ret <vscale x 8 x i64> %v 1218} 1219 1220define <vscale x 8 x i64> @mgather_baseidx_zext_nxv8i32_nxv8i64(i64* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) { 1221; RV32-LABEL: mgather_baseidx_zext_nxv8i32_nxv8i64: 1222; RV32: # %bb.0: 1223; RV32-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1224; RV32-NEXT: vzext.vf2 v24, v8 1225; RV32-NEXT: vsll.vi v8, v24, 3 1226; RV32-NEXT: vsetvli a1, zero, e64,m8,tu,mu 1227; RV32-NEXT: vloxei64.v v16, (a0), v8, v0.t 1228; RV32-NEXT: vmv8r.v v8, v16 1229; RV32-NEXT: ret 1230; 1231; RV64-LABEL: mgather_baseidx_zext_nxv8i32_nxv8i64: 1232; RV64: # %bb.0: 1233; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1234; RV64-NEXT: vzext.vf2 v24, v8 1235; RV64-NEXT: vsll.vi v8, v24, 3 1236; RV64-NEXT: vsetvli a1, zero, e64,m8,tu,mu 1237; RV64-NEXT: vloxei64.v v16, (a0), v8, v0.t 1238; RV64-NEXT: vmv8r.v v8, v16 1239; RV64-NEXT: ret 1240 %eidxs = zext <vscale x 8 x i32> %idxs to <vscale x 8 x i64> 1241 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs 1242 %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) 1243 ret <vscale x 8 x i64> %v 1244} 1245 1246define <vscale x 8 x i64> @mgather_baseidx_nxv8i64(i64* %base, <vscale x 8 x i64> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) { 1247; RV32-LABEL: mgather_baseidx_nxv8i64: 1248; RV32: # %bb.0: 1249; RV32-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1250; RV32-NEXT: vsll.vi v8, v8, 3 1251; RV32-NEXT: vsetvli a1, zero, e64,m8,tu,mu 1252; RV32-NEXT: vloxei64.v v16, (a0), v8, v0.t 1253; RV32-NEXT: vmv8r.v v8, v16 1254; RV32-NEXT: ret 1255; 1256; RV64-LABEL: mgather_baseidx_nxv8i64: 1257; RV64: # %bb.0: 1258; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1259; RV64-NEXT: vsll.vi v8, v8, 3 1260; RV64-NEXT: vsetvli a1, zero, e64,m8,tu,mu 1261; RV64-NEXT: vloxei64.v v16, (a0), v8, v0.t 1262; RV64-NEXT: vmv8r.v v8, v16 1263; RV64-NEXT: ret 1264 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %idxs 1265 %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) 1266 ret <vscale x 8 x i64> %v 1267} 1268 1269declare <vscale x 16 x i64> @llvm.masked.gather.nxv16i64.nxv16p0f64(<vscale x 16 x i64*>, i32, <vscale x 16 x i1>, <vscale x 16 x i64>) 1270 1271declare <vscale x 16 x i64> @llvm.experimental.vector.insert.nxv8i64.nxv16i64(<vscale x 16 x i64>, <vscale x 8 x i64>, i64 %idx) 1272declare <vscale x 16 x i64*> @llvm.experimental.vector.insert.nxv8p0i64.nxv16p0i64(<vscale x 16 x i64*>, <vscale x 8 x i64*>, i64 %idx) 1273 1274define void @mgather_nxv16i64(<vscale x 8 x i64*> %ptrs0, <vscale x 8 x i64*> %ptrs1, <vscale x 16 x i1> %m, <vscale x 8 x i64> %passthru0, <vscale x 8 x i64> %passthru1, <vscale x 16 x i64>* %out) { 1275; RV32-LABEL: mgather_nxv16i64: 1276; RV32: # %bb.0: 1277; RV32-NEXT: vl8re64.v v24, (a0) 1278; RV32-NEXT: vsetvli a0, zero, e64,m8,tu,mu 1279; RV32-NEXT: vloxei32.v v16, (zero), v8, v0.t 1280; RV32-NEXT: csrr a0, vlenb 1281; RV32-NEXT: srli a0, a0, 3 1282; RV32-NEXT: vsetvli a2, zero, e8,mf4,ta,mu 1283; RV32-NEXT: vslidedown.vx v0, v0, a0 1284; RV32-NEXT: vsetvli a2, zero, e64,m8,tu,mu 1285; RV32-NEXT: vloxei32.v v24, (zero), v12, v0.t 1286; RV32-NEXT: slli a0, a0, 6 1287; RV32-NEXT: add a0, a1, a0 1288; RV32-NEXT: vs8r.v v24, (a0) 1289; RV32-NEXT: vs8r.v v16, (a1) 1290; RV32-NEXT: ret 1291; 1292; RV64-LABEL: mgather_nxv16i64: 1293; RV64: # %bb.0: 1294; RV64-NEXT: addi sp, sp, -16 1295; RV64-NEXT: .cfi_def_cfa_offset 16 1296; RV64-NEXT: csrr a3, vlenb 1297; RV64-NEXT: slli a3, a3, 3 1298; RV64-NEXT: sub sp, sp, a3 1299; RV64-NEXT: vl8re64.v v24, (a0) 1300; RV64-NEXT: addi a0, sp, 16 1301; RV64-NEXT: vs8r.v v16, (a0) # Unknown-size Folded Spill 1302; RV64-NEXT: vmv8r.v v16, v8 1303; RV64-NEXT: vl8re64.v v8, (a1) 1304; RV64-NEXT: vsetvli a0, zero, e64,m8,tu,mu 1305; RV64-NEXT: vloxei64.v v24, (zero), v16, v0.t 1306; RV64-NEXT: csrr a0, vlenb 1307; RV64-NEXT: srli a0, a0, 3 1308; RV64-NEXT: vsetvli a1, zero, e8,mf4,ta,mu 1309; RV64-NEXT: vslidedown.vx v0, v0, a0 1310; RV64-NEXT: vsetvli a1, zero, e64,m8,tu,mu 1311; RV64-NEXT: addi a1, sp, 16 1312; RV64-NEXT: vl8re8.v v16, (a1) # Unknown-size Folded Reload 1313; RV64-NEXT: vloxei64.v v8, (zero), v16, v0.t 1314; RV64-NEXT: slli a0, a0, 6 1315; RV64-NEXT: add a0, a2, a0 1316; RV64-NEXT: vs8r.v v8, (a0) 1317; RV64-NEXT: vs8r.v v24, (a2) 1318; RV64-NEXT: csrr a0, vlenb 1319; RV64-NEXT: slli a0, a0, 3 1320; RV64-NEXT: add sp, sp, a0 1321; RV64-NEXT: addi sp, sp, 16 1322; RV64-NEXT: ret 1323 %p0 = call <vscale x 16 x i64*> @llvm.experimental.vector.insert.nxv8p0i64.nxv16p0i64(<vscale x 16 x i64*> undef, <vscale x 8 x i64*> %ptrs0, i64 0) 1324 %p1 = call <vscale x 16 x i64*> @llvm.experimental.vector.insert.nxv8p0i64.nxv16p0i64(<vscale x 16 x i64*> %p0, <vscale x 8 x i64*> %ptrs1, i64 8) 1325 1326 %pt0 = call <vscale x 16 x i64> @llvm.experimental.vector.insert.nxv8i64.nxv16i64(<vscale x 16 x i64> undef, <vscale x 8 x i64> %passthru0, i64 0) 1327 %pt1 = call <vscale x 16 x i64> @llvm.experimental.vector.insert.nxv8i64.nxv16i64(<vscale x 16 x i64> %pt0, <vscale x 8 x i64> %passthru1, i64 8) 1328 1329 %v = call <vscale x 16 x i64> @llvm.masked.gather.nxv16i64.nxv16p0f64(<vscale x 16 x i64*> %p1, i32 8, <vscale x 16 x i1> %m, <vscale x 16 x i64> %pt1) 1330 store <vscale x 16 x i64> %v, <vscale x 16 x i64>* %out 1331 ret void 1332} 1333 1334 1335declare <vscale x 1 x half> @llvm.masked.gather.nxv1f16.nxv1p0f16(<vscale x 1 x half*>, i32, <vscale x 1 x i1>, <vscale x 1 x half>) 1336 1337define <vscale x 1 x half> @mgather_nxv1f16(<vscale x 1 x half*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x half> %passthru) { 1338; RV32-LABEL: mgather_nxv1f16: 1339; RV32: # %bb.0: 1340; RV32-NEXT: vsetvli a0, zero, e16,mf4,tu,mu 1341; RV32-NEXT: vloxei32.v v9, (zero), v8, v0.t 1342; RV32-NEXT: vmv1r.v v8, v9 1343; RV32-NEXT: ret 1344; 1345; RV64-LABEL: mgather_nxv1f16: 1346; RV64: # %bb.0: 1347; RV64-NEXT: vsetvli a0, zero, e16,mf4,tu,mu 1348; RV64-NEXT: vloxei64.v v9, (zero), v8, v0.t 1349; RV64-NEXT: vmv1r.v v8, v9 1350; RV64-NEXT: ret 1351 %v = call <vscale x 1 x half> @llvm.masked.gather.nxv1f16.nxv1p0f16(<vscale x 1 x half*> %ptrs, i32 2, <vscale x 1 x i1> %m, <vscale x 1 x half> %passthru) 1352 ret <vscale x 1 x half> %v 1353} 1354 1355declare <vscale x 2 x half> @llvm.masked.gather.nxv2f16.nxv2p0f16(<vscale x 2 x half*>, i32, <vscale x 2 x i1>, <vscale x 2 x half>) 1356 1357define <vscale x 2 x half> @mgather_nxv2f16(<vscale x 2 x half*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x half> %passthru) { 1358; RV32-LABEL: mgather_nxv2f16: 1359; RV32: # %bb.0: 1360; RV32-NEXT: vsetvli a0, zero, e16,mf2,tu,mu 1361; RV32-NEXT: vloxei32.v v9, (zero), v8, v0.t 1362; RV32-NEXT: vmv1r.v v8, v9 1363; RV32-NEXT: ret 1364; 1365; RV64-LABEL: mgather_nxv2f16: 1366; RV64: # %bb.0: 1367; RV64-NEXT: vsetvli a0, zero, e16,mf2,tu,mu 1368; RV64-NEXT: vloxei64.v v10, (zero), v8, v0.t 1369; RV64-NEXT: vmv1r.v v8, v10 1370; RV64-NEXT: ret 1371 %v = call <vscale x 2 x half> @llvm.masked.gather.nxv2f16.nxv2p0f16(<vscale x 2 x half*> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x half> %passthru) 1372 ret <vscale x 2 x half> %v 1373} 1374 1375declare <vscale x 4 x half> @llvm.masked.gather.nxv4f16.nxv4p0f16(<vscale x 4 x half*>, i32, <vscale x 4 x i1>, <vscale x 4 x half>) 1376 1377define <vscale x 4 x half> @mgather_nxv4f16(<vscale x 4 x half*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x half> %passthru) { 1378; RV32-LABEL: mgather_nxv4f16: 1379; RV32: # %bb.0: 1380; RV32-NEXT: vsetvli a0, zero, e16,m1,tu,mu 1381; RV32-NEXT: vloxei32.v v10, (zero), v8, v0.t 1382; RV32-NEXT: vmv1r.v v8, v10 1383; RV32-NEXT: ret 1384; 1385; RV64-LABEL: mgather_nxv4f16: 1386; RV64: # %bb.0: 1387; RV64-NEXT: vsetvli a0, zero, e16,m1,tu,mu 1388; RV64-NEXT: vloxei64.v v12, (zero), v8, v0.t 1389; RV64-NEXT: vmv1r.v v8, v12 1390; RV64-NEXT: ret 1391 %v = call <vscale x 4 x half> @llvm.masked.gather.nxv4f16.nxv4p0f16(<vscale x 4 x half*> %ptrs, i32 2, <vscale x 4 x i1> %m, <vscale x 4 x half> %passthru) 1392 ret <vscale x 4 x half> %v 1393} 1394 1395define <vscale x 4 x half> @mgather_truemask_nxv4f16(<vscale x 4 x half*> %ptrs, <vscale x 4 x half> %passthru) { 1396; RV32-LABEL: mgather_truemask_nxv4f16: 1397; RV32: # %bb.0: 1398; RV32-NEXT: vsetvli a0, zero, e16,m1,ta,mu 1399; RV32-NEXT: vloxei32.v v8, (zero), v8 1400; RV32-NEXT: ret 1401; 1402; RV64-LABEL: mgather_truemask_nxv4f16: 1403; RV64: # %bb.0: 1404; RV64-NEXT: vsetvli a0, zero, e16,m1,ta,mu 1405; RV64-NEXT: vloxei64.v v8, (zero), v8 1406; RV64-NEXT: ret 1407 %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0 1408 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer 1409 %v = call <vscale x 4 x half> @llvm.masked.gather.nxv4f16.nxv4p0f16(<vscale x 4 x half*> %ptrs, i32 2, <vscale x 4 x i1> %mtrue, <vscale x 4 x half> %passthru) 1410 ret <vscale x 4 x half> %v 1411} 1412 1413define <vscale x 4 x half> @mgather_falsemask_nxv4f16(<vscale x 4 x half*> %ptrs, <vscale x 4 x half> %passthru) { 1414; RV32-LABEL: mgather_falsemask_nxv4f16: 1415; RV32: # %bb.0: 1416; RV32-NEXT: vmv1r.v v8, v10 1417; RV32-NEXT: ret 1418; 1419; RV64-LABEL: mgather_falsemask_nxv4f16: 1420; RV64: # %bb.0: 1421; RV64-NEXT: vmv1r.v v8, v12 1422; RV64-NEXT: ret 1423 %v = call <vscale x 4 x half> @llvm.masked.gather.nxv4f16.nxv4p0f16(<vscale x 4 x half*> %ptrs, i32 2, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x half> %passthru) 1424 ret <vscale x 4 x half> %v 1425} 1426 1427declare <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*>, i32, <vscale x 8 x i1>, <vscale x 8 x half>) 1428 1429define <vscale x 8 x half> @mgather_nxv8f16(<vscale x 8 x half*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) { 1430; RV32-LABEL: mgather_nxv8f16: 1431; RV32: # %bb.0: 1432; RV32-NEXT: vsetvli a0, zero, e16,m2,tu,mu 1433; RV32-NEXT: vloxei32.v v12, (zero), v8, v0.t 1434; RV32-NEXT: vmv2r.v v8, v12 1435; RV32-NEXT: ret 1436; 1437; RV64-LABEL: mgather_nxv8f16: 1438; RV64: # %bb.0: 1439; RV64-NEXT: vsetvli a0, zero, e16,m2,tu,mu 1440; RV64-NEXT: vloxei64.v v16, (zero), v8, v0.t 1441; RV64-NEXT: vmv2r.v v8, v16 1442; RV64-NEXT: ret 1443 %v = call <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) 1444 ret <vscale x 8 x half> %v 1445} 1446 1447define <vscale x 8 x half> @mgather_baseidx_nxv8i8_nxv8f16(half* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) { 1448; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8f16: 1449; RV32: # %bb.0: 1450; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 1451; RV32-NEXT: vsext.vf4 v28, v8 1452; RV32-NEXT: vsll.vi v28, v28, 1 1453; RV32-NEXT: vsetvli a1, zero, e16,m2,tu,mu 1454; RV32-NEXT: vloxei32.v v10, (a0), v28, v0.t 1455; RV32-NEXT: vmv2r.v v8, v10 1456; RV32-NEXT: ret 1457; 1458; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8f16: 1459; RV64: # %bb.0: 1460; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1461; RV64-NEXT: vsext.vf8 v16, v8 1462; RV64-NEXT: vsll.vi v16, v16, 1 1463; RV64-NEXT: vsetvli a1, zero, e16,m2,tu,mu 1464; RV64-NEXT: vloxei64.v v10, (a0), v16, v0.t 1465; RV64-NEXT: vmv2r.v v8, v10 1466; RV64-NEXT: ret 1467 %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i8> %idxs 1468 %v = call <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) 1469 ret <vscale x 8 x half> %v 1470} 1471 1472define <vscale x 8 x half> @mgather_baseidx_sext_nxv8i8_nxv8f16(half* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) { 1473; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f16: 1474; RV32: # %bb.0: 1475; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 1476; RV32-NEXT: vsext.vf4 v28, v8 1477; RV32-NEXT: vsll.vi v28, v28, 1 1478; RV32-NEXT: vsetvli a1, zero, e16,m2,tu,mu 1479; RV32-NEXT: vloxei32.v v10, (a0), v28, v0.t 1480; RV32-NEXT: vmv2r.v v8, v10 1481; RV32-NEXT: ret 1482; 1483; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f16: 1484; RV64: # %bb.0: 1485; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1486; RV64-NEXT: vsext.vf8 v16, v8 1487; RV64-NEXT: vsll.vi v16, v16, 1 1488; RV64-NEXT: vsetvli a1, zero, e16,m2,tu,mu 1489; RV64-NEXT: vloxei64.v v10, (a0), v16, v0.t 1490; RV64-NEXT: vmv2r.v v8, v10 1491; RV64-NEXT: ret 1492 %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i16> 1493 %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i16> %eidxs 1494 %v = call <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) 1495 ret <vscale x 8 x half> %v 1496} 1497 1498define <vscale x 8 x half> @mgather_baseidx_zext_nxv8i8_nxv8f16(half* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) { 1499; RV32-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f16: 1500; RV32: # %bb.0: 1501; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 1502; RV32-NEXT: vzext.vf4 v28, v8 1503; RV32-NEXT: vsll.vi v28, v28, 1 1504; RV32-NEXT: vsetvli a1, zero, e16,m2,tu,mu 1505; RV32-NEXT: vloxei32.v v10, (a0), v28, v0.t 1506; RV32-NEXT: vmv2r.v v8, v10 1507; RV32-NEXT: ret 1508; 1509; RV64-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f16: 1510; RV64: # %bb.0: 1511; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1512; RV64-NEXT: vzext.vf8 v16, v8 1513; RV64-NEXT: vsll.vi v16, v16, 1 1514; RV64-NEXT: vsetvli a1, zero, e16,m2,tu,mu 1515; RV64-NEXT: vloxei64.v v10, (a0), v16, v0.t 1516; RV64-NEXT: vmv2r.v v8, v10 1517; RV64-NEXT: ret 1518 %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i16> 1519 %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i16> %eidxs 1520 %v = call <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) 1521 ret <vscale x 8 x half> %v 1522} 1523 1524define <vscale x 8 x half> @mgather_baseidx_nxv8f16(half* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) { 1525; RV32-LABEL: mgather_baseidx_nxv8f16: 1526; RV32: # %bb.0: 1527; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 1528; RV32-NEXT: vsext.vf2 v28, v8 1529; RV32-NEXT: vsll.vi v28, v28, 1 1530; RV32-NEXT: vsetvli a1, zero, e16,m2,tu,mu 1531; RV32-NEXT: vloxei32.v v10, (a0), v28, v0.t 1532; RV32-NEXT: vmv2r.v v8, v10 1533; RV32-NEXT: ret 1534; 1535; RV64-LABEL: mgather_baseidx_nxv8f16: 1536; RV64: # %bb.0: 1537; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1538; RV64-NEXT: vsext.vf4 v16, v8 1539; RV64-NEXT: vsll.vi v16, v16, 1 1540; RV64-NEXT: vsetvli a1, zero, e16,m2,tu,mu 1541; RV64-NEXT: vloxei64.v v10, (a0), v16, v0.t 1542; RV64-NEXT: vmv2r.v v8, v10 1543; RV64-NEXT: ret 1544 %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i16> %idxs 1545 %v = call <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) 1546 ret <vscale x 8 x half> %v 1547} 1548 1549declare <vscale x 1 x float> @llvm.masked.gather.nxv1f32.nxv1p0f32(<vscale x 1 x float*>, i32, <vscale x 1 x i1>, <vscale x 1 x float>) 1550 1551define <vscale x 1 x float> @mgather_nxv1f32(<vscale x 1 x float*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x float> %passthru) { 1552; RV32-LABEL: mgather_nxv1f32: 1553; RV32: # %bb.0: 1554; RV32-NEXT: vsetvli a0, zero, e32,mf2,tu,mu 1555; RV32-NEXT: vloxei32.v v9, (zero), v8, v0.t 1556; RV32-NEXT: vmv1r.v v8, v9 1557; RV32-NEXT: ret 1558; 1559; RV64-LABEL: mgather_nxv1f32: 1560; RV64: # %bb.0: 1561; RV64-NEXT: vsetvli a0, zero, e32,mf2,tu,mu 1562; RV64-NEXT: vloxei64.v v9, (zero), v8, v0.t 1563; RV64-NEXT: vmv1r.v v8, v9 1564; RV64-NEXT: ret 1565 %v = call <vscale x 1 x float> @llvm.masked.gather.nxv1f32.nxv1p0f32(<vscale x 1 x float*> %ptrs, i32 4, <vscale x 1 x i1> %m, <vscale x 1 x float> %passthru) 1566 ret <vscale x 1 x float> %v 1567} 1568 1569declare <vscale x 2 x float> @llvm.masked.gather.nxv2f32.nxv2p0f32(<vscale x 2 x float*>, i32, <vscale x 2 x i1>, <vscale x 2 x float>) 1570 1571define <vscale x 2 x float> @mgather_nxv2f32(<vscale x 2 x float*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x float> %passthru) { 1572; RV32-LABEL: mgather_nxv2f32: 1573; RV32: # %bb.0: 1574; RV32-NEXT: vsetvli a0, zero, e32,m1,tu,mu 1575; RV32-NEXT: vloxei32.v v9, (zero), v8, v0.t 1576; RV32-NEXT: vmv1r.v v8, v9 1577; RV32-NEXT: ret 1578; 1579; RV64-LABEL: mgather_nxv2f32: 1580; RV64: # %bb.0: 1581; RV64-NEXT: vsetvli a0, zero, e32,m1,tu,mu 1582; RV64-NEXT: vloxei64.v v10, (zero), v8, v0.t 1583; RV64-NEXT: vmv1r.v v8, v10 1584; RV64-NEXT: ret 1585 %v = call <vscale x 2 x float> @llvm.masked.gather.nxv2f32.nxv2p0f32(<vscale x 2 x float*> %ptrs, i32 4, <vscale x 2 x i1> %m, <vscale x 2 x float> %passthru) 1586 ret <vscale x 2 x float> %v 1587} 1588 1589declare <vscale x 4 x float> @llvm.masked.gather.nxv4f32.nxv4p0f32(<vscale x 4 x float*>, i32, <vscale x 4 x i1>, <vscale x 4 x float>) 1590 1591define <vscale x 4 x float> @mgather_nxv4f32(<vscale x 4 x float*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x float> %passthru) { 1592; RV32-LABEL: mgather_nxv4f32: 1593; RV32: # %bb.0: 1594; RV32-NEXT: vsetvli a0, zero, e32,m2,tu,mu 1595; RV32-NEXT: vloxei32.v v10, (zero), v8, v0.t 1596; RV32-NEXT: vmv2r.v v8, v10 1597; RV32-NEXT: ret 1598; 1599; RV64-LABEL: mgather_nxv4f32: 1600; RV64: # %bb.0: 1601; RV64-NEXT: vsetvli a0, zero, e32,m2,tu,mu 1602; RV64-NEXT: vloxei64.v v12, (zero), v8, v0.t 1603; RV64-NEXT: vmv2r.v v8, v12 1604; RV64-NEXT: ret 1605 %v = call <vscale x 4 x float> @llvm.masked.gather.nxv4f32.nxv4p0f32(<vscale x 4 x float*> %ptrs, i32 4, <vscale x 4 x i1> %m, <vscale x 4 x float> %passthru) 1606 ret <vscale x 4 x float> %v 1607} 1608 1609define <vscale x 4 x float> @mgather_truemask_nxv4f32(<vscale x 4 x float*> %ptrs, <vscale x 4 x float> %passthru) { 1610; RV32-LABEL: mgather_truemask_nxv4f32: 1611; RV32: # %bb.0: 1612; RV32-NEXT: vsetvli a0, zero, e32,m2,ta,mu 1613; RV32-NEXT: vloxei32.v v8, (zero), v8 1614; RV32-NEXT: ret 1615; 1616; RV64-LABEL: mgather_truemask_nxv4f32: 1617; RV64: # %bb.0: 1618; RV64-NEXT: vsetvli a0, zero, e32,m2,ta,mu 1619; RV64-NEXT: vloxei64.v v8, (zero), v8 1620; RV64-NEXT: ret 1621 %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0 1622 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer 1623 %v = call <vscale x 4 x float> @llvm.masked.gather.nxv4f32.nxv4p0f32(<vscale x 4 x float*> %ptrs, i32 4, <vscale x 4 x i1> %mtrue, <vscale x 4 x float> %passthru) 1624 ret <vscale x 4 x float> %v 1625} 1626 1627define <vscale x 4 x float> @mgather_falsemask_nxv4f32(<vscale x 4 x float*> %ptrs, <vscale x 4 x float> %passthru) { 1628; RV32-LABEL: mgather_falsemask_nxv4f32: 1629; RV32: # %bb.0: 1630; RV32-NEXT: vmv2r.v v8, v10 1631; RV32-NEXT: ret 1632; 1633; RV64-LABEL: mgather_falsemask_nxv4f32: 1634; RV64: # %bb.0: 1635; RV64-NEXT: vmv2r.v v8, v12 1636; RV64-NEXT: ret 1637 %v = call <vscale x 4 x float> @llvm.masked.gather.nxv4f32.nxv4p0f32(<vscale x 4 x float*> %ptrs, i32 4, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x float> %passthru) 1638 ret <vscale x 4 x float> %v 1639} 1640 1641declare <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*>, i32, <vscale x 8 x i1>, <vscale x 8 x float>) 1642 1643define <vscale x 8 x float> @mgather_nxv8f32(<vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) { 1644; RV32-LABEL: mgather_nxv8f32: 1645; RV32: # %bb.0: 1646; RV32-NEXT: vsetvli a0, zero, e32,m4,tu,mu 1647; RV32-NEXT: vloxei32.v v12, (zero), v8, v0.t 1648; RV32-NEXT: vmv4r.v v8, v12 1649; RV32-NEXT: ret 1650; 1651; RV64-LABEL: mgather_nxv8f32: 1652; RV64: # %bb.0: 1653; RV64-NEXT: vsetvli a0, zero, e32,m4,tu,mu 1654; RV64-NEXT: vloxei64.v v16, (zero), v8, v0.t 1655; RV64-NEXT: vmv4r.v v8, v16 1656; RV64-NEXT: ret 1657 %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) 1658 ret <vscale x 8 x float> %v 1659} 1660 1661define <vscale x 8 x float> @mgather_baseidx_nxv8i8_nxv8f32(float* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) { 1662; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8f32: 1663; RV32: # %bb.0: 1664; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 1665; RV32-NEXT: vsext.vf4 v28, v8 1666; RV32-NEXT: vsll.vi v28, v28, 2 1667; RV32-NEXT: vsetvli a1, zero, e32,m4,tu,mu 1668; RV32-NEXT: vloxei32.v v12, (a0), v28, v0.t 1669; RV32-NEXT: vmv4r.v v8, v12 1670; RV32-NEXT: ret 1671; 1672; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8f32: 1673; RV64: # %bb.0: 1674; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1675; RV64-NEXT: vsext.vf8 v16, v8 1676; RV64-NEXT: vsll.vi v16, v16, 2 1677; RV64-NEXT: vsetvli a1, zero, e32,m4,tu,mu 1678; RV64-NEXT: vloxei64.v v12, (a0), v16, v0.t 1679; RV64-NEXT: vmv4r.v v8, v12 1680; RV64-NEXT: ret 1681 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i8> %idxs 1682 %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) 1683 ret <vscale x 8 x float> %v 1684} 1685 1686define <vscale x 8 x float> @mgather_baseidx_sext_nxv8i8_nxv8f32(float* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) { 1687; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f32: 1688; RV32: # %bb.0: 1689; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 1690; RV32-NEXT: vsext.vf4 v28, v8 1691; RV32-NEXT: vsll.vi v28, v28, 2 1692; RV32-NEXT: vsetvli a1, zero, e32,m4,tu,mu 1693; RV32-NEXT: vloxei32.v v12, (a0), v28, v0.t 1694; RV32-NEXT: vmv4r.v v8, v12 1695; RV32-NEXT: ret 1696; 1697; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f32: 1698; RV64: # %bb.0: 1699; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1700; RV64-NEXT: vsext.vf8 v16, v8 1701; RV64-NEXT: vsll.vi v16, v16, 2 1702; RV64-NEXT: vsetvli a1, zero, e32,m4,tu,mu 1703; RV64-NEXT: vloxei64.v v12, (a0), v16, v0.t 1704; RV64-NEXT: vmv4r.v v8, v12 1705; RV64-NEXT: ret 1706 %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i32> 1707 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs 1708 %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) 1709 ret <vscale x 8 x float> %v 1710} 1711 1712define <vscale x 8 x float> @mgather_baseidx_zext_nxv8i8_nxv8f32(float* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) { 1713; RV32-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f32: 1714; RV32: # %bb.0: 1715; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 1716; RV32-NEXT: vzext.vf4 v28, v8 1717; RV32-NEXT: vsll.vi v28, v28, 2 1718; RV32-NEXT: vsetvli a1, zero, e32,m4,tu,mu 1719; RV32-NEXT: vloxei32.v v12, (a0), v28, v0.t 1720; RV32-NEXT: vmv4r.v v8, v12 1721; RV32-NEXT: ret 1722; 1723; RV64-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f32: 1724; RV64: # %bb.0: 1725; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1726; RV64-NEXT: vzext.vf8 v16, v8 1727; RV64-NEXT: vsll.vi v16, v16, 2 1728; RV64-NEXT: vsetvli a1, zero, e32,m4,tu,mu 1729; RV64-NEXT: vloxei64.v v12, (a0), v16, v0.t 1730; RV64-NEXT: vmv4r.v v8, v12 1731; RV64-NEXT: ret 1732 %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i32> 1733 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs 1734 %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) 1735 ret <vscale x 8 x float> %v 1736} 1737 1738define <vscale x 8 x float> @mgather_baseidx_nxv8i16_nxv8f32(float* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) { 1739; RV32-LABEL: mgather_baseidx_nxv8i16_nxv8f32: 1740; RV32: # %bb.0: 1741; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 1742; RV32-NEXT: vsext.vf2 v28, v8 1743; RV32-NEXT: vsll.vi v28, v28, 2 1744; RV32-NEXT: vsetvli a1, zero, e32,m4,tu,mu 1745; RV32-NEXT: vloxei32.v v12, (a0), v28, v0.t 1746; RV32-NEXT: vmv4r.v v8, v12 1747; RV32-NEXT: ret 1748; 1749; RV64-LABEL: mgather_baseidx_nxv8i16_nxv8f32: 1750; RV64: # %bb.0: 1751; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1752; RV64-NEXT: vsext.vf4 v16, v8 1753; RV64-NEXT: vsll.vi v16, v16, 2 1754; RV64-NEXT: vsetvli a1, zero, e32,m4,tu,mu 1755; RV64-NEXT: vloxei64.v v12, (a0), v16, v0.t 1756; RV64-NEXT: vmv4r.v v8, v12 1757; RV64-NEXT: ret 1758 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i16> %idxs 1759 %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) 1760 ret <vscale x 8 x float> %v 1761} 1762 1763define <vscale x 8 x float> @mgather_baseidx_sext_nxv8i16_nxv8f32(float* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) { 1764; RV32-LABEL: mgather_baseidx_sext_nxv8i16_nxv8f32: 1765; RV32: # %bb.0: 1766; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 1767; RV32-NEXT: vsext.vf2 v28, v8 1768; RV32-NEXT: vsll.vi v28, v28, 2 1769; RV32-NEXT: vsetvli a1, zero, e32,m4,tu,mu 1770; RV32-NEXT: vloxei32.v v12, (a0), v28, v0.t 1771; RV32-NEXT: vmv4r.v v8, v12 1772; RV32-NEXT: ret 1773; 1774; RV64-LABEL: mgather_baseidx_sext_nxv8i16_nxv8f32: 1775; RV64: # %bb.0: 1776; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1777; RV64-NEXT: vsext.vf4 v16, v8 1778; RV64-NEXT: vsll.vi v16, v16, 2 1779; RV64-NEXT: vsetvli a1, zero, e32,m4,tu,mu 1780; RV64-NEXT: vloxei64.v v12, (a0), v16, v0.t 1781; RV64-NEXT: vmv4r.v v8, v12 1782; RV64-NEXT: ret 1783 %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i32> 1784 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs 1785 %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) 1786 ret <vscale x 8 x float> %v 1787} 1788 1789define <vscale x 8 x float> @mgather_baseidx_zext_nxv8i16_nxv8f32(float* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) { 1790; RV32-LABEL: mgather_baseidx_zext_nxv8i16_nxv8f32: 1791; RV32: # %bb.0: 1792; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 1793; RV32-NEXT: vzext.vf2 v28, v8 1794; RV32-NEXT: vsll.vi v28, v28, 2 1795; RV32-NEXT: vsetvli a1, zero, e32,m4,tu,mu 1796; RV32-NEXT: vloxei32.v v12, (a0), v28, v0.t 1797; RV32-NEXT: vmv4r.v v8, v12 1798; RV32-NEXT: ret 1799; 1800; RV64-LABEL: mgather_baseidx_zext_nxv8i16_nxv8f32: 1801; RV64: # %bb.0: 1802; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1803; RV64-NEXT: vzext.vf4 v16, v8 1804; RV64-NEXT: vsll.vi v16, v16, 2 1805; RV64-NEXT: vsetvli a1, zero, e32,m4,tu,mu 1806; RV64-NEXT: vloxei64.v v12, (a0), v16, v0.t 1807; RV64-NEXT: vmv4r.v v8, v12 1808; RV64-NEXT: ret 1809 %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i32> 1810 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs 1811 %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) 1812 ret <vscale x 8 x float> %v 1813} 1814 1815define <vscale x 8 x float> @mgather_baseidx_nxv8f32(float* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) { 1816; RV32-LABEL: mgather_baseidx_nxv8f32: 1817; RV32: # %bb.0: 1818; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 1819; RV32-NEXT: vsll.vi v28, v8, 2 1820; RV32-NEXT: vsetvli a1, zero, e32,m4,tu,mu 1821; RV32-NEXT: vloxei32.v v12, (a0), v28, v0.t 1822; RV32-NEXT: vmv4r.v v8, v12 1823; RV32-NEXT: ret 1824; 1825; RV64-LABEL: mgather_baseidx_nxv8f32: 1826; RV64: # %bb.0: 1827; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1828; RV64-NEXT: vsext.vf2 v16, v8 1829; RV64-NEXT: vsll.vi v16, v16, 2 1830; RV64-NEXT: vsetvli a1, zero, e32,m4,tu,mu 1831; RV64-NEXT: vloxei64.v v12, (a0), v16, v0.t 1832; RV64-NEXT: vmv4r.v v8, v12 1833; RV64-NEXT: ret 1834 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %idxs 1835 %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) 1836 ret <vscale x 8 x float> %v 1837} 1838 1839declare <vscale x 1 x double> @llvm.masked.gather.nxv1f64.nxv1p0f64(<vscale x 1 x double*>, i32, <vscale x 1 x i1>, <vscale x 1 x double>) 1840 1841define <vscale x 1 x double> @mgather_nxv1f64(<vscale x 1 x double*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x double> %passthru) { 1842; RV32-LABEL: mgather_nxv1f64: 1843; RV32: # %bb.0: 1844; RV32-NEXT: vsetvli a0, zero, e64,m1,tu,mu 1845; RV32-NEXT: vloxei32.v v9, (zero), v8, v0.t 1846; RV32-NEXT: vmv1r.v v8, v9 1847; RV32-NEXT: ret 1848; 1849; RV64-LABEL: mgather_nxv1f64: 1850; RV64: # %bb.0: 1851; RV64-NEXT: vsetvli a0, zero, e64,m1,tu,mu 1852; RV64-NEXT: vloxei64.v v9, (zero), v8, v0.t 1853; RV64-NEXT: vmv1r.v v8, v9 1854; RV64-NEXT: ret 1855 %v = call <vscale x 1 x double> @llvm.masked.gather.nxv1f64.nxv1p0f64(<vscale x 1 x double*> %ptrs, i32 8, <vscale x 1 x i1> %m, <vscale x 1 x double> %passthru) 1856 ret <vscale x 1 x double> %v 1857} 1858 1859declare <vscale x 2 x double> @llvm.masked.gather.nxv2f64.nxv2p0f64(<vscale x 2 x double*>, i32, <vscale x 2 x i1>, <vscale x 2 x double>) 1860 1861define <vscale x 2 x double> @mgather_nxv2f64(<vscale x 2 x double*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x double> %passthru) { 1862; RV32-LABEL: mgather_nxv2f64: 1863; RV32: # %bb.0: 1864; RV32-NEXT: vsetvli a0, zero, e64,m2,tu,mu 1865; RV32-NEXT: vloxei32.v v10, (zero), v8, v0.t 1866; RV32-NEXT: vmv2r.v v8, v10 1867; RV32-NEXT: ret 1868; 1869; RV64-LABEL: mgather_nxv2f64: 1870; RV64: # %bb.0: 1871; RV64-NEXT: vsetvli a0, zero, e64,m2,tu,mu 1872; RV64-NEXT: vloxei64.v v10, (zero), v8, v0.t 1873; RV64-NEXT: vmv2r.v v8, v10 1874; RV64-NEXT: ret 1875 %v = call <vscale x 2 x double> @llvm.masked.gather.nxv2f64.nxv2p0f64(<vscale x 2 x double*> %ptrs, i32 8, <vscale x 2 x i1> %m, <vscale x 2 x double> %passthru) 1876 ret <vscale x 2 x double> %v 1877} 1878 1879declare <vscale x 4 x double> @llvm.masked.gather.nxv4f64.nxv4p0f64(<vscale x 4 x double*>, i32, <vscale x 4 x i1>, <vscale x 4 x double>) 1880 1881define <vscale x 4 x double> @mgather_nxv4f64(<vscale x 4 x double*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x double> %passthru) { 1882; RV32-LABEL: mgather_nxv4f64: 1883; RV32: # %bb.0: 1884; RV32-NEXT: vsetvli a0, zero, e64,m4,tu,mu 1885; RV32-NEXT: vloxei32.v v12, (zero), v8, v0.t 1886; RV32-NEXT: vmv4r.v v8, v12 1887; RV32-NEXT: ret 1888; 1889; RV64-LABEL: mgather_nxv4f64: 1890; RV64: # %bb.0: 1891; RV64-NEXT: vsetvli a0, zero, e64,m4,tu,mu 1892; RV64-NEXT: vloxei64.v v12, (zero), v8, v0.t 1893; RV64-NEXT: vmv4r.v v8, v12 1894; RV64-NEXT: ret 1895 %v = call <vscale x 4 x double> @llvm.masked.gather.nxv4f64.nxv4p0f64(<vscale x 4 x double*> %ptrs, i32 8, <vscale x 4 x i1> %m, <vscale x 4 x double> %passthru) 1896 ret <vscale x 4 x double> %v 1897} 1898 1899define <vscale x 4 x double> @mgather_truemask_nxv4f64(<vscale x 4 x double*> %ptrs, <vscale x 4 x double> %passthru) { 1900; RV32-LABEL: mgather_truemask_nxv4f64: 1901; RV32: # %bb.0: 1902; RV32-NEXT: vsetvli a0, zero, e64,m4,ta,mu 1903; RV32-NEXT: vloxei32.v v8, (zero), v8 1904; RV32-NEXT: ret 1905; 1906; RV64-LABEL: mgather_truemask_nxv4f64: 1907; RV64: # %bb.0: 1908; RV64-NEXT: vsetvli a0, zero, e64,m4,ta,mu 1909; RV64-NEXT: vloxei64.v v8, (zero), v8 1910; RV64-NEXT: ret 1911 %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0 1912 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer 1913 %v = call <vscale x 4 x double> @llvm.masked.gather.nxv4f64.nxv4p0f64(<vscale x 4 x double*> %ptrs, i32 8, <vscale x 4 x i1> %mtrue, <vscale x 4 x double> %passthru) 1914 ret <vscale x 4 x double> %v 1915} 1916 1917define <vscale x 4 x double> @mgather_falsemask_nxv4f64(<vscale x 4 x double*> %ptrs, <vscale x 4 x double> %passthru) { 1918; RV32-LABEL: mgather_falsemask_nxv4f64: 1919; RV32: # %bb.0: 1920; RV32-NEXT: vmv4r.v v8, v12 1921; RV32-NEXT: ret 1922; 1923; RV64-LABEL: mgather_falsemask_nxv4f64: 1924; RV64: # %bb.0: 1925; RV64-NEXT: vmv4r.v v8, v12 1926; RV64-NEXT: ret 1927 %v = call <vscale x 4 x double> @llvm.masked.gather.nxv4f64.nxv4p0f64(<vscale x 4 x double*> %ptrs, i32 8, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x double> %passthru) 1928 ret <vscale x 4 x double> %v 1929} 1930 1931declare <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*>, i32, <vscale x 8 x i1>, <vscale x 8 x double>) 1932 1933define <vscale x 8 x double> @mgather_nxv8f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) { 1934; RV32-LABEL: mgather_nxv8f64: 1935; RV32: # %bb.0: 1936; RV32-NEXT: vsetvli a0, zero, e64,m8,tu,mu 1937; RV32-NEXT: vloxei32.v v16, (zero), v8, v0.t 1938; RV32-NEXT: vmv8r.v v8, v16 1939; RV32-NEXT: ret 1940; 1941; RV64-LABEL: mgather_nxv8f64: 1942; RV64: # %bb.0: 1943; RV64-NEXT: vsetvli a0, zero, e64,m8,tu,mu 1944; RV64-NEXT: vloxei64.v v16, (zero), v8, v0.t 1945; RV64-NEXT: vmv8r.v v8, v16 1946; RV64-NEXT: ret 1947 %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) 1948 ret <vscale x 8 x double> %v 1949} 1950 1951define <vscale x 8 x double> @mgather_baseidx_nxv8i8_nxv8f64(double* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) { 1952; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8f64: 1953; RV32: # %bb.0: 1954; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 1955; RV32-NEXT: vsext.vf4 v28, v8 1956; RV32-NEXT: vsll.vi v28, v28, 3 1957; RV32-NEXT: vsetvli a1, zero, e64,m8,tu,mu 1958; RV32-NEXT: vloxei32.v v16, (a0), v28, v0.t 1959; RV32-NEXT: vmv8r.v v8, v16 1960; RV32-NEXT: ret 1961; 1962; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8f64: 1963; RV64: # %bb.0: 1964; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1965; RV64-NEXT: vsext.vf8 v24, v8 1966; RV64-NEXT: vsll.vi v8, v24, 3 1967; RV64-NEXT: vsetvli a1, zero, e64,m8,tu,mu 1968; RV64-NEXT: vloxei64.v v16, (a0), v8, v0.t 1969; RV64-NEXT: vmv8r.v v8, v16 1970; RV64-NEXT: ret 1971 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i8> %idxs 1972 %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) 1973 ret <vscale x 8 x double> %v 1974} 1975 1976define <vscale x 8 x double> @mgather_baseidx_sext_nxv8i8_nxv8f64(double* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) { 1977; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f64: 1978; RV32: # %bb.0: 1979; RV32-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1980; RV32-NEXT: vsext.vf8 v24, v8 1981; RV32-NEXT: vsll.vi v8, v24, 3 1982; RV32-NEXT: vsetvli a1, zero, e64,m8,tu,mu 1983; RV32-NEXT: vloxei64.v v16, (a0), v8, v0.t 1984; RV32-NEXT: vmv8r.v v8, v16 1985; RV32-NEXT: ret 1986; 1987; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f64: 1988; RV64: # %bb.0: 1989; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 1990; RV64-NEXT: vsext.vf8 v24, v8 1991; RV64-NEXT: vsll.vi v8, v24, 3 1992; RV64-NEXT: vsetvli a1, zero, e64,m8,tu,mu 1993; RV64-NEXT: vloxei64.v v16, (a0), v8, v0.t 1994; RV64-NEXT: vmv8r.v v8, v16 1995; RV64-NEXT: ret 1996 %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i64> 1997 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs 1998 %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) 1999 ret <vscale x 8 x double> %v 2000} 2001 2002define <vscale x 8 x double> @mgather_baseidx_zext_nxv8i8_nxv8f64(double* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) { 2003; RV32-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f64: 2004; RV32: # %bb.0: 2005; RV32-NEXT: vsetvli a1, zero, e64,m8,ta,mu 2006; RV32-NEXT: vzext.vf8 v24, v8 2007; RV32-NEXT: vsll.vi v8, v24, 3 2008; RV32-NEXT: vsetvli a1, zero, e64,m8,tu,mu 2009; RV32-NEXT: vloxei64.v v16, (a0), v8, v0.t 2010; RV32-NEXT: vmv8r.v v8, v16 2011; RV32-NEXT: ret 2012; 2013; RV64-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f64: 2014; RV64: # %bb.0: 2015; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 2016; RV64-NEXT: vzext.vf8 v24, v8 2017; RV64-NEXT: vsll.vi v8, v24, 3 2018; RV64-NEXT: vsetvli a1, zero, e64,m8,tu,mu 2019; RV64-NEXT: vloxei64.v v16, (a0), v8, v0.t 2020; RV64-NEXT: vmv8r.v v8, v16 2021; RV64-NEXT: ret 2022 %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i64> 2023 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs 2024 %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) 2025 ret <vscale x 8 x double> %v 2026} 2027 2028define <vscale x 8 x double> @mgather_baseidx_nxv8i16_nxv8f64(double* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) { 2029; RV32-LABEL: mgather_baseidx_nxv8i16_nxv8f64: 2030; RV32: # %bb.0: 2031; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 2032; RV32-NEXT: vsext.vf2 v28, v8 2033; RV32-NEXT: vsll.vi v28, v28, 3 2034; RV32-NEXT: vsetvli a1, zero, e64,m8,tu,mu 2035; RV32-NEXT: vloxei32.v v16, (a0), v28, v0.t 2036; RV32-NEXT: vmv8r.v v8, v16 2037; RV32-NEXT: ret 2038; 2039; RV64-LABEL: mgather_baseidx_nxv8i16_nxv8f64: 2040; RV64: # %bb.0: 2041; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 2042; RV64-NEXT: vsext.vf4 v24, v8 2043; RV64-NEXT: vsll.vi v8, v24, 3 2044; RV64-NEXT: vsetvli a1, zero, e64,m8,tu,mu 2045; RV64-NEXT: vloxei64.v v16, (a0), v8, v0.t 2046; RV64-NEXT: vmv8r.v v8, v16 2047; RV64-NEXT: ret 2048 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i16> %idxs 2049 %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) 2050 ret <vscale x 8 x double> %v 2051} 2052 2053define <vscale x 8 x double> @mgather_baseidx_sext_nxv8i16_nxv8f64(double* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) { 2054; RV32-LABEL: mgather_baseidx_sext_nxv8i16_nxv8f64: 2055; RV32: # %bb.0: 2056; RV32-NEXT: vsetvli a1, zero, e64,m8,ta,mu 2057; RV32-NEXT: vsext.vf4 v24, v8 2058; RV32-NEXT: vsll.vi v8, v24, 3 2059; RV32-NEXT: vsetvli a1, zero, e64,m8,tu,mu 2060; RV32-NEXT: vloxei64.v v16, (a0), v8, v0.t 2061; RV32-NEXT: vmv8r.v v8, v16 2062; RV32-NEXT: ret 2063; 2064; RV64-LABEL: mgather_baseidx_sext_nxv8i16_nxv8f64: 2065; RV64: # %bb.0: 2066; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 2067; RV64-NEXT: vsext.vf4 v24, v8 2068; RV64-NEXT: vsll.vi v8, v24, 3 2069; RV64-NEXT: vsetvli a1, zero, e64,m8,tu,mu 2070; RV64-NEXT: vloxei64.v v16, (a0), v8, v0.t 2071; RV64-NEXT: vmv8r.v v8, v16 2072; RV64-NEXT: ret 2073 %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i64> 2074 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs 2075 %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) 2076 ret <vscale x 8 x double> %v 2077} 2078 2079define <vscale x 8 x double> @mgather_baseidx_zext_nxv8i16_nxv8f64(double* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) { 2080; RV32-LABEL: mgather_baseidx_zext_nxv8i16_nxv8f64: 2081; RV32: # %bb.0: 2082; RV32-NEXT: vsetvli a1, zero, e64,m8,ta,mu 2083; RV32-NEXT: vzext.vf4 v24, v8 2084; RV32-NEXT: vsll.vi v8, v24, 3 2085; RV32-NEXT: vsetvli a1, zero, e64,m8,tu,mu 2086; RV32-NEXT: vloxei64.v v16, (a0), v8, v0.t 2087; RV32-NEXT: vmv8r.v v8, v16 2088; RV32-NEXT: ret 2089; 2090; RV64-LABEL: mgather_baseidx_zext_nxv8i16_nxv8f64: 2091; RV64: # %bb.0: 2092; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 2093; RV64-NEXT: vzext.vf4 v24, v8 2094; RV64-NEXT: vsll.vi v8, v24, 3 2095; RV64-NEXT: vsetvli a1, zero, e64,m8,tu,mu 2096; RV64-NEXT: vloxei64.v v16, (a0), v8, v0.t 2097; RV64-NEXT: vmv8r.v v8, v16 2098; RV64-NEXT: ret 2099 %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i64> 2100 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs 2101 %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) 2102 ret <vscale x 8 x double> %v 2103} 2104 2105define <vscale x 8 x double> @mgather_baseidx_nxv8i32_nxv8f64(double* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) { 2106; RV32-LABEL: mgather_baseidx_nxv8i32_nxv8f64: 2107; RV32: # %bb.0: 2108; RV32-NEXT: vsetvli a1, zero, e32,m4,ta,mu 2109; RV32-NEXT: vsll.vi v28, v8, 3 2110; RV32-NEXT: vsetvli a1, zero, e64,m8,tu,mu 2111; RV32-NEXT: vloxei32.v v16, (a0), v28, v0.t 2112; RV32-NEXT: vmv8r.v v8, v16 2113; RV32-NEXT: ret 2114; 2115; RV64-LABEL: mgather_baseidx_nxv8i32_nxv8f64: 2116; RV64: # %bb.0: 2117; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 2118; RV64-NEXT: vsext.vf2 v24, v8 2119; RV64-NEXT: vsll.vi v8, v24, 3 2120; RV64-NEXT: vsetvli a1, zero, e64,m8,tu,mu 2121; RV64-NEXT: vloxei64.v v16, (a0), v8, v0.t 2122; RV64-NEXT: vmv8r.v v8, v16 2123; RV64-NEXT: ret 2124 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i32> %idxs 2125 %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) 2126 ret <vscale x 8 x double> %v 2127} 2128 2129define <vscale x 8 x double> @mgather_baseidx_sext_nxv8i32_nxv8f64(double* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) { 2130; RV32-LABEL: mgather_baseidx_sext_nxv8i32_nxv8f64: 2131; RV32: # %bb.0: 2132; RV32-NEXT: vsetvli a1, zero, e64,m8,ta,mu 2133; RV32-NEXT: vsext.vf2 v24, v8 2134; RV32-NEXT: vsll.vi v8, v24, 3 2135; RV32-NEXT: vsetvli a1, zero, e64,m8,tu,mu 2136; RV32-NEXT: vloxei64.v v16, (a0), v8, v0.t 2137; RV32-NEXT: vmv8r.v v8, v16 2138; RV32-NEXT: ret 2139; 2140; RV64-LABEL: mgather_baseidx_sext_nxv8i32_nxv8f64: 2141; RV64: # %bb.0: 2142; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 2143; RV64-NEXT: vsext.vf2 v24, v8 2144; RV64-NEXT: vsll.vi v8, v24, 3 2145; RV64-NEXT: vsetvli a1, zero, e64,m8,tu,mu 2146; RV64-NEXT: vloxei64.v v16, (a0), v8, v0.t 2147; RV64-NEXT: vmv8r.v v8, v16 2148; RV64-NEXT: ret 2149 %eidxs = sext <vscale x 8 x i32> %idxs to <vscale x 8 x i64> 2150 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs 2151 %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) 2152 ret <vscale x 8 x double> %v 2153} 2154 2155define <vscale x 8 x double> @mgather_baseidx_zext_nxv8i32_nxv8f64(double* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) { 2156; RV32-LABEL: mgather_baseidx_zext_nxv8i32_nxv8f64: 2157; RV32: # %bb.0: 2158; RV32-NEXT: vsetvli a1, zero, e64,m8,ta,mu 2159; RV32-NEXT: vzext.vf2 v24, v8 2160; RV32-NEXT: vsll.vi v8, v24, 3 2161; RV32-NEXT: vsetvli a1, zero, e64,m8,tu,mu 2162; RV32-NEXT: vloxei64.v v16, (a0), v8, v0.t 2163; RV32-NEXT: vmv8r.v v8, v16 2164; RV32-NEXT: ret 2165; 2166; RV64-LABEL: mgather_baseidx_zext_nxv8i32_nxv8f64: 2167; RV64: # %bb.0: 2168; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 2169; RV64-NEXT: vzext.vf2 v24, v8 2170; RV64-NEXT: vsll.vi v8, v24, 3 2171; RV64-NEXT: vsetvli a1, zero, e64,m8,tu,mu 2172; RV64-NEXT: vloxei64.v v16, (a0), v8, v0.t 2173; RV64-NEXT: vmv8r.v v8, v16 2174; RV64-NEXT: ret 2175 %eidxs = zext <vscale x 8 x i32> %idxs to <vscale x 8 x i64> 2176 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs 2177 %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) 2178 ret <vscale x 8 x double> %v 2179} 2180 2181define <vscale x 8 x double> @mgather_baseidx_nxv8f64(double* %base, <vscale x 8 x i64> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) { 2182; RV32-LABEL: mgather_baseidx_nxv8f64: 2183; RV32: # %bb.0: 2184; RV32-NEXT: vsetvli a1, zero, e64,m8,ta,mu 2185; RV32-NEXT: vsll.vi v8, v8, 3 2186; RV32-NEXT: vsetvli a1, zero, e64,m8,tu,mu 2187; RV32-NEXT: vloxei64.v v16, (a0), v8, v0.t 2188; RV32-NEXT: vmv8r.v v8, v16 2189; RV32-NEXT: ret 2190; 2191; RV64-LABEL: mgather_baseidx_nxv8f64: 2192; RV64: # %bb.0: 2193; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 2194; RV64-NEXT: vsll.vi v8, v8, 3 2195; RV64-NEXT: vsetvli a1, zero, e64,m8,tu,mu 2196; RV64-NEXT: vloxei64.v v16, (a0), v8, v0.t 2197; RV64-NEXT: vmv8r.v v8, v16 2198; RV64-NEXT: ret 2199 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %idxs 2200 %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) 2201 ret <vscale x 8 x double> %v 2202} 2203 2204declare <vscale x 16 x i8> @llvm.masked.gather.nxv16i8.nxv16p0i8(<vscale x 16 x i8*>, i32, <vscale x 16 x i1>, <vscale x 16 x i8>) 2205 2206define <vscale x 16 x i8> @mgather_baseidx_nxv16i8(i8* %base, <vscale x 16 x i8> %idxs, <vscale x 16 x i1> %m, <vscale x 16 x i8> %passthru) { 2207; RV32-LABEL: mgather_baseidx_nxv16i8: 2208; RV32: # %bb.0: 2209; RV32-NEXT: vsetvli a1, zero, e32,m8,ta,mu 2210; RV32-NEXT: vsext.vf4 v16, v8 2211; RV32-NEXT: vsetvli a1, zero, e8,m2,tu,mu 2212; RV32-NEXT: vloxei32.v v10, (a0), v16, v0.t 2213; RV32-NEXT: vmv2r.v v8, v10 2214; RV32-NEXT: ret 2215; 2216; RV64-LABEL: mgather_baseidx_nxv16i8: 2217; RV64: # %bb.0: 2218; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 2219; RV64-NEXT: vsext.vf8 v16, v8 2220; RV64-NEXT: vsetvli a1, zero, e8,m1,tu,mu 2221; RV64-NEXT: vloxei64.v v10, (a0), v16, v0.t 2222; RV64-NEXT: csrr a1, vlenb 2223; RV64-NEXT: srli a1, a1, 3 2224; RV64-NEXT: vsetvli a2, zero, e8,mf4,ta,mu 2225; RV64-NEXT: vslidedown.vx v0, v0, a1 2226; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 2227; RV64-NEXT: vsext.vf8 v16, v9 2228; RV64-NEXT: vsetvli a1, zero, e8,m1,tu,mu 2229; RV64-NEXT: vloxei64.v v11, (a0), v16, v0.t 2230; RV64-NEXT: vmv2r.v v8, v10 2231; RV64-NEXT: ret 2232 %ptrs = getelementptr inbounds i8, i8* %base, <vscale x 16 x i8> %idxs 2233 %v = call <vscale x 16 x i8> @llvm.masked.gather.nxv16i8.nxv16p0i8(<vscale x 16 x i8*> %ptrs, i32 2, <vscale x 16 x i1> %m, <vscale x 16 x i8> %passthru) 2234 ret <vscale x 16 x i8> %v 2235} 2236 2237declare <vscale x 32 x i8> @llvm.masked.gather.nxv32i8.nxv32p0i8(<vscale x 32 x i8*>, i32, <vscale x 32 x i1>, <vscale x 32 x i8>) 2238 2239define <vscale x 32 x i8> @mgather_baseidx_nxv32i8(i8* %base, <vscale x 32 x i8> %idxs, <vscale x 32 x i1> %m, <vscale x 32 x i8> %passthru) { 2240; RV32-LABEL: mgather_baseidx_nxv32i8: 2241; RV32: # %bb.0: 2242; RV32-NEXT: vsetvli a1, zero, e32,m8,ta,mu 2243; RV32-NEXT: vsext.vf4 v16, v8 2244; RV32-NEXT: vsetvli a1, zero, e8,m2,tu,mu 2245; RV32-NEXT: vloxei32.v v12, (a0), v16, v0.t 2246; RV32-NEXT: csrr a1, vlenb 2247; RV32-NEXT: srli a1, a1, 2 2248; RV32-NEXT: vsetvli a2, zero, e8,mf2,ta,mu 2249; RV32-NEXT: vslidedown.vx v0, v0, a1 2250; RV32-NEXT: vsetvli a1, zero, e32,m8,ta,mu 2251; RV32-NEXT: vsext.vf4 v16, v10 2252; RV32-NEXT: vsetvli a1, zero, e8,m2,tu,mu 2253; RV32-NEXT: vloxei32.v v14, (a0), v16, v0.t 2254; RV32-NEXT: vmv4r.v v8, v12 2255; RV32-NEXT: ret 2256; 2257; RV64-LABEL: mgather_baseidx_nxv32i8: 2258; RV64: # %bb.0: 2259; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 2260; RV64-NEXT: vsext.vf8 v16, v8 2261; RV64-NEXT: vsetvli a1, zero, e8,m1,tu,mu 2262; RV64-NEXT: vloxei64.v v12, (a0), v16, v0.t 2263; RV64-NEXT: csrr a1, vlenb 2264; RV64-NEXT: srli a1, a1, 3 2265; RV64-NEXT: vsetvli a2, zero, e8,mf4,ta,mu 2266; RV64-NEXT: vslidedown.vx v25, v0, a1 2267; RV64-NEXT: vmv1r.v v26, v0 2268; RV64-NEXT: vsetvli a2, zero, e64,m8,ta,mu 2269; RV64-NEXT: vsext.vf8 v16, v9 2270; RV64-NEXT: vsetvli a2, zero, e8,m1,tu,mu 2271; RV64-NEXT: vmv1r.v v0, v25 2272; RV64-NEXT: vloxei64.v v13, (a0), v16, v0.t 2273; RV64-NEXT: slli a2, a1, 1 2274; RV64-NEXT: vsetvli a3, zero, e8,mf2,ta,mu 2275; RV64-NEXT: vslidedown.vx v26, v26, a2 2276; RV64-NEXT: vsetvli a2, zero, e8,mf4,ta,mu 2277; RV64-NEXT: vslidedown.vx v0, v26, a1 2278; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 2279; RV64-NEXT: vsext.vf8 v16, v11 2280; RV64-NEXT: vsetvli a1, zero, e8,m1,tu,mu 2281; RV64-NEXT: vloxei64.v v15, (a0), v16, v0.t 2282; RV64-NEXT: vsetvli a1, zero, e64,m8,ta,mu 2283; RV64-NEXT: vsext.vf8 v16, v10 2284; RV64-NEXT: vsetvli a1, zero, e8,m1,tu,mu 2285; RV64-NEXT: vmv1r.v v0, v26 2286; RV64-NEXT: vloxei64.v v14, (a0), v16, v0.t 2287; RV64-NEXT: vmv4r.v v8, v12 2288; RV64-NEXT: ret 2289 %ptrs = getelementptr inbounds i8, i8* %base, <vscale x 32 x i8> %idxs 2290 %v = call <vscale x 32 x i8> @llvm.masked.gather.nxv32i8.nxv32p0i8(<vscale x 32 x i8*> %ptrs, i32 2, <vscale x 32 x i1> %m, <vscale x 32 x i8> %passthru) 2291 ret <vscale x 32 x i8> %v 2292} 2293