1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=riscv32 -mattr=+m,+d,+experimental-zfh,+experimental-v -target-abi=ilp32d \ 3; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefix=RV32 4; RUN: llc -mtriple=riscv64 -mattr=+m,+d,+experimental-zfh,+experimental-v -target-abi=lp64d \ 5; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefix=RV64 6 7declare <vscale x 1 x i8> @llvm.masked.gather.nxv1i8.nxv1p0i8(<vscale x 1 x i8*>, i32, <vscale x 1 x i1>, <vscale x 1 x i8>) 8 9define <vscale x 1 x i8> @mgather_nxv1i8(<vscale x 1 x i8*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x i8> %passthru) { 10; RV32-LABEL: mgather_nxv1i8: 11; RV32: # %bb.0: 12; RV32-NEXT: vsetvli a0, zero, e8, mf8, ta, mu 13; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 14; RV32-NEXT: vmv1r.v v8, v9 15; RV32-NEXT: ret 16; 17; RV64-LABEL: mgather_nxv1i8: 18; RV64: # %bb.0: 19; RV64-NEXT: vsetvli a0, zero, e8, mf8, ta, mu 20; RV64-NEXT: vluxei64.v v9, (zero), v8, v0.t 21; RV64-NEXT: vmv1r.v v8, v9 22; RV64-NEXT: ret 23 %v = call <vscale x 1 x i8> @llvm.masked.gather.nxv1i8.nxv1p0i8(<vscale x 1 x i8*> %ptrs, i32 1, <vscale x 1 x i1> %m, <vscale x 1 x i8> %passthru) 24 ret <vscale x 1 x i8> %v 25} 26 27declare <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*>, i32, <vscale x 2 x i1>, <vscale x 2 x i8>) 28 29define <vscale x 2 x i8> @mgather_nxv2i8(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) { 30; RV32-LABEL: mgather_nxv2i8: 31; RV32: # %bb.0: 32; RV32-NEXT: vsetvli a0, zero, e8, mf4, ta, mu 33; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 34; RV32-NEXT: vmv1r.v v8, v9 35; RV32-NEXT: ret 36; 37; RV64-LABEL: mgather_nxv2i8: 38; RV64: # %bb.0: 39; RV64-NEXT: vsetvli a0, zero, e8, mf4, ta, mu 40; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 41; RV64-NEXT: vmv1r.v v8, v10 42; RV64-NEXT: ret 43 %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) 44 ret <vscale x 2 x i8> %v 45} 46 47define <vscale x 2 x i16> @mgather_nxv2i8_sextload_nxv2i16(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) { 48; RV32-LABEL: mgather_nxv2i8_sextload_nxv2i16: 49; RV32: # %bb.0: 50; RV32-NEXT: vsetvli a0, zero, e8, mf4, ta, mu 51; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 52; RV32-NEXT: vsetvli zero, zero, e16, mf2, ta, mu 53; RV32-NEXT: vsext.vf2 v8, v9 54; RV32-NEXT: ret 55; 56; RV64-LABEL: mgather_nxv2i8_sextload_nxv2i16: 57; RV64: # %bb.0: 58; RV64-NEXT: vsetvli a0, zero, e8, mf4, ta, mu 59; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 60; RV64-NEXT: vsetvli zero, zero, e16, mf2, ta, mu 61; RV64-NEXT: vsext.vf2 v8, v10 62; RV64-NEXT: ret 63 %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) 64 %ev = sext <vscale x 2 x i8> %v to <vscale x 2 x i16> 65 ret <vscale x 2 x i16> %ev 66} 67 68define <vscale x 2 x i16> @mgather_nxv2i8_zextload_nxv2i16(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) { 69; RV32-LABEL: mgather_nxv2i8_zextload_nxv2i16: 70; RV32: # %bb.0: 71; RV32-NEXT: vsetvli a0, zero, e8, mf4, ta, mu 72; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 73; RV32-NEXT: vsetvli zero, zero, e16, mf2, ta, mu 74; RV32-NEXT: vzext.vf2 v8, v9 75; RV32-NEXT: ret 76; 77; RV64-LABEL: mgather_nxv2i8_zextload_nxv2i16: 78; RV64: # %bb.0: 79; RV64-NEXT: vsetvli a0, zero, e8, mf4, ta, mu 80; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 81; RV64-NEXT: vsetvli zero, zero, e16, mf2, ta, mu 82; RV64-NEXT: vzext.vf2 v8, v10 83; RV64-NEXT: ret 84 %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) 85 %ev = zext <vscale x 2 x i8> %v to <vscale x 2 x i16> 86 ret <vscale x 2 x i16> %ev 87} 88 89define <vscale x 2 x i32> @mgather_nxv2i8_sextload_nxv2i32(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) { 90; RV32-LABEL: mgather_nxv2i8_sextload_nxv2i32: 91; RV32: # %bb.0: 92; RV32-NEXT: vsetvli a0, zero, e8, mf4, ta, mu 93; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 94; RV32-NEXT: vsetvli zero, zero, e32, m1, ta, mu 95; RV32-NEXT: vsext.vf4 v8, v9 96; RV32-NEXT: ret 97; 98; RV64-LABEL: mgather_nxv2i8_sextload_nxv2i32: 99; RV64: # %bb.0: 100; RV64-NEXT: vsetvli a0, zero, e8, mf4, ta, mu 101; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 102; RV64-NEXT: vsetvli zero, zero, e32, m1, ta, mu 103; RV64-NEXT: vsext.vf4 v8, v10 104; RV64-NEXT: ret 105 %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) 106 %ev = sext <vscale x 2 x i8> %v to <vscale x 2 x i32> 107 ret <vscale x 2 x i32> %ev 108} 109 110define <vscale x 2 x i32> @mgather_nxv2i8_zextload_nxv2i32(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) { 111; RV32-LABEL: mgather_nxv2i8_zextload_nxv2i32: 112; RV32: # %bb.0: 113; RV32-NEXT: vsetvli a0, zero, e8, mf4, ta, mu 114; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 115; RV32-NEXT: vsetvli zero, zero, e32, m1, ta, mu 116; RV32-NEXT: vzext.vf4 v8, v9 117; RV32-NEXT: ret 118; 119; RV64-LABEL: mgather_nxv2i8_zextload_nxv2i32: 120; RV64: # %bb.0: 121; RV64-NEXT: vsetvli a0, zero, e8, mf4, ta, mu 122; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 123; RV64-NEXT: vsetvli zero, zero, e32, m1, ta, mu 124; RV64-NEXT: vzext.vf4 v8, v10 125; RV64-NEXT: ret 126 %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) 127 %ev = zext <vscale x 2 x i8> %v to <vscale x 2 x i32> 128 ret <vscale x 2 x i32> %ev 129} 130 131define <vscale x 2 x i64> @mgather_nxv2i8_sextload_nxv2i64(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) { 132; RV32-LABEL: mgather_nxv2i8_sextload_nxv2i64: 133; RV32: # %bb.0: 134; RV32-NEXT: vsetvli a0, zero, e8, mf4, ta, mu 135; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 136; RV32-NEXT: vsetvli zero, zero, e64, m2, ta, mu 137; RV32-NEXT: vsext.vf8 v10, v9 138; RV32-NEXT: vmv2r.v v8, v10 139; RV32-NEXT: ret 140; 141; RV64-LABEL: mgather_nxv2i8_sextload_nxv2i64: 142; RV64: # %bb.0: 143; RV64-NEXT: vsetvli a0, zero, e8, mf4, ta, mu 144; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 145; RV64-NEXT: vsetvli zero, zero, e64, m2, ta, mu 146; RV64-NEXT: vsext.vf8 v8, v10 147; RV64-NEXT: ret 148 %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) 149 %ev = sext <vscale x 2 x i8> %v to <vscale x 2 x i64> 150 ret <vscale x 2 x i64> %ev 151} 152 153define <vscale x 2 x i64> @mgather_nxv2i8_zextload_nxv2i64(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) { 154; RV32-LABEL: mgather_nxv2i8_zextload_nxv2i64: 155; RV32: # %bb.0: 156; RV32-NEXT: vsetvli a0, zero, e8, mf4, ta, mu 157; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 158; RV32-NEXT: vsetvli zero, zero, e64, m2, ta, mu 159; RV32-NEXT: vzext.vf8 v10, v9 160; RV32-NEXT: vmv2r.v v8, v10 161; RV32-NEXT: ret 162; 163; RV64-LABEL: mgather_nxv2i8_zextload_nxv2i64: 164; RV64: # %bb.0: 165; RV64-NEXT: vsetvli a0, zero, e8, mf4, ta, mu 166; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 167; RV64-NEXT: vsetvli zero, zero, e64, m2, ta, mu 168; RV64-NEXT: vzext.vf8 v8, v10 169; RV64-NEXT: ret 170 %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) 171 %ev = zext <vscale x 2 x i8> %v to <vscale x 2 x i64> 172 ret <vscale x 2 x i64> %ev 173} 174 175declare <vscale x 4 x i8> @llvm.masked.gather.nxv4i8.nxv4p0i8(<vscale x 4 x i8*>, i32, <vscale x 4 x i1>, <vscale x 4 x i8>) 176 177define <vscale x 4 x i8> @mgather_nxv4i8(<vscale x 4 x i8*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x i8> %passthru) { 178; RV32-LABEL: mgather_nxv4i8: 179; RV32: # %bb.0: 180; RV32-NEXT: vsetvli a0, zero, e8, mf2, ta, mu 181; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 182; RV32-NEXT: vmv1r.v v8, v10 183; RV32-NEXT: ret 184; 185; RV64-LABEL: mgather_nxv4i8: 186; RV64: # %bb.0: 187; RV64-NEXT: vsetvli a0, zero, e8, mf2, ta, mu 188; RV64-NEXT: vluxei64.v v12, (zero), v8, v0.t 189; RV64-NEXT: vmv1r.v v8, v12 190; RV64-NEXT: ret 191 %v = call <vscale x 4 x i8> @llvm.masked.gather.nxv4i8.nxv4p0i8(<vscale x 4 x i8*> %ptrs, i32 1, <vscale x 4 x i1> %m, <vscale x 4 x i8> %passthru) 192 ret <vscale x 4 x i8> %v 193} 194 195define <vscale x 4 x i8> @mgather_truemask_nxv4i8(<vscale x 4 x i8*> %ptrs, <vscale x 4 x i8> %passthru) { 196; RV32-LABEL: mgather_truemask_nxv4i8: 197; RV32: # %bb.0: 198; RV32-NEXT: vsetvli a0, zero, e8, mf2, ta, mu 199; RV32-NEXT: vluxei32.v v10, (zero), v8 200; RV32-NEXT: vmv1r.v v8, v10 201; RV32-NEXT: ret 202; 203; RV64-LABEL: mgather_truemask_nxv4i8: 204; RV64: # %bb.0: 205; RV64-NEXT: vsetvli a0, zero, e8, mf2, ta, mu 206; RV64-NEXT: vluxei64.v v12, (zero), v8 207; RV64-NEXT: vmv1r.v v8, v12 208; RV64-NEXT: ret 209 %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0 210 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer 211 %v = call <vscale x 4 x i8> @llvm.masked.gather.nxv4i8.nxv4p0i8(<vscale x 4 x i8*> %ptrs, i32 1, <vscale x 4 x i1> %mtrue, <vscale x 4 x i8> %passthru) 212 ret <vscale x 4 x i8> %v 213} 214 215define <vscale x 4 x i8> @mgather_falsemask_nxv4i8(<vscale x 4 x i8*> %ptrs, <vscale x 4 x i8> %passthru) { 216; RV32-LABEL: mgather_falsemask_nxv4i8: 217; RV32: # %bb.0: 218; RV32-NEXT: vmv1r.v v8, v10 219; RV32-NEXT: ret 220; 221; RV64-LABEL: mgather_falsemask_nxv4i8: 222; RV64: # %bb.0: 223; RV64-NEXT: vmv1r.v v8, v12 224; RV64-NEXT: ret 225 %v = call <vscale x 4 x i8> @llvm.masked.gather.nxv4i8.nxv4p0i8(<vscale x 4 x i8*> %ptrs, i32 1, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x i8> %passthru) 226 ret <vscale x 4 x i8> %v 227} 228 229declare <vscale x 8 x i8> @llvm.masked.gather.nxv8i8.nxv8p0i8(<vscale x 8 x i8*>, i32, <vscale x 8 x i1>, <vscale x 8 x i8>) 230 231define <vscale x 8 x i8> @mgather_nxv8i8(<vscale x 8 x i8*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x i8> %passthru) { 232; RV32-LABEL: mgather_nxv8i8: 233; RV32: # %bb.0: 234; RV32-NEXT: vsetvli a0, zero, e8, m1, ta, mu 235; RV32-NEXT: vluxei32.v v12, (zero), v8, v0.t 236; RV32-NEXT: vmv1r.v v8, v12 237; RV32-NEXT: ret 238; 239; RV64-LABEL: mgather_nxv8i8: 240; RV64: # %bb.0: 241; RV64-NEXT: vsetvli a0, zero, e8, m1, ta, mu 242; RV64-NEXT: vluxei64.v v16, (zero), v8, v0.t 243; RV64-NEXT: vmv1r.v v8, v16 244; RV64-NEXT: ret 245 %v = call <vscale x 8 x i8> @llvm.masked.gather.nxv8i8.nxv8p0i8(<vscale x 8 x i8*> %ptrs, i32 1, <vscale x 8 x i1> %m, <vscale x 8 x i8> %passthru) 246 ret <vscale x 8 x i8> %v 247} 248 249define <vscale x 8 x i8> @mgather_baseidx_nxv8i8(i8* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i8> %passthru) { 250; RV32-LABEL: mgather_baseidx_nxv8i8: 251; RV32: # %bb.0: 252; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 253; RV32-NEXT: vsext.vf4 v12, v8 254; RV32-NEXT: vsetvli zero, zero, e8, m1, ta, mu 255; RV32-NEXT: vluxei32.v v9, (a0), v12, v0.t 256; RV32-NEXT: vmv1r.v v8, v9 257; RV32-NEXT: ret 258; 259; RV64-LABEL: mgather_baseidx_nxv8i8: 260; RV64: # %bb.0: 261; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 262; RV64-NEXT: vsext.vf8 v16, v8 263; RV64-NEXT: vsetvli zero, zero, e8, m1, ta, mu 264; RV64-NEXT: vluxei64.v v9, (a0), v16, v0.t 265; RV64-NEXT: vmv1r.v v8, v9 266; RV64-NEXT: ret 267 %ptrs = getelementptr inbounds i8, i8* %base, <vscale x 8 x i8> %idxs 268 %v = call <vscale x 8 x i8> @llvm.masked.gather.nxv8i8.nxv8p0i8(<vscale x 8 x i8*> %ptrs, i32 1, <vscale x 8 x i1> %m, <vscale x 8 x i8> %passthru) 269 ret <vscale x 8 x i8> %v 270} 271 272declare <vscale x 1 x i16> @llvm.masked.gather.nxv1i16.nxv1p0i16(<vscale x 1 x i16*>, i32, <vscale x 1 x i1>, <vscale x 1 x i16>) 273 274define <vscale x 1 x i16> @mgather_nxv1i16(<vscale x 1 x i16*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x i16> %passthru) { 275; RV32-LABEL: mgather_nxv1i16: 276; RV32: # %bb.0: 277; RV32-NEXT: vsetvli a0, zero, e16, mf4, ta, mu 278; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 279; RV32-NEXT: vmv1r.v v8, v9 280; RV32-NEXT: ret 281; 282; RV64-LABEL: mgather_nxv1i16: 283; RV64: # %bb.0: 284; RV64-NEXT: vsetvli a0, zero, e16, mf4, ta, mu 285; RV64-NEXT: vluxei64.v v9, (zero), v8, v0.t 286; RV64-NEXT: vmv1r.v v8, v9 287; RV64-NEXT: ret 288 %v = call <vscale x 1 x i16> @llvm.masked.gather.nxv1i16.nxv1p0i16(<vscale x 1 x i16*> %ptrs, i32 2, <vscale x 1 x i1> %m, <vscale x 1 x i16> %passthru) 289 ret <vscale x 1 x i16> %v 290} 291 292declare <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*>, i32, <vscale x 2 x i1>, <vscale x 2 x i16>) 293 294define <vscale x 2 x i16> @mgather_nxv2i16(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) { 295; RV32-LABEL: mgather_nxv2i16: 296; RV32: # %bb.0: 297; RV32-NEXT: vsetvli a0, zero, e16, mf2, ta, mu 298; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 299; RV32-NEXT: vmv1r.v v8, v9 300; RV32-NEXT: ret 301; 302; RV64-LABEL: mgather_nxv2i16: 303; RV64: # %bb.0: 304; RV64-NEXT: vsetvli a0, zero, e16, mf2, ta, mu 305; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 306; RV64-NEXT: vmv1r.v v8, v10 307; RV64-NEXT: ret 308 %v = call <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) 309 ret <vscale x 2 x i16> %v 310} 311 312define <vscale x 2 x i32> @mgather_nxv2i16_sextload_nxv2i32(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) { 313; RV32-LABEL: mgather_nxv2i16_sextload_nxv2i32: 314; RV32: # %bb.0: 315; RV32-NEXT: vsetvli a0, zero, e16, mf2, ta, mu 316; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 317; RV32-NEXT: vsetvli zero, zero, e32, m1, ta, mu 318; RV32-NEXT: vsext.vf2 v8, v9 319; RV32-NEXT: ret 320; 321; RV64-LABEL: mgather_nxv2i16_sextload_nxv2i32: 322; RV64: # %bb.0: 323; RV64-NEXT: vsetvli a0, zero, e16, mf2, ta, mu 324; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 325; RV64-NEXT: vsetvli zero, zero, e32, m1, ta, mu 326; RV64-NEXT: vsext.vf2 v8, v10 327; RV64-NEXT: ret 328 %v = call <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) 329 %ev = sext <vscale x 2 x i16> %v to <vscale x 2 x i32> 330 ret <vscale x 2 x i32> %ev 331} 332 333define <vscale x 2 x i32> @mgather_nxv2i16_zextload_nxv2i32(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) { 334; RV32-LABEL: mgather_nxv2i16_zextload_nxv2i32: 335; RV32: # %bb.0: 336; RV32-NEXT: vsetvli a0, zero, e16, mf2, ta, mu 337; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 338; RV32-NEXT: vsetvli zero, zero, e32, m1, ta, mu 339; RV32-NEXT: vzext.vf2 v8, v9 340; RV32-NEXT: ret 341; 342; RV64-LABEL: mgather_nxv2i16_zextload_nxv2i32: 343; RV64: # %bb.0: 344; RV64-NEXT: vsetvli a0, zero, e16, mf2, ta, mu 345; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 346; RV64-NEXT: vsetvli zero, zero, e32, m1, ta, mu 347; RV64-NEXT: vzext.vf2 v8, v10 348; RV64-NEXT: ret 349 %v = call <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) 350 %ev = zext <vscale x 2 x i16> %v to <vscale x 2 x i32> 351 ret <vscale x 2 x i32> %ev 352} 353 354define <vscale x 2 x i64> @mgather_nxv2i16_sextload_nxv2i64(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) { 355; RV32-LABEL: mgather_nxv2i16_sextload_nxv2i64: 356; RV32: # %bb.0: 357; RV32-NEXT: vsetvli a0, zero, e16, mf2, ta, mu 358; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 359; RV32-NEXT: vsetvli zero, zero, e64, m2, ta, mu 360; RV32-NEXT: vsext.vf4 v10, v9 361; RV32-NEXT: vmv2r.v v8, v10 362; RV32-NEXT: ret 363; 364; RV64-LABEL: mgather_nxv2i16_sextload_nxv2i64: 365; RV64: # %bb.0: 366; RV64-NEXT: vsetvli a0, zero, e16, mf2, ta, mu 367; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 368; RV64-NEXT: vsetvli zero, zero, e64, m2, ta, mu 369; RV64-NEXT: vsext.vf4 v8, v10 370; RV64-NEXT: ret 371 %v = call <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) 372 %ev = sext <vscale x 2 x i16> %v to <vscale x 2 x i64> 373 ret <vscale x 2 x i64> %ev 374} 375 376define <vscale x 2 x i64> @mgather_nxv2i16_zextload_nxv2i64(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) { 377; RV32-LABEL: mgather_nxv2i16_zextload_nxv2i64: 378; RV32: # %bb.0: 379; RV32-NEXT: vsetvli a0, zero, e16, mf2, ta, mu 380; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 381; RV32-NEXT: vsetvli zero, zero, e64, m2, ta, mu 382; RV32-NEXT: vzext.vf4 v10, v9 383; RV32-NEXT: vmv2r.v v8, v10 384; RV32-NEXT: ret 385; 386; RV64-LABEL: mgather_nxv2i16_zextload_nxv2i64: 387; RV64: # %bb.0: 388; RV64-NEXT: vsetvli a0, zero, e16, mf2, ta, mu 389; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 390; RV64-NEXT: vsetvli zero, zero, e64, m2, ta, mu 391; RV64-NEXT: vzext.vf4 v8, v10 392; RV64-NEXT: ret 393 %v = call <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) 394 %ev = zext <vscale x 2 x i16> %v to <vscale x 2 x i64> 395 ret <vscale x 2 x i64> %ev 396} 397 398declare <vscale x 4 x i16> @llvm.masked.gather.nxv4i16.nxv4p0i16(<vscale x 4 x i16*>, i32, <vscale x 4 x i1>, <vscale x 4 x i16>) 399 400define <vscale x 4 x i16> @mgather_nxv4i16(<vscale x 4 x i16*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x i16> %passthru) { 401; RV32-LABEL: mgather_nxv4i16: 402; RV32: # %bb.0: 403; RV32-NEXT: vsetvli a0, zero, e16, m1, ta, mu 404; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 405; RV32-NEXT: vmv1r.v v8, v10 406; RV32-NEXT: ret 407; 408; RV64-LABEL: mgather_nxv4i16: 409; RV64: # %bb.0: 410; RV64-NEXT: vsetvli a0, zero, e16, m1, ta, mu 411; RV64-NEXT: vluxei64.v v12, (zero), v8, v0.t 412; RV64-NEXT: vmv1r.v v8, v12 413; RV64-NEXT: ret 414 %v = call <vscale x 4 x i16> @llvm.masked.gather.nxv4i16.nxv4p0i16(<vscale x 4 x i16*> %ptrs, i32 2, <vscale x 4 x i1> %m, <vscale x 4 x i16> %passthru) 415 ret <vscale x 4 x i16> %v 416} 417 418define <vscale x 4 x i16> @mgather_truemask_nxv4i16(<vscale x 4 x i16*> %ptrs, <vscale x 4 x i16> %passthru) { 419; RV32-LABEL: mgather_truemask_nxv4i16: 420; RV32: # %bb.0: 421; RV32-NEXT: vsetvli a0, zero, e16, m1, ta, mu 422; RV32-NEXT: vluxei32.v v10, (zero), v8 423; RV32-NEXT: vmv1r.v v8, v10 424; RV32-NEXT: ret 425; 426; RV64-LABEL: mgather_truemask_nxv4i16: 427; RV64: # %bb.0: 428; RV64-NEXT: vsetvli a0, zero, e16, m1, ta, mu 429; RV64-NEXT: vluxei64.v v12, (zero), v8 430; RV64-NEXT: vmv1r.v v8, v12 431; RV64-NEXT: ret 432 %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0 433 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer 434 %v = call <vscale x 4 x i16> @llvm.masked.gather.nxv4i16.nxv4p0i16(<vscale x 4 x i16*> %ptrs, i32 2, <vscale x 4 x i1> %mtrue, <vscale x 4 x i16> %passthru) 435 ret <vscale x 4 x i16> %v 436} 437 438define <vscale x 4 x i16> @mgather_falsemask_nxv4i16(<vscale x 4 x i16*> %ptrs, <vscale x 4 x i16> %passthru) { 439; RV32-LABEL: mgather_falsemask_nxv4i16: 440; RV32: # %bb.0: 441; RV32-NEXT: vmv1r.v v8, v10 442; RV32-NEXT: ret 443; 444; RV64-LABEL: mgather_falsemask_nxv4i16: 445; RV64: # %bb.0: 446; RV64-NEXT: vmv1r.v v8, v12 447; RV64-NEXT: ret 448 %v = call <vscale x 4 x i16> @llvm.masked.gather.nxv4i16.nxv4p0i16(<vscale x 4 x i16*> %ptrs, i32 2, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x i16> %passthru) 449 ret <vscale x 4 x i16> %v 450} 451 452declare <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*>, i32, <vscale x 8 x i1>, <vscale x 8 x i16>) 453 454define <vscale x 8 x i16> @mgather_nxv8i16(<vscale x 8 x i16*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) { 455; RV32-LABEL: mgather_nxv8i16: 456; RV32: # %bb.0: 457; RV32-NEXT: vsetvli a0, zero, e16, m2, ta, mu 458; RV32-NEXT: vluxei32.v v12, (zero), v8, v0.t 459; RV32-NEXT: vmv2r.v v8, v12 460; RV32-NEXT: ret 461; 462; RV64-LABEL: mgather_nxv8i16: 463; RV64: # %bb.0: 464; RV64-NEXT: vsetvli a0, zero, e16, m2, ta, mu 465; RV64-NEXT: vluxei64.v v16, (zero), v8, v0.t 466; RV64-NEXT: vmv2r.v v8, v16 467; RV64-NEXT: ret 468 %v = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) 469 ret <vscale x 8 x i16> %v 470} 471 472define <vscale x 8 x i16> @mgather_baseidx_nxv8i8_nxv8i16(i16* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) { 473; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8i16: 474; RV32: # %bb.0: 475; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 476; RV32-NEXT: vsext.vf4 v12, v8 477; RV32-NEXT: vadd.vv v12, v12, v12 478; RV32-NEXT: vsetvli zero, zero, e16, m2, ta, mu 479; RV32-NEXT: vluxei32.v v10, (a0), v12, v0.t 480; RV32-NEXT: vmv2r.v v8, v10 481; RV32-NEXT: ret 482; 483; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8i16: 484; RV64: # %bb.0: 485; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 486; RV64-NEXT: vsext.vf8 v16, v8 487; RV64-NEXT: vadd.vv v16, v16, v16 488; RV64-NEXT: vsetvli zero, zero, e16, m2, ta, mu 489; RV64-NEXT: vluxei64.v v10, (a0), v16, v0.t 490; RV64-NEXT: vmv2r.v v8, v10 491; RV64-NEXT: ret 492 %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i8> %idxs 493 %v = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) 494 ret <vscale x 8 x i16> %v 495} 496 497define <vscale x 8 x i16> @mgather_baseidx_sext_nxv8i8_nxv8i16(i16* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) { 498; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i16: 499; RV32: # %bb.0: 500; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 501; RV32-NEXT: vsext.vf4 v12, v8 502; RV32-NEXT: vadd.vv v12, v12, v12 503; RV32-NEXT: vsetvli zero, zero, e16, m2, ta, mu 504; RV32-NEXT: vluxei32.v v10, (a0), v12, v0.t 505; RV32-NEXT: vmv2r.v v8, v10 506; RV32-NEXT: ret 507; 508; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i16: 509; RV64: # %bb.0: 510; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 511; RV64-NEXT: vsext.vf8 v16, v8 512; RV64-NEXT: vadd.vv v16, v16, v16 513; RV64-NEXT: vsetvli zero, zero, e16, m2, ta, mu 514; RV64-NEXT: vluxei64.v v10, (a0), v16, v0.t 515; RV64-NEXT: vmv2r.v v8, v10 516; RV64-NEXT: ret 517 %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i16> 518 %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i16> %eidxs 519 %v = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) 520 ret <vscale x 8 x i16> %v 521} 522 523define <vscale x 8 x i16> @mgather_baseidx_zext_nxv8i8_nxv8i16(i16* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) { 524; RV32-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i16: 525; RV32: # %bb.0: 526; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 527; RV32-NEXT: vzext.vf4 v12, v8 528; RV32-NEXT: vadd.vv v12, v12, v12 529; RV32-NEXT: vsetvli zero, zero, e16, m2, ta, mu 530; RV32-NEXT: vluxei32.v v10, (a0), v12, v0.t 531; RV32-NEXT: vmv2r.v v8, v10 532; RV32-NEXT: ret 533; 534; RV64-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i16: 535; RV64: # %bb.0: 536; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 537; RV64-NEXT: vzext.vf8 v16, v8 538; RV64-NEXT: vadd.vv v16, v16, v16 539; RV64-NEXT: vsetvli zero, zero, e16, m2, ta, mu 540; RV64-NEXT: vluxei64.v v10, (a0), v16, v0.t 541; RV64-NEXT: vmv2r.v v8, v10 542; RV64-NEXT: ret 543 %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i16> 544 %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i16> %eidxs 545 %v = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) 546 ret <vscale x 8 x i16> %v 547} 548 549define <vscale x 8 x i16> @mgather_baseidx_nxv8i16(i16* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) { 550; RV32-LABEL: mgather_baseidx_nxv8i16: 551; RV32: # %bb.0: 552; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 553; RV32-NEXT: vsext.vf2 v12, v8 554; RV32-NEXT: vadd.vv v12, v12, v12 555; RV32-NEXT: vsetvli zero, zero, e16, m2, ta, mu 556; RV32-NEXT: vluxei32.v v10, (a0), v12, v0.t 557; RV32-NEXT: vmv2r.v v8, v10 558; RV32-NEXT: ret 559; 560; RV64-LABEL: mgather_baseidx_nxv8i16: 561; RV64: # %bb.0: 562; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 563; RV64-NEXT: vsext.vf4 v16, v8 564; RV64-NEXT: vadd.vv v16, v16, v16 565; RV64-NEXT: vsetvli zero, zero, e16, m2, ta, mu 566; RV64-NEXT: vluxei64.v v10, (a0), v16, v0.t 567; RV64-NEXT: vmv2r.v v8, v10 568; RV64-NEXT: ret 569 %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i16> %idxs 570 %v = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) 571 ret <vscale x 8 x i16> %v 572} 573 574declare <vscale x 1 x i32> @llvm.masked.gather.nxv1i32.nxv1p0i32(<vscale x 1 x i32*>, i32, <vscale x 1 x i1>, <vscale x 1 x i32>) 575 576define <vscale x 1 x i32> @mgather_nxv1i32(<vscale x 1 x i32*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x i32> %passthru) { 577; RV32-LABEL: mgather_nxv1i32: 578; RV32: # %bb.0: 579; RV32-NEXT: vsetvli a0, zero, e32, mf2, ta, mu 580; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 581; RV32-NEXT: vmv1r.v v8, v9 582; RV32-NEXT: ret 583; 584; RV64-LABEL: mgather_nxv1i32: 585; RV64: # %bb.0: 586; RV64-NEXT: vsetvli a0, zero, e32, mf2, ta, mu 587; RV64-NEXT: vluxei64.v v9, (zero), v8, v0.t 588; RV64-NEXT: vmv1r.v v8, v9 589; RV64-NEXT: ret 590 %v = call <vscale x 1 x i32> @llvm.masked.gather.nxv1i32.nxv1p0i32(<vscale x 1 x i32*> %ptrs, i32 4, <vscale x 1 x i1> %m, <vscale x 1 x i32> %passthru) 591 ret <vscale x 1 x i32> %v 592} 593 594declare <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0i32(<vscale x 2 x i32*>, i32, <vscale x 2 x i1>, <vscale x 2 x i32>) 595 596define <vscale x 2 x i32> @mgather_nxv2i32(<vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru) { 597; RV32-LABEL: mgather_nxv2i32: 598; RV32: # %bb.0: 599; RV32-NEXT: vsetvli a0, zero, e32, m1, ta, mu 600; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 601; RV32-NEXT: vmv1r.v v8, v9 602; RV32-NEXT: ret 603; 604; RV64-LABEL: mgather_nxv2i32: 605; RV64: # %bb.0: 606; RV64-NEXT: vsetvli a0, zero, e32, m1, ta, mu 607; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 608; RV64-NEXT: vmv1r.v v8, v10 609; RV64-NEXT: ret 610 %v = call <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0i32(<vscale x 2 x i32*> %ptrs, i32 4, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru) 611 ret <vscale x 2 x i32> %v 612} 613 614define <vscale x 2 x i64> @mgather_nxv2i32_sextload_nxv2i64(<vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru) { 615; RV32-LABEL: mgather_nxv2i32_sextload_nxv2i64: 616; RV32: # %bb.0: 617; RV32-NEXT: vsetvli a0, zero, e32, m1, ta, mu 618; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 619; RV32-NEXT: vsetvli zero, zero, e64, m2, ta, mu 620; RV32-NEXT: vsext.vf2 v10, v9 621; RV32-NEXT: vmv2r.v v8, v10 622; RV32-NEXT: ret 623; 624; RV64-LABEL: mgather_nxv2i32_sextload_nxv2i64: 625; RV64: # %bb.0: 626; RV64-NEXT: vsetvli a0, zero, e32, m1, ta, mu 627; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 628; RV64-NEXT: vsetvli zero, zero, e64, m2, ta, mu 629; RV64-NEXT: vsext.vf2 v8, v10 630; RV64-NEXT: ret 631 %v = call <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0i32(<vscale x 2 x i32*> %ptrs, i32 4, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru) 632 %ev = sext <vscale x 2 x i32> %v to <vscale x 2 x i64> 633 ret <vscale x 2 x i64> %ev 634} 635 636define <vscale x 2 x i64> @mgather_nxv2i32_zextload_nxv2i64(<vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru) { 637; RV32-LABEL: mgather_nxv2i32_zextload_nxv2i64: 638; RV32: # %bb.0: 639; RV32-NEXT: vsetvli a0, zero, e32, m1, ta, mu 640; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 641; RV32-NEXT: vsetvli zero, zero, e64, m2, ta, mu 642; RV32-NEXT: vzext.vf2 v10, v9 643; RV32-NEXT: vmv2r.v v8, v10 644; RV32-NEXT: ret 645; 646; RV64-LABEL: mgather_nxv2i32_zextload_nxv2i64: 647; RV64: # %bb.0: 648; RV64-NEXT: vsetvli a0, zero, e32, m1, ta, mu 649; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 650; RV64-NEXT: vsetvli zero, zero, e64, m2, ta, mu 651; RV64-NEXT: vzext.vf2 v8, v10 652; RV64-NEXT: ret 653 %v = call <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0i32(<vscale x 2 x i32*> %ptrs, i32 4, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru) 654 %ev = zext <vscale x 2 x i32> %v to <vscale x 2 x i64> 655 ret <vscale x 2 x i64> %ev 656} 657 658declare <vscale x 4 x i32> @llvm.masked.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*>, i32, <vscale x 4 x i1>, <vscale x 4 x i32>) 659 660define <vscale x 4 x i32> @mgather_nxv4i32(<vscale x 4 x i32*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x i32> %passthru) { 661; RV32-LABEL: mgather_nxv4i32: 662; RV32: # %bb.0: 663; RV32-NEXT: vsetvli a0, zero, e32, m2, ta, mu 664; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 665; RV32-NEXT: vmv2r.v v8, v10 666; RV32-NEXT: ret 667; 668; RV64-LABEL: mgather_nxv4i32: 669; RV64: # %bb.0: 670; RV64-NEXT: vsetvli a0, zero, e32, m2, ta, mu 671; RV64-NEXT: vluxei64.v v12, (zero), v8, v0.t 672; RV64-NEXT: vmv2r.v v8, v12 673; RV64-NEXT: ret 674 %v = call <vscale x 4 x i32> @llvm.masked.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*> %ptrs, i32 4, <vscale x 4 x i1> %m, <vscale x 4 x i32> %passthru) 675 ret <vscale x 4 x i32> %v 676} 677 678define <vscale x 4 x i32> @mgather_truemask_nxv4i32(<vscale x 4 x i32*> %ptrs, <vscale x 4 x i32> %passthru) { 679; RV32-LABEL: mgather_truemask_nxv4i32: 680; RV32: # %bb.0: 681; RV32-NEXT: vsetvli a0, zero, e32, m2, ta, mu 682; RV32-NEXT: vluxei32.v v8, (zero), v8 683; RV32-NEXT: ret 684; 685; RV64-LABEL: mgather_truemask_nxv4i32: 686; RV64: # %bb.0: 687; RV64-NEXT: vsetvli a0, zero, e32, m2, ta, mu 688; RV64-NEXT: vluxei64.v v12, (zero), v8 689; RV64-NEXT: vmv2r.v v8, v12 690; RV64-NEXT: ret 691 %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0 692 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer 693 %v = call <vscale x 4 x i32> @llvm.masked.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*> %ptrs, i32 4, <vscale x 4 x i1> %mtrue, <vscale x 4 x i32> %passthru) 694 ret <vscale x 4 x i32> %v 695} 696 697define <vscale x 4 x i32> @mgather_falsemask_nxv4i32(<vscale x 4 x i32*> %ptrs, <vscale x 4 x i32> %passthru) { 698; RV32-LABEL: mgather_falsemask_nxv4i32: 699; RV32: # %bb.0: 700; RV32-NEXT: vmv2r.v v8, v10 701; RV32-NEXT: ret 702; 703; RV64-LABEL: mgather_falsemask_nxv4i32: 704; RV64: # %bb.0: 705; RV64-NEXT: vmv2r.v v8, v12 706; RV64-NEXT: ret 707 %v = call <vscale x 4 x i32> @llvm.masked.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*> %ptrs, i32 4, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x i32> %passthru) 708 ret <vscale x 4 x i32> %v 709} 710 711declare <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*>, i32, <vscale x 8 x i1>, <vscale x 8 x i32>) 712 713define <vscale x 8 x i32> @mgather_nxv8i32(<vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) { 714; RV32-LABEL: mgather_nxv8i32: 715; RV32: # %bb.0: 716; RV32-NEXT: vsetvli a0, zero, e32, m4, ta, mu 717; RV32-NEXT: vluxei32.v v12, (zero), v8, v0.t 718; RV32-NEXT: vmv4r.v v8, v12 719; RV32-NEXT: ret 720; 721; RV64-LABEL: mgather_nxv8i32: 722; RV64: # %bb.0: 723; RV64-NEXT: vsetvli a0, zero, e32, m4, ta, mu 724; RV64-NEXT: vluxei64.v v16, (zero), v8, v0.t 725; RV64-NEXT: vmv4r.v v8, v16 726; RV64-NEXT: ret 727 %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) 728 ret <vscale x 8 x i32> %v 729} 730 731define <vscale x 8 x i32> @mgather_baseidx_nxv8i8_nxv8i32(i32* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) { 732; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8i32: 733; RV32: # %bb.0: 734; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 735; RV32-NEXT: vsext.vf4 v16, v8 736; RV32-NEXT: vsll.vi v8, v16, 2 737; RV32-NEXT: vluxei32.v v12, (a0), v8, v0.t 738; RV32-NEXT: vmv4r.v v8, v12 739; RV32-NEXT: ret 740; 741; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8i32: 742; RV64: # %bb.0: 743; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 744; RV64-NEXT: vsext.vf8 v16, v8 745; RV64-NEXT: vsll.vi v16, v16, 2 746; RV64-NEXT: vsetvli zero, zero, e32, m4, ta, mu 747; RV64-NEXT: vluxei64.v v12, (a0), v16, v0.t 748; RV64-NEXT: vmv4r.v v8, v12 749; RV64-NEXT: ret 750 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i8> %idxs 751 %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) 752 ret <vscale x 8 x i32> %v 753} 754 755define <vscale x 8 x i32> @mgather_baseidx_sext_nxv8i8_nxv8i32(i32* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) { 756; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i32: 757; RV32: # %bb.0: 758; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 759; RV32-NEXT: vsext.vf4 v16, v8 760; RV32-NEXT: vsll.vi v8, v16, 2 761; RV32-NEXT: vluxei32.v v12, (a0), v8, v0.t 762; RV32-NEXT: vmv4r.v v8, v12 763; RV32-NEXT: ret 764; 765; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i32: 766; RV64: # %bb.0: 767; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 768; RV64-NEXT: vsext.vf8 v16, v8 769; RV64-NEXT: vsll.vi v16, v16, 2 770; RV64-NEXT: vsetvli zero, zero, e32, m4, ta, mu 771; RV64-NEXT: vluxei64.v v12, (a0), v16, v0.t 772; RV64-NEXT: vmv4r.v v8, v12 773; RV64-NEXT: ret 774 %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i32> 775 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs 776 %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) 777 ret <vscale x 8 x i32> %v 778} 779 780define <vscale x 8 x i32> @mgather_baseidx_zext_nxv8i8_nxv8i32(i32* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) { 781; RV32-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i32: 782; RV32: # %bb.0: 783; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 784; RV32-NEXT: vzext.vf4 v16, v8 785; RV32-NEXT: vsll.vi v8, v16, 2 786; RV32-NEXT: vluxei32.v v12, (a0), v8, v0.t 787; RV32-NEXT: vmv4r.v v8, v12 788; RV32-NEXT: ret 789; 790; RV64-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i32: 791; RV64: # %bb.0: 792; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 793; RV64-NEXT: vzext.vf8 v16, v8 794; RV64-NEXT: vsll.vi v16, v16, 2 795; RV64-NEXT: vsetvli zero, zero, e32, m4, ta, mu 796; RV64-NEXT: vluxei64.v v12, (a0), v16, v0.t 797; RV64-NEXT: vmv4r.v v8, v12 798; RV64-NEXT: ret 799 %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i32> 800 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs 801 %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) 802 ret <vscale x 8 x i32> %v 803} 804 805define <vscale x 8 x i32> @mgather_baseidx_nxv8i16_nxv8i32(i32* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) { 806; RV32-LABEL: mgather_baseidx_nxv8i16_nxv8i32: 807; RV32: # %bb.0: 808; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 809; RV32-NEXT: vsext.vf2 v16, v8 810; RV32-NEXT: vsll.vi v8, v16, 2 811; RV32-NEXT: vluxei32.v v12, (a0), v8, v0.t 812; RV32-NEXT: vmv4r.v v8, v12 813; RV32-NEXT: ret 814; 815; RV64-LABEL: mgather_baseidx_nxv8i16_nxv8i32: 816; RV64: # %bb.0: 817; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 818; RV64-NEXT: vsext.vf4 v16, v8 819; RV64-NEXT: vsll.vi v16, v16, 2 820; RV64-NEXT: vsetvli zero, zero, e32, m4, ta, mu 821; RV64-NEXT: vluxei64.v v12, (a0), v16, v0.t 822; RV64-NEXT: vmv4r.v v8, v12 823; RV64-NEXT: ret 824 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i16> %idxs 825 %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) 826 ret <vscale x 8 x i32> %v 827} 828 829define <vscale x 8 x i32> @mgather_baseidx_sext_nxv8i16_nxv8i32(i32* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) { 830; RV32-LABEL: mgather_baseidx_sext_nxv8i16_nxv8i32: 831; RV32: # %bb.0: 832; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 833; RV32-NEXT: vsext.vf2 v16, v8 834; RV32-NEXT: vsll.vi v8, v16, 2 835; RV32-NEXT: vluxei32.v v12, (a0), v8, v0.t 836; RV32-NEXT: vmv4r.v v8, v12 837; RV32-NEXT: ret 838; 839; RV64-LABEL: mgather_baseidx_sext_nxv8i16_nxv8i32: 840; RV64: # %bb.0: 841; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 842; RV64-NEXT: vsext.vf4 v16, v8 843; RV64-NEXT: vsll.vi v16, v16, 2 844; RV64-NEXT: vsetvli zero, zero, e32, m4, ta, mu 845; RV64-NEXT: vluxei64.v v12, (a0), v16, v0.t 846; RV64-NEXT: vmv4r.v v8, v12 847; RV64-NEXT: ret 848 %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i32> 849 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs 850 %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) 851 ret <vscale x 8 x i32> %v 852} 853 854define <vscale x 8 x i32> @mgather_baseidx_zext_nxv8i16_nxv8i32(i32* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) { 855; RV32-LABEL: mgather_baseidx_zext_nxv8i16_nxv8i32: 856; RV32: # %bb.0: 857; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 858; RV32-NEXT: vzext.vf2 v16, v8 859; RV32-NEXT: vsll.vi v8, v16, 2 860; RV32-NEXT: vluxei32.v v12, (a0), v8, v0.t 861; RV32-NEXT: vmv4r.v v8, v12 862; RV32-NEXT: ret 863; 864; RV64-LABEL: mgather_baseidx_zext_nxv8i16_nxv8i32: 865; RV64: # %bb.0: 866; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 867; RV64-NEXT: vzext.vf4 v16, v8 868; RV64-NEXT: vsll.vi v16, v16, 2 869; RV64-NEXT: vsetvli zero, zero, e32, m4, ta, mu 870; RV64-NEXT: vluxei64.v v12, (a0), v16, v0.t 871; RV64-NEXT: vmv4r.v v8, v12 872; RV64-NEXT: ret 873 %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i32> 874 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs 875 %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) 876 ret <vscale x 8 x i32> %v 877} 878 879define <vscale x 8 x i32> @mgather_baseidx_nxv8i32(i32* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) { 880; RV32-LABEL: mgather_baseidx_nxv8i32: 881; RV32: # %bb.0: 882; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 883; RV32-NEXT: vsll.vi v8, v8, 2 884; RV32-NEXT: vluxei32.v v12, (a0), v8, v0.t 885; RV32-NEXT: vmv4r.v v8, v12 886; RV32-NEXT: ret 887; 888; RV64-LABEL: mgather_baseidx_nxv8i32: 889; RV64: # %bb.0: 890; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 891; RV64-NEXT: vsext.vf2 v16, v8 892; RV64-NEXT: vsll.vi v16, v16, 2 893; RV64-NEXT: vsetvli zero, zero, e32, m4, ta, mu 894; RV64-NEXT: vluxei64.v v12, (a0), v16, v0.t 895; RV64-NEXT: vmv4r.v v8, v12 896; RV64-NEXT: ret 897 %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %idxs 898 %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) 899 ret <vscale x 8 x i32> %v 900} 901 902declare <vscale x 1 x i64> @llvm.masked.gather.nxv1i64.nxv1p0i64(<vscale x 1 x i64*>, i32, <vscale x 1 x i1>, <vscale x 1 x i64>) 903 904define <vscale x 1 x i64> @mgather_nxv1i64(<vscale x 1 x i64*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x i64> %passthru) { 905; RV32-LABEL: mgather_nxv1i64: 906; RV32: # %bb.0: 907; RV32-NEXT: vsetvli a0, zero, e64, m1, ta, mu 908; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 909; RV32-NEXT: vmv1r.v v8, v9 910; RV32-NEXT: ret 911; 912; RV64-LABEL: mgather_nxv1i64: 913; RV64: # %bb.0: 914; RV64-NEXT: vsetvli a0, zero, e64, m1, ta, mu 915; RV64-NEXT: vluxei64.v v9, (zero), v8, v0.t 916; RV64-NEXT: vmv1r.v v8, v9 917; RV64-NEXT: ret 918 %v = call <vscale x 1 x i64> @llvm.masked.gather.nxv1i64.nxv1p0i64(<vscale x 1 x i64*> %ptrs, i32 8, <vscale x 1 x i1> %m, <vscale x 1 x i64> %passthru) 919 ret <vscale x 1 x i64> %v 920} 921 922declare <vscale x 2 x i64> @llvm.masked.gather.nxv2i64.nxv2p0i64(<vscale x 2 x i64*>, i32, <vscale x 2 x i1>, <vscale x 2 x i64>) 923 924define <vscale x 2 x i64> @mgather_nxv2i64(<vscale x 2 x i64*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i64> %passthru) { 925; RV32-LABEL: mgather_nxv2i64: 926; RV32: # %bb.0: 927; RV32-NEXT: vsetvli a0, zero, e64, m2, ta, mu 928; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 929; RV32-NEXT: vmv2r.v v8, v10 930; RV32-NEXT: ret 931; 932; RV64-LABEL: mgather_nxv2i64: 933; RV64: # %bb.0: 934; RV64-NEXT: vsetvli a0, zero, e64, m2, ta, mu 935; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 936; RV64-NEXT: vmv2r.v v8, v10 937; RV64-NEXT: ret 938 %v = call <vscale x 2 x i64> @llvm.masked.gather.nxv2i64.nxv2p0i64(<vscale x 2 x i64*> %ptrs, i32 8, <vscale x 2 x i1> %m, <vscale x 2 x i64> %passthru) 939 ret <vscale x 2 x i64> %v 940} 941 942declare <vscale x 4 x i64> @llvm.masked.gather.nxv4i64.nxv4p0i64(<vscale x 4 x i64*>, i32, <vscale x 4 x i1>, <vscale x 4 x i64>) 943 944define <vscale x 4 x i64> @mgather_nxv4i64(<vscale x 4 x i64*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x i64> %passthru) { 945; RV32-LABEL: mgather_nxv4i64: 946; RV32: # %bb.0: 947; RV32-NEXT: vsetvli a0, zero, e64, m4, ta, mu 948; RV32-NEXT: vluxei32.v v12, (zero), v8, v0.t 949; RV32-NEXT: vmv4r.v v8, v12 950; RV32-NEXT: ret 951; 952; RV64-LABEL: mgather_nxv4i64: 953; RV64: # %bb.0: 954; RV64-NEXT: vsetvli a0, zero, e64, m4, ta, mu 955; RV64-NEXT: vluxei64.v v12, (zero), v8, v0.t 956; RV64-NEXT: vmv4r.v v8, v12 957; RV64-NEXT: ret 958 %v = call <vscale x 4 x i64> @llvm.masked.gather.nxv4i64.nxv4p0i64(<vscale x 4 x i64*> %ptrs, i32 8, <vscale x 4 x i1> %m, <vscale x 4 x i64> %passthru) 959 ret <vscale x 4 x i64> %v 960} 961 962define <vscale x 4 x i64> @mgather_truemask_nxv4i64(<vscale x 4 x i64*> %ptrs, <vscale x 4 x i64> %passthru) { 963; RV32-LABEL: mgather_truemask_nxv4i64: 964; RV32: # %bb.0: 965; RV32-NEXT: vsetvli a0, zero, e64, m4, ta, mu 966; RV32-NEXT: vluxei32.v v12, (zero), v8 967; RV32-NEXT: vmv4r.v v8, v12 968; RV32-NEXT: ret 969; 970; RV64-LABEL: mgather_truemask_nxv4i64: 971; RV64: # %bb.0: 972; RV64-NEXT: vsetvli a0, zero, e64, m4, ta, mu 973; RV64-NEXT: vluxei64.v v8, (zero), v8 974; RV64-NEXT: ret 975 %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0 976 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer 977 %v = call <vscale x 4 x i64> @llvm.masked.gather.nxv4i64.nxv4p0i64(<vscale x 4 x i64*> %ptrs, i32 8, <vscale x 4 x i1> %mtrue, <vscale x 4 x i64> %passthru) 978 ret <vscale x 4 x i64> %v 979} 980 981define <vscale x 4 x i64> @mgather_falsemask_nxv4i64(<vscale x 4 x i64*> %ptrs, <vscale x 4 x i64> %passthru) { 982; RV32-LABEL: mgather_falsemask_nxv4i64: 983; RV32: # %bb.0: 984; RV32-NEXT: vmv4r.v v8, v12 985; RV32-NEXT: ret 986; 987; RV64-LABEL: mgather_falsemask_nxv4i64: 988; RV64: # %bb.0: 989; RV64-NEXT: vmv4r.v v8, v12 990; RV64-NEXT: ret 991 %v = call <vscale x 4 x i64> @llvm.masked.gather.nxv4i64.nxv4p0i64(<vscale x 4 x i64*> %ptrs, i32 8, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x i64> %passthru) 992 ret <vscale x 4 x i64> %v 993} 994 995declare <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*>, i32, <vscale x 8 x i1>, <vscale x 8 x i64>) 996 997define <vscale x 8 x i64> @mgather_nxv8i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) { 998; RV32-LABEL: mgather_nxv8i64: 999; RV32: # %bb.0: 1000; RV32-NEXT: vsetvli a0, zero, e64, m8, ta, mu 1001; RV32-NEXT: vluxei32.v v16, (zero), v8, v0.t 1002; RV32-NEXT: vmv8r.v v8, v16 1003; RV32-NEXT: ret 1004; 1005; RV64-LABEL: mgather_nxv8i64: 1006; RV64: # %bb.0: 1007; RV64-NEXT: vsetvli a0, zero, e64, m8, ta, mu 1008; RV64-NEXT: vluxei64.v v16, (zero), v8, v0.t 1009; RV64-NEXT: vmv8r.v v8, v16 1010; RV64-NEXT: ret 1011 %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) 1012 ret <vscale x 8 x i64> %v 1013} 1014 1015define <vscale x 8 x i64> @mgather_baseidx_nxv8i8_nxv8i64(i64* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) { 1016; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8i64: 1017; RV32: # %bb.0: 1018; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 1019; RV32-NEXT: vsext.vf4 v12, v8 1020; RV32-NEXT: vsll.vi v8, v12, 3 1021; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 1022; RV32-NEXT: vluxei32.v v16, (a0), v8, v0.t 1023; RV32-NEXT: vmv8r.v v8, v16 1024; RV32-NEXT: ret 1025; 1026; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8i64: 1027; RV64: # %bb.0: 1028; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1029; RV64-NEXT: vsext.vf8 v24, v8 1030; RV64-NEXT: vsll.vi v8, v24, 3 1031; RV64-NEXT: vluxei64.v v16, (a0), v8, v0.t 1032; RV64-NEXT: vmv8r.v v8, v16 1033; RV64-NEXT: ret 1034 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i8> %idxs 1035 %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) 1036 ret <vscale x 8 x i64> %v 1037} 1038 1039define <vscale x 8 x i64> @mgather_baseidx_sext_nxv8i8_nxv8i64(i64* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) { 1040; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i64: 1041; RV32: # %bb.0: 1042; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1043; RV32-NEXT: vsext.vf8 v24, v8 1044; RV32-NEXT: vsll.vi v8, v24, 3 1045; RV32-NEXT: vluxei64.v v16, (a0), v8, v0.t 1046; RV32-NEXT: vmv8r.v v8, v16 1047; RV32-NEXT: ret 1048; 1049; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i64: 1050; RV64: # %bb.0: 1051; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1052; RV64-NEXT: vsext.vf8 v24, v8 1053; RV64-NEXT: vsll.vi v8, v24, 3 1054; RV64-NEXT: vluxei64.v v16, (a0), v8, v0.t 1055; RV64-NEXT: vmv8r.v v8, v16 1056; RV64-NEXT: ret 1057 %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i64> 1058 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs 1059 %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) 1060 ret <vscale x 8 x i64> %v 1061} 1062 1063define <vscale x 8 x i64> @mgather_baseidx_zext_nxv8i8_nxv8i64(i64* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) { 1064; RV32-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i64: 1065; RV32: # %bb.0: 1066; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1067; RV32-NEXT: vzext.vf8 v24, v8 1068; RV32-NEXT: vsll.vi v8, v24, 3 1069; RV32-NEXT: vluxei64.v v16, (a0), v8, v0.t 1070; RV32-NEXT: vmv8r.v v8, v16 1071; RV32-NEXT: ret 1072; 1073; RV64-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i64: 1074; RV64: # %bb.0: 1075; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1076; RV64-NEXT: vzext.vf8 v24, v8 1077; RV64-NEXT: vsll.vi v8, v24, 3 1078; RV64-NEXT: vluxei64.v v16, (a0), v8, v0.t 1079; RV64-NEXT: vmv8r.v v8, v16 1080; RV64-NEXT: ret 1081 %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i64> 1082 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs 1083 %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) 1084 ret <vscale x 8 x i64> %v 1085} 1086 1087define <vscale x 8 x i64> @mgather_baseidx_nxv8i16_nxv8i64(i64* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) { 1088; RV32-LABEL: mgather_baseidx_nxv8i16_nxv8i64: 1089; RV32: # %bb.0: 1090; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 1091; RV32-NEXT: vsext.vf2 v12, v8 1092; RV32-NEXT: vsll.vi v8, v12, 3 1093; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 1094; RV32-NEXT: vluxei32.v v16, (a0), v8, v0.t 1095; RV32-NEXT: vmv8r.v v8, v16 1096; RV32-NEXT: ret 1097; 1098; RV64-LABEL: mgather_baseidx_nxv8i16_nxv8i64: 1099; RV64: # %bb.0: 1100; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1101; RV64-NEXT: vsext.vf4 v24, v8 1102; RV64-NEXT: vsll.vi v8, v24, 3 1103; RV64-NEXT: vluxei64.v v16, (a0), v8, v0.t 1104; RV64-NEXT: vmv8r.v v8, v16 1105; RV64-NEXT: ret 1106 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i16> %idxs 1107 %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) 1108 ret <vscale x 8 x i64> %v 1109} 1110 1111define <vscale x 8 x i64> @mgather_baseidx_sext_nxv8i16_nxv8i64(i64* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) { 1112; RV32-LABEL: mgather_baseidx_sext_nxv8i16_nxv8i64: 1113; RV32: # %bb.0: 1114; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1115; RV32-NEXT: vsext.vf4 v24, v8 1116; RV32-NEXT: vsll.vi v8, v24, 3 1117; RV32-NEXT: vluxei64.v v16, (a0), v8, v0.t 1118; RV32-NEXT: vmv8r.v v8, v16 1119; RV32-NEXT: ret 1120; 1121; RV64-LABEL: mgather_baseidx_sext_nxv8i16_nxv8i64: 1122; RV64: # %bb.0: 1123; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1124; RV64-NEXT: vsext.vf4 v24, v8 1125; RV64-NEXT: vsll.vi v8, v24, 3 1126; RV64-NEXT: vluxei64.v v16, (a0), v8, v0.t 1127; RV64-NEXT: vmv8r.v v8, v16 1128; RV64-NEXT: ret 1129 %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i64> 1130 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs 1131 %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) 1132 ret <vscale x 8 x i64> %v 1133} 1134 1135define <vscale x 8 x i64> @mgather_baseidx_zext_nxv8i16_nxv8i64(i64* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) { 1136; RV32-LABEL: mgather_baseidx_zext_nxv8i16_nxv8i64: 1137; RV32: # %bb.0: 1138; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1139; RV32-NEXT: vzext.vf4 v24, v8 1140; RV32-NEXT: vsll.vi v8, v24, 3 1141; RV32-NEXT: vluxei64.v v16, (a0), v8, v0.t 1142; RV32-NEXT: vmv8r.v v8, v16 1143; RV32-NEXT: ret 1144; 1145; RV64-LABEL: mgather_baseidx_zext_nxv8i16_nxv8i64: 1146; RV64: # %bb.0: 1147; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1148; RV64-NEXT: vzext.vf4 v24, v8 1149; RV64-NEXT: vsll.vi v8, v24, 3 1150; RV64-NEXT: vluxei64.v v16, (a0), v8, v0.t 1151; RV64-NEXT: vmv8r.v v8, v16 1152; RV64-NEXT: ret 1153 %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i64> 1154 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs 1155 %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) 1156 ret <vscale x 8 x i64> %v 1157} 1158 1159define <vscale x 8 x i64> @mgather_baseidx_nxv8i32_nxv8i64(i64* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) { 1160; RV32-LABEL: mgather_baseidx_nxv8i32_nxv8i64: 1161; RV32: # %bb.0: 1162; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 1163; RV32-NEXT: vsll.vi v8, v8, 3 1164; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 1165; RV32-NEXT: vluxei32.v v16, (a0), v8, v0.t 1166; RV32-NEXT: vmv8r.v v8, v16 1167; RV32-NEXT: ret 1168; 1169; RV64-LABEL: mgather_baseidx_nxv8i32_nxv8i64: 1170; RV64: # %bb.0: 1171; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1172; RV64-NEXT: vsext.vf2 v24, v8 1173; RV64-NEXT: vsll.vi v8, v24, 3 1174; RV64-NEXT: vluxei64.v v16, (a0), v8, v0.t 1175; RV64-NEXT: vmv8r.v v8, v16 1176; RV64-NEXT: ret 1177 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i32> %idxs 1178 %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) 1179 ret <vscale x 8 x i64> %v 1180} 1181 1182define <vscale x 8 x i64> @mgather_baseidx_sext_nxv8i32_nxv8i64(i64* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) { 1183; RV32-LABEL: mgather_baseidx_sext_nxv8i32_nxv8i64: 1184; RV32: # %bb.0: 1185; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1186; RV32-NEXT: vsext.vf2 v24, v8 1187; RV32-NEXT: vsll.vi v8, v24, 3 1188; RV32-NEXT: vluxei64.v v16, (a0), v8, v0.t 1189; RV32-NEXT: vmv8r.v v8, v16 1190; RV32-NEXT: ret 1191; 1192; RV64-LABEL: mgather_baseidx_sext_nxv8i32_nxv8i64: 1193; RV64: # %bb.0: 1194; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1195; RV64-NEXT: vsext.vf2 v24, v8 1196; RV64-NEXT: vsll.vi v8, v24, 3 1197; RV64-NEXT: vluxei64.v v16, (a0), v8, v0.t 1198; RV64-NEXT: vmv8r.v v8, v16 1199; RV64-NEXT: ret 1200 %eidxs = sext <vscale x 8 x i32> %idxs to <vscale x 8 x i64> 1201 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs 1202 %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) 1203 ret <vscale x 8 x i64> %v 1204} 1205 1206define <vscale x 8 x i64> @mgather_baseidx_zext_nxv8i32_nxv8i64(i64* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) { 1207; RV32-LABEL: mgather_baseidx_zext_nxv8i32_nxv8i64: 1208; RV32: # %bb.0: 1209; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1210; RV32-NEXT: vzext.vf2 v24, v8 1211; RV32-NEXT: vsll.vi v8, v24, 3 1212; RV32-NEXT: vluxei64.v v16, (a0), v8, v0.t 1213; RV32-NEXT: vmv8r.v v8, v16 1214; RV32-NEXT: ret 1215; 1216; RV64-LABEL: mgather_baseidx_zext_nxv8i32_nxv8i64: 1217; RV64: # %bb.0: 1218; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1219; RV64-NEXT: vzext.vf2 v24, v8 1220; RV64-NEXT: vsll.vi v8, v24, 3 1221; RV64-NEXT: vluxei64.v v16, (a0), v8, v0.t 1222; RV64-NEXT: vmv8r.v v8, v16 1223; RV64-NEXT: ret 1224 %eidxs = zext <vscale x 8 x i32> %idxs to <vscale x 8 x i64> 1225 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs 1226 %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) 1227 ret <vscale x 8 x i64> %v 1228} 1229 1230define <vscale x 8 x i64> @mgather_baseidx_nxv8i64(i64* %base, <vscale x 8 x i64> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) { 1231; RV32-LABEL: mgather_baseidx_nxv8i64: 1232; RV32: # %bb.0: 1233; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1234; RV32-NEXT: vsll.vi v8, v8, 3 1235; RV32-NEXT: vluxei64.v v16, (a0), v8, v0.t 1236; RV32-NEXT: vmv8r.v v8, v16 1237; RV32-NEXT: ret 1238; 1239; RV64-LABEL: mgather_baseidx_nxv8i64: 1240; RV64: # %bb.0: 1241; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1242; RV64-NEXT: vsll.vi v8, v8, 3 1243; RV64-NEXT: vluxei64.v v16, (a0), v8, v0.t 1244; RV64-NEXT: vmv8r.v v8, v16 1245; RV64-NEXT: ret 1246 %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %idxs 1247 %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) 1248 ret <vscale x 8 x i64> %v 1249} 1250 1251declare <vscale x 16 x i64> @llvm.masked.gather.nxv16i64.nxv16p0f64(<vscale x 16 x i64*>, i32, <vscale x 16 x i1>, <vscale x 16 x i64>) 1252 1253declare <vscale x 16 x i64> @llvm.experimental.vector.insert.nxv8i64.nxv16i64(<vscale x 16 x i64>, <vscale x 8 x i64>, i64 %idx) 1254declare <vscale x 16 x i64*> @llvm.experimental.vector.insert.nxv8p0i64.nxv16p0i64(<vscale x 16 x i64*>, <vscale x 8 x i64*>, i64 %idx) 1255 1256define void @mgather_nxv16i64(<vscale x 8 x i64*> %ptrs0, <vscale x 8 x i64*> %ptrs1, <vscale x 16 x i1> %m, <vscale x 8 x i64> %passthru0, <vscale x 8 x i64> %passthru1, <vscale x 16 x i64>* %out) { 1257; RV32-LABEL: mgather_nxv16i64: 1258; RV32: # %bb.0: 1259; RV32-NEXT: vl8re64.v v24, (a0) 1260; RV32-NEXT: vsetvli a0, zero, e64, m8, ta, mu 1261; RV32-NEXT: vluxei32.v v16, (zero), v8, v0.t 1262; RV32-NEXT: csrr a0, vlenb 1263; RV32-NEXT: srli a2, a0, 3 1264; RV32-NEXT: vsetvli a3, zero, e8, mf4, ta, mu 1265; RV32-NEXT: vslidedown.vx v0, v0, a2 1266; RV32-NEXT: vsetvli a2, zero, e64, m8, ta, mu 1267; RV32-NEXT: vluxei32.v v24, (zero), v12, v0.t 1268; RV32-NEXT: slli a0, a0, 3 1269; RV32-NEXT: add a0, a1, a0 1270; RV32-NEXT: vs8r.v v24, (a0) 1271; RV32-NEXT: vs8r.v v16, (a1) 1272; RV32-NEXT: ret 1273; 1274; RV64-LABEL: mgather_nxv16i64: 1275; RV64: # %bb.0: 1276; RV64-NEXT: addi sp, sp, -16 1277; RV64-NEXT: .cfi_def_cfa_offset 16 1278; RV64-NEXT: csrr a3, vlenb 1279; RV64-NEXT: slli a3, a3, 3 1280; RV64-NEXT: sub sp, sp, a3 1281; RV64-NEXT: vl8re64.v v24, (a0) 1282; RV64-NEXT: addi a0, sp, 16 1283; RV64-NEXT: vs8r.v v16, (a0) # Unknown-size Folded Spill 1284; RV64-NEXT: vmv8r.v v16, v8 1285; RV64-NEXT: vl8re64.v v8, (a1) 1286; RV64-NEXT: vsetvli a0, zero, e64, m8, ta, mu 1287; RV64-NEXT: vluxei64.v v24, (zero), v16, v0.t 1288; RV64-NEXT: csrr a0, vlenb 1289; RV64-NEXT: srli a1, a0, 3 1290; RV64-NEXT: vsetvli a3, zero, e8, mf4, ta, mu 1291; RV64-NEXT: vslidedown.vx v0, v0, a1 1292; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1293; RV64-NEXT: addi a1, sp, 16 1294; RV64-NEXT: vl8re8.v v16, (a1) # Unknown-size Folded Reload 1295; RV64-NEXT: vluxei64.v v8, (zero), v16, v0.t 1296; RV64-NEXT: slli a0, a0, 3 1297; RV64-NEXT: add a0, a2, a0 1298; RV64-NEXT: vs8r.v v8, (a0) 1299; RV64-NEXT: vs8r.v v24, (a2) 1300; RV64-NEXT: csrr a0, vlenb 1301; RV64-NEXT: slli a0, a0, 3 1302; RV64-NEXT: add sp, sp, a0 1303; RV64-NEXT: addi sp, sp, 16 1304; RV64-NEXT: ret 1305 %p0 = call <vscale x 16 x i64*> @llvm.experimental.vector.insert.nxv8p0i64.nxv16p0i64(<vscale x 16 x i64*> undef, <vscale x 8 x i64*> %ptrs0, i64 0) 1306 %p1 = call <vscale x 16 x i64*> @llvm.experimental.vector.insert.nxv8p0i64.nxv16p0i64(<vscale x 16 x i64*> %p0, <vscale x 8 x i64*> %ptrs1, i64 8) 1307 1308 %pt0 = call <vscale x 16 x i64> @llvm.experimental.vector.insert.nxv8i64.nxv16i64(<vscale x 16 x i64> undef, <vscale x 8 x i64> %passthru0, i64 0) 1309 %pt1 = call <vscale x 16 x i64> @llvm.experimental.vector.insert.nxv8i64.nxv16i64(<vscale x 16 x i64> %pt0, <vscale x 8 x i64> %passthru1, i64 8) 1310 1311 %v = call <vscale x 16 x i64> @llvm.masked.gather.nxv16i64.nxv16p0f64(<vscale x 16 x i64*> %p1, i32 8, <vscale x 16 x i1> %m, <vscale x 16 x i64> %pt1) 1312 store <vscale x 16 x i64> %v, <vscale x 16 x i64>* %out 1313 ret void 1314} 1315 1316 1317declare <vscale x 1 x half> @llvm.masked.gather.nxv1f16.nxv1p0f16(<vscale x 1 x half*>, i32, <vscale x 1 x i1>, <vscale x 1 x half>) 1318 1319define <vscale x 1 x half> @mgather_nxv1f16(<vscale x 1 x half*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x half> %passthru) { 1320; RV32-LABEL: mgather_nxv1f16: 1321; RV32: # %bb.0: 1322; RV32-NEXT: vsetvli a0, zero, e16, mf4, ta, mu 1323; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 1324; RV32-NEXT: vmv1r.v v8, v9 1325; RV32-NEXT: ret 1326; 1327; RV64-LABEL: mgather_nxv1f16: 1328; RV64: # %bb.0: 1329; RV64-NEXT: vsetvli a0, zero, e16, mf4, ta, mu 1330; RV64-NEXT: vluxei64.v v9, (zero), v8, v0.t 1331; RV64-NEXT: vmv1r.v v8, v9 1332; RV64-NEXT: ret 1333 %v = call <vscale x 1 x half> @llvm.masked.gather.nxv1f16.nxv1p0f16(<vscale x 1 x half*> %ptrs, i32 2, <vscale x 1 x i1> %m, <vscale x 1 x half> %passthru) 1334 ret <vscale x 1 x half> %v 1335} 1336 1337declare <vscale x 2 x half> @llvm.masked.gather.nxv2f16.nxv2p0f16(<vscale x 2 x half*>, i32, <vscale x 2 x i1>, <vscale x 2 x half>) 1338 1339define <vscale x 2 x half> @mgather_nxv2f16(<vscale x 2 x half*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x half> %passthru) { 1340; RV32-LABEL: mgather_nxv2f16: 1341; RV32: # %bb.0: 1342; RV32-NEXT: vsetvli a0, zero, e16, mf2, ta, mu 1343; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 1344; RV32-NEXT: vmv1r.v v8, v9 1345; RV32-NEXT: ret 1346; 1347; RV64-LABEL: mgather_nxv2f16: 1348; RV64: # %bb.0: 1349; RV64-NEXT: vsetvli a0, zero, e16, mf2, ta, mu 1350; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 1351; RV64-NEXT: vmv1r.v v8, v10 1352; RV64-NEXT: ret 1353 %v = call <vscale x 2 x half> @llvm.masked.gather.nxv2f16.nxv2p0f16(<vscale x 2 x half*> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x half> %passthru) 1354 ret <vscale x 2 x half> %v 1355} 1356 1357declare <vscale x 4 x half> @llvm.masked.gather.nxv4f16.nxv4p0f16(<vscale x 4 x half*>, i32, <vscale x 4 x i1>, <vscale x 4 x half>) 1358 1359define <vscale x 4 x half> @mgather_nxv4f16(<vscale x 4 x half*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x half> %passthru) { 1360; RV32-LABEL: mgather_nxv4f16: 1361; RV32: # %bb.0: 1362; RV32-NEXT: vsetvli a0, zero, e16, m1, ta, mu 1363; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 1364; RV32-NEXT: vmv1r.v v8, v10 1365; RV32-NEXT: ret 1366; 1367; RV64-LABEL: mgather_nxv4f16: 1368; RV64: # %bb.0: 1369; RV64-NEXT: vsetvli a0, zero, e16, m1, ta, mu 1370; RV64-NEXT: vluxei64.v v12, (zero), v8, v0.t 1371; RV64-NEXT: vmv1r.v v8, v12 1372; RV64-NEXT: ret 1373 %v = call <vscale x 4 x half> @llvm.masked.gather.nxv4f16.nxv4p0f16(<vscale x 4 x half*> %ptrs, i32 2, <vscale x 4 x i1> %m, <vscale x 4 x half> %passthru) 1374 ret <vscale x 4 x half> %v 1375} 1376 1377define <vscale x 4 x half> @mgather_truemask_nxv4f16(<vscale x 4 x half*> %ptrs, <vscale x 4 x half> %passthru) { 1378; RV32-LABEL: mgather_truemask_nxv4f16: 1379; RV32: # %bb.0: 1380; RV32-NEXT: vsetvli a0, zero, e16, m1, ta, mu 1381; RV32-NEXT: vluxei32.v v10, (zero), v8 1382; RV32-NEXT: vmv1r.v v8, v10 1383; RV32-NEXT: ret 1384; 1385; RV64-LABEL: mgather_truemask_nxv4f16: 1386; RV64: # %bb.0: 1387; RV64-NEXT: vsetvli a0, zero, e16, m1, ta, mu 1388; RV64-NEXT: vluxei64.v v12, (zero), v8 1389; RV64-NEXT: vmv1r.v v8, v12 1390; RV64-NEXT: ret 1391 %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0 1392 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer 1393 %v = call <vscale x 4 x half> @llvm.masked.gather.nxv4f16.nxv4p0f16(<vscale x 4 x half*> %ptrs, i32 2, <vscale x 4 x i1> %mtrue, <vscale x 4 x half> %passthru) 1394 ret <vscale x 4 x half> %v 1395} 1396 1397define <vscale x 4 x half> @mgather_falsemask_nxv4f16(<vscale x 4 x half*> %ptrs, <vscale x 4 x half> %passthru) { 1398; RV32-LABEL: mgather_falsemask_nxv4f16: 1399; RV32: # %bb.0: 1400; RV32-NEXT: vmv1r.v v8, v10 1401; RV32-NEXT: ret 1402; 1403; RV64-LABEL: mgather_falsemask_nxv4f16: 1404; RV64: # %bb.0: 1405; RV64-NEXT: vmv1r.v v8, v12 1406; RV64-NEXT: ret 1407 %v = call <vscale x 4 x half> @llvm.masked.gather.nxv4f16.nxv4p0f16(<vscale x 4 x half*> %ptrs, i32 2, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x half> %passthru) 1408 ret <vscale x 4 x half> %v 1409} 1410 1411declare <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*>, i32, <vscale x 8 x i1>, <vscale x 8 x half>) 1412 1413define <vscale x 8 x half> @mgather_nxv8f16(<vscale x 8 x half*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) { 1414; RV32-LABEL: mgather_nxv8f16: 1415; RV32: # %bb.0: 1416; RV32-NEXT: vsetvli a0, zero, e16, m2, ta, mu 1417; RV32-NEXT: vluxei32.v v12, (zero), v8, v0.t 1418; RV32-NEXT: vmv2r.v v8, v12 1419; RV32-NEXT: ret 1420; 1421; RV64-LABEL: mgather_nxv8f16: 1422; RV64: # %bb.0: 1423; RV64-NEXT: vsetvli a0, zero, e16, m2, ta, mu 1424; RV64-NEXT: vluxei64.v v16, (zero), v8, v0.t 1425; RV64-NEXT: vmv2r.v v8, v16 1426; RV64-NEXT: ret 1427 %v = call <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) 1428 ret <vscale x 8 x half> %v 1429} 1430 1431define <vscale x 8 x half> @mgather_baseidx_nxv8i8_nxv8f16(half* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) { 1432; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8f16: 1433; RV32: # %bb.0: 1434; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 1435; RV32-NEXT: vsext.vf4 v12, v8 1436; RV32-NEXT: vadd.vv v12, v12, v12 1437; RV32-NEXT: vsetvli zero, zero, e16, m2, ta, mu 1438; RV32-NEXT: vluxei32.v v10, (a0), v12, v0.t 1439; RV32-NEXT: vmv2r.v v8, v10 1440; RV32-NEXT: ret 1441; 1442; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8f16: 1443; RV64: # %bb.0: 1444; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1445; RV64-NEXT: vsext.vf8 v16, v8 1446; RV64-NEXT: vadd.vv v16, v16, v16 1447; RV64-NEXT: vsetvli zero, zero, e16, m2, ta, mu 1448; RV64-NEXT: vluxei64.v v10, (a0), v16, v0.t 1449; RV64-NEXT: vmv2r.v v8, v10 1450; RV64-NEXT: ret 1451 %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i8> %idxs 1452 %v = call <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) 1453 ret <vscale x 8 x half> %v 1454} 1455 1456define <vscale x 8 x half> @mgather_baseidx_sext_nxv8i8_nxv8f16(half* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) { 1457; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f16: 1458; RV32: # %bb.0: 1459; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 1460; RV32-NEXT: vsext.vf4 v12, v8 1461; RV32-NEXT: vadd.vv v12, v12, v12 1462; RV32-NEXT: vsetvli zero, zero, e16, m2, ta, mu 1463; RV32-NEXT: vluxei32.v v10, (a0), v12, v0.t 1464; RV32-NEXT: vmv2r.v v8, v10 1465; RV32-NEXT: ret 1466; 1467; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f16: 1468; RV64: # %bb.0: 1469; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1470; RV64-NEXT: vsext.vf8 v16, v8 1471; RV64-NEXT: vadd.vv v16, v16, v16 1472; RV64-NEXT: vsetvli zero, zero, e16, m2, ta, mu 1473; RV64-NEXT: vluxei64.v v10, (a0), v16, v0.t 1474; RV64-NEXT: vmv2r.v v8, v10 1475; RV64-NEXT: ret 1476 %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i16> 1477 %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i16> %eidxs 1478 %v = call <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) 1479 ret <vscale x 8 x half> %v 1480} 1481 1482define <vscale x 8 x half> @mgather_baseidx_zext_nxv8i8_nxv8f16(half* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) { 1483; RV32-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f16: 1484; RV32: # %bb.0: 1485; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 1486; RV32-NEXT: vzext.vf4 v12, v8 1487; RV32-NEXT: vadd.vv v12, v12, v12 1488; RV32-NEXT: vsetvli zero, zero, e16, m2, ta, mu 1489; RV32-NEXT: vluxei32.v v10, (a0), v12, v0.t 1490; RV32-NEXT: vmv2r.v v8, v10 1491; RV32-NEXT: ret 1492; 1493; RV64-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f16: 1494; RV64: # %bb.0: 1495; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1496; RV64-NEXT: vzext.vf8 v16, v8 1497; RV64-NEXT: vadd.vv v16, v16, v16 1498; RV64-NEXT: vsetvli zero, zero, e16, m2, ta, mu 1499; RV64-NEXT: vluxei64.v v10, (a0), v16, v0.t 1500; RV64-NEXT: vmv2r.v v8, v10 1501; RV64-NEXT: ret 1502 %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i16> 1503 %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i16> %eidxs 1504 %v = call <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) 1505 ret <vscale x 8 x half> %v 1506} 1507 1508define <vscale x 8 x half> @mgather_baseidx_nxv8f16(half* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) { 1509; RV32-LABEL: mgather_baseidx_nxv8f16: 1510; RV32: # %bb.0: 1511; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 1512; RV32-NEXT: vsext.vf2 v12, v8 1513; RV32-NEXT: vadd.vv v12, v12, v12 1514; RV32-NEXT: vsetvli zero, zero, e16, m2, ta, mu 1515; RV32-NEXT: vluxei32.v v10, (a0), v12, v0.t 1516; RV32-NEXT: vmv2r.v v8, v10 1517; RV32-NEXT: ret 1518; 1519; RV64-LABEL: mgather_baseidx_nxv8f16: 1520; RV64: # %bb.0: 1521; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1522; RV64-NEXT: vsext.vf4 v16, v8 1523; RV64-NEXT: vadd.vv v16, v16, v16 1524; RV64-NEXT: vsetvli zero, zero, e16, m2, ta, mu 1525; RV64-NEXT: vluxei64.v v10, (a0), v16, v0.t 1526; RV64-NEXT: vmv2r.v v8, v10 1527; RV64-NEXT: ret 1528 %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i16> %idxs 1529 %v = call <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) 1530 ret <vscale x 8 x half> %v 1531} 1532 1533declare <vscale x 1 x float> @llvm.masked.gather.nxv1f32.nxv1p0f32(<vscale x 1 x float*>, i32, <vscale x 1 x i1>, <vscale x 1 x float>) 1534 1535define <vscale x 1 x float> @mgather_nxv1f32(<vscale x 1 x float*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x float> %passthru) { 1536; RV32-LABEL: mgather_nxv1f32: 1537; RV32: # %bb.0: 1538; RV32-NEXT: vsetvli a0, zero, e32, mf2, ta, mu 1539; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 1540; RV32-NEXT: vmv1r.v v8, v9 1541; RV32-NEXT: ret 1542; 1543; RV64-LABEL: mgather_nxv1f32: 1544; RV64: # %bb.0: 1545; RV64-NEXT: vsetvli a0, zero, e32, mf2, ta, mu 1546; RV64-NEXT: vluxei64.v v9, (zero), v8, v0.t 1547; RV64-NEXT: vmv1r.v v8, v9 1548; RV64-NEXT: ret 1549 %v = call <vscale x 1 x float> @llvm.masked.gather.nxv1f32.nxv1p0f32(<vscale x 1 x float*> %ptrs, i32 4, <vscale x 1 x i1> %m, <vscale x 1 x float> %passthru) 1550 ret <vscale x 1 x float> %v 1551} 1552 1553declare <vscale x 2 x float> @llvm.masked.gather.nxv2f32.nxv2p0f32(<vscale x 2 x float*>, i32, <vscale x 2 x i1>, <vscale x 2 x float>) 1554 1555define <vscale x 2 x float> @mgather_nxv2f32(<vscale x 2 x float*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x float> %passthru) { 1556; RV32-LABEL: mgather_nxv2f32: 1557; RV32: # %bb.0: 1558; RV32-NEXT: vsetvli a0, zero, e32, m1, ta, mu 1559; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 1560; RV32-NEXT: vmv1r.v v8, v9 1561; RV32-NEXT: ret 1562; 1563; RV64-LABEL: mgather_nxv2f32: 1564; RV64: # %bb.0: 1565; RV64-NEXT: vsetvli a0, zero, e32, m1, ta, mu 1566; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 1567; RV64-NEXT: vmv1r.v v8, v10 1568; RV64-NEXT: ret 1569 %v = call <vscale x 2 x float> @llvm.masked.gather.nxv2f32.nxv2p0f32(<vscale x 2 x float*> %ptrs, i32 4, <vscale x 2 x i1> %m, <vscale x 2 x float> %passthru) 1570 ret <vscale x 2 x float> %v 1571} 1572 1573declare <vscale x 4 x float> @llvm.masked.gather.nxv4f32.nxv4p0f32(<vscale x 4 x float*>, i32, <vscale x 4 x i1>, <vscale x 4 x float>) 1574 1575define <vscale x 4 x float> @mgather_nxv4f32(<vscale x 4 x float*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x float> %passthru) { 1576; RV32-LABEL: mgather_nxv4f32: 1577; RV32: # %bb.0: 1578; RV32-NEXT: vsetvli a0, zero, e32, m2, ta, mu 1579; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 1580; RV32-NEXT: vmv2r.v v8, v10 1581; RV32-NEXT: ret 1582; 1583; RV64-LABEL: mgather_nxv4f32: 1584; RV64: # %bb.0: 1585; RV64-NEXT: vsetvli a0, zero, e32, m2, ta, mu 1586; RV64-NEXT: vluxei64.v v12, (zero), v8, v0.t 1587; RV64-NEXT: vmv2r.v v8, v12 1588; RV64-NEXT: ret 1589 %v = call <vscale x 4 x float> @llvm.masked.gather.nxv4f32.nxv4p0f32(<vscale x 4 x float*> %ptrs, i32 4, <vscale x 4 x i1> %m, <vscale x 4 x float> %passthru) 1590 ret <vscale x 4 x float> %v 1591} 1592 1593define <vscale x 4 x float> @mgather_truemask_nxv4f32(<vscale x 4 x float*> %ptrs, <vscale x 4 x float> %passthru) { 1594; RV32-LABEL: mgather_truemask_nxv4f32: 1595; RV32: # %bb.0: 1596; RV32-NEXT: vsetvli a0, zero, e32, m2, ta, mu 1597; RV32-NEXT: vluxei32.v v8, (zero), v8 1598; RV32-NEXT: ret 1599; 1600; RV64-LABEL: mgather_truemask_nxv4f32: 1601; RV64: # %bb.0: 1602; RV64-NEXT: vsetvli a0, zero, e32, m2, ta, mu 1603; RV64-NEXT: vluxei64.v v12, (zero), v8 1604; RV64-NEXT: vmv2r.v v8, v12 1605; RV64-NEXT: ret 1606 %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0 1607 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer 1608 %v = call <vscale x 4 x float> @llvm.masked.gather.nxv4f32.nxv4p0f32(<vscale x 4 x float*> %ptrs, i32 4, <vscale x 4 x i1> %mtrue, <vscale x 4 x float> %passthru) 1609 ret <vscale x 4 x float> %v 1610} 1611 1612define <vscale x 4 x float> @mgather_falsemask_nxv4f32(<vscale x 4 x float*> %ptrs, <vscale x 4 x float> %passthru) { 1613; RV32-LABEL: mgather_falsemask_nxv4f32: 1614; RV32: # %bb.0: 1615; RV32-NEXT: vmv2r.v v8, v10 1616; RV32-NEXT: ret 1617; 1618; RV64-LABEL: mgather_falsemask_nxv4f32: 1619; RV64: # %bb.0: 1620; RV64-NEXT: vmv2r.v v8, v12 1621; RV64-NEXT: ret 1622 %v = call <vscale x 4 x float> @llvm.masked.gather.nxv4f32.nxv4p0f32(<vscale x 4 x float*> %ptrs, i32 4, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x float> %passthru) 1623 ret <vscale x 4 x float> %v 1624} 1625 1626declare <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*>, i32, <vscale x 8 x i1>, <vscale x 8 x float>) 1627 1628define <vscale x 8 x float> @mgather_nxv8f32(<vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) { 1629; RV32-LABEL: mgather_nxv8f32: 1630; RV32: # %bb.0: 1631; RV32-NEXT: vsetvli a0, zero, e32, m4, ta, mu 1632; RV32-NEXT: vluxei32.v v12, (zero), v8, v0.t 1633; RV32-NEXT: vmv4r.v v8, v12 1634; RV32-NEXT: ret 1635; 1636; RV64-LABEL: mgather_nxv8f32: 1637; RV64: # %bb.0: 1638; RV64-NEXT: vsetvli a0, zero, e32, m4, ta, mu 1639; RV64-NEXT: vluxei64.v v16, (zero), v8, v0.t 1640; RV64-NEXT: vmv4r.v v8, v16 1641; RV64-NEXT: ret 1642 %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) 1643 ret <vscale x 8 x float> %v 1644} 1645 1646define <vscale x 8 x float> @mgather_baseidx_nxv8i8_nxv8f32(float* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) { 1647; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8f32: 1648; RV32: # %bb.0: 1649; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 1650; RV32-NEXT: vsext.vf4 v16, v8 1651; RV32-NEXT: vsll.vi v8, v16, 2 1652; RV32-NEXT: vluxei32.v v12, (a0), v8, v0.t 1653; RV32-NEXT: vmv4r.v v8, v12 1654; RV32-NEXT: ret 1655; 1656; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8f32: 1657; RV64: # %bb.0: 1658; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1659; RV64-NEXT: vsext.vf8 v16, v8 1660; RV64-NEXT: vsll.vi v16, v16, 2 1661; RV64-NEXT: vsetvli zero, zero, e32, m4, ta, mu 1662; RV64-NEXT: vluxei64.v v12, (a0), v16, v0.t 1663; RV64-NEXT: vmv4r.v v8, v12 1664; RV64-NEXT: ret 1665 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i8> %idxs 1666 %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) 1667 ret <vscale x 8 x float> %v 1668} 1669 1670define <vscale x 8 x float> @mgather_baseidx_sext_nxv8i8_nxv8f32(float* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) { 1671; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f32: 1672; RV32: # %bb.0: 1673; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 1674; RV32-NEXT: vsext.vf4 v16, v8 1675; RV32-NEXT: vsll.vi v8, v16, 2 1676; RV32-NEXT: vluxei32.v v12, (a0), v8, v0.t 1677; RV32-NEXT: vmv4r.v v8, v12 1678; RV32-NEXT: ret 1679; 1680; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f32: 1681; RV64: # %bb.0: 1682; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1683; RV64-NEXT: vsext.vf8 v16, v8 1684; RV64-NEXT: vsll.vi v16, v16, 2 1685; RV64-NEXT: vsetvli zero, zero, e32, m4, ta, mu 1686; RV64-NEXT: vluxei64.v v12, (a0), v16, v0.t 1687; RV64-NEXT: vmv4r.v v8, v12 1688; RV64-NEXT: ret 1689 %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i32> 1690 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs 1691 %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) 1692 ret <vscale x 8 x float> %v 1693} 1694 1695define <vscale x 8 x float> @mgather_baseidx_zext_nxv8i8_nxv8f32(float* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) { 1696; RV32-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f32: 1697; RV32: # %bb.0: 1698; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 1699; RV32-NEXT: vzext.vf4 v16, v8 1700; RV32-NEXT: vsll.vi v8, v16, 2 1701; RV32-NEXT: vluxei32.v v12, (a0), v8, v0.t 1702; RV32-NEXT: vmv4r.v v8, v12 1703; RV32-NEXT: ret 1704; 1705; RV64-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f32: 1706; RV64: # %bb.0: 1707; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1708; RV64-NEXT: vzext.vf8 v16, v8 1709; RV64-NEXT: vsll.vi v16, v16, 2 1710; RV64-NEXT: vsetvli zero, zero, e32, m4, ta, mu 1711; RV64-NEXT: vluxei64.v v12, (a0), v16, v0.t 1712; RV64-NEXT: vmv4r.v v8, v12 1713; RV64-NEXT: ret 1714 %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i32> 1715 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs 1716 %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) 1717 ret <vscale x 8 x float> %v 1718} 1719 1720define <vscale x 8 x float> @mgather_baseidx_nxv8i16_nxv8f32(float* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) { 1721; RV32-LABEL: mgather_baseidx_nxv8i16_nxv8f32: 1722; RV32: # %bb.0: 1723; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 1724; RV32-NEXT: vsext.vf2 v16, v8 1725; RV32-NEXT: vsll.vi v8, v16, 2 1726; RV32-NEXT: vluxei32.v v12, (a0), v8, v0.t 1727; RV32-NEXT: vmv4r.v v8, v12 1728; RV32-NEXT: ret 1729; 1730; RV64-LABEL: mgather_baseidx_nxv8i16_nxv8f32: 1731; RV64: # %bb.0: 1732; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1733; RV64-NEXT: vsext.vf4 v16, v8 1734; RV64-NEXT: vsll.vi v16, v16, 2 1735; RV64-NEXT: vsetvli zero, zero, e32, m4, ta, mu 1736; RV64-NEXT: vluxei64.v v12, (a0), v16, v0.t 1737; RV64-NEXT: vmv4r.v v8, v12 1738; RV64-NEXT: ret 1739 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i16> %idxs 1740 %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) 1741 ret <vscale x 8 x float> %v 1742} 1743 1744define <vscale x 8 x float> @mgather_baseidx_sext_nxv8i16_nxv8f32(float* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) { 1745; RV32-LABEL: mgather_baseidx_sext_nxv8i16_nxv8f32: 1746; RV32: # %bb.0: 1747; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 1748; RV32-NEXT: vsext.vf2 v16, v8 1749; RV32-NEXT: vsll.vi v8, v16, 2 1750; RV32-NEXT: vluxei32.v v12, (a0), v8, v0.t 1751; RV32-NEXT: vmv4r.v v8, v12 1752; RV32-NEXT: ret 1753; 1754; RV64-LABEL: mgather_baseidx_sext_nxv8i16_nxv8f32: 1755; RV64: # %bb.0: 1756; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1757; RV64-NEXT: vsext.vf4 v16, v8 1758; RV64-NEXT: vsll.vi v16, v16, 2 1759; RV64-NEXT: vsetvli zero, zero, e32, m4, ta, mu 1760; RV64-NEXT: vluxei64.v v12, (a0), v16, v0.t 1761; RV64-NEXT: vmv4r.v v8, v12 1762; RV64-NEXT: ret 1763 %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i32> 1764 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs 1765 %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) 1766 ret <vscale x 8 x float> %v 1767} 1768 1769define <vscale x 8 x float> @mgather_baseidx_zext_nxv8i16_nxv8f32(float* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) { 1770; RV32-LABEL: mgather_baseidx_zext_nxv8i16_nxv8f32: 1771; RV32: # %bb.0: 1772; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 1773; RV32-NEXT: vzext.vf2 v16, v8 1774; RV32-NEXT: vsll.vi v8, v16, 2 1775; RV32-NEXT: vluxei32.v v12, (a0), v8, v0.t 1776; RV32-NEXT: vmv4r.v v8, v12 1777; RV32-NEXT: ret 1778; 1779; RV64-LABEL: mgather_baseidx_zext_nxv8i16_nxv8f32: 1780; RV64: # %bb.0: 1781; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1782; RV64-NEXT: vzext.vf4 v16, v8 1783; RV64-NEXT: vsll.vi v16, v16, 2 1784; RV64-NEXT: vsetvli zero, zero, e32, m4, ta, mu 1785; RV64-NEXT: vluxei64.v v12, (a0), v16, v0.t 1786; RV64-NEXT: vmv4r.v v8, v12 1787; RV64-NEXT: ret 1788 %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i32> 1789 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs 1790 %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) 1791 ret <vscale x 8 x float> %v 1792} 1793 1794define <vscale x 8 x float> @mgather_baseidx_nxv8f32(float* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) { 1795; RV32-LABEL: mgather_baseidx_nxv8f32: 1796; RV32: # %bb.0: 1797; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 1798; RV32-NEXT: vsll.vi v8, v8, 2 1799; RV32-NEXT: vluxei32.v v12, (a0), v8, v0.t 1800; RV32-NEXT: vmv4r.v v8, v12 1801; RV32-NEXT: ret 1802; 1803; RV64-LABEL: mgather_baseidx_nxv8f32: 1804; RV64: # %bb.0: 1805; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1806; RV64-NEXT: vsext.vf2 v16, v8 1807; RV64-NEXT: vsll.vi v16, v16, 2 1808; RV64-NEXT: vsetvli zero, zero, e32, m4, ta, mu 1809; RV64-NEXT: vluxei64.v v12, (a0), v16, v0.t 1810; RV64-NEXT: vmv4r.v v8, v12 1811; RV64-NEXT: ret 1812 %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %idxs 1813 %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) 1814 ret <vscale x 8 x float> %v 1815} 1816 1817declare <vscale x 1 x double> @llvm.masked.gather.nxv1f64.nxv1p0f64(<vscale x 1 x double*>, i32, <vscale x 1 x i1>, <vscale x 1 x double>) 1818 1819define <vscale x 1 x double> @mgather_nxv1f64(<vscale x 1 x double*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x double> %passthru) { 1820; RV32-LABEL: mgather_nxv1f64: 1821; RV32: # %bb.0: 1822; RV32-NEXT: vsetvli a0, zero, e64, m1, ta, mu 1823; RV32-NEXT: vluxei32.v v9, (zero), v8, v0.t 1824; RV32-NEXT: vmv1r.v v8, v9 1825; RV32-NEXT: ret 1826; 1827; RV64-LABEL: mgather_nxv1f64: 1828; RV64: # %bb.0: 1829; RV64-NEXT: vsetvli a0, zero, e64, m1, ta, mu 1830; RV64-NEXT: vluxei64.v v9, (zero), v8, v0.t 1831; RV64-NEXT: vmv1r.v v8, v9 1832; RV64-NEXT: ret 1833 %v = call <vscale x 1 x double> @llvm.masked.gather.nxv1f64.nxv1p0f64(<vscale x 1 x double*> %ptrs, i32 8, <vscale x 1 x i1> %m, <vscale x 1 x double> %passthru) 1834 ret <vscale x 1 x double> %v 1835} 1836 1837declare <vscale x 2 x double> @llvm.masked.gather.nxv2f64.nxv2p0f64(<vscale x 2 x double*>, i32, <vscale x 2 x i1>, <vscale x 2 x double>) 1838 1839define <vscale x 2 x double> @mgather_nxv2f64(<vscale x 2 x double*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x double> %passthru) { 1840; RV32-LABEL: mgather_nxv2f64: 1841; RV32: # %bb.0: 1842; RV32-NEXT: vsetvli a0, zero, e64, m2, ta, mu 1843; RV32-NEXT: vluxei32.v v10, (zero), v8, v0.t 1844; RV32-NEXT: vmv2r.v v8, v10 1845; RV32-NEXT: ret 1846; 1847; RV64-LABEL: mgather_nxv2f64: 1848; RV64: # %bb.0: 1849; RV64-NEXT: vsetvli a0, zero, e64, m2, ta, mu 1850; RV64-NEXT: vluxei64.v v10, (zero), v8, v0.t 1851; RV64-NEXT: vmv2r.v v8, v10 1852; RV64-NEXT: ret 1853 %v = call <vscale x 2 x double> @llvm.masked.gather.nxv2f64.nxv2p0f64(<vscale x 2 x double*> %ptrs, i32 8, <vscale x 2 x i1> %m, <vscale x 2 x double> %passthru) 1854 ret <vscale x 2 x double> %v 1855} 1856 1857declare <vscale x 4 x double> @llvm.masked.gather.nxv4f64.nxv4p0f64(<vscale x 4 x double*>, i32, <vscale x 4 x i1>, <vscale x 4 x double>) 1858 1859define <vscale x 4 x double> @mgather_nxv4f64(<vscale x 4 x double*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x double> %passthru) { 1860; RV32-LABEL: mgather_nxv4f64: 1861; RV32: # %bb.0: 1862; RV32-NEXT: vsetvli a0, zero, e64, m4, ta, mu 1863; RV32-NEXT: vluxei32.v v12, (zero), v8, v0.t 1864; RV32-NEXT: vmv4r.v v8, v12 1865; RV32-NEXT: ret 1866; 1867; RV64-LABEL: mgather_nxv4f64: 1868; RV64: # %bb.0: 1869; RV64-NEXT: vsetvli a0, zero, e64, m4, ta, mu 1870; RV64-NEXT: vluxei64.v v12, (zero), v8, v0.t 1871; RV64-NEXT: vmv4r.v v8, v12 1872; RV64-NEXT: ret 1873 %v = call <vscale x 4 x double> @llvm.masked.gather.nxv4f64.nxv4p0f64(<vscale x 4 x double*> %ptrs, i32 8, <vscale x 4 x i1> %m, <vscale x 4 x double> %passthru) 1874 ret <vscale x 4 x double> %v 1875} 1876 1877define <vscale x 4 x double> @mgather_truemask_nxv4f64(<vscale x 4 x double*> %ptrs, <vscale x 4 x double> %passthru) { 1878; RV32-LABEL: mgather_truemask_nxv4f64: 1879; RV32: # %bb.0: 1880; RV32-NEXT: vsetvli a0, zero, e64, m4, ta, mu 1881; RV32-NEXT: vluxei32.v v12, (zero), v8 1882; RV32-NEXT: vmv4r.v v8, v12 1883; RV32-NEXT: ret 1884; 1885; RV64-LABEL: mgather_truemask_nxv4f64: 1886; RV64: # %bb.0: 1887; RV64-NEXT: vsetvli a0, zero, e64, m4, ta, mu 1888; RV64-NEXT: vluxei64.v v8, (zero), v8 1889; RV64-NEXT: ret 1890 %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0 1891 %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer 1892 %v = call <vscale x 4 x double> @llvm.masked.gather.nxv4f64.nxv4p0f64(<vscale x 4 x double*> %ptrs, i32 8, <vscale x 4 x i1> %mtrue, <vscale x 4 x double> %passthru) 1893 ret <vscale x 4 x double> %v 1894} 1895 1896define <vscale x 4 x double> @mgather_falsemask_nxv4f64(<vscale x 4 x double*> %ptrs, <vscale x 4 x double> %passthru) { 1897; RV32-LABEL: mgather_falsemask_nxv4f64: 1898; RV32: # %bb.0: 1899; RV32-NEXT: vmv4r.v v8, v12 1900; RV32-NEXT: ret 1901; 1902; RV64-LABEL: mgather_falsemask_nxv4f64: 1903; RV64: # %bb.0: 1904; RV64-NEXT: vmv4r.v v8, v12 1905; RV64-NEXT: ret 1906 %v = call <vscale x 4 x double> @llvm.masked.gather.nxv4f64.nxv4p0f64(<vscale x 4 x double*> %ptrs, i32 8, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x double> %passthru) 1907 ret <vscale x 4 x double> %v 1908} 1909 1910declare <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*>, i32, <vscale x 8 x i1>, <vscale x 8 x double>) 1911 1912define <vscale x 8 x double> @mgather_nxv8f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) { 1913; RV32-LABEL: mgather_nxv8f64: 1914; RV32: # %bb.0: 1915; RV32-NEXT: vsetvli a0, zero, e64, m8, ta, mu 1916; RV32-NEXT: vluxei32.v v16, (zero), v8, v0.t 1917; RV32-NEXT: vmv8r.v v8, v16 1918; RV32-NEXT: ret 1919; 1920; RV64-LABEL: mgather_nxv8f64: 1921; RV64: # %bb.0: 1922; RV64-NEXT: vsetvli a0, zero, e64, m8, ta, mu 1923; RV64-NEXT: vluxei64.v v16, (zero), v8, v0.t 1924; RV64-NEXT: vmv8r.v v8, v16 1925; RV64-NEXT: ret 1926 %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) 1927 ret <vscale x 8 x double> %v 1928} 1929 1930define <vscale x 8 x double> @mgather_baseidx_nxv8i8_nxv8f64(double* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) { 1931; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8f64: 1932; RV32: # %bb.0: 1933; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 1934; RV32-NEXT: vsext.vf4 v12, v8 1935; RV32-NEXT: vsll.vi v8, v12, 3 1936; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 1937; RV32-NEXT: vluxei32.v v16, (a0), v8, v0.t 1938; RV32-NEXT: vmv8r.v v8, v16 1939; RV32-NEXT: ret 1940; 1941; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8f64: 1942; RV64: # %bb.0: 1943; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1944; RV64-NEXT: vsext.vf8 v24, v8 1945; RV64-NEXT: vsll.vi v8, v24, 3 1946; RV64-NEXT: vluxei64.v v16, (a0), v8, v0.t 1947; RV64-NEXT: vmv8r.v v8, v16 1948; RV64-NEXT: ret 1949 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i8> %idxs 1950 %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) 1951 ret <vscale x 8 x double> %v 1952} 1953 1954define <vscale x 8 x double> @mgather_baseidx_sext_nxv8i8_nxv8f64(double* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) { 1955; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f64: 1956; RV32: # %bb.0: 1957; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1958; RV32-NEXT: vsext.vf8 v24, v8 1959; RV32-NEXT: vsll.vi v8, v24, 3 1960; RV32-NEXT: vluxei64.v v16, (a0), v8, v0.t 1961; RV32-NEXT: vmv8r.v v8, v16 1962; RV32-NEXT: ret 1963; 1964; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f64: 1965; RV64: # %bb.0: 1966; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1967; RV64-NEXT: vsext.vf8 v24, v8 1968; RV64-NEXT: vsll.vi v8, v24, 3 1969; RV64-NEXT: vluxei64.v v16, (a0), v8, v0.t 1970; RV64-NEXT: vmv8r.v v8, v16 1971; RV64-NEXT: ret 1972 %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i64> 1973 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs 1974 %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) 1975 ret <vscale x 8 x double> %v 1976} 1977 1978define <vscale x 8 x double> @mgather_baseidx_zext_nxv8i8_nxv8f64(double* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) { 1979; RV32-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f64: 1980; RV32: # %bb.0: 1981; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1982; RV32-NEXT: vzext.vf8 v24, v8 1983; RV32-NEXT: vsll.vi v8, v24, 3 1984; RV32-NEXT: vluxei64.v v16, (a0), v8, v0.t 1985; RV32-NEXT: vmv8r.v v8, v16 1986; RV32-NEXT: ret 1987; 1988; RV64-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f64: 1989; RV64: # %bb.0: 1990; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 1991; RV64-NEXT: vzext.vf8 v24, v8 1992; RV64-NEXT: vsll.vi v8, v24, 3 1993; RV64-NEXT: vluxei64.v v16, (a0), v8, v0.t 1994; RV64-NEXT: vmv8r.v v8, v16 1995; RV64-NEXT: ret 1996 %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i64> 1997 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs 1998 %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) 1999 ret <vscale x 8 x double> %v 2000} 2001 2002define <vscale x 8 x double> @mgather_baseidx_nxv8i16_nxv8f64(double* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) { 2003; RV32-LABEL: mgather_baseidx_nxv8i16_nxv8f64: 2004; RV32: # %bb.0: 2005; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 2006; RV32-NEXT: vsext.vf2 v12, v8 2007; RV32-NEXT: vsll.vi v8, v12, 3 2008; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 2009; RV32-NEXT: vluxei32.v v16, (a0), v8, v0.t 2010; RV32-NEXT: vmv8r.v v8, v16 2011; RV32-NEXT: ret 2012; 2013; RV64-LABEL: mgather_baseidx_nxv8i16_nxv8f64: 2014; RV64: # %bb.0: 2015; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 2016; RV64-NEXT: vsext.vf4 v24, v8 2017; RV64-NEXT: vsll.vi v8, v24, 3 2018; RV64-NEXT: vluxei64.v v16, (a0), v8, v0.t 2019; RV64-NEXT: vmv8r.v v8, v16 2020; RV64-NEXT: ret 2021 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i16> %idxs 2022 %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) 2023 ret <vscale x 8 x double> %v 2024} 2025 2026define <vscale x 8 x double> @mgather_baseidx_sext_nxv8i16_nxv8f64(double* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) { 2027; RV32-LABEL: mgather_baseidx_sext_nxv8i16_nxv8f64: 2028; RV32: # %bb.0: 2029; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, mu 2030; RV32-NEXT: vsext.vf4 v24, v8 2031; RV32-NEXT: vsll.vi v8, v24, 3 2032; RV32-NEXT: vluxei64.v v16, (a0), v8, v0.t 2033; RV32-NEXT: vmv8r.v v8, v16 2034; RV32-NEXT: ret 2035; 2036; RV64-LABEL: mgather_baseidx_sext_nxv8i16_nxv8f64: 2037; RV64: # %bb.0: 2038; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 2039; RV64-NEXT: vsext.vf4 v24, v8 2040; RV64-NEXT: vsll.vi v8, v24, 3 2041; RV64-NEXT: vluxei64.v v16, (a0), v8, v0.t 2042; RV64-NEXT: vmv8r.v v8, v16 2043; RV64-NEXT: ret 2044 %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i64> 2045 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs 2046 %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) 2047 ret <vscale x 8 x double> %v 2048} 2049 2050define <vscale x 8 x double> @mgather_baseidx_zext_nxv8i16_nxv8f64(double* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) { 2051; RV32-LABEL: mgather_baseidx_zext_nxv8i16_nxv8f64: 2052; RV32: # %bb.0: 2053; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, mu 2054; RV32-NEXT: vzext.vf4 v24, v8 2055; RV32-NEXT: vsll.vi v8, v24, 3 2056; RV32-NEXT: vluxei64.v v16, (a0), v8, v0.t 2057; RV32-NEXT: vmv8r.v v8, v16 2058; RV32-NEXT: ret 2059; 2060; RV64-LABEL: mgather_baseidx_zext_nxv8i16_nxv8f64: 2061; RV64: # %bb.0: 2062; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 2063; RV64-NEXT: vzext.vf4 v24, v8 2064; RV64-NEXT: vsll.vi v8, v24, 3 2065; RV64-NEXT: vluxei64.v v16, (a0), v8, v0.t 2066; RV64-NEXT: vmv8r.v v8, v16 2067; RV64-NEXT: ret 2068 %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i64> 2069 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs 2070 %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) 2071 ret <vscale x 8 x double> %v 2072} 2073 2074define <vscale x 8 x double> @mgather_baseidx_nxv8i32_nxv8f64(double* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) { 2075; RV32-LABEL: mgather_baseidx_nxv8i32_nxv8f64: 2076; RV32: # %bb.0: 2077; RV32-NEXT: vsetvli a1, zero, e32, m4, ta, mu 2078; RV32-NEXT: vsll.vi v8, v8, 3 2079; RV32-NEXT: vsetvli zero, zero, e64, m8, ta, mu 2080; RV32-NEXT: vluxei32.v v16, (a0), v8, v0.t 2081; RV32-NEXT: vmv8r.v v8, v16 2082; RV32-NEXT: ret 2083; 2084; RV64-LABEL: mgather_baseidx_nxv8i32_nxv8f64: 2085; RV64: # %bb.0: 2086; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 2087; RV64-NEXT: vsext.vf2 v24, v8 2088; RV64-NEXT: vsll.vi v8, v24, 3 2089; RV64-NEXT: vluxei64.v v16, (a0), v8, v0.t 2090; RV64-NEXT: vmv8r.v v8, v16 2091; RV64-NEXT: ret 2092 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i32> %idxs 2093 %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) 2094 ret <vscale x 8 x double> %v 2095} 2096 2097define <vscale x 8 x double> @mgather_baseidx_sext_nxv8i32_nxv8f64(double* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) { 2098; RV32-LABEL: mgather_baseidx_sext_nxv8i32_nxv8f64: 2099; RV32: # %bb.0: 2100; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, mu 2101; RV32-NEXT: vsext.vf2 v24, v8 2102; RV32-NEXT: vsll.vi v8, v24, 3 2103; RV32-NEXT: vluxei64.v v16, (a0), v8, v0.t 2104; RV32-NEXT: vmv8r.v v8, v16 2105; RV32-NEXT: ret 2106; 2107; RV64-LABEL: mgather_baseidx_sext_nxv8i32_nxv8f64: 2108; RV64: # %bb.0: 2109; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 2110; RV64-NEXT: vsext.vf2 v24, v8 2111; RV64-NEXT: vsll.vi v8, v24, 3 2112; RV64-NEXT: vluxei64.v v16, (a0), v8, v0.t 2113; RV64-NEXT: vmv8r.v v8, v16 2114; RV64-NEXT: ret 2115 %eidxs = sext <vscale x 8 x i32> %idxs to <vscale x 8 x i64> 2116 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs 2117 %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) 2118 ret <vscale x 8 x double> %v 2119} 2120 2121define <vscale x 8 x double> @mgather_baseidx_zext_nxv8i32_nxv8f64(double* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) { 2122; RV32-LABEL: mgather_baseidx_zext_nxv8i32_nxv8f64: 2123; RV32: # %bb.0: 2124; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, mu 2125; RV32-NEXT: vzext.vf2 v24, v8 2126; RV32-NEXT: vsll.vi v8, v24, 3 2127; RV32-NEXT: vluxei64.v v16, (a0), v8, v0.t 2128; RV32-NEXT: vmv8r.v v8, v16 2129; RV32-NEXT: ret 2130; 2131; RV64-LABEL: mgather_baseidx_zext_nxv8i32_nxv8f64: 2132; RV64: # %bb.0: 2133; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 2134; RV64-NEXT: vzext.vf2 v24, v8 2135; RV64-NEXT: vsll.vi v8, v24, 3 2136; RV64-NEXT: vluxei64.v v16, (a0), v8, v0.t 2137; RV64-NEXT: vmv8r.v v8, v16 2138; RV64-NEXT: ret 2139 %eidxs = zext <vscale x 8 x i32> %idxs to <vscale x 8 x i64> 2140 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs 2141 %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) 2142 ret <vscale x 8 x double> %v 2143} 2144 2145define <vscale x 8 x double> @mgather_baseidx_nxv8f64(double* %base, <vscale x 8 x i64> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) { 2146; RV32-LABEL: mgather_baseidx_nxv8f64: 2147; RV32: # %bb.0: 2148; RV32-NEXT: vsetvli a1, zero, e64, m8, ta, mu 2149; RV32-NEXT: vsll.vi v8, v8, 3 2150; RV32-NEXT: vluxei64.v v16, (a0), v8, v0.t 2151; RV32-NEXT: vmv8r.v v8, v16 2152; RV32-NEXT: ret 2153; 2154; RV64-LABEL: mgather_baseidx_nxv8f64: 2155; RV64: # %bb.0: 2156; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 2157; RV64-NEXT: vsll.vi v8, v8, 3 2158; RV64-NEXT: vluxei64.v v16, (a0), v8, v0.t 2159; RV64-NEXT: vmv8r.v v8, v16 2160; RV64-NEXT: ret 2161 %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %idxs 2162 %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) 2163 ret <vscale x 8 x double> %v 2164} 2165 2166declare <vscale x 16 x i8> @llvm.masked.gather.nxv16i8.nxv16p0i8(<vscale x 16 x i8*>, i32, <vscale x 16 x i1>, <vscale x 16 x i8>) 2167 2168define <vscale x 16 x i8> @mgather_baseidx_nxv16i8(i8* %base, <vscale x 16 x i8> %idxs, <vscale x 16 x i1> %m, <vscale x 16 x i8> %passthru) { 2169; RV32-LABEL: mgather_baseidx_nxv16i8: 2170; RV32: # %bb.0: 2171; RV32-NEXT: vsetvli a1, zero, e32, m8, ta, mu 2172; RV32-NEXT: vsext.vf4 v16, v8 2173; RV32-NEXT: vsetvli zero, zero, e8, m2, ta, mu 2174; RV32-NEXT: vluxei32.v v10, (a0), v16, v0.t 2175; RV32-NEXT: vmv2r.v v8, v10 2176; RV32-NEXT: ret 2177; 2178; RV64-LABEL: mgather_baseidx_nxv16i8: 2179; RV64: # %bb.0: 2180; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 2181; RV64-NEXT: vsext.vf8 v16, v8 2182; RV64-NEXT: vsetvli zero, zero, e8, m1, ta, mu 2183; RV64-NEXT: vluxei64.v v10, (a0), v16, v0.t 2184; RV64-NEXT: csrr a1, vlenb 2185; RV64-NEXT: srli a1, a1, 3 2186; RV64-NEXT: vsetvli a2, zero, e8, mf4, ta, mu 2187; RV64-NEXT: vslidedown.vx v0, v0, a1 2188; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 2189; RV64-NEXT: vsext.vf8 v16, v9 2190; RV64-NEXT: vsetvli zero, zero, e8, m1, ta, mu 2191; RV64-NEXT: vluxei64.v v11, (a0), v16, v0.t 2192; RV64-NEXT: vmv2r.v v8, v10 2193; RV64-NEXT: ret 2194 %ptrs = getelementptr inbounds i8, i8* %base, <vscale x 16 x i8> %idxs 2195 %v = call <vscale x 16 x i8> @llvm.masked.gather.nxv16i8.nxv16p0i8(<vscale x 16 x i8*> %ptrs, i32 2, <vscale x 16 x i1> %m, <vscale x 16 x i8> %passthru) 2196 ret <vscale x 16 x i8> %v 2197} 2198 2199declare <vscale x 32 x i8> @llvm.masked.gather.nxv32i8.nxv32p0i8(<vscale x 32 x i8*>, i32, <vscale x 32 x i1>, <vscale x 32 x i8>) 2200 2201define <vscale x 32 x i8> @mgather_baseidx_nxv32i8(i8* %base, <vscale x 32 x i8> %idxs, <vscale x 32 x i1> %m, <vscale x 32 x i8> %passthru) { 2202; RV32-LABEL: mgather_baseidx_nxv32i8: 2203; RV32: # %bb.0: 2204; RV32-NEXT: vsetvli a1, zero, e32, m8, ta, mu 2205; RV32-NEXT: vsext.vf4 v16, v8 2206; RV32-NEXT: vsetvli zero, zero, e8, m2, ta, mu 2207; RV32-NEXT: vluxei32.v v12, (a0), v16, v0.t 2208; RV32-NEXT: csrr a1, vlenb 2209; RV32-NEXT: srli a1, a1, 2 2210; RV32-NEXT: vsetvli a2, zero, e8, mf2, ta, mu 2211; RV32-NEXT: vslidedown.vx v0, v0, a1 2212; RV32-NEXT: vsetvli a1, zero, e32, m8, ta, mu 2213; RV32-NEXT: vsext.vf4 v16, v10 2214; RV32-NEXT: vsetvli zero, zero, e8, m2, ta, mu 2215; RV32-NEXT: vluxei32.v v14, (a0), v16, v0.t 2216; RV32-NEXT: vmv4r.v v8, v12 2217; RV32-NEXT: ret 2218; 2219; RV64-LABEL: mgather_baseidx_nxv32i8: 2220; RV64: # %bb.0: 2221; RV64-NEXT: vmv1r.v v16, v0 2222; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 2223; RV64-NEXT: vsext.vf8 v24, v8 2224; RV64-NEXT: vsetvli zero, zero, e8, m1, ta, mu 2225; RV64-NEXT: vluxei64.v v12, (a0), v24, v0.t 2226; RV64-NEXT: csrr a1, vlenb 2227; RV64-NEXT: srli a2, a1, 3 2228; RV64-NEXT: vsetvli a3, zero, e8, mf4, ta, mu 2229; RV64-NEXT: vslidedown.vx v0, v0, a2 2230; RV64-NEXT: vsetvli a3, zero, e64, m8, ta, mu 2231; RV64-NEXT: vsext.vf8 v24, v9 2232; RV64-NEXT: vsetvli zero, zero, e8, m1, ta, mu 2233; RV64-NEXT: vluxei64.v v13, (a0), v24, v0.t 2234; RV64-NEXT: srli a1, a1, 2 2235; RV64-NEXT: vsetvli a3, zero, e8, mf2, ta, mu 2236; RV64-NEXT: vslidedown.vx v0, v16, a1 2237; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 2238; RV64-NEXT: vsext.vf8 v16, v10 2239; RV64-NEXT: vsetvli zero, zero, e8, m1, ta, mu 2240; RV64-NEXT: vluxei64.v v14, (a0), v16, v0.t 2241; RV64-NEXT: vsetvli a1, zero, e8, mf4, ta, mu 2242; RV64-NEXT: vslidedown.vx v0, v0, a2 2243; RV64-NEXT: vsetvli a1, zero, e64, m8, ta, mu 2244; RV64-NEXT: vsext.vf8 v16, v11 2245; RV64-NEXT: vsetvli zero, zero, e8, m1, ta, mu 2246; RV64-NEXT: vluxei64.v v15, (a0), v16, v0.t 2247; RV64-NEXT: vmv4r.v v8, v12 2248; RV64-NEXT: ret 2249 %ptrs = getelementptr inbounds i8, i8* %base, <vscale x 32 x i8> %idxs 2250 %v = call <vscale x 32 x i8> @llvm.masked.gather.nxv32i8.nxv32p0i8(<vscale x 32 x i8*> %ptrs, i32 2, <vscale x 32 x i1> %m, <vscale x 32 x i8> %passthru) 2251 ret <vscale x 32 x i8> %v 2252} 2253