1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+m,+d,+experimental-zfh,+experimental-v -target-abi=ilp32d \
3; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefix=RV32
4; RUN: llc -mtriple=riscv64 -mattr=+m,+d,+experimental-zfh,+experimental-v -target-abi=lp64d \
5; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefix=RV64
6
7declare <vscale x 1 x i8> @llvm.masked.gather.nxv1i8.nxv1p0i8(<vscale x 1 x i8*>, i32, <vscale x 1 x i1>, <vscale x 1 x i8>)
8
9define <vscale x 1 x i8> @mgather_nxv1i8(<vscale x 1 x i8*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x i8> %passthru) {
10; RV32-LABEL: mgather_nxv1i8:
11; RV32:       # %bb.0:
12; RV32-NEXT:    vsetvli a0, zero, e8,mf8,tu,mu
13; RV32-NEXT:    vloxei32.v v9, (zero), v8, v0.t
14; RV32-NEXT:    vmv1r.v v8, v9
15; RV32-NEXT:    ret
16;
17; RV64-LABEL: mgather_nxv1i8:
18; RV64:       # %bb.0:
19; RV64-NEXT:    vsetvli a0, zero, e8,mf8,tu,mu
20; RV64-NEXT:    vloxei64.v v9, (zero), v8, v0.t
21; RV64-NEXT:    vmv1r.v v8, v9
22; RV64-NEXT:    ret
23  %v = call <vscale x 1 x i8> @llvm.masked.gather.nxv1i8.nxv1p0i8(<vscale x 1 x i8*> %ptrs, i32 1, <vscale x 1 x i1> %m, <vscale x 1 x i8> %passthru)
24  ret <vscale x 1 x i8> %v
25}
26
27declare <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*>, i32, <vscale x 2 x i1>, <vscale x 2 x i8>)
28
29define <vscale x 2 x i8> @mgather_nxv2i8(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) {
30; RV32-LABEL: mgather_nxv2i8:
31; RV32:       # %bb.0:
32; RV32-NEXT:    vsetvli a0, zero, e8,mf4,tu,mu
33; RV32-NEXT:    vloxei32.v v9, (zero), v8, v0.t
34; RV32-NEXT:    vmv1r.v v8, v9
35; RV32-NEXT:    ret
36;
37; RV64-LABEL: mgather_nxv2i8:
38; RV64:       # %bb.0:
39; RV64-NEXT:    vsetvli a0, zero, e8,mf4,tu,mu
40; RV64-NEXT:    vloxei64.v v10, (zero), v8, v0.t
41; RV64-NEXT:    vmv1r.v v8, v10
42; RV64-NEXT:    ret
43  %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru)
44  ret <vscale x 2 x i8> %v
45}
46
47define <vscale x 2 x i16> @mgather_nxv2i8_sextload_nxv2i16(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) {
48; RV32-LABEL: mgather_nxv2i8_sextload_nxv2i16:
49; RV32:       # %bb.0:
50; RV32-NEXT:    vsetvli a0, zero, e8,mf4,tu,mu
51; RV32-NEXT:    vloxei32.v v9, (zero), v8, v0.t
52; RV32-NEXT:    vsetvli zero, zero, e16,mf2,ta,mu
53; RV32-NEXT:    vsext.vf2 v8, v9
54; RV32-NEXT:    ret
55;
56; RV64-LABEL: mgather_nxv2i8_sextload_nxv2i16:
57; RV64:       # %bb.0:
58; RV64-NEXT:    vsetvli a0, zero, e8,mf4,tu,mu
59; RV64-NEXT:    vloxei64.v v10, (zero), v8, v0.t
60; RV64-NEXT:    vsetvli zero, zero, e16,mf2,ta,mu
61; RV64-NEXT:    vsext.vf2 v8, v10
62; RV64-NEXT:    ret
63  %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru)
64  %ev = sext <vscale x 2 x i8> %v to <vscale x 2 x i16>
65  ret <vscale x 2 x i16> %ev
66}
67
68define <vscale x 2 x i16> @mgather_nxv2i8_zextload_nxv2i16(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) {
69; RV32-LABEL: mgather_nxv2i8_zextload_nxv2i16:
70; RV32:       # %bb.0:
71; RV32-NEXT:    vsetvli a0, zero, e8,mf4,tu,mu
72; RV32-NEXT:    vloxei32.v v9, (zero), v8, v0.t
73; RV32-NEXT:    vsetvli zero, zero, e16,mf2,ta,mu
74; RV32-NEXT:    vzext.vf2 v8, v9
75; RV32-NEXT:    ret
76;
77; RV64-LABEL: mgather_nxv2i8_zextload_nxv2i16:
78; RV64:       # %bb.0:
79; RV64-NEXT:    vsetvli a0, zero, e8,mf4,tu,mu
80; RV64-NEXT:    vloxei64.v v10, (zero), v8, v0.t
81; RV64-NEXT:    vsetvli zero, zero, e16,mf2,ta,mu
82; RV64-NEXT:    vzext.vf2 v8, v10
83; RV64-NEXT:    ret
84  %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru)
85  %ev = zext <vscale x 2 x i8> %v to <vscale x 2 x i16>
86  ret <vscale x 2 x i16> %ev
87}
88
89define <vscale x 2 x i32> @mgather_nxv2i8_sextload_nxv2i32(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) {
90; RV32-LABEL: mgather_nxv2i8_sextload_nxv2i32:
91; RV32:       # %bb.0:
92; RV32-NEXT:    vsetvli a0, zero, e8,mf4,tu,mu
93; RV32-NEXT:    vloxei32.v v9, (zero), v8, v0.t
94; RV32-NEXT:    vsetvli zero, zero, e32,m1,ta,mu
95; RV32-NEXT:    vsext.vf4 v8, v9
96; RV32-NEXT:    ret
97;
98; RV64-LABEL: mgather_nxv2i8_sextload_nxv2i32:
99; RV64:       # %bb.0:
100; RV64-NEXT:    vsetvli a0, zero, e8,mf4,tu,mu
101; RV64-NEXT:    vloxei64.v v10, (zero), v8, v0.t
102; RV64-NEXT:    vsetvli zero, zero, e32,m1,ta,mu
103; RV64-NEXT:    vsext.vf4 v8, v10
104; RV64-NEXT:    ret
105  %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru)
106  %ev = sext <vscale x 2 x i8> %v to <vscale x 2 x i32>
107  ret <vscale x 2 x i32> %ev
108}
109
110define <vscale x 2 x i32> @mgather_nxv2i8_zextload_nxv2i32(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) {
111; RV32-LABEL: mgather_nxv2i8_zextload_nxv2i32:
112; RV32:       # %bb.0:
113; RV32-NEXT:    vsetvli a0, zero, e8,mf4,tu,mu
114; RV32-NEXT:    vloxei32.v v9, (zero), v8, v0.t
115; RV32-NEXT:    vsetvli zero, zero, e32,m1,ta,mu
116; RV32-NEXT:    vzext.vf4 v8, v9
117; RV32-NEXT:    ret
118;
119; RV64-LABEL: mgather_nxv2i8_zextload_nxv2i32:
120; RV64:       # %bb.0:
121; RV64-NEXT:    vsetvli a0, zero, e8,mf4,tu,mu
122; RV64-NEXT:    vloxei64.v v10, (zero), v8, v0.t
123; RV64-NEXT:    vsetvli zero, zero, e32,m1,ta,mu
124; RV64-NEXT:    vzext.vf4 v8, v10
125; RV64-NEXT:    ret
126  %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru)
127  %ev = zext <vscale x 2 x i8> %v to <vscale x 2 x i32>
128  ret <vscale x 2 x i32> %ev
129}
130
131define <vscale x 2 x i64> @mgather_nxv2i8_sextload_nxv2i64(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) {
132; RV32-LABEL: mgather_nxv2i8_sextload_nxv2i64:
133; RV32:       # %bb.0:
134; RV32-NEXT:    vsetvli a0, zero, e8,mf4,tu,mu
135; RV32-NEXT:    vloxei32.v v9, (zero), v8, v0.t
136; RV32-NEXT:    vsetvli zero, zero, e64,m2,ta,mu
137; RV32-NEXT:    vsext.vf8 v26, v9
138; RV32-NEXT:    vmv2r.v v8, v26
139; RV32-NEXT:    ret
140;
141; RV64-LABEL: mgather_nxv2i8_sextload_nxv2i64:
142; RV64:       # %bb.0:
143; RV64-NEXT:    vsetvli a0, zero, e8,mf4,tu,mu
144; RV64-NEXT:    vloxei64.v v10, (zero), v8, v0.t
145; RV64-NEXT:    vsetvli zero, zero, e64,m2,ta,mu
146; RV64-NEXT:    vsext.vf8 v8, v10
147; RV64-NEXT:    ret
148  %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru)
149  %ev = sext <vscale x 2 x i8> %v to <vscale x 2 x i64>
150  ret <vscale x 2 x i64> %ev
151}
152
153define <vscale x 2 x i64> @mgather_nxv2i8_zextload_nxv2i64(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) {
154; RV32-LABEL: mgather_nxv2i8_zextload_nxv2i64:
155; RV32:       # %bb.0:
156; RV32-NEXT:    vsetvli a0, zero, e8,mf4,tu,mu
157; RV32-NEXT:    vloxei32.v v9, (zero), v8, v0.t
158; RV32-NEXT:    vsetvli zero, zero, e64,m2,ta,mu
159; RV32-NEXT:    vzext.vf8 v26, v9
160; RV32-NEXT:    vmv2r.v v8, v26
161; RV32-NEXT:    ret
162;
163; RV64-LABEL: mgather_nxv2i8_zextload_nxv2i64:
164; RV64:       # %bb.0:
165; RV64-NEXT:    vsetvli a0, zero, e8,mf4,tu,mu
166; RV64-NEXT:    vloxei64.v v10, (zero), v8, v0.t
167; RV64-NEXT:    vsetvli zero, zero, e64,m2,ta,mu
168; RV64-NEXT:    vzext.vf8 v8, v10
169; RV64-NEXT:    ret
170  %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru)
171  %ev = zext <vscale x 2 x i8> %v to <vscale x 2 x i64>
172  ret <vscale x 2 x i64> %ev
173}
174
175declare <vscale x 4 x i8> @llvm.masked.gather.nxv4i8.nxv4p0i8(<vscale x 4 x i8*>, i32, <vscale x 4 x i1>, <vscale x 4 x i8>)
176
177define <vscale x 4 x i8> @mgather_nxv4i8(<vscale x 4 x i8*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x i8> %passthru) {
178; RV32-LABEL: mgather_nxv4i8:
179; RV32:       # %bb.0:
180; RV32-NEXT:    vsetvli a0, zero, e8,mf2,tu,mu
181; RV32-NEXT:    vloxei32.v v10, (zero), v8, v0.t
182; RV32-NEXT:    vmv1r.v v8, v10
183; RV32-NEXT:    ret
184;
185; RV64-LABEL: mgather_nxv4i8:
186; RV64:       # %bb.0:
187; RV64-NEXT:    vsetvli a0, zero, e8,mf2,tu,mu
188; RV64-NEXT:    vloxei64.v v12, (zero), v8, v0.t
189; RV64-NEXT:    vmv1r.v v8, v12
190; RV64-NEXT:    ret
191  %v = call <vscale x 4 x i8> @llvm.masked.gather.nxv4i8.nxv4p0i8(<vscale x 4 x i8*> %ptrs, i32 1, <vscale x 4 x i1> %m, <vscale x 4 x i8> %passthru)
192  ret <vscale x 4 x i8> %v
193}
194
195define <vscale x 4 x i8> @mgather_truemask_nxv4i8(<vscale x 4 x i8*> %ptrs, <vscale x 4 x i8> %passthru) {
196; RV32-LABEL: mgather_truemask_nxv4i8:
197; RV32:       # %bb.0:
198; RV32-NEXT:    vsetvli a0, zero, e8,mf2,ta,mu
199; RV32-NEXT:    vloxei32.v v25, (zero), v8
200; RV32-NEXT:    vmv1r.v v8, v25
201; RV32-NEXT:    ret
202;
203; RV64-LABEL: mgather_truemask_nxv4i8:
204; RV64:       # %bb.0:
205; RV64-NEXT:    vsetvli a0, zero, e8,mf2,ta,mu
206; RV64-NEXT:    vloxei64.v v25, (zero), v8
207; RV64-NEXT:    vmv1r.v v8, v25
208; RV64-NEXT:    ret
209  %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0
210  %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
211  %v = call <vscale x 4 x i8> @llvm.masked.gather.nxv4i8.nxv4p0i8(<vscale x 4 x i8*> %ptrs, i32 1, <vscale x 4 x i1> %mtrue, <vscale x 4 x i8> %passthru)
212  ret <vscale x 4 x i8> %v
213}
214
215define <vscale x 4 x i8> @mgather_falsemask_nxv4i8(<vscale x 4 x i8*> %ptrs, <vscale x 4 x i8> %passthru) {
216; RV32-LABEL: mgather_falsemask_nxv4i8:
217; RV32:       # %bb.0:
218; RV32-NEXT:    vmv1r.v v8, v10
219; RV32-NEXT:    ret
220;
221; RV64-LABEL: mgather_falsemask_nxv4i8:
222; RV64:       # %bb.0:
223; RV64-NEXT:    vmv1r.v v8, v12
224; RV64-NEXT:    ret
225  %v = call <vscale x 4 x i8> @llvm.masked.gather.nxv4i8.nxv4p0i8(<vscale x 4 x i8*> %ptrs, i32 1, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x i8> %passthru)
226  ret <vscale x 4 x i8> %v
227}
228
229declare <vscale x 8 x i8> @llvm.masked.gather.nxv8i8.nxv8p0i8(<vscale x 8 x i8*>, i32, <vscale x 8 x i1>, <vscale x 8 x i8>)
230
231define <vscale x 8 x i8> @mgather_nxv8i8(<vscale x 8 x i8*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x i8> %passthru) {
232; RV32-LABEL: mgather_nxv8i8:
233; RV32:       # %bb.0:
234; RV32-NEXT:    vsetvli a0, zero, e8,m1,tu,mu
235; RV32-NEXT:    vloxei32.v v12, (zero), v8, v0.t
236; RV32-NEXT:    vmv1r.v v8, v12
237; RV32-NEXT:    ret
238;
239; RV64-LABEL: mgather_nxv8i8:
240; RV64:       # %bb.0:
241; RV64-NEXT:    vsetvli a0, zero, e8,m1,tu,mu
242; RV64-NEXT:    vloxei64.v v16, (zero), v8, v0.t
243; RV64-NEXT:    vmv1r.v v8, v16
244; RV64-NEXT:    ret
245  %v = call <vscale x 8 x i8> @llvm.masked.gather.nxv8i8.nxv8p0i8(<vscale x 8 x i8*> %ptrs, i32 1, <vscale x 8 x i1> %m, <vscale x 8 x i8> %passthru)
246  ret <vscale x 8 x i8> %v
247}
248
249define <vscale x 8 x i8> @mgather_baseidx_nxv8i8(i8* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i8> %passthru) {
250; RV32-LABEL: mgather_baseidx_nxv8i8:
251; RV32:       # %bb.0:
252; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
253; RV32-NEXT:    vsext.vf4 v28, v8
254; RV32-NEXT:    vsetvli zero, zero, e8,m1,tu,mu
255; RV32-NEXT:    vloxei32.v v9, (a0), v28, v0.t
256; RV32-NEXT:    vmv1r.v v8, v9
257; RV32-NEXT:    ret
258;
259; RV64-LABEL: mgather_baseidx_nxv8i8:
260; RV64:       # %bb.0:
261; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
262; RV64-NEXT:    vsext.vf8 v16, v8
263; RV64-NEXT:    vsetvli zero, zero, e8,m1,tu,mu
264; RV64-NEXT:    vloxei64.v v9, (a0), v16, v0.t
265; RV64-NEXT:    vmv1r.v v8, v9
266; RV64-NEXT:    ret
267  %ptrs = getelementptr inbounds i8, i8* %base, <vscale x 8 x i8> %idxs
268  %v = call <vscale x 8 x i8> @llvm.masked.gather.nxv8i8.nxv8p0i8(<vscale x 8 x i8*> %ptrs, i32 1, <vscale x 8 x i1> %m, <vscale x 8 x i8> %passthru)
269  ret <vscale x 8 x i8> %v
270}
271
272declare <vscale x 1 x i16> @llvm.masked.gather.nxv1i16.nxv1p0i16(<vscale x 1 x i16*>, i32, <vscale x 1 x i1>, <vscale x 1 x i16>)
273
274define <vscale x 1 x i16> @mgather_nxv1i16(<vscale x 1 x i16*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x i16> %passthru) {
275; RV32-LABEL: mgather_nxv1i16:
276; RV32:       # %bb.0:
277; RV32-NEXT:    vsetvli a0, zero, e16,mf4,tu,mu
278; RV32-NEXT:    vloxei32.v v9, (zero), v8, v0.t
279; RV32-NEXT:    vmv1r.v v8, v9
280; RV32-NEXT:    ret
281;
282; RV64-LABEL: mgather_nxv1i16:
283; RV64:       # %bb.0:
284; RV64-NEXT:    vsetvli a0, zero, e16,mf4,tu,mu
285; RV64-NEXT:    vloxei64.v v9, (zero), v8, v0.t
286; RV64-NEXT:    vmv1r.v v8, v9
287; RV64-NEXT:    ret
288  %v = call <vscale x 1 x i16> @llvm.masked.gather.nxv1i16.nxv1p0i16(<vscale x 1 x i16*> %ptrs, i32 2, <vscale x 1 x i1> %m, <vscale x 1 x i16> %passthru)
289  ret <vscale x 1 x i16> %v
290}
291
292declare <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*>, i32, <vscale x 2 x i1>, <vscale x 2 x i16>)
293
294define <vscale x 2 x i16> @mgather_nxv2i16(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) {
295; RV32-LABEL: mgather_nxv2i16:
296; RV32:       # %bb.0:
297; RV32-NEXT:    vsetvli a0, zero, e16,mf2,tu,mu
298; RV32-NEXT:    vloxei32.v v9, (zero), v8, v0.t
299; RV32-NEXT:    vmv1r.v v8, v9
300; RV32-NEXT:    ret
301;
302; RV64-LABEL: mgather_nxv2i16:
303; RV64:       # %bb.0:
304; RV64-NEXT:    vsetvli a0, zero, e16,mf2,tu,mu
305; RV64-NEXT:    vloxei64.v v10, (zero), v8, v0.t
306; RV64-NEXT:    vmv1r.v v8, v10
307; RV64-NEXT:    ret
308  %v = call <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru)
309  ret <vscale x 2 x i16> %v
310}
311
312define <vscale x 2 x i32> @mgather_nxv2i16_sextload_nxv2i32(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) {
313; RV32-LABEL: mgather_nxv2i16_sextload_nxv2i32:
314; RV32:       # %bb.0:
315; RV32-NEXT:    vsetvli a0, zero, e16,mf2,tu,mu
316; RV32-NEXT:    vloxei32.v v9, (zero), v8, v0.t
317; RV32-NEXT:    vsetvli zero, zero, e32,m1,ta,mu
318; RV32-NEXT:    vsext.vf2 v8, v9
319; RV32-NEXT:    ret
320;
321; RV64-LABEL: mgather_nxv2i16_sextload_nxv2i32:
322; RV64:       # %bb.0:
323; RV64-NEXT:    vsetvli a0, zero, e16,mf2,tu,mu
324; RV64-NEXT:    vloxei64.v v10, (zero), v8, v0.t
325; RV64-NEXT:    vsetvli zero, zero, e32,m1,ta,mu
326; RV64-NEXT:    vsext.vf2 v8, v10
327; RV64-NEXT:    ret
328  %v = call <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru)
329  %ev = sext <vscale x 2 x i16> %v to <vscale x 2 x i32>
330  ret <vscale x 2 x i32> %ev
331}
332
333define <vscale x 2 x i32> @mgather_nxv2i16_zextload_nxv2i32(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) {
334; RV32-LABEL: mgather_nxv2i16_zextload_nxv2i32:
335; RV32:       # %bb.0:
336; RV32-NEXT:    vsetvli a0, zero, e16,mf2,tu,mu
337; RV32-NEXT:    vloxei32.v v9, (zero), v8, v0.t
338; RV32-NEXT:    vsetvli zero, zero, e32,m1,ta,mu
339; RV32-NEXT:    vzext.vf2 v8, v9
340; RV32-NEXT:    ret
341;
342; RV64-LABEL: mgather_nxv2i16_zextload_nxv2i32:
343; RV64:       # %bb.0:
344; RV64-NEXT:    vsetvli a0, zero, e16,mf2,tu,mu
345; RV64-NEXT:    vloxei64.v v10, (zero), v8, v0.t
346; RV64-NEXT:    vsetvli zero, zero, e32,m1,ta,mu
347; RV64-NEXT:    vzext.vf2 v8, v10
348; RV64-NEXT:    ret
349  %v = call <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru)
350  %ev = zext <vscale x 2 x i16> %v to <vscale x 2 x i32>
351  ret <vscale x 2 x i32> %ev
352}
353
354define <vscale x 2 x i64> @mgather_nxv2i16_sextload_nxv2i64(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) {
355; RV32-LABEL: mgather_nxv2i16_sextload_nxv2i64:
356; RV32:       # %bb.0:
357; RV32-NEXT:    vsetvli a0, zero, e16,mf2,tu,mu
358; RV32-NEXT:    vloxei32.v v9, (zero), v8, v0.t
359; RV32-NEXT:    vsetvli zero, zero, e64,m2,ta,mu
360; RV32-NEXT:    vsext.vf4 v26, v9
361; RV32-NEXT:    vmv2r.v v8, v26
362; RV32-NEXT:    ret
363;
364; RV64-LABEL: mgather_nxv2i16_sextload_nxv2i64:
365; RV64:       # %bb.0:
366; RV64-NEXT:    vsetvli a0, zero, e16,mf2,tu,mu
367; RV64-NEXT:    vloxei64.v v10, (zero), v8, v0.t
368; RV64-NEXT:    vsetvli zero, zero, e64,m2,ta,mu
369; RV64-NEXT:    vsext.vf4 v8, v10
370; RV64-NEXT:    ret
371  %v = call <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru)
372  %ev = sext <vscale x 2 x i16> %v to <vscale x 2 x i64>
373  ret <vscale x 2 x i64> %ev
374}
375
376define <vscale x 2 x i64> @mgather_nxv2i16_zextload_nxv2i64(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) {
377; RV32-LABEL: mgather_nxv2i16_zextload_nxv2i64:
378; RV32:       # %bb.0:
379; RV32-NEXT:    vsetvli a0, zero, e16,mf2,tu,mu
380; RV32-NEXT:    vloxei32.v v9, (zero), v8, v0.t
381; RV32-NEXT:    vsetvli zero, zero, e64,m2,ta,mu
382; RV32-NEXT:    vzext.vf4 v26, v9
383; RV32-NEXT:    vmv2r.v v8, v26
384; RV32-NEXT:    ret
385;
386; RV64-LABEL: mgather_nxv2i16_zextload_nxv2i64:
387; RV64:       # %bb.0:
388; RV64-NEXT:    vsetvli a0, zero, e16,mf2,tu,mu
389; RV64-NEXT:    vloxei64.v v10, (zero), v8, v0.t
390; RV64-NEXT:    vsetvli zero, zero, e64,m2,ta,mu
391; RV64-NEXT:    vzext.vf4 v8, v10
392; RV64-NEXT:    ret
393  %v = call <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru)
394  %ev = zext <vscale x 2 x i16> %v to <vscale x 2 x i64>
395  ret <vscale x 2 x i64> %ev
396}
397
398declare <vscale x 4 x i16> @llvm.masked.gather.nxv4i16.nxv4p0i16(<vscale x 4 x i16*>, i32, <vscale x 4 x i1>, <vscale x 4 x i16>)
399
400define <vscale x 4 x i16> @mgather_nxv4i16(<vscale x 4 x i16*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x i16> %passthru) {
401; RV32-LABEL: mgather_nxv4i16:
402; RV32:       # %bb.0:
403; RV32-NEXT:    vsetvli a0, zero, e16,m1,tu,mu
404; RV32-NEXT:    vloxei32.v v10, (zero), v8, v0.t
405; RV32-NEXT:    vmv1r.v v8, v10
406; RV32-NEXT:    ret
407;
408; RV64-LABEL: mgather_nxv4i16:
409; RV64:       # %bb.0:
410; RV64-NEXT:    vsetvli a0, zero, e16,m1,tu,mu
411; RV64-NEXT:    vloxei64.v v12, (zero), v8, v0.t
412; RV64-NEXT:    vmv1r.v v8, v12
413; RV64-NEXT:    ret
414  %v = call <vscale x 4 x i16> @llvm.masked.gather.nxv4i16.nxv4p0i16(<vscale x 4 x i16*> %ptrs, i32 2, <vscale x 4 x i1> %m, <vscale x 4 x i16> %passthru)
415  ret <vscale x 4 x i16> %v
416}
417
418define <vscale x 4 x i16> @mgather_truemask_nxv4i16(<vscale x 4 x i16*> %ptrs, <vscale x 4 x i16> %passthru) {
419; RV32-LABEL: mgather_truemask_nxv4i16:
420; RV32:       # %bb.0:
421; RV32-NEXT:    vsetvli a0, zero, e16,m1,ta,mu
422; RV32-NEXT:    vloxei32.v v25, (zero), v8
423; RV32-NEXT:    vmv1r.v v8, v25
424; RV32-NEXT:    ret
425;
426; RV64-LABEL: mgather_truemask_nxv4i16:
427; RV64:       # %bb.0:
428; RV64-NEXT:    vsetvli a0, zero, e16,m1,ta,mu
429; RV64-NEXT:    vloxei64.v v25, (zero), v8
430; RV64-NEXT:    vmv1r.v v8, v25
431; RV64-NEXT:    ret
432  %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0
433  %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
434  %v = call <vscale x 4 x i16> @llvm.masked.gather.nxv4i16.nxv4p0i16(<vscale x 4 x i16*> %ptrs, i32 2, <vscale x 4 x i1> %mtrue, <vscale x 4 x i16> %passthru)
435  ret <vscale x 4 x i16> %v
436}
437
438define <vscale x 4 x i16> @mgather_falsemask_nxv4i16(<vscale x 4 x i16*> %ptrs, <vscale x 4 x i16> %passthru) {
439; RV32-LABEL: mgather_falsemask_nxv4i16:
440; RV32:       # %bb.0:
441; RV32-NEXT:    vmv1r.v v8, v10
442; RV32-NEXT:    ret
443;
444; RV64-LABEL: mgather_falsemask_nxv4i16:
445; RV64:       # %bb.0:
446; RV64-NEXT:    vmv1r.v v8, v12
447; RV64-NEXT:    ret
448  %v = call <vscale x 4 x i16> @llvm.masked.gather.nxv4i16.nxv4p0i16(<vscale x 4 x i16*> %ptrs, i32 2, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x i16> %passthru)
449  ret <vscale x 4 x i16> %v
450}
451
452declare <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*>, i32, <vscale x 8 x i1>, <vscale x 8 x i16>)
453
454define <vscale x 8 x i16> @mgather_nxv8i16(<vscale x 8 x i16*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) {
455; RV32-LABEL: mgather_nxv8i16:
456; RV32:       # %bb.0:
457; RV32-NEXT:    vsetvli a0, zero, e16,m2,tu,mu
458; RV32-NEXT:    vloxei32.v v12, (zero), v8, v0.t
459; RV32-NEXT:    vmv2r.v v8, v12
460; RV32-NEXT:    ret
461;
462; RV64-LABEL: mgather_nxv8i16:
463; RV64:       # %bb.0:
464; RV64-NEXT:    vsetvli a0, zero, e16,m2,tu,mu
465; RV64-NEXT:    vloxei64.v v16, (zero), v8, v0.t
466; RV64-NEXT:    vmv2r.v v8, v16
467; RV64-NEXT:    ret
468  %v = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru)
469  ret <vscale x 8 x i16> %v
470}
471
472define <vscale x 8 x i16> @mgather_baseidx_nxv8i8_nxv8i16(i16* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) {
473; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8i16:
474; RV32:       # %bb.0:
475; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
476; RV32-NEXT:    vsext.vf4 v28, v8
477; RV32-NEXT:    vsll.vi v28, v28, 1
478; RV32-NEXT:    vsetvli zero, zero, e16,m2,tu,mu
479; RV32-NEXT:    vloxei32.v v10, (a0), v28, v0.t
480; RV32-NEXT:    vmv2r.v v8, v10
481; RV32-NEXT:    ret
482;
483; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8i16:
484; RV64:       # %bb.0:
485; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
486; RV64-NEXT:    vsext.vf8 v16, v8
487; RV64-NEXT:    vsll.vi v16, v16, 1
488; RV64-NEXT:    vsetvli zero, zero, e16,m2,tu,mu
489; RV64-NEXT:    vloxei64.v v10, (a0), v16, v0.t
490; RV64-NEXT:    vmv2r.v v8, v10
491; RV64-NEXT:    ret
492  %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i8> %idxs
493  %v = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru)
494  ret <vscale x 8 x i16> %v
495}
496
497define <vscale x 8 x i16> @mgather_baseidx_sext_nxv8i8_nxv8i16(i16* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) {
498; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i16:
499; RV32:       # %bb.0:
500; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
501; RV32-NEXT:    vsext.vf4 v28, v8
502; RV32-NEXT:    vsll.vi v28, v28, 1
503; RV32-NEXT:    vsetvli zero, zero, e16,m2,tu,mu
504; RV32-NEXT:    vloxei32.v v10, (a0), v28, v0.t
505; RV32-NEXT:    vmv2r.v v8, v10
506; RV32-NEXT:    ret
507;
508; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i16:
509; RV64:       # %bb.0:
510; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
511; RV64-NEXT:    vsext.vf8 v16, v8
512; RV64-NEXT:    vsll.vi v16, v16, 1
513; RV64-NEXT:    vsetvli zero, zero, e16,m2,tu,mu
514; RV64-NEXT:    vloxei64.v v10, (a0), v16, v0.t
515; RV64-NEXT:    vmv2r.v v8, v10
516; RV64-NEXT:    ret
517  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>
518  %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i16> %eidxs
519  %v = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru)
520  ret <vscale x 8 x i16> %v
521}
522
523define <vscale x 8 x i16> @mgather_baseidx_zext_nxv8i8_nxv8i16(i16* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) {
524; RV32-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i16:
525; RV32:       # %bb.0:
526; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
527; RV32-NEXT:    vzext.vf4 v28, v8
528; RV32-NEXT:    vsll.vi v28, v28, 1
529; RV32-NEXT:    vsetvli zero, zero, e16,m2,tu,mu
530; RV32-NEXT:    vloxei32.v v10, (a0), v28, v0.t
531; RV32-NEXT:    vmv2r.v v8, v10
532; RV32-NEXT:    ret
533;
534; RV64-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i16:
535; RV64:       # %bb.0:
536; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
537; RV64-NEXT:    vzext.vf8 v16, v8
538; RV64-NEXT:    vsll.vi v16, v16, 1
539; RV64-NEXT:    vsetvli zero, zero, e16,m2,tu,mu
540; RV64-NEXT:    vloxei64.v v10, (a0), v16, v0.t
541; RV64-NEXT:    vmv2r.v v8, v10
542; RV64-NEXT:    ret
543  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>
544  %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i16> %eidxs
545  %v = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru)
546  ret <vscale x 8 x i16> %v
547}
548
549define <vscale x 8 x i16> @mgather_baseidx_nxv8i16(i16* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) {
550; RV32-LABEL: mgather_baseidx_nxv8i16:
551; RV32:       # %bb.0:
552; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
553; RV32-NEXT:    vsext.vf2 v28, v8
554; RV32-NEXT:    vsll.vi v28, v28, 1
555; RV32-NEXT:    vsetvli zero, zero, e16,m2,tu,mu
556; RV32-NEXT:    vloxei32.v v10, (a0), v28, v0.t
557; RV32-NEXT:    vmv2r.v v8, v10
558; RV32-NEXT:    ret
559;
560; RV64-LABEL: mgather_baseidx_nxv8i16:
561; RV64:       # %bb.0:
562; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
563; RV64-NEXT:    vsext.vf4 v16, v8
564; RV64-NEXT:    vsll.vi v16, v16, 1
565; RV64-NEXT:    vsetvli zero, zero, e16,m2,tu,mu
566; RV64-NEXT:    vloxei64.v v10, (a0), v16, v0.t
567; RV64-NEXT:    vmv2r.v v8, v10
568; RV64-NEXT:    ret
569  %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i16> %idxs
570  %v = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru)
571  ret <vscale x 8 x i16> %v
572}
573
574declare <vscale x 1 x i32> @llvm.masked.gather.nxv1i32.nxv1p0i32(<vscale x 1 x i32*>, i32, <vscale x 1 x i1>, <vscale x 1 x i32>)
575
576define <vscale x 1 x i32> @mgather_nxv1i32(<vscale x 1 x i32*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x i32> %passthru) {
577; RV32-LABEL: mgather_nxv1i32:
578; RV32:       # %bb.0:
579; RV32-NEXT:    vsetvli a0, zero, e32,mf2,tu,mu
580; RV32-NEXT:    vloxei32.v v9, (zero), v8, v0.t
581; RV32-NEXT:    vmv1r.v v8, v9
582; RV32-NEXT:    ret
583;
584; RV64-LABEL: mgather_nxv1i32:
585; RV64:       # %bb.0:
586; RV64-NEXT:    vsetvli a0, zero, e32,mf2,tu,mu
587; RV64-NEXT:    vloxei64.v v9, (zero), v8, v0.t
588; RV64-NEXT:    vmv1r.v v8, v9
589; RV64-NEXT:    ret
590  %v = call <vscale x 1 x i32> @llvm.masked.gather.nxv1i32.nxv1p0i32(<vscale x 1 x i32*> %ptrs, i32 4, <vscale x 1 x i1> %m, <vscale x 1 x i32> %passthru)
591  ret <vscale x 1 x i32> %v
592}
593
594declare <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0i32(<vscale x 2 x i32*>, i32, <vscale x 2 x i1>, <vscale x 2 x i32>)
595
596define <vscale x 2 x i32> @mgather_nxv2i32(<vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru) {
597; RV32-LABEL: mgather_nxv2i32:
598; RV32:       # %bb.0:
599; RV32-NEXT:    vsetvli a0, zero, e32,m1,tu,mu
600; RV32-NEXT:    vloxei32.v v9, (zero), v8, v0.t
601; RV32-NEXT:    vmv1r.v v8, v9
602; RV32-NEXT:    ret
603;
604; RV64-LABEL: mgather_nxv2i32:
605; RV64:       # %bb.0:
606; RV64-NEXT:    vsetvli a0, zero, e32,m1,tu,mu
607; RV64-NEXT:    vloxei64.v v10, (zero), v8, v0.t
608; RV64-NEXT:    vmv1r.v v8, v10
609; RV64-NEXT:    ret
610  %v = call <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0i32(<vscale x 2 x i32*> %ptrs, i32 4, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru)
611  ret <vscale x 2 x i32> %v
612}
613
614define <vscale x 2 x i64> @mgather_nxv2i32_sextload_nxv2i64(<vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru) {
615; RV32-LABEL: mgather_nxv2i32_sextload_nxv2i64:
616; RV32:       # %bb.0:
617; RV32-NEXT:    vsetvli a0, zero, e32,m1,tu,mu
618; RV32-NEXT:    vloxei32.v v9, (zero), v8, v0.t
619; RV32-NEXT:    vsetvli zero, zero, e64,m2,ta,mu
620; RV32-NEXT:    vsext.vf2 v26, v9
621; RV32-NEXT:    vmv2r.v v8, v26
622; RV32-NEXT:    ret
623;
624; RV64-LABEL: mgather_nxv2i32_sextload_nxv2i64:
625; RV64:       # %bb.0:
626; RV64-NEXT:    vsetvli a0, zero, e32,m1,tu,mu
627; RV64-NEXT:    vloxei64.v v10, (zero), v8, v0.t
628; RV64-NEXT:    vsetvli zero, zero, e64,m2,ta,mu
629; RV64-NEXT:    vsext.vf2 v8, v10
630; RV64-NEXT:    ret
631  %v = call <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0i32(<vscale x 2 x i32*> %ptrs, i32 4, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru)
632  %ev = sext <vscale x 2 x i32> %v to <vscale x 2 x i64>
633  ret <vscale x 2 x i64> %ev
634}
635
636define <vscale x 2 x i64> @mgather_nxv2i32_zextload_nxv2i64(<vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru) {
637; RV32-LABEL: mgather_nxv2i32_zextload_nxv2i64:
638; RV32:       # %bb.0:
639; RV32-NEXT:    vsetvli a0, zero, e32,m1,tu,mu
640; RV32-NEXT:    vloxei32.v v9, (zero), v8, v0.t
641; RV32-NEXT:    vsetvli zero, zero, e64,m2,ta,mu
642; RV32-NEXT:    vzext.vf2 v26, v9
643; RV32-NEXT:    vmv2r.v v8, v26
644; RV32-NEXT:    ret
645;
646; RV64-LABEL: mgather_nxv2i32_zextload_nxv2i64:
647; RV64:       # %bb.0:
648; RV64-NEXT:    vsetvli a0, zero, e32,m1,tu,mu
649; RV64-NEXT:    vloxei64.v v10, (zero), v8, v0.t
650; RV64-NEXT:    vsetvli zero, zero, e64,m2,ta,mu
651; RV64-NEXT:    vzext.vf2 v8, v10
652; RV64-NEXT:    ret
653  %v = call <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0i32(<vscale x 2 x i32*> %ptrs, i32 4, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru)
654  %ev = zext <vscale x 2 x i32> %v to <vscale x 2 x i64>
655  ret <vscale x 2 x i64> %ev
656}
657
658declare <vscale x 4 x i32> @llvm.masked.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*>, i32, <vscale x 4 x i1>, <vscale x 4 x i32>)
659
660define <vscale x 4 x i32> @mgather_nxv4i32(<vscale x 4 x i32*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x i32> %passthru) {
661; RV32-LABEL: mgather_nxv4i32:
662; RV32:       # %bb.0:
663; RV32-NEXT:    vsetvli a0, zero, e32,m2,tu,mu
664; RV32-NEXT:    vloxei32.v v10, (zero), v8, v0.t
665; RV32-NEXT:    vmv2r.v v8, v10
666; RV32-NEXT:    ret
667;
668; RV64-LABEL: mgather_nxv4i32:
669; RV64:       # %bb.0:
670; RV64-NEXT:    vsetvli a0, zero, e32,m2,tu,mu
671; RV64-NEXT:    vloxei64.v v12, (zero), v8, v0.t
672; RV64-NEXT:    vmv2r.v v8, v12
673; RV64-NEXT:    ret
674  %v = call <vscale x 4 x i32> @llvm.masked.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*> %ptrs, i32 4, <vscale x 4 x i1> %m, <vscale x 4 x i32> %passthru)
675  ret <vscale x 4 x i32> %v
676}
677
678define <vscale x 4 x i32> @mgather_truemask_nxv4i32(<vscale x 4 x i32*> %ptrs, <vscale x 4 x i32> %passthru) {
679; RV32-LABEL: mgather_truemask_nxv4i32:
680; RV32:       # %bb.0:
681; RV32-NEXT:    vsetvli a0, zero, e32,m2,ta,mu
682; RV32-NEXT:    vloxei32.v v8, (zero), v8
683; RV32-NEXT:    ret
684;
685; RV64-LABEL: mgather_truemask_nxv4i32:
686; RV64:       # %bb.0:
687; RV64-NEXT:    vsetvli a0, zero, e32,m2,ta,mu
688; RV64-NEXT:    vloxei64.v v26, (zero), v8
689; RV64-NEXT:    vmv2r.v v8, v26
690; RV64-NEXT:    ret
691  %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0
692  %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
693  %v = call <vscale x 4 x i32> @llvm.masked.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*> %ptrs, i32 4, <vscale x 4 x i1> %mtrue, <vscale x 4 x i32> %passthru)
694  ret <vscale x 4 x i32> %v
695}
696
697define <vscale x 4 x i32> @mgather_falsemask_nxv4i32(<vscale x 4 x i32*> %ptrs, <vscale x 4 x i32> %passthru) {
698; RV32-LABEL: mgather_falsemask_nxv4i32:
699; RV32:       # %bb.0:
700; RV32-NEXT:    vmv2r.v v8, v10
701; RV32-NEXT:    ret
702;
703; RV64-LABEL: mgather_falsemask_nxv4i32:
704; RV64:       # %bb.0:
705; RV64-NEXT:    vmv2r.v v8, v12
706; RV64-NEXT:    ret
707  %v = call <vscale x 4 x i32> @llvm.masked.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*> %ptrs, i32 4, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x i32> %passthru)
708  ret <vscale x 4 x i32> %v
709}
710
711declare <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*>, i32, <vscale x 8 x i1>, <vscale x 8 x i32>)
712
713define <vscale x 8 x i32> @mgather_nxv8i32(<vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) {
714; RV32-LABEL: mgather_nxv8i32:
715; RV32:       # %bb.0:
716; RV32-NEXT:    vsetvli a0, zero, e32,m4,tu,mu
717; RV32-NEXT:    vloxei32.v v12, (zero), v8, v0.t
718; RV32-NEXT:    vmv4r.v v8, v12
719; RV32-NEXT:    ret
720;
721; RV64-LABEL: mgather_nxv8i32:
722; RV64:       # %bb.0:
723; RV64-NEXT:    vsetvli a0, zero, e32,m4,tu,mu
724; RV64-NEXT:    vloxei64.v v16, (zero), v8, v0.t
725; RV64-NEXT:    vmv4r.v v8, v16
726; RV64-NEXT:    ret
727  %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru)
728  ret <vscale x 8 x i32> %v
729}
730
731define <vscale x 8 x i32> @mgather_baseidx_nxv8i8_nxv8i32(i32* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) {
732; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8i32:
733; RV32:       # %bb.0:
734; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
735; RV32-NEXT:    vsext.vf4 v28, v8
736; RV32-NEXT:    vsll.vi v28, v28, 2
737; RV32-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
738; RV32-NEXT:    vloxei32.v v12, (a0), v28, v0.t
739; RV32-NEXT:    vmv4r.v v8, v12
740; RV32-NEXT:    ret
741;
742; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8i32:
743; RV64:       # %bb.0:
744; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
745; RV64-NEXT:    vsext.vf8 v16, v8
746; RV64-NEXT:    vsll.vi v16, v16, 2
747; RV64-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
748; RV64-NEXT:    vloxei64.v v12, (a0), v16, v0.t
749; RV64-NEXT:    vmv4r.v v8, v12
750; RV64-NEXT:    ret
751  %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i8> %idxs
752  %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru)
753  ret <vscale x 8 x i32> %v
754}
755
756define <vscale x 8 x i32> @mgather_baseidx_sext_nxv8i8_nxv8i32(i32* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) {
757; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i32:
758; RV32:       # %bb.0:
759; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
760; RV32-NEXT:    vsext.vf4 v28, v8
761; RV32-NEXT:    vsll.vi v28, v28, 2
762; RV32-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
763; RV32-NEXT:    vloxei32.v v12, (a0), v28, v0.t
764; RV32-NEXT:    vmv4r.v v8, v12
765; RV32-NEXT:    ret
766;
767; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i32:
768; RV64:       # %bb.0:
769; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
770; RV64-NEXT:    vsext.vf8 v16, v8
771; RV64-NEXT:    vsll.vi v16, v16, 2
772; RV64-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
773; RV64-NEXT:    vloxei64.v v12, (a0), v16, v0.t
774; RV64-NEXT:    vmv4r.v v8, v12
775; RV64-NEXT:    ret
776  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>
777  %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs
778  %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru)
779  ret <vscale x 8 x i32> %v
780}
781
782define <vscale x 8 x i32> @mgather_baseidx_zext_nxv8i8_nxv8i32(i32* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) {
783; RV32-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i32:
784; RV32:       # %bb.0:
785; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
786; RV32-NEXT:    vzext.vf4 v28, v8
787; RV32-NEXT:    vsll.vi v28, v28, 2
788; RV32-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
789; RV32-NEXT:    vloxei32.v v12, (a0), v28, v0.t
790; RV32-NEXT:    vmv4r.v v8, v12
791; RV32-NEXT:    ret
792;
793; RV64-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i32:
794; RV64:       # %bb.0:
795; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
796; RV64-NEXT:    vzext.vf8 v16, v8
797; RV64-NEXT:    vsll.vi v16, v16, 2
798; RV64-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
799; RV64-NEXT:    vloxei64.v v12, (a0), v16, v0.t
800; RV64-NEXT:    vmv4r.v v8, v12
801; RV64-NEXT:    ret
802  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>
803  %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs
804  %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru)
805  ret <vscale x 8 x i32> %v
806}
807
808define <vscale x 8 x i32> @mgather_baseidx_nxv8i16_nxv8i32(i32* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) {
809; RV32-LABEL: mgather_baseidx_nxv8i16_nxv8i32:
810; RV32:       # %bb.0:
811; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
812; RV32-NEXT:    vsext.vf2 v28, v8
813; RV32-NEXT:    vsll.vi v28, v28, 2
814; RV32-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
815; RV32-NEXT:    vloxei32.v v12, (a0), v28, v0.t
816; RV32-NEXT:    vmv4r.v v8, v12
817; RV32-NEXT:    ret
818;
819; RV64-LABEL: mgather_baseidx_nxv8i16_nxv8i32:
820; RV64:       # %bb.0:
821; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
822; RV64-NEXT:    vsext.vf4 v16, v8
823; RV64-NEXT:    vsll.vi v16, v16, 2
824; RV64-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
825; RV64-NEXT:    vloxei64.v v12, (a0), v16, v0.t
826; RV64-NEXT:    vmv4r.v v8, v12
827; RV64-NEXT:    ret
828  %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i16> %idxs
829  %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru)
830  ret <vscale x 8 x i32> %v
831}
832
833define <vscale x 8 x i32> @mgather_baseidx_sext_nxv8i16_nxv8i32(i32* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) {
834; RV32-LABEL: mgather_baseidx_sext_nxv8i16_nxv8i32:
835; RV32:       # %bb.0:
836; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
837; RV32-NEXT:    vsext.vf2 v28, v8
838; RV32-NEXT:    vsll.vi v28, v28, 2
839; RV32-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
840; RV32-NEXT:    vloxei32.v v12, (a0), v28, v0.t
841; RV32-NEXT:    vmv4r.v v8, v12
842; RV32-NEXT:    ret
843;
844; RV64-LABEL: mgather_baseidx_sext_nxv8i16_nxv8i32:
845; RV64:       # %bb.0:
846; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
847; RV64-NEXT:    vsext.vf4 v16, v8
848; RV64-NEXT:    vsll.vi v16, v16, 2
849; RV64-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
850; RV64-NEXT:    vloxei64.v v12, (a0), v16, v0.t
851; RV64-NEXT:    vmv4r.v v8, v12
852; RV64-NEXT:    ret
853  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>
854  %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs
855  %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru)
856  ret <vscale x 8 x i32> %v
857}
858
859define <vscale x 8 x i32> @mgather_baseidx_zext_nxv8i16_nxv8i32(i32* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) {
860; RV32-LABEL: mgather_baseidx_zext_nxv8i16_nxv8i32:
861; RV32:       # %bb.0:
862; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
863; RV32-NEXT:    vzext.vf2 v28, v8
864; RV32-NEXT:    vsll.vi v28, v28, 2
865; RV32-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
866; RV32-NEXT:    vloxei32.v v12, (a0), v28, v0.t
867; RV32-NEXT:    vmv4r.v v8, v12
868; RV32-NEXT:    ret
869;
870; RV64-LABEL: mgather_baseidx_zext_nxv8i16_nxv8i32:
871; RV64:       # %bb.0:
872; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
873; RV64-NEXT:    vzext.vf4 v16, v8
874; RV64-NEXT:    vsll.vi v16, v16, 2
875; RV64-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
876; RV64-NEXT:    vloxei64.v v12, (a0), v16, v0.t
877; RV64-NEXT:    vmv4r.v v8, v12
878; RV64-NEXT:    ret
879  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>
880  %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs
881  %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru)
882  ret <vscale x 8 x i32> %v
883}
884
885define <vscale x 8 x i32> @mgather_baseidx_nxv8i32(i32* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) {
886; RV32-LABEL: mgather_baseidx_nxv8i32:
887; RV32:       # %bb.0:
888; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
889; RV32-NEXT:    vsll.vi v28, v8, 2
890; RV32-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
891; RV32-NEXT:    vloxei32.v v12, (a0), v28, v0.t
892; RV32-NEXT:    vmv4r.v v8, v12
893; RV32-NEXT:    ret
894;
895; RV64-LABEL: mgather_baseidx_nxv8i32:
896; RV64:       # %bb.0:
897; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
898; RV64-NEXT:    vsext.vf2 v16, v8
899; RV64-NEXT:    vsll.vi v16, v16, 2
900; RV64-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
901; RV64-NEXT:    vloxei64.v v12, (a0), v16, v0.t
902; RV64-NEXT:    vmv4r.v v8, v12
903; RV64-NEXT:    ret
904  %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %idxs
905  %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru)
906  ret <vscale x 8 x i32> %v
907}
908
909declare <vscale x 1 x i64> @llvm.masked.gather.nxv1i64.nxv1p0i64(<vscale x 1 x i64*>, i32, <vscale x 1 x i1>, <vscale x 1 x i64>)
910
911define <vscale x 1 x i64> @mgather_nxv1i64(<vscale x 1 x i64*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x i64> %passthru) {
912; RV32-LABEL: mgather_nxv1i64:
913; RV32:       # %bb.0:
914; RV32-NEXT:    vsetvli a0, zero, e64,m1,tu,mu
915; RV32-NEXT:    vloxei32.v v9, (zero), v8, v0.t
916; RV32-NEXT:    vmv1r.v v8, v9
917; RV32-NEXT:    ret
918;
919; RV64-LABEL: mgather_nxv1i64:
920; RV64:       # %bb.0:
921; RV64-NEXT:    vsetvli a0, zero, e64,m1,tu,mu
922; RV64-NEXT:    vloxei64.v v9, (zero), v8, v0.t
923; RV64-NEXT:    vmv1r.v v8, v9
924; RV64-NEXT:    ret
925  %v = call <vscale x 1 x i64> @llvm.masked.gather.nxv1i64.nxv1p0i64(<vscale x 1 x i64*> %ptrs, i32 8, <vscale x 1 x i1> %m, <vscale x 1 x i64> %passthru)
926  ret <vscale x 1 x i64> %v
927}
928
929declare <vscale x 2 x i64> @llvm.masked.gather.nxv2i64.nxv2p0i64(<vscale x 2 x i64*>, i32, <vscale x 2 x i1>, <vscale x 2 x i64>)
930
931define <vscale x 2 x i64> @mgather_nxv2i64(<vscale x 2 x i64*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i64> %passthru) {
932; RV32-LABEL: mgather_nxv2i64:
933; RV32:       # %bb.0:
934; RV32-NEXT:    vsetvli a0, zero, e64,m2,tu,mu
935; RV32-NEXT:    vloxei32.v v10, (zero), v8, v0.t
936; RV32-NEXT:    vmv2r.v v8, v10
937; RV32-NEXT:    ret
938;
939; RV64-LABEL: mgather_nxv2i64:
940; RV64:       # %bb.0:
941; RV64-NEXT:    vsetvli a0, zero, e64,m2,tu,mu
942; RV64-NEXT:    vloxei64.v v10, (zero), v8, v0.t
943; RV64-NEXT:    vmv2r.v v8, v10
944; RV64-NEXT:    ret
945  %v = call <vscale x 2 x i64> @llvm.masked.gather.nxv2i64.nxv2p0i64(<vscale x 2 x i64*> %ptrs, i32 8, <vscale x 2 x i1> %m, <vscale x 2 x i64> %passthru)
946  ret <vscale x 2 x i64> %v
947}
948
949declare <vscale x 4 x i64> @llvm.masked.gather.nxv4i64.nxv4p0i64(<vscale x 4 x i64*>, i32, <vscale x 4 x i1>, <vscale x 4 x i64>)
950
951define <vscale x 4 x i64> @mgather_nxv4i64(<vscale x 4 x i64*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x i64> %passthru) {
952; RV32-LABEL: mgather_nxv4i64:
953; RV32:       # %bb.0:
954; RV32-NEXT:    vsetvli a0, zero, e64,m4,tu,mu
955; RV32-NEXT:    vloxei32.v v12, (zero), v8, v0.t
956; RV32-NEXT:    vmv4r.v v8, v12
957; RV32-NEXT:    ret
958;
959; RV64-LABEL: mgather_nxv4i64:
960; RV64:       # %bb.0:
961; RV64-NEXT:    vsetvli a0, zero, e64,m4,tu,mu
962; RV64-NEXT:    vloxei64.v v12, (zero), v8, v0.t
963; RV64-NEXT:    vmv4r.v v8, v12
964; RV64-NEXT:    ret
965  %v = call <vscale x 4 x i64> @llvm.masked.gather.nxv4i64.nxv4p0i64(<vscale x 4 x i64*> %ptrs, i32 8, <vscale x 4 x i1> %m, <vscale x 4 x i64> %passthru)
966  ret <vscale x 4 x i64> %v
967}
968
969define <vscale x 4 x i64> @mgather_truemask_nxv4i64(<vscale x 4 x i64*> %ptrs, <vscale x 4 x i64> %passthru) {
970; RV32-LABEL: mgather_truemask_nxv4i64:
971; RV32:       # %bb.0:
972; RV32-NEXT:    vsetvli a0, zero, e64,m4,ta,mu
973; RV32-NEXT:    vloxei32.v v28, (zero), v8
974; RV32-NEXT:    vmv4r.v v8, v28
975; RV32-NEXT:    ret
976;
977; RV64-LABEL: mgather_truemask_nxv4i64:
978; RV64:       # %bb.0:
979; RV64-NEXT:    vsetvli a0, zero, e64,m4,ta,mu
980; RV64-NEXT:    vloxei64.v v8, (zero), v8
981; RV64-NEXT:    ret
982  %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0
983  %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
984  %v = call <vscale x 4 x i64> @llvm.masked.gather.nxv4i64.nxv4p0i64(<vscale x 4 x i64*> %ptrs, i32 8, <vscale x 4 x i1> %mtrue, <vscale x 4 x i64> %passthru)
985  ret <vscale x 4 x i64> %v
986}
987
988define <vscale x 4 x i64> @mgather_falsemask_nxv4i64(<vscale x 4 x i64*> %ptrs, <vscale x 4 x i64> %passthru) {
989; RV32-LABEL: mgather_falsemask_nxv4i64:
990; RV32:       # %bb.0:
991; RV32-NEXT:    vmv4r.v v8, v12
992; RV32-NEXT:    ret
993;
994; RV64-LABEL: mgather_falsemask_nxv4i64:
995; RV64:       # %bb.0:
996; RV64-NEXT:    vmv4r.v v8, v12
997; RV64-NEXT:    ret
998  %v = call <vscale x 4 x i64> @llvm.masked.gather.nxv4i64.nxv4p0i64(<vscale x 4 x i64*> %ptrs, i32 8, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x i64> %passthru)
999  ret <vscale x 4 x i64> %v
1000}
1001
1002declare <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*>, i32, <vscale x 8 x i1>, <vscale x 8 x i64>)
1003
1004define <vscale x 8 x i64> @mgather_nxv8i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {
1005; RV32-LABEL: mgather_nxv8i64:
1006; RV32:       # %bb.0:
1007; RV32-NEXT:    vsetvli a0, zero, e64,m8,tu,mu
1008; RV32-NEXT:    vloxei32.v v16, (zero), v8, v0.t
1009; RV32-NEXT:    vmv8r.v v8, v16
1010; RV32-NEXT:    ret
1011;
1012; RV64-LABEL: mgather_nxv8i64:
1013; RV64:       # %bb.0:
1014; RV64-NEXT:    vsetvli a0, zero, e64,m8,tu,mu
1015; RV64-NEXT:    vloxei64.v v16, (zero), v8, v0.t
1016; RV64-NEXT:    vmv8r.v v8, v16
1017; RV64-NEXT:    ret
1018  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)
1019  ret <vscale x 8 x i64> %v
1020}
1021
1022define <vscale x 8 x i64> @mgather_baseidx_nxv8i8_nxv8i64(i64* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {
1023; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8i64:
1024; RV32:       # %bb.0:
1025; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
1026; RV32-NEXT:    vsext.vf4 v28, v8
1027; RV32-NEXT:    vsll.vi v28, v28, 3
1028; RV32-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
1029; RV32-NEXT:    vloxei32.v v16, (a0), v28, v0.t
1030; RV32-NEXT:    vmv8r.v v8, v16
1031; RV32-NEXT:    ret
1032;
1033; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8i64:
1034; RV64:       # %bb.0:
1035; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1036; RV64-NEXT:    vsext.vf8 v24, v8
1037; RV64-NEXT:    vsll.vi v8, v24, 3
1038; RV64-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
1039; RV64-NEXT:    vloxei64.v v16, (a0), v8, v0.t
1040; RV64-NEXT:    vmv8r.v v8, v16
1041; RV64-NEXT:    ret
1042  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i8> %idxs
1043  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)
1044  ret <vscale x 8 x i64> %v
1045}
1046
1047define <vscale x 8 x i64> @mgather_baseidx_sext_nxv8i8_nxv8i64(i64* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {
1048; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i64:
1049; RV32:       # %bb.0:
1050; RV32-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1051; RV32-NEXT:    vsext.vf8 v24, v8
1052; RV32-NEXT:    vsll.vi v8, v24, 3
1053; RV32-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
1054; RV32-NEXT:    vloxei64.v v16, (a0), v8, v0.t
1055; RV32-NEXT:    vmv8r.v v8, v16
1056; RV32-NEXT:    ret
1057;
1058; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i64:
1059; RV64:       # %bb.0:
1060; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1061; RV64-NEXT:    vsext.vf8 v24, v8
1062; RV64-NEXT:    vsll.vi v8, v24, 3
1063; RV64-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
1064; RV64-NEXT:    vloxei64.v v16, (a0), v8, v0.t
1065; RV64-NEXT:    vmv8r.v v8, v16
1066; RV64-NEXT:    ret
1067  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>
1068  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs
1069  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)
1070  ret <vscale x 8 x i64> %v
1071}
1072
1073define <vscale x 8 x i64> @mgather_baseidx_zext_nxv8i8_nxv8i64(i64* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {
1074; RV32-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i64:
1075; RV32:       # %bb.0:
1076; RV32-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1077; RV32-NEXT:    vzext.vf8 v24, v8
1078; RV32-NEXT:    vsll.vi v8, v24, 3
1079; RV32-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
1080; RV32-NEXT:    vloxei64.v v16, (a0), v8, v0.t
1081; RV32-NEXT:    vmv8r.v v8, v16
1082; RV32-NEXT:    ret
1083;
1084; RV64-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i64:
1085; RV64:       # %bb.0:
1086; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1087; RV64-NEXT:    vzext.vf8 v24, v8
1088; RV64-NEXT:    vsll.vi v8, v24, 3
1089; RV64-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
1090; RV64-NEXT:    vloxei64.v v16, (a0), v8, v0.t
1091; RV64-NEXT:    vmv8r.v v8, v16
1092; RV64-NEXT:    ret
1093  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>
1094  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs
1095  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)
1096  ret <vscale x 8 x i64> %v
1097}
1098
1099define <vscale x 8 x i64> @mgather_baseidx_nxv8i16_nxv8i64(i64* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {
1100; RV32-LABEL: mgather_baseidx_nxv8i16_nxv8i64:
1101; RV32:       # %bb.0:
1102; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
1103; RV32-NEXT:    vsext.vf2 v28, v8
1104; RV32-NEXT:    vsll.vi v28, v28, 3
1105; RV32-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
1106; RV32-NEXT:    vloxei32.v v16, (a0), v28, v0.t
1107; RV32-NEXT:    vmv8r.v v8, v16
1108; RV32-NEXT:    ret
1109;
1110; RV64-LABEL: mgather_baseidx_nxv8i16_nxv8i64:
1111; RV64:       # %bb.0:
1112; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1113; RV64-NEXT:    vsext.vf4 v24, v8
1114; RV64-NEXT:    vsll.vi v8, v24, 3
1115; RV64-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
1116; RV64-NEXT:    vloxei64.v v16, (a0), v8, v0.t
1117; RV64-NEXT:    vmv8r.v v8, v16
1118; RV64-NEXT:    ret
1119  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i16> %idxs
1120  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)
1121  ret <vscale x 8 x i64> %v
1122}
1123
1124define <vscale x 8 x i64> @mgather_baseidx_sext_nxv8i16_nxv8i64(i64* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {
1125; RV32-LABEL: mgather_baseidx_sext_nxv8i16_nxv8i64:
1126; RV32:       # %bb.0:
1127; RV32-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1128; RV32-NEXT:    vsext.vf4 v24, v8
1129; RV32-NEXT:    vsll.vi v8, v24, 3
1130; RV32-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
1131; RV32-NEXT:    vloxei64.v v16, (a0), v8, v0.t
1132; RV32-NEXT:    vmv8r.v v8, v16
1133; RV32-NEXT:    ret
1134;
1135; RV64-LABEL: mgather_baseidx_sext_nxv8i16_nxv8i64:
1136; RV64:       # %bb.0:
1137; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1138; RV64-NEXT:    vsext.vf4 v24, v8
1139; RV64-NEXT:    vsll.vi v8, v24, 3
1140; RV64-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
1141; RV64-NEXT:    vloxei64.v v16, (a0), v8, v0.t
1142; RV64-NEXT:    vmv8r.v v8, v16
1143; RV64-NEXT:    ret
1144  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>
1145  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs
1146  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)
1147  ret <vscale x 8 x i64> %v
1148}
1149
1150define <vscale x 8 x i64> @mgather_baseidx_zext_nxv8i16_nxv8i64(i64* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {
1151; RV32-LABEL: mgather_baseidx_zext_nxv8i16_nxv8i64:
1152; RV32:       # %bb.0:
1153; RV32-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1154; RV32-NEXT:    vzext.vf4 v24, v8
1155; RV32-NEXT:    vsll.vi v8, v24, 3
1156; RV32-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
1157; RV32-NEXT:    vloxei64.v v16, (a0), v8, v0.t
1158; RV32-NEXT:    vmv8r.v v8, v16
1159; RV32-NEXT:    ret
1160;
1161; RV64-LABEL: mgather_baseidx_zext_nxv8i16_nxv8i64:
1162; RV64:       # %bb.0:
1163; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1164; RV64-NEXT:    vzext.vf4 v24, v8
1165; RV64-NEXT:    vsll.vi v8, v24, 3
1166; RV64-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
1167; RV64-NEXT:    vloxei64.v v16, (a0), v8, v0.t
1168; RV64-NEXT:    vmv8r.v v8, v16
1169; RV64-NEXT:    ret
1170  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>
1171  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs
1172  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)
1173  ret <vscale x 8 x i64> %v
1174}
1175
1176define <vscale x 8 x i64> @mgather_baseidx_nxv8i32_nxv8i64(i64* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {
1177; RV32-LABEL: mgather_baseidx_nxv8i32_nxv8i64:
1178; RV32:       # %bb.0:
1179; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
1180; RV32-NEXT:    vsll.vi v28, v8, 3
1181; RV32-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
1182; RV32-NEXT:    vloxei32.v v16, (a0), v28, v0.t
1183; RV32-NEXT:    vmv8r.v v8, v16
1184; RV32-NEXT:    ret
1185;
1186; RV64-LABEL: mgather_baseidx_nxv8i32_nxv8i64:
1187; RV64:       # %bb.0:
1188; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1189; RV64-NEXT:    vsext.vf2 v24, v8
1190; RV64-NEXT:    vsll.vi v8, v24, 3
1191; RV64-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
1192; RV64-NEXT:    vloxei64.v v16, (a0), v8, v0.t
1193; RV64-NEXT:    vmv8r.v v8, v16
1194; RV64-NEXT:    ret
1195  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i32> %idxs
1196  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)
1197  ret <vscale x 8 x i64> %v
1198}
1199
1200define <vscale x 8 x i64> @mgather_baseidx_sext_nxv8i32_nxv8i64(i64* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {
1201; RV32-LABEL: mgather_baseidx_sext_nxv8i32_nxv8i64:
1202; RV32:       # %bb.0:
1203; RV32-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1204; RV32-NEXT:    vsext.vf2 v24, v8
1205; RV32-NEXT:    vsll.vi v8, v24, 3
1206; RV32-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
1207; RV32-NEXT:    vloxei64.v v16, (a0), v8, v0.t
1208; RV32-NEXT:    vmv8r.v v8, v16
1209; RV32-NEXT:    ret
1210;
1211; RV64-LABEL: mgather_baseidx_sext_nxv8i32_nxv8i64:
1212; RV64:       # %bb.0:
1213; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1214; RV64-NEXT:    vsext.vf2 v24, v8
1215; RV64-NEXT:    vsll.vi v8, v24, 3
1216; RV64-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
1217; RV64-NEXT:    vloxei64.v v16, (a0), v8, v0.t
1218; RV64-NEXT:    vmv8r.v v8, v16
1219; RV64-NEXT:    ret
1220  %eidxs = sext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>
1221  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs
1222  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)
1223  ret <vscale x 8 x i64> %v
1224}
1225
1226define <vscale x 8 x i64> @mgather_baseidx_zext_nxv8i32_nxv8i64(i64* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {
1227; RV32-LABEL: mgather_baseidx_zext_nxv8i32_nxv8i64:
1228; RV32:       # %bb.0:
1229; RV32-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1230; RV32-NEXT:    vzext.vf2 v24, v8
1231; RV32-NEXT:    vsll.vi v8, v24, 3
1232; RV32-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
1233; RV32-NEXT:    vloxei64.v v16, (a0), v8, v0.t
1234; RV32-NEXT:    vmv8r.v v8, v16
1235; RV32-NEXT:    ret
1236;
1237; RV64-LABEL: mgather_baseidx_zext_nxv8i32_nxv8i64:
1238; RV64:       # %bb.0:
1239; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1240; RV64-NEXT:    vzext.vf2 v24, v8
1241; RV64-NEXT:    vsll.vi v8, v24, 3
1242; RV64-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
1243; RV64-NEXT:    vloxei64.v v16, (a0), v8, v0.t
1244; RV64-NEXT:    vmv8r.v v8, v16
1245; RV64-NEXT:    ret
1246  %eidxs = zext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>
1247  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs
1248  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)
1249  ret <vscale x 8 x i64> %v
1250}
1251
1252define <vscale x 8 x i64> @mgather_baseidx_nxv8i64(i64* %base, <vscale x 8 x i64> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {
1253; RV32-LABEL: mgather_baseidx_nxv8i64:
1254; RV32:       # %bb.0:
1255; RV32-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1256; RV32-NEXT:    vsll.vi v8, v8, 3
1257; RV32-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
1258; RV32-NEXT:    vloxei64.v v16, (a0), v8, v0.t
1259; RV32-NEXT:    vmv8r.v v8, v16
1260; RV32-NEXT:    ret
1261;
1262; RV64-LABEL: mgather_baseidx_nxv8i64:
1263; RV64:       # %bb.0:
1264; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1265; RV64-NEXT:    vsll.vi v8, v8, 3
1266; RV64-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
1267; RV64-NEXT:    vloxei64.v v16, (a0), v8, v0.t
1268; RV64-NEXT:    vmv8r.v v8, v16
1269; RV64-NEXT:    ret
1270  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %idxs
1271  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)
1272  ret <vscale x 8 x i64> %v
1273}
1274
1275declare <vscale x 16 x i64> @llvm.masked.gather.nxv16i64.nxv16p0f64(<vscale x 16 x i64*>, i32, <vscale x 16 x i1>, <vscale x 16 x i64>)
1276
1277declare <vscale x 16 x i64> @llvm.experimental.vector.insert.nxv8i64.nxv16i64(<vscale x 16 x i64>, <vscale x 8 x i64>, i64 %idx)
1278declare <vscale x 16 x i64*> @llvm.experimental.vector.insert.nxv8p0i64.nxv16p0i64(<vscale x 16 x i64*>, <vscale x 8 x i64*>, i64 %idx)
1279
1280define void @mgather_nxv16i64(<vscale x 8 x i64*> %ptrs0, <vscale x 8 x i64*> %ptrs1, <vscale x 16 x i1> %m, <vscale x 8 x i64> %passthru0, <vscale x 8 x i64> %passthru1, <vscale x 16 x i64>* %out) {
1281; RV32-LABEL: mgather_nxv16i64:
1282; RV32:       # %bb.0:
1283; RV32-NEXT:    vl8re64.v v24, (a0)
1284; RV32-NEXT:    vsetvli a0, zero, e64,m8,tu,mu
1285; RV32-NEXT:    vloxei32.v v16, (zero), v8, v0.t
1286; RV32-NEXT:    csrr a0, vlenb
1287; RV32-NEXT:    srli a0, a0, 3
1288; RV32-NEXT:    vsetvli a2, zero, e8,mf4,ta,mu
1289; RV32-NEXT:    vslidedown.vx v0, v0, a0
1290; RV32-NEXT:    vsetvli a2, zero, e64,m8,tu,mu
1291; RV32-NEXT:    vloxei32.v v24, (zero), v12, v0.t
1292; RV32-NEXT:    slli a0, a0, 6
1293; RV32-NEXT:    add a0, a1, a0
1294; RV32-NEXT:    vs8r.v v24, (a0)
1295; RV32-NEXT:    vs8r.v v16, (a1)
1296; RV32-NEXT:    ret
1297;
1298; RV64-LABEL: mgather_nxv16i64:
1299; RV64:       # %bb.0:
1300; RV64-NEXT:    addi sp, sp, -16
1301; RV64-NEXT:    .cfi_def_cfa_offset 16
1302; RV64-NEXT:    csrr a3, vlenb
1303; RV64-NEXT:    slli a3, a3, 3
1304; RV64-NEXT:    sub sp, sp, a3
1305; RV64-NEXT:    vl8re64.v v24, (a0)
1306; RV64-NEXT:    addi a0, sp, 16
1307; RV64-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
1308; RV64-NEXT:    vmv8r.v v16, v8
1309; RV64-NEXT:    vl8re64.v v8, (a1)
1310; RV64-NEXT:    vsetvli a0, zero, e64,m8,tu,mu
1311; RV64-NEXT:    vloxei64.v v24, (zero), v16, v0.t
1312; RV64-NEXT:    csrr a0, vlenb
1313; RV64-NEXT:    srli a0, a0, 3
1314; RV64-NEXT:    vsetvli a1, zero, e8,mf4,ta,mu
1315; RV64-NEXT:    vslidedown.vx v0, v0, a0
1316; RV64-NEXT:    vsetvli a1, zero, e64,m8,tu,mu
1317; RV64-NEXT:    addi a1, sp, 16
1318; RV64-NEXT:    vl8re8.v v16, (a1) # Unknown-size Folded Reload
1319; RV64-NEXT:    vloxei64.v v8, (zero), v16, v0.t
1320; RV64-NEXT:    slli a0, a0, 6
1321; RV64-NEXT:    add a0, a2, a0
1322; RV64-NEXT:    vs8r.v v8, (a0)
1323; RV64-NEXT:    vs8r.v v24, (a2)
1324; RV64-NEXT:    csrr a0, vlenb
1325; RV64-NEXT:    slli a0, a0, 3
1326; RV64-NEXT:    add sp, sp, a0
1327; RV64-NEXT:    addi sp, sp, 16
1328; RV64-NEXT:    ret
1329  %p0 = call <vscale x 16 x i64*> @llvm.experimental.vector.insert.nxv8p0i64.nxv16p0i64(<vscale x 16 x i64*> undef, <vscale x 8 x i64*> %ptrs0, i64 0)
1330  %p1 = call <vscale x 16 x i64*> @llvm.experimental.vector.insert.nxv8p0i64.nxv16p0i64(<vscale x 16 x i64*> %p0, <vscale x 8 x i64*> %ptrs1, i64 8)
1331
1332  %pt0 = call <vscale x 16 x i64> @llvm.experimental.vector.insert.nxv8i64.nxv16i64(<vscale x 16 x i64> undef, <vscale x 8 x i64> %passthru0, i64 0)
1333  %pt1 = call <vscale x 16 x i64> @llvm.experimental.vector.insert.nxv8i64.nxv16i64(<vscale x 16 x i64> %pt0, <vscale x 8 x i64> %passthru1, i64 8)
1334
1335  %v = call <vscale x 16 x i64> @llvm.masked.gather.nxv16i64.nxv16p0f64(<vscale x 16 x i64*> %p1, i32 8, <vscale x 16 x i1> %m, <vscale x 16 x i64> %pt1)
1336  store <vscale x 16 x i64> %v, <vscale x 16 x i64>* %out
1337  ret void
1338}
1339
1340
1341declare <vscale x 1 x half> @llvm.masked.gather.nxv1f16.nxv1p0f16(<vscale x 1 x half*>, i32, <vscale x 1 x i1>, <vscale x 1 x half>)
1342
1343define <vscale x 1 x half> @mgather_nxv1f16(<vscale x 1 x half*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x half> %passthru) {
1344; RV32-LABEL: mgather_nxv1f16:
1345; RV32:       # %bb.0:
1346; RV32-NEXT:    vsetvli a0, zero, e16,mf4,tu,mu
1347; RV32-NEXT:    vloxei32.v v9, (zero), v8, v0.t
1348; RV32-NEXT:    vmv1r.v v8, v9
1349; RV32-NEXT:    ret
1350;
1351; RV64-LABEL: mgather_nxv1f16:
1352; RV64:       # %bb.0:
1353; RV64-NEXT:    vsetvli a0, zero, e16,mf4,tu,mu
1354; RV64-NEXT:    vloxei64.v v9, (zero), v8, v0.t
1355; RV64-NEXT:    vmv1r.v v8, v9
1356; RV64-NEXT:    ret
1357  %v = call <vscale x 1 x half> @llvm.masked.gather.nxv1f16.nxv1p0f16(<vscale x 1 x half*> %ptrs, i32 2, <vscale x 1 x i1> %m, <vscale x 1 x half> %passthru)
1358  ret <vscale x 1 x half> %v
1359}
1360
1361declare <vscale x 2 x half> @llvm.masked.gather.nxv2f16.nxv2p0f16(<vscale x 2 x half*>, i32, <vscale x 2 x i1>, <vscale x 2 x half>)
1362
1363define <vscale x 2 x half> @mgather_nxv2f16(<vscale x 2 x half*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x half> %passthru) {
1364; RV32-LABEL: mgather_nxv2f16:
1365; RV32:       # %bb.0:
1366; RV32-NEXT:    vsetvli a0, zero, e16,mf2,tu,mu
1367; RV32-NEXT:    vloxei32.v v9, (zero), v8, v0.t
1368; RV32-NEXT:    vmv1r.v v8, v9
1369; RV32-NEXT:    ret
1370;
1371; RV64-LABEL: mgather_nxv2f16:
1372; RV64:       # %bb.0:
1373; RV64-NEXT:    vsetvli a0, zero, e16,mf2,tu,mu
1374; RV64-NEXT:    vloxei64.v v10, (zero), v8, v0.t
1375; RV64-NEXT:    vmv1r.v v8, v10
1376; RV64-NEXT:    ret
1377  %v = call <vscale x 2 x half> @llvm.masked.gather.nxv2f16.nxv2p0f16(<vscale x 2 x half*> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x half> %passthru)
1378  ret <vscale x 2 x half> %v
1379}
1380
1381declare <vscale x 4 x half> @llvm.masked.gather.nxv4f16.nxv4p0f16(<vscale x 4 x half*>, i32, <vscale x 4 x i1>, <vscale x 4 x half>)
1382
1383define <vscale x 4 x half> @mgather_nxv4f16(<vscale x 4 x half*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x half> %passthru) {
1384; RV32-LABEL: mgather_nxv4f16:
1385; RV32:       # %bb.0:
1386; RV32-NEXT:    vsetvli a0, zero, e16,m1,tu,mu
1387; RV32-NEXT:    vloxei32.v v10, (zero), v8, v0.t
1388; RV32-NEXT:    vmv1r.v v8, v10
1389; RV32-NEXT:    ret
1390;
1391; RV64-LABEL: mgather_nxv4f16:
1392; RV64:       # %bb.0:
1393; RV64-NEXT:    vsetvli a0, zero, e16,m1,tu,mu
1394; RV64-NEXT:    vloxei64.v v12, (zero), v8, v0.t
1395; RV64-NEXT:    vmv1r.v v8, v12
1396; RV64-NEXT:    ret
1397  %v = call <vscale x 4 x half> @llvm.masked.gather.nxv4f16.nxv4p0f16(<vscale x 4 x half*> %ptrs, i32 2, <vscale x 4 x i1> %m, <vscale x 4 x half> %passthru)
1398  ret <vscale x 4 x half> %v
1399}
1400
1401define <vscale x 4 x half> @mgather_truemask_nxv4f16(<vscale x 4 x half*> %ptrs, <vscale x 4 x half> %passthru) {
1402; RV32-LABEL: mgather_truemask_nxv4f16:
1403; RV32:       # %bb.0:
1404; RV32-NEXT:    vsetvli a0, zero, e16,m1,ta,mu
1405; RV32-NEXT:    vloxei32.v v25, (zero), v8
1406; RV32-NEXT:    vmv1r.v v8, v25
1407; RV32-NEXT:    ret
1408;
1409; RV64-LABEL: mgather_truemask_nxv4f16:
1410; RV64:       # %bb.0:
1411; RV64-NEXT:    vsetvli a0, zero, e16,m1,ta,mu
1412; RV64-NEXT:    vloxei64.v v25, (zero), v8
1413; RV64-NEXT:    vmv1r.v v8, v25
1414; RV64-NEXT:    ret
1415  %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0
1416  %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
1417  %v = call <vscale x 4 x half> @llvm.masked.gather.nxv4f16.nxv4p0f16(<vscale x 4 x half*> %ptrs, i32 2, <vscale x 4 x i1> %mtrue, <vscale x 4 x half> %passthru)
1418  ret <vscale x 4 x half> %v
1419}
1420
1421define <vscale x 4 x half> @mgather_falsemask_nxv4f16(<vscale x 4 x half*> %ptrs, <vscale x 4 x half> %passthru) {
1422; RV32-LABEL: mgather_falsemask_nxv4f16:
1423; RV32:       # %bb.0:
1424; RV32-NEXT:    vmv1r.v v8, v10
1425; RV32-NEXT:    ret
1426;
1427; RV64-LABEL: mgather_falsemask_nxv4f16:
1428; RV64:       # %bb.0:
1429; RV64-NEXT:    vmv1r.v v8, v12
1430; RV64-NEXT:    ret
1431  %v = call <vscale x 4 x half> @llvm.masked.gather.nxv4f16.nxv4p0f16(<vscale x 4 x half*> %ptrs, i32 2, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x half> %passthru)
1432  ret <vscale x 4 x half> %v
1433}
1434
1435declare <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*>, i32, <vscale x 8 x i1>, <vscale x 8 x half>)
1436
1437define <vscale x 8 x half> @mgather_nxv8f16(<vscale x 8 x half*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) {
1438; RV32-LABEL: mgather_nxv8f16:
1439; RV32:       # %bb.0:
1440; RV32-NEXT:    vsetvli a0, zero, e16,m2,tu,mu
1441; RV32-NEXT:    vloxei32.v v12, (zero), v8, v0.t
1442; RV32-NEXT:    vmv2r.v v8, v12
1443; RV32-NEXT:    ret
1444;
1445; RV64-LABEL: mgather_nxv8f16:
1446; RV64:       # %bb.0:
1447; RV64-NEXT:    vsetvli a0, zero, e16,m2,tu,mu
1448; RV64-NEXT:    vloxei64.v v16, (zero), v8, v0.t
1449; RV64-NEXT:    vmv2r.v v8, v16
1450; RV64-NEXT:    ret
1451  %v = call <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru)
1452  ret <vscale x 8 x half> %v
1453}
1454
1455define <vscale x 8 x half> @mgather_baseidx_nxv8i8_nxv8f16(half* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) {
1456; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8f16:
1457; RV32:       # %bb.0:
1458; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
1459; RV32-NEXT:    vsext.vf4 v28, v8
1460; RV32-NEXT:    vsll.vi v28, v28, 1
1461; RV32-NEXT:    vsetvli zero, zero, e16,m2,tu,mu
1462; RV32-NEXT:    vloxei32.v v10, (a0), v28, v0.t
1463; RV32-NEXT:    vmv2r.v v8, v10
1464; RV32-NEXT:    ret
1465;
1466; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8f16:
1467; RV64:       # %bb.0:
1468; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1469; RV64-NEXT:    vsext.vf8 v16, v8
1470; RV64-NEXT:    vsll.vi v16, v16, 1
1471; RV64-NEXT:    vsetvli zero, zero, e16,m2,tu,mu
1472; RV64-NEXT:    vloxei64.v v10, (a0), v16, v0.t
1473; RV64-NEXT:    vmv2r.v v8, v10
1474; RV64-NEXT:    ret
1475  %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i8> %idxs
1476  %v = call <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru)
1477  ret <vscale x 8 x half> %v
1478}
1479
1480define <vscale x 8 x half> @mgather_baseidx_sext_nxv8i8_nxv8f16(half* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) {
1481; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f16:
1482; RV32:       # %bb.0:
1483; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
1484; RV32-NEXT:    vsext.vf4 v28, v8
1485; RV32-NEXT:    vsll.vi v28, v28, 1
1486; RV32-NEXT:    vsetvli zero, zero, e16,m2,tu,mu
1487; RV32-NEXT:    vloxei32.v v10, (a0), v28, v0.t
1488; RV32-NEXT:    vmv2r.v v8, v10
1489; RV32-NEXT:    ret
1490;
1491; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f16:
1492; RV64:       # %bb.0:
1493; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1494; RV64-NEXT:    vsext.vf8 v16, v8
1495; RV64-NEXT:    vsll.vi v16, v16, 1
1496; RV64-NEXT:    vsetvli zero, zero, e16,m2,tu,mu
1497; RV64-NEXT:    vloxei64.v v10, (a0), v16, v0.t
1498; RV64-NEXT:    vmv2r.v v8, v10
1499; RV64-NEXT:    ret
1500  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>
1501  %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i16> %eidxs
1502  %v = call <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru)
1503  ret <vscale x 8 x half> %v
1504}
1505
1506define <vscale x 8 x half> @mgather_baseidx_zext_nxv8i8_nxv8f16(half* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) {
1507; RV32-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f16:
1508; RV32:       # %bb.0:
1509; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
1510; RV32-NEXT:    vzext.vf4 v28, v8
1511; RV32-NEXT:    vsll.vi v28, v28, 1
1512; RV32-NEXT:    vsetvli zero, zero, e16,m2,tu,mu
1513; RV32-NEXT:    vloxei32.v v10, (a0), v28, v0.t
1514; RV32-NEXT:    vmv2r.v v8, v10
1515; RV32-NEXT:    ret
1516;
1517; RV64-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f16:
1518; RV64:       # %bb.0:
1519; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1520; RV64-NEXT:    vzext.vf8 v16, v8
1521; RV64-NEXT:    vsll.vi v16, v16, 1
1522; RV64-NEXT:    vsetvli zero, zero, e16,m2,tu,mu
1523; RV64-NEXT:    vloxei64.v v10, (a0), v16, v0.t
1524; RV64-NEXT:    vmv2r.v v8, v10
1525; RV64-NEXT:    ret
1526  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>
1527  %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i16> %eidxs
1528  %v = call <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru)
1529  ret <vscale x 8 x half> %v
1530}
1531
1532define <vscale x 8 x half> @mgather_baseidx_nxv8f16(half* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) {
1533; RV32-LABEL: mgather_baseidx_nxv8f16:
1534; RV32:       # %bb.0:
1535; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
1536; RV32-NEXT:    vsext.vf2 v28, v8
1537; RV32-NEXT:    vsll.vi v28, v28, 1
1538; RV32-NEXT:    vsetvli zero, zero, e16,m2,tu,mu
1539; RV32-NEXT:    vloxei32.v v10, (a0), v28, v0.t
1540; RV32-NEXT:    vmv2r.v v8, v10
1541; RV32-NEXT:    ret
1542;
1543; RV64-LABEL: mgather_baseidx_nxv8f16:
1544; RV64:       # %bb.0:
1545; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1546; RV64-NEXT:    vsext.vf4 v16, v8
1547; RV64-NEXT:    vsll.vi v16, v16, 1
1548; RV64-NEXT:    vsetvli zero, zero, e16,m2,tu,mu
1549; RV64-NEXT:    vloxei64.v v10, (a0), v16, v0.t
1550; RV64-NEXT:    vmv2r.v v8, v10
1551; RV64-NEXT:    ret
1552  %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i16> %idxs
1553  %v = call <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru)
1554  ret <vscale x 8 x half> %v
1555}
1556
1557declare <vscale x 1 x float> @llvm.masked.gather.nxv1f32.nxv1p0f32(<vscale x 1 x float*>, i32, <vscale x 1 x i1>, <vscale x 1 x float>)
1558
1559define <vscale x 1 x float> @mgather_nxv1f32(<vscale x 1 x float*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x float> %passthru) {
1560; RV32-LABEL: mgather_nxv1f32:
1561; RV32:       # %bb.0:
1562; RV32-NEXT:    vsetvli a0, zero, e32,mf2,tu,mu
1563; RV32-NEXT:    vloxei32.v v9, (zero), v8, v0.t
1564; RV32-NEXT:    vmv1r.v v8, v9
1565; RV32-NEXT:    ret
1566;
1567; RV64-LABEL: mgather_nxv1f32:
1568; RV64:       # %bb.0:
1569; RV64-NEXT:    vsetvli a0, zero, e32,mf2,tu,mu
1570; RV64-NEXT:    vloxei64.v v9, (zero), v8, v0.t
1571; RV64-NEXT:    vmv1r.v v8, v9
1572; RV64-NEXT:    ret
1573  %v = call <vscale x 1 x float> @llvm.masked.gather.nxv1f32.nxv1p0f32(<vscale x 1 x float*> %ptrs, i32 4, <vscale x 1 x i1> %m, <vscale x 1 x float> %passthru)
1574  ret <vscale x 1 x float> %v
1575}
1576
1577declare <vscale x 2 x float> @llvm.masked.gather.nxv2f32.nxv2p0f32(<vscale x 2 x float*>, i32, <vscale x 2 x i1>, <vscale x 2 x float>)
1578
1579define <vscale x 2 x float> @mgather_nxv2f32(<vscale x 2 x float*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x float> %passthru) {
1580; RV32-LABEL: mgather_nxv2f32:
1581; RV32:       # %bb.0:
1582; RV32-NEXT:    vsetvli a0, zero, e32,m1,tu,mu
1583; RV32-NEXT:    vloxei32.v v9, (zero), v8, v0.t
1584; RV32-NEXT:    vmv1r.v v8, v9
1585; RV32-NEXT:    ret
1586;
1587; RV64-LABEL: mgather_nxv2f32:
1588; RV64:       # %bb.0:
1589; RV64-NEXT:    vsetvli a0, zero, e32,m1,tu,mu
1590; RV64-NEXT:    vloxei64.v v10, (zero), v8, v0.t
1591; RV64-NEXT:    vmv1r.v v8, v10
1592; RV64-NEXT:    ret
1593  %v = call <vscale x 2 x float> @llvm.masked.gather.nxv2f32.nxv2p0f32(<vscale x 2 x float*> %ptrs, i32 4, <vscale x 2 x i1> %m, <vscale x 2 x float> %passthru)
1594  ret <vscale x 2 x float> %v
1595}
1596
1597declare <vscale x 4 x float> @llvm.masked.gather.nxv4f32.nxv4p0f32(<vscale x 4 x float*>, i32, <vscale x 4 x i1>, <vscale x 4 x float>)
1598
1599define <vscale x 4 x float> @mgather_nxv4f32(<vscale x 4 x float*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x float> %passthru) {
1600; RV32-LABEL: mgather_nxv4f32:
1601; RV32:       # %bb.0:
1602; RV32-NEXT:    vsetvli a0, zero, e32,m2,tu,mu
1603; RV32-NEXT:    vloxei32.v v10, (zero), v8, v0.t
1604; RV32-NEXT:    vmv2r.v v8, v10
1605; RV32-NEXT:    ret
1606;
1607; RV64-LABEL: mgather_nxv4f32:
1608; RV64:       # %bb.0:
1609; RV64-NEXT:    vsetvli a0, zero, e32,m2,tu,mu
1610; RV64-NEXT:    vloxei64.v v12, (zero), v8, v0.t
1611; RV64-NEXT:    vmv2r.v v8, v12
1612; RV64-NEXT:    ret
1613  %v = call <vscale x 4 x float> @llvm.masked.gather.nxv4f32.nxv4p0f32(<vscale x 4 x float*> %ptrs, i32 4, <vscale x 4 x i1> %m, <vscale x 4 x float> %passthru)
1614  ret <vscale x 4 x float> %v
1615}
1616
1617define <vscale x 4 x float> @mgather_truemask_nxv4f32(<vscale x 4 x float*> %ptrs, <vscale x 4 x float> %passthru) {
1618; RV32-LABEL: mgather_truemask_nxv4f32:
1619; RV32:       # %bb.0:
1620; RV32-NEXT:    vsetvli a0, zero, e32,m2,ta,mu
1621; RV32-NEXT:    vloxei32.v v8, (zero), v8
1622; RV32-NEXT:    ret
1623;
1624; RV64-LABEL: mgather_truemask_nxv4f32:
1625; RV64:       # %bb.0:
1626; RV64-NEXT:    vsetvli a0, zero, e32,m2,ta,mu
1627; RV64-NEXT:    vloxei64.v v26, (zero), v8
1628; RV64-NEXT:    vmv2r.v v8, v26
1629; RV64-NEXT:    ret
1630  %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0
1631  %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
1632  %v = call <vscale x 4 x float> @llvm.masked.gather.nxv4f32.nxv4p0f32(<vscale x 4 x float*> %ptrs, i32 4, <vscale x 4 x i1> %mtrue, <vscale x 4 x float> %passthru)
1633  ret <vscale x 4 x float> %v
1634}
1635
1636define <vscale x 4 x float> @mgather_falsemask_nxv4f32(<vscale x 4 x float*> %ptrs, <vscale x 4 x float> %passthru) {
1637; RV32-LABEL: mgather_falsemask_nxv4f32:
1638; RV32:       # %bb.0:
1639; RV32-NEXT:    vmv2r.v v8, v10
1640; RV32-NEXT:    ret
1641;
1642; RV64-LABEL: mgather_falsemask_nxv4f32:
1643; RV64:       # %bb.0:
1644; RV64-NEXT:    vmv2r.v v8, v12
1645; RV64-NEXT:    ret
1646  %v = call <vscale x 4 x float> @llvm.masked.gather.nxv4f32.nxv4p0f32(<vscale x 4 x float*> %ptrs, i32 4, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x float> %passthru)
1647  ret <vscale x 4 x float> %v
1648}
1649
1650declare <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*>, i32, <vscale x 8 x i1>, <vscale x 8 x float>)
1651
1652define <vscale x 8 x float> @mgather_nxv8f32(<vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) {
1653; RV32-LABEL: mgather_nxv8f32:
1654; RV32:       # %bb.0:
1655; RV32-NEXT:    vsetvli a0, zero, e32,m4,tu,mu
1656; RV32-NEXT:    vloxei32.v v12, (zero), v8, v0.t
1657; RV32-NEXT:    vmv4r.v v8, v12
1658; RV32-NEXT:    ret
1659;
1660; RV64-LABEL: mgather_nxv8f32:
1661; RV64:       # %bb.0:
1662; RV64-NEXT:    vsetvli a0, zero, e32,m4,tu,mu
1663; RV64-NEXT:    vloxei64.v v16, (zero), v8, v0.t
1664; RV64-NEXT:    vmv4r.v v8, v16
1665; RV64-NEXT:    ret
1666  %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru)
1667  ret <vscale x 8 x float> %v
1668}
1669
1670define <vscale x 8 x float> @mgather_baseidx_nxv8i8_nxv8f32(float* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) {
1671; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8f32:
1672; RV32:       # %bb.0:
1673; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
1674; RV32-NEXT:    vsext.vf4 v28, v8
1675; RV32-NEXT:    vsll.vi v28, v28, 2
1676; RV32-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
1677; RV32-NEXT:    vloxei32.v v12, (a0), v28, v0.t
1678; RV32-NEXT:    vmv4r.v v8, v12
1679; RV32-NEXT:    ret
1680;
1681; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8f32:
1682; RV64:       # %bb.0:
1683; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1684; RV64-NEXT:    vsext.vf8 v16, v8
1685; RV64-NEXT:    vsll.vi v16, v16, 2
1686; RV64-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
1687; RV64-NEXT:    vloxei64.v v12, (a0), v16, v0.t
1688; RV64-NEXT:    vmv4r.v v8, v12
1689; RV64-NEXT:    ret
1690  %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i8> %idxs
1691  %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru)
1692  ret <vscale x 8 x float> %v
1693}
1694
1695define <vscale x 8 x float> @mgather_baseidx_sext_nxv8i8_nxv8f32(float* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) {
1696; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f32:
1697; RV32:       # %bb.0:
1698; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
1699; RV32-NEXT:    vsext.vf4 v28, v8
1700; RV32-NEXT:    vsll.vi v28, v28, 2
1701; RV32-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
1702; RV32-NEXT:    vloxei32.v v12, (a0), v28, v0.t
1703; RV32-NEXT:    vmv4r.v v8, v12
1704; RV32-NEXT:    ret
1705;
1706; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f32:
1707; RV64:       # %bb.0:
1708; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1709; RV64-NEXT:    vsext.vf8 v16, v8
1710; RV64-NEXT:    vsll.vi v16, v16, 2
1711; RV64-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
1712; RV64-NEXT:    vloxei64.v v12, (a0), v16, v0.t
1713; RV64-NEXT:    vmv4r.v v8, v12
1714; RV64-NEXT:    ret
1715  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>
1716  %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs
1717  %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru)
1718  ret <vscale x 8 x float> %v
1719}
1720
1721define <vscale x 8 x float> @mgather_baseidx_zext_nxv8i8_nxv8f32(float* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) {
1722; RV32-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f32:
1723; RV32:       # %bb.0:
1724; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
1725; RV32-NEXT:    vzext.vf4 v28, v8
1726; RV32-NEXT:    vsll.vi v28, v28, 2
1727; RV32-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
1728; RV32-NEXT:    vloxei32.v v12, (a0), v28, v0.t
1729; RV32-NEXT:    vmv4r.v v8, v12
1730; RV32-NEXT:    ret
1731;
1732; RV64-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f32:
1733; RV64:       # %bb.0:
1734; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1735; RV64-NEXT:    vzext.vf8 v16, v8
1736; RV64-NEXT:    vsll.vi v16, v16, 2
1737; RV64-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
1738; RV64-NEXT:    vloxei64.v v12, (a0), v16, v0.t
1739; RV64-NEXT:    vmv4r.v v8, v12
1740; RV64-NEXT:    ret
1741  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>
1742  %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs
1743  %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru)
1744  ret <vscale x 8 x float> %v
1745}
1746
1747define <vscale x 8 x float> @mgather_baseidx_nxv8i16_nxv8f32(float* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) {
1748; RV32-LABEL: mgather_baseidx_nxv8i16_nxv8f32:
1749; RV32:       # %bb.0:
1750; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
1751; RV32-NEXT:    vsext.vf2 v28, v8
1752; RV32-NEXT:    vsll.vi v28, v28, 2
1753; RV32-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
1754; RV32-NEXT:    vloxei32.v v12, (a0), v28, v0.t
1755; RV32-NEXT:    vmv4r.v v8, v12
1756; RV32-NEXT:    ret
1757;
1758; RV64-LABEL: mgather_baseidx_nxv8i16_nxv8f32:
1759; RV64:       # %bb.0:
1760; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1761; RV64-NEXT:    vsext.vf4 v16, v8
1762; RV64-NEXT:    vsll.vi v16, v16, 2
1763; RV64-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
1764; RV64-NEXT:    vloxei64.v v12, (a0), v16, v0.t
1765; RV64-NEXT:    vmv4r.v v8, v12
1766; RV64-NEXT:    ret
1767  %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i16> %idxs
1768  %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru)
1769  ret <vscale x 8 x float> %v
1770}
1771
1772define <vscale x 8 x float> @mgather_baseidx_sext_nxv8i16_nxv8f32(float* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) {
1773; RV32-LABEL: mgather_baseidx_sext_nxv8i16_nxv8f32:
1774; RV32:       # %bb.0:
1775; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
1776; RV32-NEXT:    vsext.vf2 v28, v8
1777; RV32-NEXT:    vsll.vi v28, v28, 2
1778; RV32-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
1779; RV32-NEXT:    vloxei32.v v12, (a0), v28, v0.t
1780; RV32-NEXT:    vmv4r.v v8, v12
1781; RV32-NEXT:    ret
1782;
1783; RV64-LABEL: mgather_baseidx_sext_nxv8i16_nxv8f32:
1784; RV64:       # %bb.0:
1785; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1786; RV64-NEXT:    vsext.vf4 v16, v8
1787; RV64-NEXT:    vsll.vi v16, v16, 2
1788; RV64-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
1789; RV64-NEXT:    vloxei64.v v12, (a0), v16, v0.t
1790; RV64-NEXT:    vmv4r.v v8, v12
1791; RV64-NEXT:    ret
1792  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>
1793  %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs
1794  %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru)
1795  ret <vscale x 8 x float> %v
1796}
1797
1798define <vscale x 8 x float> @mgather_baseidx_zext_nxv8i16_nxv8f32(float* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) {
1799; RV32-LABEL: mgather_baseidx_zext_nxv8i16_nxv8f32:
1800; RV32:       # %bb.0:
1801; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
1802; RV32-NEXT:    vzext.vf2 v28, v8
1803; RV32-NEXT:    vsll.vi v28, v28, 2
1804; RV32-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
1805; RV32-NEXT:    vloxei32.v v12, (a0), v28, v0.t
1806; RV32-NEXT:    vmv4r.v v8, v12
1807; RV32-NEXT:    ret
1808;
1809; RV64-LABEL: mgather_baseidx_zext_nxv8i16_nxv8f32:
1810; RV64:       # %bb.0:
1811; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1812; RV64-NEXT:    vzext.vf4 v16, v8
1813; RV64-NEXT:    vsll.vi v16, v16, 2
1814; RV64-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
1815; RV64-NEXT:    vloxei64.v v12, (a0), v16, v0.t
1816; RV64-NEXT:    vmv4r.v v8, v12
1817; RV64-NEXT:    ret
1818  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>
1819  %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs
1820  %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru)
1821  ret <vscale x 8 x float> %v
1822}
1823
1824define <vscale x 8 x float> @mgather_baseidx_nxv8f32(float* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) {
1825; RV32-LABEL: mgather_baseidx_nxv8f32:
1826; RV32:       # %bb.0:
1827; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
1828; RV32-NEXT:    vsll.vi v28, v8, 2
1829; RV32-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
1830; RV32-NEXT:    vloxei32.v v12, (a0), v28, v0.t
1831; RV32-NEXT:    vmv4r.v v8, v12
1832; RV32-NEXT:    ret
1833;
1834; RV64-LABEL: mgather_baseidx_nxv8f32:
1835; RV64:       # %bb.0:
1836; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1837; RV64-NEXT:    vsext.vf2 v16, v8
1838; RV64-NEXT:    vsll.vi v16, v16, 2
1839; RV64-NEXT:    vsetvli zero, zero, e32,m4,tu,mu
1840; RV64-NEXT:    vloxei64.v v12, (a0), v16, v0.t
1841; RV64-NEXT:    vmv4r.v v8, v12
1842; RV64-NEXT:    ret
1843  %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %idxs
1844  %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru)
1845  ret <vscale x 8 x float> %v
1846}
1847
1848declare <vscale x 1 x double> @llvm.masked.gather.nxv1f64.nxv1p0f64(<vscale x 1 x double*>, i32, <vscale x 1 x i1>, <vscale x 1 x double>)
1849
1850define <vscale x 1 x double> @mgather_nxv1f64(<vscale x 1 x double*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x double> %passthru) {
1851; RV32-LABEL: mgather_nxv1f64:
1852; RV32:       # %bb.0:
1853; RV32-NEXT:    vsetvli a0, zero, e64,m1,tu,mu
1854; RV32-NEXT:    vloxei32.v v9, (zero), v8, v0.t
1855; RV32-NEXT:    vmv1r.v v8, v9
1856; RV32-NEXT:    ret
1857;
1858; RV64-LABEL: mgather_nxv1f64:
1859; RV64:       # %bb.0:
1860; RV64-NEXT:    vsetvli a0, zero, e64,m1,tu,mu
1861; RV64-NEXT:    vloxei64.v v9, (zero), v8, v0.t
1862; RV64-NEXT:    vmv1r.v v8, v9
1863; RV64-NEXT:    ret
1864  %v = call <vscale x 1 x double> @llvm.masked.gather.nxv1f64.nxv1p0f64(<vscale x 1 x double*> %ptrs, i32 8, <vscale x 1 x i1> %m, <vscale x 1 x double> %passthru)
1865  ret <vscale x 1 x double> %v
1866}
1867
1868declare <vscale x 2 x double> @llvm.masked.gather.nxv2f64.nxv2p0f64(<vscale x 2 x double*>, i32, <vscale x 2 x i1>, <vscale x 2 x double>)
1869
1870define <vscale x 2 x double> @mgather_nxv2f64(<vscale x 2 x double*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x double> %passthru) {
1871; RV32-LABEL: mgather_nxv2f64:
1872; RV32:       # %bb.0:
1873; RV32-NEXT:    vsetvli a0, zero, e64,m2,tu,mu
1874; RV32-NEXT:    vloxei32.v v10, (zero), v8, v0.t
1875; RV32-NEXT:    vmv2r.v v8, v10
1876; RV32-NEXT:    ret
1877;
1878; RV64-LABEL: mgather_nxv2f64:
1879; RV64:       # %bb.0:
1880; RV64-NEXT:    vsetvli a0, zero, e64,m2,tu,mu
1881; RV64-NEXT:    vloxei64.v v10, (zero), v8, v0.t
1882; RV64-NEXT:    vmv2r.v v8, v10
1883; RV64-NEXT:    ret
1884  %v = call <vscale x 2 x double> @llvm.masked.gather.nxv2f64.nxv2p0f64(<vscale x 2 x double*> %ptrs, i32 8, <vscale x 2 x i1> %m, <vscale x 2 x double> %passthru)
1885  ret <vscale x 2 x double> %v
1886}
1887
1888declare <vscale x 4 x double> @llvm.masked.gather.nxv4f64.nxv4p0f64(<vscale x 4 x double*>, i32, <vscale x 4 x i1>, <vscale x 4 x double>)
1889
1890define <vscale x 4 x double> @mgather_nxv4f64(<vscale x 4 x double*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x double> %passthru) {
1891; RV32-LABEL: mgather_nxv4f64:
1892; RV32:       # %bb.0:
1893; RV32-NEXT:    vsetvli a0, zero, e64,m4,tu,mu
1894; RV32-NEXT:    vloxei32.v v12, (zero), v8, v0.t
1895; RV32-NEXT:    vmv4r.v v8, v12
1896; RV32-NEXT:    ret
1897;
1898; RV64-LABEL: mgather_nxv4f64:
1899; RV64:       # %bb.0:
1900; RV64-NEXT:    vsetvli a0, zero, e64,m4,tu,mu
1901; RV64-NEXT:    vloxei64.v v12, (zero), v8, v0.t
1902; RV64-NEXT:    vmv4r.v v8, v12
1903; RV64-NEXT:    ret
1904  %v = call <vscale x 4 x double> @llvm.masked.gather.nxv4f64.nxv4p0f64(<vscale x 4 x double*> %ptrs, i32 8, <vscale x 4 x i1> %m, <vscale x 4 x double> %passthru)
1905  ret <vscale x 4 x double> %v
1906}
1907
1908define <vscale x 4 x double> @mgather_truemask_nxv4f64(<vscale x 4 x double*> %ptrs, <vscale x 4 x double> %passthru) {
1909; RV32-LABEL: mgather_truemask_nxv4f64:
1910; RV32:       # %bb.0:
1911; RV32-NEXT:    vsetvli a0, zero, e64,m4,ta,mu
1912; RV32-NEXT:    vloxei32.v v28, (zero), v8
1913; RV32-NEXT:    vmv4r.v v8, v28
1914; RV32-NEXT:    ret
1915;
1916; RV64-LABEL: mgather_truemask_nxv4f64:
1917; RV64:       # %bb.0:
1918; RV64-NEXT:    vsetvli a0, zero, e64,m4,ta,mu
1919; RV64-NEXT:    vloxei64.v v8, (zero), v8
1920; RV64-NEXT:    ret
1921  %mhead = insertelement <vscale x 4 x i1> undef, i1 1, i32 0
1922  %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> undef, <vscale x 4 x i32> zeroinitializer
1923  %v = call <vscale x 4 x double> @llvm.masked.gather.nxv4f64.nxv4p0f64(<vscale x 4 x double*> %ptrs, i32 8, <vscale x 4 x i1> %mtrue, <vscale x 4 x double> %passthru)
1924  ret <vscale x 4 x double> %v
1925}
1926
1927define <vscale x 4 x double> @mgather_falsemask_nxv4f64(<vscale x 4 x double*> %ptrs, <vscale x 4 x double> %passthru) {
1928; RV32-LABEL: mgather_falsemask_nxv4f64:
1929; RV32:       # %bb.0:
1930; RV32-NEXT:    vmv4r.v v8, v12
1931; RV32-NEXT:    ret
1932;
1933; RV64-LABEL: mgather_falsemask_nxv4f64:
1934; RV64:       # %bb.0:
1935; RV64-NEXT:    vmv4r.v v8, v12
1936; RV64-NEXT:    ret
1937  %v = call <vscale x 4 x double> @llvm.masked.gather.nxv4f64.nxv4p0f64(<vscale x 4 x double*> %ptrs, i32 8, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x double> %passthru)
1938  ret <vscale x 4 x double> %v
1939}
1940
1941declare <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*>, i32, <vscale x 8 x i1>, <vscale x 8 x double>)
1942
1943define <vscale x 8 x double> @mgather_nxv8f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {
1944; RV32-LABEL: mgather_nxv8f64:
1945; RV32:       # %bb.0:
1946; RV32-NEXT:    vsetvli a0, zero, e64,m8,tu,mu
1947; RV32-NEXT:    vloxei32.v v16, (zero), v8, v0.t
1948; RV32-NEXT:    vmv8r.v v8, v16
1949; RV32-NEXT:    ret
1950;
1951; RV64-LABEL: mgather_nxv8f64:
1952; RV64:       # %bb.0:
1953; RV64-NEXT:    vsetvli a0, zero, e64,m8,tu,mu
1954; RV64-NEXT:    vloxei64.v v16, (zero), v8, v0.t
1955; RV64-NEXT:    vmv8r.v v8, v16
1956; RV64-NEXT:    ret
1957  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)
1958  ret <vscale x 8 x double> %v
1959}
1960
1961define <vscale x 8 x double> @mgather_baseidx_nxv8i8_nxv8f64(double* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {
1962; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8f64:
1963; RV32:       # %bb.0:
1964; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
1965; RV32-NEXT:    vsext.vf4 v28, v8
1966; RV32-NEXT:    vsll.vi v28, v28, 3
1967; RV32-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
1968; RV32-NEXT:    vloxei32.v v16, (a0), v28, v0.t
1969; RV32-NEXT:    vmv8r.v v8, v16
1970; RV32-NEXT:    ret
1971;
1972; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8f64:
1973; RV64:       # %bb.0:
1974; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1975; RV64-NEXT:    vsext.vf8 v24, v8
1976; RV64-NEXT:    vsll.vi v8, v24, 3
1977; RV64-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
1978; RV64-NEXT:    vloxei64.v v16, (a0), v8, v0.t
1979; RV64-NEXT:    vmv8r.v v8, v16
1980; RV64-NEXT:    ret
1981  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i8> %idxs
1982  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)
1983  ret <vscale x 8 x double> %v
1984}
1985
1986define <vscale x 8 x double> @mgather_baseidx_sext_nxv8i8_nxv8f64(double* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {
1987; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f64:
1988; RV32:       # %bb.0:
1989; RV32-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
1990; RV32-NEXT:    vsext.vf8 v24, v8
1991; RV32-NEXT:    vsll.vi v8, v24, 3
1992; RV32-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
1993; RV32-NEXT:    vloxei64.v v16, (a0), v8, v0.t
1994; RV32-NEXT:    vmv8r.v v8, v16
1995; RV32-NEXT:    ret
1996;
1997; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f64:
1998; RV64:       # %bb.0:
1999; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
2000; RV64-NEXT:    vsext.vf8 v24, v8
2001; RV64-NEXT:    vsll.vi v8, v24, 3
2002; RV64-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
2003; RV64-NEXT:    vloxei64.v v16, (a0), v8, v0.t
2004; RV64-NEXT:    vmv8r.v v8, v16
2005; RV64-NEXT:    ret
2006  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>
2007  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs
2008  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)
2009  ret <vscale x 8 x double> %v
2010}
2011
2012define <vscale x 8 x double> @mgather_baseidx_zext_nxv8i8_nxv8f64(double* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {
2013; RV32-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f64:
2014; RV32:       # %bb.0:
2015; RV32-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
2016; RV32-NEXT:    vzext.vf8 v24, v8
2017; RV32-NEXT:    vsll.vi v8, v24, 3
2018; RV32-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
2019; RV32-NEXT:    vloxei64.v v16, (a0), v8, v0.t
2020; RV32-NEXT:    vmv8r.v v8, v16
2021; RV32-NEXT:    ret
2022;
2023; RV64-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f64:
2024; RV64:       # %bb.0:
2025; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
2026; RV64-NEXT:    vzext.vf8 v24, v8
2027; RV64-NEXT:    vsll.vi v8, v24, 3
2028; RV64-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
2029; RV64-NEXT:    vloxei64.v v16, (a0), v8, v0.t
2030; RV64-NEXT:    vmv8r.v v8, v16
2031; RV64-NEXT:    ret
2032  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>
2033  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs
2034  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)
2035  ret <vscale x 8 x double> %v
2036}
2037
2038define <vscale x 8 x double> @mgather_baseidx_nxv8i16_nxv8f64(double* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {
2039; RV32-LABEL: mgather_baseidx_nxv8i16_nxv8f64:
2040; RV32:       # %bb.0:
2041; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
2042; RV32-NEXT:    vsext.vf2 v28, v8
2043; RV32-NEXT:    vsll.vi v28, v28, 3
2044; RV32-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
2045; RV32-NEXT:    vloxei32.v v16, (a0), v28, v0.t
2046; RV32-NEXT:    vmv8r.v v8, v16
2047; RV32-NEXT:    ret
2048;
2049; RV64-LABEL: mgather_baseidx_nxv8i16_nxv8f64:
2050; RV64:       # %bb.0:
2051; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
2052; RV64-NEXT:    vsext.vf4 v24, v8
2053; RV64-NEXT:    vsll.vi v8, v24, 3
2054; RV64-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
2055; RV64-NEXT:    vloxei64.v v16, (a0), v8, v0.t
2056; RV64-NEXT:    vmv8r.v v8, v16
2057; RV64-NEXT:    ret
2058  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i16> %idxs
2059  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)
2060  ret <vscale x 8 x double> %v
2061}
2062
2063define <vscale x 8 x double> @mgather_baseidx_sext_nxv8i16_nxv8f64(double* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {
2064; RV32-LABEL: mgather_baseidx_sext_nxv8i16_nxv8f64:
2065; RV32:       # %bb.0:
2066; RV32-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
2067; RV32-NEXT:    vsext.vf4 v24, v8
2068; RV32-NEXT:    vsll.vi v8, v24, 3
2069; RV32-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
2070; RV32-NEXT:    vloxei64.v v16, (a0), v8, v0.t
2071; RV32-NEXT:    vmv8r.v v8, v16
2072; RV32-NEXT:    ret
2073;
2074; RV64-LABEL: mgather_baseidx_sext_nxv8i16_nxv8f64:
2075; RV64:       # %bb.0:
2076; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
2077; RV64-NEXT:    vsext.vf4 v24, v8
2078; RV64-NEXT:    vsll.vi v8, v24, 3
2079; RV64-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
2080; RV64-NEXT:    vloxei64.v v16, (a0), v8, v0.t
2081; RV64-NEXT:    vmv8r.v v8, v16
2082; RV64-NEXT:    ret
2083  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>
2084  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs
2085  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)
2086  ret <vscale x 8 x double> %v
2087}
2088
2089define <vscale x 8 x double> @mgather_baseidx_zext_nxv8i16_nxv8f64(double* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {
2090; RV32-LABEL: mgather_baseidx_zext_nxv8i16_nxv8f64:
2091; RV32:       # %bb.0:
2092; RV32-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
2093; RV32-NEXT:    vzext.vf4 v24, v8
2094; RV32-NEXT:    vsll.vi v8, v24, 3
2095; RV32-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
2096; RV32-NEXT:    vloxei64.v v16, (a0), v8, v0.t
2097; RV32-NEXT:    vmv8r.v v8, v16
2098; RV32-NEXT:    ret
2099;
2100; RV64-LABEL: mgather_baseidx_zext_nxv8i16_nxv8f64:
2101; RV64:       # %bb.0:
2102; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
2103; RV64-NEXT:    vzext.vf4 v24, v8
2104; RV64-NEXT:    vsll.vi v8, v24, 3
2105; RV64-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
2106; RV64-NEXT:    vloxei64.v v16, (a0), v8, v0.t
2107; RV64-NEXT:    vmv8r.v v8, v16
2108; RV64-NEXT:    ret
2109  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>
2110  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs
2111  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)
2112  ret <vscale x 8 x double> %v
2113}
2114
2115define <vscale x 8 x double> @mgather_baseidx_nxv8i32_nxv8f64(double* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {
2116; RV32-LABEL: mgather_baseidx_nxv8i32_nxv8f64:
2117; RV32:       # %bb.0:
2118; RV32-NEXT:    vsetvli a1, zero, e32,m4,ta,mu
2119; RV32-NEXT:    vsll.vi v28, v8, 3
2120; RV32-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
2121; RV32-NEXT:    vloxei32.v v16, (a0), v28, v0.t
2122; RV32-NEXT:    vmv8r.v v8, v16
2123; RV32-NEXT:    ret
2124;
2125; RV64-LABEL: mgather_baseidx_nxv8i32_nxv8f64:
2126; RV64:       # %bb.0:
2127; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
2128; RV64-NEXT:    vsext.vf2 v24, v8
2129; RV64-NEXT:    vsll.vi v8, v24, 3
2130; RV64-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
2131; RV64-NEXT:    vloxei64.v v16, (a0), v8, v0.t
2132; RV64-NEXT:    vmv8r.v v8, v16
2133; RV64-NEXT:    ret
2134  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i32> %idxs
2135  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)
2136  ret <vscale x 8 x double> %v
2137}
2138
2139define <vscale x 8 x double> @mgather_baseidx_sext_nxv8i32_nxv8f64(double* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {
2140; RV32-LABEL: mgather_baseidx_sext_nxv8i32_nxv8f64:
2141; RV32:       # %bb.0:
2142; RV32-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
2143; RV32-NEXT:    vsext.vf2 v24, v8
2144; RV32-NEXT:    vsll.vi v8, v24, 3
2145; RV32-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
2146; RV32-NEXT:    vloxei64.v v16, (a0), v8, v0.t
2147; RV32-NEXT:    vmv8r.v v8, v16
2148; RV32-NEXT:    ret
2149;
2150; RV64-LABEL: mgather_baseidx_sext_nxv8i32_nxv8f64:
2151; RV64:       # %bb.0:
2152; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
2153; RV64-NEXT:    vsext.vf2 v24, v8
2154; RV64-NEXT:    vsll.vi v8, v24, 3
2155; RV64-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
2156; RV64-NEXT:    vloxei64.v v16, (a0), v8, v0.t
2157; RV64-NEXT:    vmv8r.v v8, v16
2158; RV64-NEXT:    ret
2159  %eidxs = sext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>
2160  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs
2161  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)
2162  ret <vscale x 8 x double> %v
2163}
2164
2165define <vscale x 8 x double> @mgather_baseidx_zext_nxv8i32_nxv8f64(double* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {
2166; RV32-LABEL: mgather_baseidx_zext_nxv8i32_nxv8f64:
2167; RV32:       # %bb.0:
2168; RV32-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
2169; RV32-NEXT:    vzext.vf2 v24, v8
2170; RV32-NEXT:    vsll.vi v8, v24, 3
2171; RV32-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
2172; RV32-NEXT:    vloxei64.v v16, (a0), v8, v0.t
2173; RV32-NEXT:    vmv8r.v v8, v16
2174; RV32-NEXT:    ret
2175;
2176; RV64-LABEL: mgather_baseidx_zext_nxv8i32_nxv8f64:
2177; RV64:       # %bb.0:
2178; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
2179; RV64-NEXT:    vzext.vf2 v24, v8
2180; RV64-NEXT:    vsll.vi v8, v24, 3
2181; RV64-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
2182; RV64-NEXT:    vloxei64.v v16, (a0), v8, v0.t
2183; RV64-NEXT:    vmv8r.v v8, v16
2184; RV64-NEXT:    ret
2185  %eidxs = zext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>
2186  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs
2187  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)
2188  ret <vscale x 8 x double> %v
2189}
2190
2191define <vscale x 8 x double> @mgather_baseidx_nxv8f64(double* %base, <vscale x 8 x i64> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {
2192; RV32-LABEL: mgather_baseidx_nxv8f64:
2193; RV32:       # %bb.0:
2194; RV32-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
2195; RV32-NEXT:    vsll.vi v8, v8, 3
2196; RV32-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
2197; RV32-NEXT:    vloxei64.v v16, (a0), v8, v0.t
2198; RV32-NEXT:    vmv8r.v v8, v16
2199; RV32-NEXT:    ret
2200;
2201; RV64-LABEL: mgather_baseidx_nxv8f64:
2202; RV64:       # %bb.0:
2203; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
2204; RV64-NEXT:    vsll.vi v8, v8, 3
2205; RV64-NEXT:    vsetvli zero, zero, e64,m8,tu,mu
2206; RV64-NEXT:    vloxei64.v v16, (a0), v8, v0.t
2207; RV64-NEXT:    vmv8r.v v8, v16
2208; RV64-NEXT:    ret
2209  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %idxs
2210  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)
2211  ret <vscale x 8 x double> %v
2212}
2213
2214declare <vscale x 16 x i8> @llvm.masked.gather.nxv16i8.nxv16p0i8(<vscale x 16 x i8*>, i32, <vscale x 16 x i1>, <vscale x 16 x i8>)
2215
2216define <vscale x 16 x i8> @mgather_baseidx_nxv16i8(i8* %base, <vscale x 16 x i8> %idxs, <vscale x 16 x i1> %m, <vscale x 16 x i8> %passthru) {
2217; RV32-LABEL: mgather_baseidx_nxv16i8:
2218; RV32:       # %bb.0:
2219; RV32-NEXT:    vsetvli a1, zero, e32,m8,ta,mu
2220; RV32-NEXT:    vsext.vf4 v16, v8
2221; RV32-NEXT:    vsetvli zero, zero, e8,m2,tu,mu
2222; RV32-NEXT:    vloxei32.v v10, (a0), v16, v0.t
2223; RV32-NEXT:    vmv2r.v v8, v10
2224; RV32-NEXT:    ret
2225;
2226; RV64-LABEL: mgather_baseidx_nxv16i8:
2227; RV64:       # %bb.0:
2228; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
2229; RV64-NEXT:    vsext.vf8 v16, v8
2230; RV64-NEXT:    vsetvli zero, zero, e8,m1,tu,mu
2231; RV64-NEXT:    vloxei64.v v10, (a0), v16, v0.t
2232; RV64-NEXT:    csrr a1, vlenb
2233; RV64-NEXT:    srli a1, a1, 3
2234; RV64-NEXT:    vsetvli a2, zero, e8,mf4,ta,mu
2235; RV64-NEXT:    vslidedown.vx v0, v0, a1
2236; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
2237; RV64-NEXT:    vsext.vf8 v16, v9
2238; RV64-NEXT:    vsetvli zero, zero, e8,m1,tu,mu
2239; RV64-NEXT:    vloxei64.v v11, (a0), v16, v0.t
2240; RV64-NEXT:    vmv2r.v v8, v10
2241; RV64-NEXT:    ret
2242  %ptrs = getelementptr inbounds i8, i8* %base, <vscale x 16 x i8> %idxs
2243  %v = call <vscale x 16 x i8> @llvm.masked.gather.nxv16i8.nxv16p0i8(<vscale x 16 x i8*> %ptrs, i32 2, <vscale x 16 x i1> %m, <vscale x 16 x i8> %passthru)
2244  ret <vscale x 16 x i8> %v
2245}
2246
2247declare <vscale x 32 x i8> @llvm.masked.gather.nxv32i8.nxv32p0i8(<vscale x 32 x i8*>, i32, <vscale x 32 x i1>, <vscale x 32 x i8>)
2248
2249define <vscale x 32 x i8> @mgather_baseidx_nxv32i8(i8* %base, <vscale x 32 x i8> %idxs, <vscale x 32 x i1> %m, <vscale x 32 x i8> %passthru) {
2250; RV32-LABEL: mgather_baseidx_nxv32i8:
2251; RV32:       # %bb.0:
2252; RV32-NEXT:    vsetvli a1, zero, e32,m8,ta,mu
2253; RV32-NEXT:    vsext.vf4 v16, v8
2254; RV32-NEXT:    vsetvli zero, zero, e8,m2,tu,mu
2255; RV32-NEXT:    vloxei32.v v12, (a0), v16, v0.t
2256; RV32-NEXT:    csrr a1, vlenb
2257; RV32-NEXT:    srli a1, a1, 2
2258; RV32-NEXT:    vsetvli a2, zero, e8,mf2,ta,mu
2259; RV32-NEXT:    vslidedown.vx v0, v0, a1
2260; RV32-NEXT:    vsetvli a1, zero, e32,m8,ta,mu
2261; RV32-NEXT:    vsext.vf4 v16, v10
2262; RV32-NEXT:    vsetvli zero, zero, e8,m2,tu,mu
2263; RV32-NEXT:    vloxei32.v v14, (a0), v16, v0.t
2264; RV32-NEXT:    vmv4r.v v8, v12
2265; RV32-NEXT:    ret
2266;
2267; RV64-LABEL: mgather_baseidx_nxv32i8:
2268; RV64:       # %bb.0:
2269; RV64-NEXT:    vmv1r.v v25, v0
2270; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
2271; RV64-NEXT:    vsext.vf8 v16, v8
2272; RV64-NEXT:    vsetvli zero, zero, e8,m1,tu,mu
2273; RV64-NEXT:    vloxei64.v v12, (a0), v16, v0.t
2274; RV64-NEXT:    csrr a1, vlenb
2275; RV64-NEXT:    srli a1, a1, 3
2276; RV64-NEXT:    vsetvli a2, zero, e8,mf4,ta,mu
2277; RV64-NEXT:    vslidedown.vx v0, v0, a1
2278; RV64-NEXT:    vsetvli a2, zero, e64,m8,ta,mu
2279; RV64-NEXT:    vsext.vf8 v16, v9
2280; RV64-NEXT:    vsetvli zero, zero, e8,m1,tu,mu
2281; RV64-NEXT:    vloxei64.v v13, (a0), v16, v0.t
2282; RV64-NEXT:    slli a2, a1, 1
2283; RV64-NEXT:    vsetvli a3, zero, e8,mf2,ta,mu
2284; RV64-NEXT:    vslidedown.vx v25, v25, a2
2285; RV64-NEXT:    vsetvli a2, zero, e8,mf4,ta,mu
2286; RV64-NEXT:    vslidedown.vx v0, v25, a1
2287; RV64-NEXT:    vsetvli a1, zero, e64,m8,ta,mu
2288; RV64-NEXT:    vsext.vf8 v16, v11
2289; RV64-NEXT:    vsetvli zero, zero, e8,m1,tu,mu
2290; RV64-NEXT:    vloxei64.v v15, (a0), v16, v0.t
2291; RV64-NEXT:    vsetvli zero, zero, e64,m8,ta,mu
2292; RV64-NEXT:    vsext.vf8 v16, v10
2293; RV64-NEXT:    vsetvli zero, zero, e8,m1,tu,mu
2294; RV64-NEXT:    vmv1r.v v0, v25
2295; RV64-NEXT:    vloxei64.v v14, (a0), v16, v0.t
2296; RV64-NEXT:    vmv4r.v v8, v12
2297; RV64-NEXT:    ret
2298  %ptrs = getelementptr inbounds i8, i8* %base, <vscale x 32 x i8> %idxs
2299  %v = call <vscale x 32 x i8> @llvm.masked.gather.nxv32i8.nxv32p0i8(<vscale x 32 x i8*> %ptrs, i32 2, <vscale x 32 x i1> %m, <vscale x 32 x i8> %passthru)
2300  ret <vscale x 32 x i8> %v
2301}
2302