1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+m,+d,+zfh,+experimental-zvfh,+v -target-abi=ilp32d \
3; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefix=RV32
4; RUN: llc -mtriple=riscv64 -mattr=+m,+d,+zfh,+experimental-zvfh,+v -target-abi=lp64d \
5; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefix=RV64
6
7declare <vscale x 1 x i8> @llvm.masked.gather.nxv1i8.nxv1p0i8(<vscale x 1 x i8*>, i32, <vscale x 1 x i1>, <vscale x 1 x i8>)
8
9define <vscale x 1 x i8> @mgather_nxv1i8(<vscale x 1 x i8*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x i8> %passthru) {
10; RV32-LABEL: mgather_nxv1i8:
11; RV32:       # %bb.0:
12; RV32-NEXT:    vsetvli a0, zero, e8, mf8, ta, mu
13; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t
14; RV32-NEXT:    vmv1r.v v8, v9
15; RV32-NEXT:    ret
16;
17; RV64-LABEL: mgather_nxv1i8:
18; RV64:       # %bb.0:
19; RV64-NEXT:    vsetvli a0, zero, e8, mf8, ta, mu
20; RV64-NEXT:    vluxei64.v v9, (zero), v8, v0.t
21; RV64-NEXT:    vmv1r.v v8, v9
22; RV64-NEXT:    ret
23  %v = call <vscale x 1 x i8> @llvm.masked.gather.nxv1i8.nxv1p0i8(<vscale x 1 x i8*> %ptrs, i32 1, <vscale x 1 x i1> %m, <vscale x 1 x i8> %passthru)
24  ret <vscale x 1 x i8> %v
25}
26
27declare <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*>, i32, <vscale x 2 x i1>, <vscale x 2 x i8>)
28
29define <vscale x 2 x i8> @mgather_nxv2i8(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) {
30; RV32-LABEL: mgather_nxv2i8:
31; RV32:       # %bb.0:
32; RV32-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
33; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t
34; RV32-NEXT:    vmv1r.v v8, v9
35; RV32-NEXT:    ret
36;
37; RV64-LABEL: mgather_nxv2i8:
38; RV64:       # %bb.0:
39; RV64-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
40; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t
41; RV64-NEXT:    vmv1r.v v8, v10
42; RV64-NEXT:    ret
43  %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru)
44  ret <vscale x 2 x i8> %v
45}
46
47define <vscale x 2 x i16> @mgather_nxv2i8_sextload_nxv2i16(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) {
48; RV32-LABEL: mgather_nxv2i8_sextload_nxv2i16:
49; RV32:       # %bb.0:
50; RV32-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
51; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t
52; RV32-NEXT:    vsetvli zero, zero, e16, mf2, ta, mu
53; RV32-NEXT:    vsext.vf2 v8, v9
54; RV32-NEXT:    ret
55;
56; RV64-LABEL: mgather_nxv2i8_sextload_nxv2i16:
57; RV64:       # %bb.0:
58; RV64-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
59; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t
60; RV64-NEXT:    vsetvli zero, zero, e16, mf2, ta, mu
61; RV64-NEXT:    vsext.vf2 v8, v10
62; RV64-NEXT:    ret
63  %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru)
64  %ev = sext <vscale x 2 x i8> %v to <vscale x 2 x i16>
65  ret <vscale x 2 x i16> %ev
66}
67
68define <vscale x 2 x i16> @mgather_nxv2i8_zextload_nxv2i16(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) {
69; RV32-LABEL: mgather_nxv2i8_zextload_nxv2i16:
70; RV32:       # %bb.0:
71; RV32-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
72; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t
73; RV32-NEXT:    vsetvli zero, zero, e16, mf2, ta, mu
74; RV32-NEXT:    vzext.vf2 v8, v9
75; RV32-NEXT:    ret
76;
77; RV64-LABEL: mgather_nxv2i8_zextload_nxv2i16:
78; RV64:       # %bb.0:
79; RV64-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
80; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t
81; RV64-NEXT:    vsetvli zero, zero, e16, mf2, ta, mu
82; RV64-NEXT:    vzext.vf2 v8, v10
83; RV64-NEXT:    ret
84  %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru)
85  %ev = zext <vscale x 2 x i8> %v to <vscale x 2 x i16>
86  ret <vscale x 2 x i16> %ev
87}
88
89define <vscale x 2 x i32> @mgather_nxv2i8_sextload_nxv2i32(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) {
90; RV32-LABEL: mgather_nxv2i8_sextload_nxv2i32:
91; RV32:       # %bb.0:
92; RV32-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
93; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t
94; RV32-NEXT:    vsetvli zero, zero, e32, m1, ta, mu
95; RV32-NEXT:    vsext.vf4 v8, v9
96; RV32-NEXT:    ret
97;
98; RV64-LABEL: mgather_nxv2i8_sextload_nxv2i32:
99; RV64:       # %bb.0:
100; RV64-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
101; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t
102; RV64-NEXT:    vsetvli zero, zero, e32, m1, ta, mu
103; RV64-NEXT:    vsext.vf4 v8, v10
104; RV64-NEXT:    ret
105  %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru)
106  %ev = sext <vscale x 2 x i8> %v to <vscale x 2 x i32>
107  ret <vscale x 2 x i32> %ev
108}
109
110define <vscale x 2 x i32> @mgather_nxv2i8_zextload_nxv2i32(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) {
111; RV32-LABEL: mgather_nxv2i8_zextload_nxv2i32:
112; RV32:       # %bb.0:
113; RV32-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
114; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t
115; RV32-NEXT:    vsetvli zero, zero, e32, m1, ta, mu
116; RV32-NEXT:    vzext.vf4 v8, v9
117; RV32-NEXT:    ret
118;
119; RV64-LABEL: mgather_nxv2i8_zextload_nxv2i32:
120; RV64:       # %bb.0:
121; RV64-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
122; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t
123; RV64-NEXT:    vsetvli zero, zero, e32, m1, ta, mu
124; RV64-NEXT:    vzext.vf4 v8, v10
125; RV64-NEXT:    ret
126  %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru)
127  %ev = zext <vscale x 2 x i8> %v to <vscale x 2 x i32>
128  ret <vscale x 2 x i32> %ev
129}
130
131define <vscale x 2 x i64> @mgather_nxv2i8_sextload_nxv2i64(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) {
132; RV32-LABEL: mgather_nxv2i8_sextload_nxv2i64:
133; RV32:       # %bb.0:
134; RV32-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
135; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t
136; RV32-NEXT:    vsetvli zero, zero, e64, m2, ta, mu
137; RV32-NEXT:    vsext.vf8 v10, v9
138; RV32-NEXT:    vmv.v.v v8, v10
139; RV32-NEXT:    ret
140;
141; RV64-LABEL: mgather_nxv2i8_sextload_nxv2i64:
142; RV64:       # %bb.0:
143; RV64-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
144; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t
145; RV64-NEXT:    vsetvli zero, zero, e64, m2, ta, mu
146; RV64-NEXT:    vsext.vf8 v8, v10
147; RV64-NEXT:    ret
148  %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru)
149  %ev = sext <vscale x 2 x i8> %v to <vscale x 2 x i64>
150  ret <vscale x 2 x i64> %ev
151}
152
153define <vscale x 2 x i64> @mgather_nxv2i8_zextload_nxv2i64(<vscale x 2 x i8*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru) {
154; RV32-LABEL: mgather_nxv2i8_zextload_nxv2i64:
155; RV32:       # %bb.0:
156; RV32-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
157; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t
158; RV32-NEXT:    vsetvli zero, zero, e64, m2, ta, mu
159; RV32-NEXT:    vzext.vf8 v10, v9
160; RV32-NEXT:    vmv.v.v v8, v10
161; RV32-NEXT:    ret
162;
163; RV64-LABEL: mgather_nxv2i8_zextload_nxv2i64:
164; RV64:       # %bb.0:
165; RV64-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
166; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t
167; RV64-NEXT:    vsetvli zero, zero, e64, m2, ta, mu
168; RV64-NEXT:    vzext.vf8 v8, v10
169; RV64-NEXT:    ret
170  %v = call <vscale x 2 x i8> @llvm.masked.gather.nxv2i8.nxv2p0i8(<vscale x 2 x i8*> %ptrs, i32 1, <vscale x 2 x i1> %m, <vscale x 2 x i8> %passthru)
171  %ev = zext <vscale x 2 x i8> %v to <vscale x 2 x i64>
172  ret <vscale x 2 x i64> %ev
173}
174
175declare <vscale x 4 x i8> @llvm.masked.gather.nxv4i8.nxv4p0i8(<vscale x 4 x i8*>, i32, <vscale x 4 x i1>, <vscale x 4 x i8>)
176
177define <vscale x 4 x i8> @mgather_nxv4i8(<vscale x 4 x i8*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x i8> %passthru) {
178; RV32-LABEL: mgather_nxv4i8:
179; RV32:       # %bb.0:
180; RV32-NEXT:    vsetvli a0, zero, e8, mf2, ta, mu
181; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t
182; RV32-NEXT:    vmv1r.v v8, v10
183; RV32-NEXT:    ret
184;
185; RV64-LABEL: mgather_nxv4i8:
186; RV64:       # %bb.0:
187; RV64-NEXT:    vsetvli a0, zero, e8, mf2, ta, mu
188; RV64-NEXT:    vluxei64.v v12, (zero), v8, v0.t
189; RV64-NEXT:    vmv1r.v v8, v12
190; RV64-NEXT:    ret
191  %v = call <vscale x 4 x i8> @llvm.masked.gather.nxv4i8.nxv4p0i8(<vscale x 4 x i8*> %ptrs, i32 1, <vscale x 4 x i1> %m, <vscale x 4 x i8> %passthru)
192  ret <vscale x 4 x i8> %v
193}
194
195define <vscale x 4 x i8> @mgather_truemask_nxv4i8(<vscale x 4 x i8*> %ptrs, <vscale x 4 x i8> %passthru) {
196; RV32-LABEL: mgather_truemask_nxv4i8:
197; RV32:       # %bb.0:
198; RV32-NEXT:    vsetvli a0, zero, e8, mf2, ta, mu
199; RV32-NEXT:    vluxei32.v v10, (zero), v8
200; RV32-NEXT:    vmv1r.v v8, v10
201; RV32-NEXT:    ret
202;
203; RV64-LABEL: mgather_truemask_nxv4i8:
204; RV64:       # %bb.0:
205; RV64-NEXT:    vsetvli a0, zero, e8, mf2, ta, mu
206; RV64-NEXT:    vluxei64.v v12, (zero), v8
207; RV64-NEXT:    vmv1r.v v8, v12
208; RV64-NEXT:    ret
209  %mhead = insertelement <vscale x 4 x i1> poison, i1 1, i32 0
210  %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer
211  %v = call <vscale x 4 x i8> @llvm.masked.gather.nxv4i8.nxv4p0i8(<vscale x 4 x i8*> %ptrs, i32 1, <vscale x 4 x i1> %mtrue, <vscale x 4 x i8> %passthru)
212  ret <vscale x 4 x i8> %v
213}
214
215define <vscale x 4 x i8> @mgather_falsemask_nxv4i8(<vscale x 4 x i8*> %ptrs, <vscale x 4 x i8> %passthru) {
216; RV32-LABEL: mgather_falsemask_nxv4i8:
217; RV32:       # %bb.0:
218; RV32-NEXT:    vmv1r.v v8, v10
219; RV32-NEXT:    ret
220;
221; RV64-LABEL: mgather_falsemask_nxv4i8:
222; RV64:       # %bb.0:
223; RV64-NEXT:    vmv1r.v v8, v12
224; RV64-NEXT:    ret
225  %v = call <vscale x 4 x i8> @llvm.masked.gather.nxv4i8.nxv4p0i8(<vscale x 4 x i8*> %ptrs, i32 1, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x i8> %passthru)
226  ret <vscale x 4 x i8> %v
227}
228
229declare <vscale x 8 x i8> @llvm.masked.gather.nxv8i8.nxv8p0i8(<vscale x 8 x i8*>, i32, <vscale x 8 x i1>, <vscale x 8 x i8>)
230
231define <vscale x 8 x i8> @mgather_nxv8i8(<vscale x 8 x i8*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x i8> %passthru) {
232; RV32-LABEL: mgather_nxv8i8:
233; RV32:       # %bb.0:
234; RV32-NEXT:    vsetvli a0, zero, e8, m1, ta, mu
235; RV32-NEXT:    vluxei32.v v12, (zero), v8, v0.t
236; RV32-NEXT:    vmv.v.v v8, v12
237; RV32-NEXT:    ret
238;
239; RV64-LABEL: mgather_nxv8i8:
240; RV64:       # %bb.0:
241; RV64-NEXT:    vsetvli a0, zero, e8, m1, ta, mu
242; RV64-NEXT:    vluxei64.v v16, (zero), v8, v0.t
243; RV64-NEXT:    vmv.v.v v8, v16
244; RV64-NEXT:    ret
245  %v = call <vscale x 8 x i8> @llvm.masked.gather.nxv8i8.nxv8p0i8(<vscale x 8 x i8*> %ptrs, i32 1, <vscale x 8 x i1> %m, <vscale x 8 x i8> %passthru)
246  ret <vscale x 8 x i8> %v
247}
248
249define <vscale x 8 x i8> @mgather_baseidx_nxv8i8(i8* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i8> %passthru) {
250; RV32-LABEL: mgather_baseidx_nxv8i8:
251; RV32:       # %bb.0:
252; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
253; RV32-NEXT:    vsext.vf4 v12, v8
254; RV32-NEXT:    vsetvli zero, zero, e8, m1, ta, mu
255; RV32-NEXT:    vluxei32.v v9, (a0), v12, v0.t
256; RV32-NEXT:    vmv.v.v v8, v9
257; RV32-NEXT:    ret
258;
259; RV64-LABEL: mgather_baseidx_nxv8i8:
260; RV64:       # %bb.0:
261; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
262; RV64-NEXT:    vsext.vf8 v16, v8
263; RV64-NEXT:    vsetvli zero, zero, e8, m1, ta, mu
264; RV64-NEXT:    vluxei64.v v9, (a0), v16, v0.t
265; RV64-NEXT:    vmv.v.v v8, v9
266; RV64-NEXT:    ret
267  %ptrs = getelementptr inbounds i8, i8* %base, <vscale x 8 x i8> %idxs
268  %v = call <vscale x 8 x i8> @llvm.masked.gather.nxv8i8.nxv8p0i8(<vscale x 8 x i8*> %ptrs, i32 1, <vscale x 8 x i1> %m, <vscale x 8 x i8> %passthru)
269  ret <vscale x 8 x i8> %v
270}
271
272declare <vscale x 1 x i16> @llvm.masked.gather.nxv1i16.nxv1p0i16(<vscale x 1 x i16*>, i32, <vscale x 1 x i1>, <vscale x 1 x i16>)
273
274define <vscale x 1 x i16> @mgather_nxv1i16(<vscale x 1 x i16*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x i16> %passthru) {
275; RV32-LABEL: mgather_nxv1i16:
276; RV32:       # %bb.0:
277; RV32-NEXT:    vsetvli a0, zero, e16, mf4, ta, mu
278; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t
279; RV32-NEXT:    vmv1r.v v8, v9
280; RV32-NEXT:    ret
281;
282; RV64-LABEL: mgather_nxv1i16:
283; RV64:       # %bb.0:
284; RV64-NEXT:    vsetvli a0, zero, e16, mf4, ta, mu
285; RV64-NEXT:    vluxei64.v v9, (zero), v8, v0.t
286; RV64-NEXT:    vmv1r.v v8, v9
287; RV64-NEXT:    ret
288  %v = call <vscale x 1 x i16> @llvm.masked.gather.nxv1i16.nxv1p0i16(<vscale x 1 x i16*> %ptrs, i32 2, <vscale x 1 x i1> %m, <vscale x 1 x i16> %passthru)
289  ret <vscale x 1 x i16> %v
290}
291
292declare <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*>, i32, <vscale x 2 x i1>, <vscale x 2 x i16>)
293
294define <vscale x 2 x i16> @mgather_nxv2i16(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) {
295; RV32-LABEL: mgather_nxv2i16:
296; RV32:       # %bb.0:
297; RV32-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
298; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t
299; RV32-NEXT:    vmv1r.v v8, v9
300; RV32-NEXT:    ret
301;
302; RV64-LABEL: mgather_nxv2i16:
303; RV64:       # %bb.0:
304; RV64-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
305; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t
306; RV64-NEXT:    vmv1r.v v8, v10
307; RV64-NEXT:    ret
308  %v = call <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru)
309  ret <vscale x 2 x i16> %v
310}
311
312define <vscale x 2 x i32> @mgather_nxv2i16_sextload_nxv2i32(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) {
313; RV32-LABEL: mgather_nxv2i16_sextload_nxv2i32:
314; RV32:       # %bb.0:
315; RV32-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
316; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t
317; RV32-NEXT:    vsetvli zero, zero, e32, m1, ta, mu
318; RV32-NEXT:    vsext.vf2 v8, v9
319; RV32-NEXT:    ret
320;
321; RV64-LABEL: mgather_nxv2i16_sextload_nxv2i32:
322; RV64:       # %bb.0:
323; RV64-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
324; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t
325; RV64-NEXT:    vsetvli zero, zero, e32, m1, ta, mu
326; RV64-NEXT:    vsext.vf2 v8, v10
327; RV64-NEXT:    ret
328  %v = call <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru)
329  %ev = sext <vscale x 2 x i16> %v to <vscale x 2 x i32>
330  ret <vscale x 2 x i32> %ev
331}
332
333define <vscale x 2 x i32> @mgather_nxv2i16_zextload_nxv2i32(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) {
334; RV32-LABEL: mgather_nxv2i16_zextload_nxv2i32:
335; RV32:       # %bb.0:
336; RV32-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
337; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t
338; RV32-NEXT:    vsetvli zero, zero, e32, m1, ta, mu
339; RV32-NEXT:    vzext.vf2 v8, v9
340; RV32-NEXT:    ret
341;
342; RV64-LABEL: mgather_nxv2i16_zextload_nxv2i32:
343; RV64:       # %bb.0:
344; RV64-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
345; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t
346; RV64-NEXT:    vsetvli zero, zero, e32, m1, ta, mu
347; RV64-NEXT:    vzext.vf2 v8, v10
348; RV64-NEXT:    ret
349  %v = call <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru)
350  %ev = zext <vscale x 2 x i16> %v to <vscale x 2 x i32>
351  ret <vscale x 2 x i32> %ev
352}
353
354define <vscale x 2 x i64> @mgather_nxv2i16_sextload_nxv2i64(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) {
355; RV32-LABEL: mgather_nxv2i16_sextload_nxv2i64:
356; RV32:       # %bb.0:
357; RV32-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
358; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t
359; RV32-NEXT:    vsetvli zero, zero, e64, m2, ta, mu
360; RV32-NEXT:    vsext.vf4 v10, v9
361; RV32-NEXT:    vmv.v.v v8, v10
362; RV32-NEXT:    ret
363;
364; RV64-LABEL: mgather_nxv2i16_sextload_nxv2i64:
365; RV64:       # %bb.0:
366; RV64-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
367; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t
368; RV64-NEXT:    vsetvli zero, zero, e64, m2, ta, mu
369; RV64-NEXT:    vsext.vf4 v8, v10
370; RV64-NEXT:    ret
371  %v = call <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru)
372  %ev = sext <vscale x 2 x i16> %v to <vscale x 2 x i64>
373  ret <vscale x 2 x i64> %ev
374}
375
376define <vscale x 2 x i64> @mgather_nxv2i16_zextload_nxv2i64(<vscale x 2 x i16*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru) {
377; RV32-LABEL: mgather_nxv2i16_zextload_nxv2i64:
378; RV32:       # %bb.0:
379; RV32-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
380; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t
381; RV32-NEXT:    vsetvli zero, zero, e64, m2, ta, mu
382; RV32-NEXT:    vzext.vf4 v10, v9
383; RV32-NEXT:    vmv.v.v v8, v10
384; RV32-NEXT:    ret
385;
386; RV64-LABEL: mgather_nxv2i16_zextload_nxv2i64:
387; RV64:       # %bb.0:
388; RV64-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
389; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t
390; RV64-NEXT:    vsetvli zero, zero, e64, m2, ta, mu
391; RV64-NEXT:    vzext.vf4 v8, v10
392; RV64-NEXT:    ret
393  %v = call <vscale x 2 x i16> @llvm.masked.gather.nxv2i16.nxv2p0i16(<vscale x 2 x i16*> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x i16> %passthru)
394  %ev = zext <vscale x 2 x i16> %v to <vscale x 2 x i64>
395  ret <vscale x 2 x i64> %ev
396}
397
398declare <vscale x 4 x i16> @llvm.masked.gather.nxv4i16.nxv4p0i16(<vscale x 4 x i16*>, i32, <vscale x 4 x i1>, <vscale x 4 x i16>)
399
400define <vscale x 4 x i16> @mgather_nxv4i16(<vscale x 4 x i16*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x i16> %passthru) {
401; RV32-LABEL: mgather_nxv4i16:
402; RV32:       # %bb.0:
403; RV32-NEXT:    vsetvli a0, zero, e16, m1, ta, mu
404; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t
405; RV32-NEXT:    vmv.v.v v8, v10
406; RV32-NEXT:    ret
407;
408; RV64-LABEL: mgather_nxv4i16:
409; RV64:       # %bb.0:
410; RV64-NEXT:    vsetvli a0, zero, e16, m1, ta, mu
411; RV64-NEXT:    vluxei64.v v12, (zero), v8, v0.t
412; RV64-NEXT:    vmv.v.v v8, v12
413; RV64-NEXT:    ret
414  %v = call <vscale x 4 x i16> @llvm.masked.gather.nxv4i16.nxv4p0i16(<vscale x 4 x i16*> %ptrs, i32 2, <vscale x 4 x i1> %m, <vscale x 4 x i16> %passthru)
415  ret <vscale x 4 x i16> %v
416}
417
418define <vscale x 4 x i16> @mgather_truemask_nxv4i16(<vscale x 4 x i16*> %ptrs, <vscale x 4 x i16> %passthru) {
419; RV32-LABEL: mgather_truemask_nxv4i16:
420; RV32:       # %bb.0:
421; RV32-NEXT:    vsetvli a0, zero, e16, m1, ta, mu
422; RV32-NEXT:    vluxei32.v v10, (zero), v8
423; RV32-NEXT:    vmv.v.v v8, v10
424; RV32-NEXT:    ret
425;
426; RV64-LABEL: mgather_truemask_nxv4i16:
427; RV64:       # %bb.0:
428; RV64-NEXT:    vsetvli a0, zero, e16, m1, ta, mu
429; RV64-NEXT:    vluxei64.v v12, (zero), v8
430; RV64-NEXT:    vmv.v.v v8, v12
431; RV64-NEXT:    ret
432  %mhead = insertelement <vscale x 4 x i1> poison, i1 1, i32 0
433  %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer
434  %v = call <vscale x 4 x i16> @llvm.masked.gather.nxv4i16.nxv4p0i16(<vscale x 4 x i16*> %ptrs, i32 2, <vscale x 4 x i1> %mtrue, <vscale x 4 x i16> %passthru)
435  ret <vscale x 4 x i16> %v
436}
437
438define <vscale x 4 x i16> @mgather_falsemask_nxv4i16(<vscale x 4 x i16*> %ptrs, <vscale x 4 x i16> %passthru) {
439; RV32-LABEL: mgather_falsemask_nxv4i16:
440; RV32:       # %bb.0:
441; RV32-NEXT:    vmv1r.v v8, v10
442; RV32-NEXT:    ret
443;
444; RV64-LABEL: mgather_falsemask_nxv4i16:
445; RV64:       # %bb.0:
446; RV64-NEXT:    vmv1r.v v8, v12
447; RV64-NEXT:    ret
448  %v = call <vscale x 4 x i16> @llvm.masked.gather.nxv4i16.nxv4p0i16(<vscale x 4 x i16*> %ptrs, i32 2, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x i16> %passthru)
449  ret <vscale x 4 x i16> %v
450}
451
452declare <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*>, i32, <vscale x 8 x i1>, <vscale x 8 x i16>)
453
454define <vscale x 8 x i16> @mgather_nxv8i16(<vscale x 8 x i16*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) {
455; RV32-LABEL: mgather_nxv8i16:
456; RV32:       # %bb.0:
457; RV32-NEXT:    vsetvli a0, zero, e16, m2, ta, mu
458; RV32-NEXT:    vluxei32.v v12, (zero), v8, v0.t
459; RV32-NEXT:    vmv.v.v v8, v12
460; RV32-NEXT:    ret
461;
462; RV64-LABEL: mgather_nxv8i16:
463; RV64:       # %bb.0:
464; RV64-NEXT:    vsetvli a0, zero, e16, m2, ta, mu
465; RV64-NEXT:    vluxei64.v v16, (zero), v8, v0.t
466; RV64-NEXT:    vmv.v.v v8, v16
467; RV64-NEXT:    ret
468  %v = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru)
469  ret <vscale x 8 x i16> %v
470}
471
472define <vscale x 8 x i16> @mgather_baseidx_nxv8i8_nxv8i16(i16* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) {
473; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8i16:
474; RV32:       # %bb.0:
475; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
476; RV32-NEXT:    vsext.vf4 v12, v8
477; RV32-NEXT:    vadd.vv v12, v12, v12
478; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, mu
479; RV32-NEXT:    vluxei32.v v10, (a0), v12, v0.t
480; RV32-NEXT:    vmv.v.v v8, v10
481; RV32-NEXT:    ret
482;
483; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8i16:
484; RV64:       # %bb.0:
485; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
486; RV64-NEXT:    vsext.vf8 v16, v8
487; RV64-NEXT:    vadd.vv v16, v16, v16
488; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, mu
489; RV64-NEXT:    vluxei64.v v10, (a0), v16, v0.t
490; RV64-NEXT:    vmv.v.v v8, v10
491; RV64-NEXT:    ret
492  %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i8> %idxs
493  %v = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru)
494  ret <vscale x 8 x i16> %v
495}
496
497define <vscale x 8 x i16> @mgather_baseidx_sext_nxv8i8_nxv8i16(i16* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) {
498; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i16:
499; RV32:       # %bb.0:
500; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
501; RV32-NEXT:    vsext.vf4 v12, v8
502; RV32-NEXT:    vadd.vv v12, v12, v12
503; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, mu
504; RV32-NEXT:    vluxei32.v v10, (a0), v12, v0.t
505; RV32-NEXT:    vmv.v.v v8, v10
506; RV32-NEXT:    ret
507;
508; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i16:
509; RV64:       # %bb.0:
510; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
511; RV64-NEXT:    vsext.vf8 v16, v8
512; RV64-NEXT:    vadd.vv v16, v16, v16
513; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, mu
514; RV64-NEXT:    vluxei64.v v10, (a0), v16, v0.t
515; RV64-NEXT:    vmv.v.v v8, v10
516; RV64-NEXT:    ret
517  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>
518  %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i16> %eidxs
519  %v = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru)
520  ret <vscale x 8 x i16> %v
521}
522
523define <vscale x 8 x i16> @mgather_baseidx_zext_nxv8i8_nxv8i16(i16* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) {
524; RV32-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i16:
525; RV32:       # %bb.0:
526; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
527; RV32-NEXT:    vzext.vf4 v12, v8
528; RV32-NEXT:    vadd.vv v12, v12, v12
529; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, mu
530; RV32-NEXT:    vluxei32.v v10, (a0), v12, v0.t
531; RV32-NEXT:    vmv.v.v v8, v10
532; RV32-NEXT:    ret
533;
534; RV64-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i16:
535; RV64:       # %bb.0:
536; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
537; RV64-NEXT:    vzext.vf8 v16, v8
538; RV64-NEXT:    vadd.vv v16, v16, v16
539; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, mu
540; RV64-NEXT:    vluxei64.v v10, (a0), v16, v0.t
541; RV64-NEXT:    vmv.v.v v8, v10
542; RV64-NEXT:    ret
543  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>
544  %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i16> %eidxs
545  %v = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru)
546  ret <vscale x 8 x i16> %v
547}
548
549define <vscale x 8 x i16> @mgather_baseidx_nxv8i16(i16* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru) {
550; RV32-LABEL: mgather_baseidx_nxv8i16:
551; RV32:       # %bb.0:
552; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
553; RV32-NEXT:    vsext.vf2 v12, v8
554; RV32-NEXT:    vadd.vv v12, v12, v12
555; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, mu
556; RV32-NEXT:    vluxei32.v v10, (a0), v12, v0.t
557; RV32-NEXT:    vmv.v.v v8, v10
558; RV32-NEXT:    ret
559;
560; RV64-LABEL: mgather_baseidx_nxv8i16:
561; RV64:       # %bb.0:
562; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
563; RV64-NEXT:    vsext.vf4 v16, v8
564; RV64-NEXT:    vadd.vv v16, v16, v16
565; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, mu
566; RV64-NEXT:    vluxei64.v v10, (a0), v16, v0.t
567; RV64-NEXT:    vmv.v.v v8, v10
568; RV64-NEXT:    ret
569  %ptrs = getelementptr inbounds i16, i16* %base, <vscale x 8 x i16> %idxs
570  %v = call <vscale x 8 x i16> @llvm.masked.gather.nxv8i16.nxv8p0i16(<vscale x 8 x i16*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x i16> %passthru)
571  ret <vscale x 8 x i16> %v
572}
573
574declare <vscale x 1 x i32> @llvm.masked.gather.nxv1i32.nxv1p0i32(<vscale x 1 x i32*>, i32, <vscale x 1 x i1>, <vscale x 1 x i32>)
575
576define <vscale x 1 x i32> @mgather_nxv1i32(<vscale x 1 x i32*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x i32> %passthru) {
577; RV32-LABEL: mgather_nxv1i32:
578; RV32:       # %bb.0:
579; RV32-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu
580; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t
581; RV32-NEXT:    vmv1r.v v8, v9
582; RV32-NEXT:    ret
583;
584; RV64-LABEL: mgather_nxv1i32:
585; RV64:       # %bb.0:
586; RV64-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu
587; RV64-NEXT:    vluxei64.v v9, (zero), v8, v0.t
588; RV64-NEXT:    vmv1r.v v8, v9
589; RV64-NEXT:    ret
590  %v = call <vscale x 1 x i32> @llvm.masked.gather.nxv1i32.nxv1p0i32(<vscale x 1 x i32*> %ptrs, i32 4, <vscale x 1 x i1> %m, <vscale x 1 x i32> %passthru)
591  ret <vscale x 1 x i32> %v
592}
593
594declare <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0i32(<vscale x 2 x i32*>, i32, <vscale x 2 x i1>, <vscale x 2 x i32>)
595
596define <vscale x 2 x i32> @mgather_nxv2i32(<vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru) {
597; RV32-LABEL: mgather_nxv2i32:
598; RV32:       # %bb.0:
599; RV32-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
600; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t
601; RV32-NEXT:    vmv.v.v v8, v9
602; RV32-NEXT:    ret
603;
604; RV64-LABEL: mgather_nxv2i32:
605; RV64:       # %bb.0:
606; RV64-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
607; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t
608; RV64-NEXT:    vmv.v.v v8, v10
609; RV64-NEXT:    ret
610  %v = call <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0i32(<vscale x 2 x i32*> %ptrs, i32 4, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru)
611  ret <vscale x 2 x i32> %v
612}
613
614define <vscale x 2 x i64> @mgather_nxv2i32_sextload_nxv2i64(<vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru) {
615; RV32-LABEL: mgather_nxv2i32_sextload_nxv2i64:
616; RV32:       # %bb.0:
617; RV32-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
618; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t
619; RV32-NEXT:    vsetvli zero, zero, e64, m2, ta, mu
620; RV32-NEXT:    vsext.vf2 v10, v9
621; RV32-NEXT:    vmv.v.v v8, v10
622; RV32-NEXT:    ret
623;
624; RV64-LABEL: mgather_nxv2i32_sextload_nxv2i64:
625; RV64:       # %bb.0:
626; RV64-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
627; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t
628; RV64-NEXT:    vsetvli zero, zero, e64, m2, ta, mu
629; RV64-NEXT:    vsext.vf2 v8, v10
630; RV64-NEXT:    ret
631  %v = call <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0i32(<vscale x 2 x i32*> %ptrs, i32 4, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru)
632  %ev = sext <vscale x 2 x i32> %v to <vscale x 2 x i64>
633  ret <vscale x 2 x i64> %ev
634}
635
636define <vscale x 2 x i64> @mgather_nxv2i32_zextload_nxv2i64(<vscale x 2 x i32*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru) {
637; RV32-LABEL: mgather_nxv2i32_zextload_nxv2i64:
638; RV32:       # %bb.0:
639; RV32-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
640; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t
641; RV32-NEXT:    vsetvli zero, zero, e64, m2, ta, mu
642; RV32-NEXT:    vzext.vf2 v10, v9
643; RV32-NEXT:    vmv.v.v v8, v10
644; RV32-NEXT:    ret
645;
646; RV64-LABEL: mgather_nxv2i32_zextload_nxv2i64:
647; RV64:       # %bb.0:
648; RV64-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
649; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t
650; RV64-NEXT:    vsetvli zero, zero, e64, m2, ta, mu
651; RV64-NEXT:    vzext.vf2 v8, v10
652; RV64-NEXT:    ret
653  %v = call <vscale x 2 x i32> @llvm.masked.gather.nxv2i32.nxv2p0i32(<vscale x 2 x i32*> %ptrs, i32 4, <vscale x 2 x i1> %m, <vscale x 2 x i32> %passthru)
654  %ev = zext <vscale x 2 x i32> %v to <vscale x 2 x i64>
655  ret <vscale x 2 x i64> %ev
656}
657
658declare <vscale x 4 x i32> @llvm.masked.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*>, i32, <vscale x 4 x i1>, <vscale x 4 x i32>)
659
660define <vscale x 4 x i32> @mgather_nxv4i32(<vscale x 4 x i32*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x i32> %passthru) {
661; RV32-LABEL: mgather_nxv4i32:
662; RV32:       # %bb.0:
663; RV32-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
664; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t
665; RV32-NEXT:    vmv.v.v v8, v10
666; RV32-NEXT:    ret
667;
668; RV64-LABEL: mgather_nxv4i32:
669; RV64:       # %bb.0:
670; RV64-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
671; RV64-NEXT:    vluxei64.v v12, (zero), v8, v0.t
672; RV64-NEXT:    vmv.v.v v8, v12
673; RV64-NEXT:    ret
674  %v = call <vscale x 4 x i32> @llvm.masked.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*> %ptrs, i32 4, <vscale x 4 x i1> %m, <vscale x 4 x i32> %passthru)
675  ret <vscale x 4 x i32> %v
676}
677
678define <vscale x 4 x i32> @mgather_truemask_nxv4i32(<vscale x 4 x i32*> %ptrs, <vscale x 4 x i32> %passthru) {
679; RV32-LABEL: mgather_truemask_nxv4i32:
680; RV32:       # %bb.0:
681; RV32-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
682; RV32-NEXT:    vluxei32.v v8, (zero), v8
683; RV32-NEXT:    ret
684;
685; RV64-LABEL: mgather_truemask_nxv4i32:
686; RV64:       # %bb.0:
687; RV64-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
688; RV64-NEXT:    vluxei64.v v12, (zero), v8
689; RV64-NEXT:    vmv.v.v v8, v12
690; RV64-NEXT:    ret
691  %mhead = insertelement <vscale x 4 x i1> poison, i1 1, i32 0
692  %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer
693  %v = call <vscale x 4 x i32> @llvm.masked.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*> %ptrs, i32 4, <vscale x 4 x i1> %mtrue, <vscale x 4 x i32> %passthru)
694  ret <vscale x 4 x i32> %v
695}
696
697define <vscale x 4 x i32> @mgather_falsemask_nxv4i32(<vscale x 4 x i32*> %ptrs, <vscale x 4 x i32> %passthru) {
698; RV32-LABEL: mgather_falsemask_nxv4i32:
699; RV32:       # %bb.0:
700; RV32-NEXT:    vmv2r.v v8, v10
701; RV32-NEXT:    ret
702;
703; RV64-LABEL: mgather_falsemask_nxv4i32:
704; RV64:       # %bb.0:
705; RV64-NEXT:    vmv2r.v v8, v12
706; RV64-NEXT:    ret
707  %v = call <vscale x 4 x i32> @llvm.masked.gather.nxv4i32.nxv4p0i32(<vscale x 4 x i32*> %ptrs, i32 4, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x i32> %passthru)
708  ret <vscale x 4 x i32> %v
709}
710
711declare <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*>, i32, <vscale x 8 x i1>, <vscale x 8 x i32>)
712
713define <vscale x 8 x i32> @mgather_nxv8i32(<vscale x 8 x i32*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) {
714; RV32-LABEL: mgather_nxv8i32:
715; RV32:       # %bb.0:
716; RV32-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
717; RV32-NEXT:    vluxei32.v v12, (zero), v8, v0.t
718; RV32-NEXT:    vmv.v.v v8, v12
719; RV32-NEXT:    ret
720;
721; RV64-LABEL: mgather_nxv8i32:
722; RV64:       # %bb.0:
723; RV64-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
724; RV64-NEXT:    vluxei64.v v16, (zero), v8, v0.t
725; RV64-NEXT:    vmv.v.v v8, v16
726; RV64-NEXT:    ret
727  %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru)
728  ret <vscale x 8 x i32> %v
729}
730
731define <vscale x 8 x i32> @mgather_baseidx_nxv8i8_nxv8i32(i32* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) {
732; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8i32:
733; RV32:       # %bb.0:
734; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
735; RV32-NEXT:    vsext.vf4 v16, v8
736; RV32-NEXT:    vsll.vi v8, v16, 2
737; RV32-NEXT:    vluxei32.v v12, (a0), v8, v0.t
738; RV32-NEXT:    vmv.v.v v8, v12
739; RV32-NEXT:    ret
740;
741; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8i32:
742; RV64:       # %bb.0:
743; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
744; RV64-NEXT:    vsext.vf8 v16, v8
745; RV64-NEXT:    vsll.vi v16, v16, 2
746; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
747; RV64-NEXT:    vluxei64.v v12, (a0), v16, v0.t
748; RV64-NEXT:    vmv.v.v v8, v12
749; RV64-NEXT:    ret
750  %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i8> %idxs
751  %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru)
752  ret <vscale x 8 x i32> %v
753}
754
755define <vscale x 8 x i32> @mgather_baseidx_sext_nxv8i8_nxv8i32(i32* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) {
756; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i32:
757; RV32:       # %bb.0:
758; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
759; RV32-NEXT:    vsext.vf4 v16, v8
760; RV32-NEXT:    vsll.vi v8, v16, 2
761; RV32-NEXT:    vluxei32.v v12, (a0), v8, v0.t
762; RV32-NEXT:    vmv.v.v v8, v12
763; RV32-NEXT:    ret
764;
765; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i32:
766; RV64:       # %bb.0:
767; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
768; RV64-NEXT:    vsext.vf8 v16, v8
769; RV64-NEXT:    vsll.vi v16, v16, 2
770; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
771; RV64-NEXT:    vluxei64.v v12, (a0), v16, v0.t
772; RV64-NEXT:    vmv.v.v v8, v12
773; RV64-NEXT:    ret
774  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>
775  %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs
776  %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru)
777  ret <vscale x 8 x i32> %v
778}
779
780define <vscale x 8 x i32> @mgather_baseidx_zext_nxv8i8_nxv8i32(i32* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) {
781; RV32-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i32:
782; RV32:       # %bb.0:
783; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
784; RV32-NEXT:    vzext.vf4 v16, v8
785; RV32-NEXT:    vsll.vi v8, v16, 2
786; RV32-NEXT:    vluxei32.v v12, (a0), v8, v0.t
787; RV32-NEXT:    vmv.v.v v8, v12
788; RV32-NEXT:    ret
789;
790; RV64-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i32:
791; RV64:       # %bb.0:
792; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
793; RV64-NEXT:    vzext.vf8 v16, v8
794; RV64-NEXT:    vsll.vi v16, v16, 2
795; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
796; RV64-NEXT:    vluxei64.v v12, (a0), v16, v0.t
797; RV64-NEXT:    vmv.v.v v8, v12
798; RV64-NEXT:    ret
799  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>
800  %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs
801  %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru)
802  ret <vscale x 8 x i32> %v
803}
804
805define <vscale x 8 x i32> @mgather_baseidx_nxv8i16_nxv8i32(i32* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) {
806; RV32-LABEL: mgather_baseidx_nxv8i16_nxv8i32:
807; RV32:       # %bb.0:
808; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
809; RV32-NEXT:    vsext.vf2 v16, v8
810; RV32-NEXT:    vsll.vi v8, v16, 2
811; RV32-NEXT:    vluxei32.v v12, (a0), v8, v0.t
812; RV32-NEXT:    vmv.v.v v8, v12
813; RV32-NEXT:    ret
814;
815; RV64-LABEL: mgather_baseidx_nxv8i16_nxv8i32:
816; RV64:       # %bb.0:
817; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
818; RV64-NEXT:    vsext.vf4 v16, v8
819; RV64-NEXT:    vsll.vi v16, v16, 2
820; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
821; RV64-NEXT:    vluxei64.v v12, (a0), v16, v0.t
822; RV64-NEXT:    vmv.v.v v8, v12
823; RV64-NEXT:    ret
824  %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i16> %idxs
825  %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru)
826  ret <vscale x 8 x i32> %v
827}
828
829define <vscale x 8 x i32> @mgather_baseidx_sext_nxv8i16_nxv8i32(i32* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) {
830; RV32-LABEL: mgather_baseidx_sext_nxv8i16_nxv8i32:
831; RV32:       # %bb.0:
832; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
833; RV32-NEXT:    vsext.vf2 v16, v8
834; RV32-NEXT:    vsll.vi v8, v16, 2
835; RV32-NEXT:    vluxei32.v v12, (a0), v8, v0.t
836; RV32-NEXT:    vmv.v.v v8, v12
837; RV32-NEXT:    ret
838;
839; RV64-LABEL: mgather_baseidx_sext_nxv8i16_nxv8i32:
840; RV64:       # %bb.0:
841; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
842; RV64-NEXT:    vsext.vf4 v16, v8
843; RV64-NEXT:    vsll.vi v16, v16, 2
844; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
845; RV64-NEXT:    vluxei64.v v12, (a0), v16, v0.t
846; RV64-NEXT:    vmv.v.v v8, v12
847; RV64-NEXT:    ret
848  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>
849  %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs
850  %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru)
851  ret <vscale x 8 x i32> %v
852}
853
854define <vscale x 8 x i32> @mgather_baseidx_zext_nxv8i16_nxv8i32(i32* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) {
855; RV32-LABEL: mgather_baseidx_zext_nxv8i16_nxv8i32:
856; RV32:       # %bb.0:
857; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
858; RV32-NEXT:    vzext.vf2 v16, v8
859; RV32-NEXT:    vsll.vi v8, v16, 2
860; RV32-NEXT:    vluxei32.v v12, (a0), v8, v0.t
861; RV32-NEXT:    vmv.v.v v8, v12
862; RV32-NEXT:    ret
863;
864; RV64-LABEL: mgather_baseidx_zext_nxv8i16_nxv8i32:
865; RV64:       # %bb.0:
866; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
867; RV64-NEXT:    vzext.vf4 v16, v8
868; RV64-NEXT:    vsll.vi v16, v16, 2
869; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
870; RV64-NEXT:    vluxei64.v v12, (a0), v16, v0.t
871; RV64-NEXT:    vmv.v.v v8, v12
872; RV64-NEXT:    ret
873  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>
874  %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %eidxs
875  %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru)
876  ret <vscale x 8 x i32> %v
877}
878
879define <vscale x 8 x i32> @mgather_baseidx_nxv8i32(i32* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru) {
880; RV32-LABEL: mgather_baseidx_nxv8i32:
881; RV32:       # %bb.0:
882; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
883; RV32-NEXT:    vsll.vi v8, v8, 2
884; RV32-NEXT:    vluxei32.v v12, (a0), v8, v0.t
885; RV32-NEXT:    vmv.v.v v8, v12
886; RV32-NEXT:    ret
887;
888; RV64-LABEL: mgather_baseidx_nxv8i32:
889; RV64:       # %bb.0:
890; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
891; RV64-NEXT:    vsext.vf2 v16, v8
892; RV64-NEXT:    vsll.vi v16, v16, 2
893; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
894; RV64-NEXT:    vluxei64.v v12, (a0), v16, v0.t
895; RV64-NEXT:    vmv.v.v v8, v12
896; RV64-NEXT:    ret
897  %ptrs = getelementptr inbounds i32, i32* %base, <vscale x 8 x i32> %idxs
898  %v = call <vscale x 8 x i32> @llvm.masked.gather.nxv8i32.nxv8p0i32(<vscale x 8 x i32*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x i32> %passthru)
899  ret <vscale x 8 x i32> %v
900}
901
902declare <vscale x 1 x i64> @llvm.masked.gather.nxv1i64.nxv1p0i64(<vscale x 1 x i64*>, i32, <vscale x 1 x i1>, <vscale x 1 x i64>)
903
904define <vscale x 1 x i64> @mgather_nxv1i64(<vscale x 1 x i64*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x i64> %passthru) {
905; RV32-LABEL: mgather_nxv1i64:
906; RV32:       # %bb.0:
907; RV32-NEXT:    vsetvli a0, zero, e64, m1, ta, mu
908; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t
909; RV32-NEXT:    vmv.v.v v8, v9
910; RV32-NEXT:    ret
911;
912; RV64-LABEL: mgather_nxv1i64:
913; RV64:       # %bb.0:
914; RV64-NEXT:    vsetvli a0, zero, e64, m1, ta, mu
915; RV64-NEXT:    vluxei64.v v9, (zero), v8, v0.t
916; RV64-NEXT:    vmv.v.v v8, v9
917; RV64-NEXT:    ret
918  %v = call <vscale x 1 x i64> @llvm.masked.gather.nxv1i64.nxv1p0i64(<vscale x 1 x i64*> %ptrs, i32 8, <vscale x 1 x i1> %m, <vscale x 1 x i64> %passthru)
919  ret <vscale x 1 x i64> %v
920}
921
922declare <vscale x 2 x i64> @llvm.masked.gather.nxv2i64.nxv2p0i64(<vscale x 2 x i64*>, i32, <vscale x 2 x i1>, <vscale x 2 x i64>)
923
924define <vscale x 2 x i64> @mgather_nxv2i64(<vscale x 2 x i64*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x i64> %passthru) {
925; RV32-LABEL: mgather_nxv2i64:
926; RV32:       # %bb.0:
927; RV32-NEXT:    vsetvli a0, zero, e64, m2, ta, mu
928; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t
929; RV32-NEXT:    vmv.v.v v8, v10
930; RV32-NEXT:    ret
931;
932; RV64-LABEL: mgather_nxv2i64:
933; RV64:       # %bb.0:
934; RV64-NEXT:    vsetvli a0, zero, e64, m2, ta, mu
935; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t
936; RV64-NEXT:    vmv.v.v v8, v10
937; RV64-NEXT:    ret
938  %v = call <vscale x 2 x i64> @llvm.masked.gather.nxv2i64.nxv2p0i64(<vscale x 2 x i64*> %ptrs, i32 8, <vscale x 2 x i1> %m, <vscale x 2 x i64> %passthru)
939  ret <vscale x 2 x i64> %v
940}
941
942declare <vscale x 4 x i64> @llvm.masked.gather.nxv4i64.nxv4p0i64(<vscale x 4 x i64*>, i32, <vscale x 4 x i1>, <vscale x 4 x i64>)
943
944define <vscale x 4 x i64> @mgather_nxv4i64(<vscale x 4 x i64*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x i64> %passthru) {
945; RV32-LABEL: mgather_nxv4i64:
946; RV32:       # %bb.0:
947; RV32-NEXT:    vsetvli a0, zero, e64, m4, ta, mu
948; RV32-NEXT:    vluxei32.v v12, (zero), v8, v0.t
949; RV32-NEXT:    vmv.v.v v8, v12
950; RV32-NEXT:    ret
951;
952; RV64-LABEL: mgather_nxv4i64:
953; RV64:       # %bb.0:
954; RV64-NEXT:    vsetvli a0, zero, e64, m4, ta, mu
955; RV64-NEXT:    vluxei64.v v12, (zero), v8, v0.t
956; RV64-NEXT:    vmv.v.v v8, v12
957; RV64-NEXT:    ret
958  %v = call <vscale x 4 x i64> @llvm.masked.gather.nxv4i64.nxv4p0i64(<vscale x 4 x i64*> %ptrs, i32 8, <vscale x 4 x i1> %m, <vscale x 4 x i64> %passthru)
959  ret <vscale x 4 x i64> %v
960}
961
962define <vscale x 4 x i64> @mgather_truemask_nxv4i64(<vscale x 4 x i64*> %ptrs, <vscale x 4 x i64> %passthru) {
963; RV32-LABEL: mgather_truemask_nxv4i64:
964; RV32:       # %bb.0:
965; RV32-NEXT:    vsetvli a0, zero, e64, m4, ta, mu
966; RV32-NEXT:    vluxei32.v v12, (zero), v8
967; RV32-NEXT:    vmv.v.v v8, v12
968; RV32-NEXT:    ret
969;
970; RV64-LABEL: mgather_truemask_nxv4i64:
971; RV64:       # %bb.0:
972; RV64-NEXT:    vsetvli a0, zero, e64, m4, ta, mu
973; RV64-NEXT:    vluxei64.v v8, (zero), v8
974; RV64-NEXT:    ret
975  %mhead = insertelement <vscale x 4 x i1> poison, i1 1, i32 0
976  %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer
977  %v = call <vscale x 4 x i64> @llvm.masked.gather.nxv4i64.nxv4p0i64(<vscale x 4 x i64*> %ptrs, i32 8, <vscale x 4 x i1> %mtrue, <vscale x 4 x i64> %passthru)
978  ret <vscale x 4 x i64> %v
979}
980
981define <vscale x 4 x i64> @mgather_falsemask_nxv4i64(<vscale x 4 x i64*> %ptrs, <vscale x 4 x i64> %passthru) {
982; RV32-LABEL: mgather_falsemask_nxv4i64:
983; RV32:       # %bb.0:
984; RV32-NEXT:    vmv4r.v v8, v12
985; RV32-NEXT:    ret
986;
987; RV64-LABEL: mgather_falsemask_nxv4i64:
988; RV64:       # %bb.0:
989; RV64-NEXT:    vmv4r.v v8, v12
990; RV64-NEXT:    ret
991  %v = call <vscale x 4 x i64> @llvm.masked.gather.nxv4i64.nxv4p0i64(<vscale x 4 x i64*> %ptrs, i32 8, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x i64> %passthru)
992  ret <vscale x 4 x i64> %v
993}
994
995declare <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*>, i32, <vscale x 8 x i1>, <vscale x 8 x i64>)
996
997define <vscale x 8 x i64> @mgather_nxv8i64(<vscale x 8 x i64*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {
998; RV32-LABEL: mgather_nxv8i64:
999; RV32:       # %bb.0:
1000; RV32-NEXT:    vsetvli a0, zero, e64, m8, ta, mu
1001; RV32-NEXT:    vluxei32.v v16, (zero), v8, v0.t
1002; RV32-NEXT:    vmv.v.v v8, v16
1003; RV32-NEXT:    ret
1004;
1005; RV64-LABEL: mgather_nxv8i64:
1006; RV64:       # %bb.0:
1007; RV64-NEXT:    vsetvli a0, zero, e64, m8, ta, mu
1008; RV64-NEXT:    vluxei64.v v16, (zero), v8, v0.t
1009; RV64-NEXT:    vmv.v.v v8, v16
1010; RV64-NEXT:    ret
1011  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)
1012  ret <vscale x 8 x i64> %v
1013}
1014
1015define <vscale x 8 x i64> @mgather_baseidx_nxv8i8_nxv8i64(i64* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {
1016; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8i64:
1017; RV32:       # %bb.0:
1018; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
1019; RV32-NEXT:    vsext.vf4 v12, v8
1020; RV32-NEXT:    vsll.vi v8, v12, 3
1021; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
1022; RV32-NEXT:    vluxei32.v v16, (a0), v8, v0.t
1023; RV32-NEXT:    vmv.v.v v8, v16
1024; RV32-NEXT:    ret
1025;
1026; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8i64:
1027; RV64:       # %bb.0:
1028; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1029; RV64-NEXT:    vsext.vf8 v24, v8
1030; RV64-NEXT:    vsll.vi v8, v24, 3
1031; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t
1032; RV64-NEXT:    vmv.v.v v8, v16
1033; RV64-NEXT:    ret
1034  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i8> %idxs
1035  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)
1036  ret <vscale x 8 x i64> %v
1037}
1038
1039define <vscale x 8 x i64> @mgather_baseidx_sext_nxv8i8_nxv8i64(i64* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {
1040; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i64:
1041; RV32:       # %bb.0:
1042; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1043; RV32-NEXT:    vsext.vf8 v24, v8
1044; RV32-NEXT:    vsll.vi v8, v24, 3
1045; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
1046; RV32-NEXT:    vnsrl.wx v24, v8, zero
1047; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
1048; RV32-NEXT:    vluxei32.v v16, (a0), v24, v0.t
1049; RV32-NEXT:    vmv.v.v v8, v16
1050; RV32-NEXT:    ret
1051;
1052; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8i64:
1053; RV64:       # %bb.0:
1054; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1055; RV64-NEXT:    vsext.vf8 v24, v8
1056; RV64-NEXT:    vsll.vi v8, v24, 3
1057; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t
1058; RV64-NEXT:    vmv.v.v v8, v16
1059; RV64-NEXT:    ret
1060  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>
1061  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs
1062  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)
1063  ret <vscale x 8 x i64> %v
1064}
1065
1066define <vscale x 8 x i64> @mgather_baseidx_zext_nxv8i8_nxv8i64(i64* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {
1067; RV32-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i64:
1068; RV32:       # %bb.0:
1069; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1070; RV32-NEXT:    vzext.vf8 v24, v8
1071; RV32-NEXT:    vsll.vi v8, v24, 3
1072; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
1073; RV32-NEXT:    vnsrl.wx v24, v8, zero
1074; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
1075; RV32-NEXT:    vluxei32.v v16, (a0), v24, v0.t
1076; RV32-NEXT:    vmv.v.v v8, v16
1077; RV32-NEXT:    ret
1078;
1079; RV64-LABEL: mgather_baseidx_zext_nxv8i8_nxv8i64:
1080; RV64:       # %bb.0:
1081; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1082; RV64-NEXT:    vzext.vf8 v24, v8
1083; RV64-NEXT:    vsll.vi v8, v24, 3
1084; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t
1085; RV64-NEXT:    vmv.v.v v8, v16
1086; RV64-NEXT:    ret
1087  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>
1088  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs
1089  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)
1090  ret <vscale x 8 x i64> %v
1091}
1092
1093define <vscale x 8 x i64> @mgather_baseidx_nxv8i16_nxv8i64(i64* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {
1094; RV32-LABEL: mgather_baseidx_nxv8i16_nxv8i64:
1095; RV32:       # %bb.0:
1096; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
1097; RV32-NEXT:    vsext.vf2 v12, v8
1098; RV32-NEXT:    vsll.vi v8, v12, 3
1099; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
1100; RV32-NEXT:    vluxei32.v v16, (a0), v8, v0.t
1101; RV32-NEXT:    vmv.v.v v8, v16
1102; RV32-NEXT:    ret
1103;
1104; RV64-LABEL: mgather_baseidx_nxv8i16_nxv8i64:
1105; RV64:       # %bb.0:
1106; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1107; RV64-NEXT:    vsext.vf4 v24, v8
1108; RV64-NEXT:    vsll.vi v8, v24, 3
1109; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t
1110; RV64-NEXT:    vmv.v.v v8, v16
1111; RV64-NEXT:    ret
1112  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i16> %idxs
1113  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)
1114  ret <vscale x 8 x i64> %v
1115}
1116
1117define <vscale x 8 x i64> @mgather_baseidx_sext_nxv8i16_nxv8i64(i64* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {
1118; RV32-LABEL: mgather_baseidx_sext_nxv8i16_nxv8i64:
1119; RV32:       # %bb.0:
1120; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1121; RV32-NEXT:    vsext.vf4 v24, v8
1122; RV32-NEXT:    vsll.vi v8, v24, 3
1123; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
1124; RV32-NEXT:    vnsrl.wx v24, v8, zero
1125; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
1126; RV32-NEXT:    vluxei32.v v16, (a0), v24, v0.t
1127; RV32-NEXT:    vmv.v.v v8, v16
1128; RV32-NEXT:    ret
1129;
1130; RV64-LABEL: mgather_baseidx_sext_nxv8i16_nxv8i64:
1131; RV64:       # %bb.0:
1132; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1133; RV64-NEXT:    vsext.vf4 v24, v8
1134; RV64-NEXT:    vsll.vi v8, v24, 3
1135; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t
1136; RV64-NEXT:    vmv.v.v v8, v16
1137; RV64-NEXT:    ret
1138  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>
1139  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs
1140  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)
1141  ret <vscale x 8 x i64> %v
1142}
1143
1144define <vscale x 8 x i64> @mgather_baseidx_zext_nxv8i16_nxv8i64(i64* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {
1145; RV32-LABEL: mgather_baseidx_zext_nxv8i16_nxv8i64:
1146; RV32:       # %bb.0:
1147; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1148; RV32-NEXT:    vzext.vf4 v24, v8
1149; RV32-NEXT:    vsll.vi v8, v24, 3
1150; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
1151; RV32-NEXT:    vnsrl.wx v24, v8, zero
1152; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
1153; RV32-NEXT:    vluxei32.v v16, (a0), v24, v0.t
1154; RV32-NEXT:    vmv.v.v v8, v16
1155; RV32-NEXT:    ret
1156;
1157; RV64-LABEL: mgather_baseidx_zext_nxv8i16_nxv8i64:
1158; RV64:       # %bb.0:
1159; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1160; RV64-NEXT:    vzext.vf4 v24, v8
1161; RV64-NEXT:    vsll.vi v8, v24, 3
1162; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t
1163; RV64-NEXT:    vmv.v.v v8, v16
1164; RV64-NEXT:    ret
1165  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>
1166  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs
1167  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)
1168  ret <vscale x 8 x i64> %v
1169}
1170
1171define <vscale x 8 x i64> @mgather_baseidx_nxv8i32_nxv8i64(i64* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {
1172; RV32-LABEL: mgather_baseidx_nxv8i32_nxv8i64:
1173; RV32:       # %bb.0:
1174; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
1175; RV32-NEXT:    vsll.vi v8, v8, 3
1176; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
1177; RV32-NEXT:    vluxei32.v v16, (a0), v8, v0.t
1178; RV32-NEXT:    vmv.v.v v8, v16
1179; RV32-NEXT:    ret
1180;
1181; RV64-LABEL: mgather_baseidx_nxv8i32_nxv8i64:
1182; RV64:       # %bb.0:
1183; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1184; RV64-NEXT:    vsext.vf2 v24, v8
1185; RV64-NEXT:    vsll.vi v8, v24, 3
1186; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t
1187; RV64-NEXT:    vmv.v.v v8, v16
1188; RV64-NEXT:    ret
1189  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i32> %idxs
1190  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)
1191  ret <vscale x 8 x i64> %v
1192}
1193
1194define <vscale x 8 x i64> @mgather_baseidx_sext_nxv8i32_nxv8i64(i64* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {
1195; RV32-LABEL: mgather_baseidx_sext_nxv8i32_nxv8i64:
1196; RV32:       # %bb.0:
1197; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1198; RV32-NEXT:    vsext.vf2 v24, v8
1199; RV32-NEXT:    vsll.vi v8, v24, 3
1200; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
1201; RV32-NEXT:    vnsrl.wx v24, v8, zero
1202; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
1203; RV32-NEXT:    vluxei32.v v16, (a0), v24, v0.t
1204; RV32-NEXT:    vmv.v.v v8, v16
1205; RV32-NEXT:    ret
1206;
1207; RV64-LABEL: mgather_baseidx_sext_nxv8i32_nxv8i64:
1208; RV64:       # %bb.0:
1209; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1210; RV64-NEXT:    vsext.vf2 v24, v8
1211; RV64-NEXT:    vsll.vi v8, v24, 3
1212; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t
1213; RV64-NEXT:    vmv.v.v v8, v16
1214; RV64-NEXT:    ret
1215  %eidxs = sext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>
1216  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs
1217  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)
1218  ret <vscale x 8 x i64> %v
1219}
1220
1221define <vscale x 8 x i64> @mgather_baseidx_zext_nxv8i32_nxv8i64(i64* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {
1222; RV32-LABEL: mgather_baseidx_zext_nxv8i32_nxv8i64:
1223; RV32:       # %bb.0:
1224; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1225; RV32-NEXT:    vzext.vf2 v24, v8
1226; RV32-NEXT:    vsll.vi v8, v24, 3
1227; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
1228; RV32-NEXT:    vnsrl.wx v24, v8, zero
1229; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
1230; RV32-NEXT:    vluxei32.v v16, (a0), v24, v0.t
1231; RV32-NEXT:    vmv.v.v v8, v16
1232; RV32-NEXT:    ret
1233;
1234; RV64-LABEL: mgather_baseidx_zext_nxv8i32_nxv8i64:
1235; RV64:       # %bb.0:
1236; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1237; RV64-NEXT:    vzext.vf2 v24, v8
1238; RV64-NEXT:    vsll.vi v8, v24, 3
1239; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t
1240; RV64-NEXT:    vmv.v.v v8, v16
1241; RV64-NEXT:    ret
1242  %eidxs = zext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>
1243  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %eidxs
1244  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)
1245  ret <vscale x 8 x i64> %v
1246}
1247
1248define <vscale x 8 x i64> @mgather_baseidx_nxv8i64(i64* %base, <vscale x 8 x i64> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru) {
1249; RV32-LABEL: mgather_baseidx_nxv8i64:
1250; RV32:       # %bb.0:
1251; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1252; RV32-NEXT:    vsll.vi v8, v8, 3
1253; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
1254; RV32-NEXT:    vnsrl.wx v24, v8, zero
1255; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
1256; RV32-NEXT:    vluxei32.v v16, (a0), v24, v0.t
1257; RV32-NEXT:    vmv.v.v v8, v16
1258; RV32-NEXT:    ret
1259;
1260; RV64-LABEL: mgather_baseidx_nxv8i64:
1261; RV64:       # %bb.0:
1262; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1263; RV64-NEXT:    vsll.vi v8, v8, 3
1264; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t
1265; RV64-NEXT:    vmv.v.v v8, v16
1266; RV64-NEXT:    ret
1267  %ptrs = getelementptr inbounds i64, i64* %base, <vscale x 8 x i64> %idxs
1268  %v = call <vscale x 8 x i64> @llvm.masked.gather.nxv8i64.nxv8p0i64(<vscale x 8 x i64*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x i64> %passthru)
1269  ret <vscale x 8 x i64> %v
1270}
1271
1272declare <vscale x 16 x i64> @llvm.masked.gather.nxv16i64.nxv16p0f64(<vscale x 16 x i64*>, i32, <vscale x 16 x i1>, <vscale x 16 x i64>)
1273
1274declare <vscale x 16 x i64> @llvm.experimental.vector.insert.nxv8i64.nxv16i64(<vscale x 16 x i64>, <vscale x 8 x i64>, i64 %idx)
1275declare <vscale x 16 x i64*> @llvm.experimental.vector.insert.nxv8p0i64.nxv16p0i64(<vscale x 16 x i64*>, <vscale x 8 x i64*>, i64 %idx)
1276
1277define void @mgather_nxv16i64(<vscale x 8 x i64*> %ptrs0, <vscale x 8 x i64*> %ptrs1, <vscale x 16 x i1> %m, <vscale x 8 x i64> %passthru0, <vscale x 8 x i64> %passthru1, <vscale x 16 x i64>* %out) {
1278; RV32-LABEL: mgather_nxv16i64:
1279; RV32:       # %bb.0:
1280; RV32-NEXT:    vl8re64.v v24, (a0)
1281; RV32-NEXT:    vsetvli a0, zero, e64, m8, ta, mu
1282; RV32-NEXT:    vluxei32.v v16, (zero), v8, v0.t
1283; RV32-NEXT:    csrr a0, vlenb
1284; RV32-NEXT:    srli a2, a0, 3
1285; RV32-NEXT:    vsetvli a3, zero, e8, mf4, ta, mu
1286; RV32-NEXT:    vslidedown.vx v0, v0, a2
1287; RV32-NEXT:    vsetvli a2, zero, e64, m8, ta, mu
1288; RV32-NEXT:    vluxei32.v v24, (zero), v12, v0.t
1289; RV32-NEXT:    slli a0, a0, 3
1290; RV32-NEXT:    add a0, a1, a0
1291; RV32-NEXT:    vs8r.v v24, (a0)
1292; RV32-NEXT:    vs8r.v v16, (a1)
1293; RV32-NEXT:    ret
1294;
1295; RV64-LABEL: mgather_nxv16i64:
1296; RV64:       # %bb.0:
1297; RV64-NEXT:    addi sp, sp, -16
1298; RV64-NEXT:    .cfi_def_cfa_offset 16
1299; RV64-NEXT:    csrr a3, vlenb
1300; RV64-NEXT:    slli a3, a3, 3
1301; RV64-NEXT:    sub sp, sp, a3
1302; RV64-NEXT:    vl8re64.v v24, (a0)
1303; RV64-NEXT:    addi a0, sp, 16
1304; RV64-NEXT:    vs8r.v v16, (a0) # Unknown-size Folded Spill
1305; RV64-NEXT:    vmv8r.v v16, v8
1306; RV64-NEXT:    vl8re64.v v8, (a1)
1307; RV64-NEXT:    vsetvli a0, zero, e64, m8, ta, mu
1308; RV64-NEXT:    vluxei64.v v24, (zero), v16, v0.t
1309; RV64-NEXT:    csrr a0, vlenb
1310; RV64-NEXT:    srli a1, a0, 3
1311; RV64-NEXT:    vsetvli a3, zero, e8, mf4, ta, mu
1312; RV64-NEXT:    vslidedown.vx v0, v0, a1
1313; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1314; RV64-NEXT:    addi a1, sp, 16
1315; RV64-NEXT:    vl8re8.v v16, (a1) # Unknown-size Folded Reload
1316; RV64-NEXT:    vluxei64.v v8, (zero), v16, v0.t
1317; RV64-NEXT:    slli a0, a0, 3
1318; RV64-NEXT:    add a0, a2, a0
1319; RV64-NEXT:    vs8r.v v8, (a0)
1320; RV64-NEXT:    vs8r.v v24, (a2)
1321; RV64-NEXT:    csrr a0, vlenb
1322; RV64-NEXT:    slli a0, a0, 3
1323; RV64-NEXT:    add sp, sp, a0
1324; RV64-NEXT:    addi sp, sp, 16
1325; RV64-NEXT:    ret
1326  %p0 = call <vscale x 16 x i64*> @llvm.experimental.vector.insert.nxv8p0i64.nxv16p0i64(<vscale x 16 x i64*> undef, <vscale x 8 x i64*> %ptrs0, i64 0)
1327  %p1 = call <vscale x 16 x i64*> @llvm.experimental.vector.insert.nxv8p0i64.nxv16p0i64(<vscale x 16 x i64*> %p0, <vscale x 8 x i64*> %ptrs1, i64 8)
1328
1329  %pt0 = call <vscale x 16 x i64> @llvm.experimental.vector.insert.nxv8i64.nxv16i64(<vscale x 16 x i64> undef, <vscale x 8 x i64> %passthru0, i64 0)
1330  %pt1 = call <vscale x 16 x i64> @llvm.experimental.vector.insert.nxv8i64.nxv16i64(<vscale x 16 x i64> %pt0, <vscale x 8 x i64> %passthru1, i64 8)
1331
1332  %v = call <vscale x 16 x i64> @llvm.masked.gather.nxv16i64.nxv16p0f64(<vscale x 16 x i64*> %p1, i32 8, <vscale x 16 x i1> %m, <vscale x 16 x i64> %pt1)
1333  store <vscale x 16 x i64> %v, <vscale x 16 x i64>* %out
1334  ret void
1335}
1336
1337
1338declare <vscale x 1 x half> @llvm.masked.gather.nxv1f16.nxv1p0f16(<vscale x 1 x half*>, i32, <vscale x 1 x i1>, <vscale x 1 x half>)
1339
1340define <vscale x 1 x half> @mgather_nxv1f16(<vscale x 1 x half*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x half> %passthru) {
1341; RV32-LABEL: mgather_nxv1f16:
1342; RV32:       # %bb.0:
1343; RV32-NEXT:    vsetvli a0, zero, e16, mf4, ta, mu
1344; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t
1345; RV32-NEXT:    vmv1r.v v8, v9
1346; RV32-NEXT:    ret
1347;
1348; RV64-LABEL: mgather_nxv1f16:
1349; RV64:       # %bb.0:
1350; RV64-NEXT:    vsetvli a0, zero, e16, mf4, ta, mu
1351; RV64-NEXT:    vluxei64.v v9, (zero), v8, v0.t
1352; RV64-NEXT:    vmv1r.v v8, v9
1353; RV64-NEXT:    ret
1354  %v = call <vscale x 1 x half> @llvm.masked.gather.nxv1f16.nxv1p0f16(<vscale x 1 x half*> %ptrs, i32 2, <vscale x 1 x i1> %m, <vscale x 1 x half> %passthru)
1355  ret <vscale x 1 x half> %v
1356}
1357
1358declare <vscale x 2 x half> @llvm.masked.gather.nxv2f16.nxv2p0f16(<vscale x 2 x half*>, i32, <vscale x 2 x i1>, <vscale x 2 x half>)
1359
1360define <vscale x 2 x half> @mgather_nxv2f16(<vscale x 2 x half*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x half> %passthru) {
1361; RV32-LABEL: mgather_nxv2f16:
1362; RV32:       # %bb.0:
1363; RV32-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
1364; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t
1365; RV32-NEXT:    vmv1r.v v8, v9
1366; RV32-NEXT:    ret
1367;
1368; RV64-LABEL: mgather_nxv2f16:
1369; RV64:       # %bb.0:
1370; RV64-NEXT:    vsetvli a0, zero, e16, mf2, ta, mu
1371; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t
1372; RV64-NEXT:    vmv1r.v v8, v10
1373; RV64-NEXT:    ret
1374  %v = call <vscale x 2 x half> @llvm.masked.gather.nxv2f16.nxv2p0f16(<vscale x 2 x half*> %ptrs, i32 2, <vscale x 2 x i1> %m, <vscale x 2 x half> %passthru)
1375  ret <vscale x 2 x half> %v
1376}
1377
1378declare <vscale x 4 x half> @llvm.masked.gather.nxv4f16.nxv4p0f16(<vscale x 4 x half*>, i32, <vscale x 4 x i1>, <vscale x 4 x half>)
1379
1380define <vscale x 4 x half> @mgather_nxv4f16(<vscale x 4 x half*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x half> %passthru) {
1381; RV32-LABEL: mgather_nxv4f16:
1382; RV32:       # %bb.0:
1383; RV32-NEXT:    vsetvli a0, zero, e16, m1, ta, mu
1384; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t
1385; RV32-NEXT:    vmv.v.v v8, v10
1386; RV32-NEXT:    ret
1387;
1388; RV64-LABEL: mgather_nxv4f16:
1389; RV64:       # %bb.0:
1390; RV64-NEXT:    vsetvli a0, zero, e16, m1, ta, mu
1391; RV64-NEXT:    vluxei64.v v12, (zero), v8, v0.t
1392; RV64-NEXT:    vmv.v.v v8, v12
1393; RV64-NEXT:    ret
1394  %v = call <vscale x 4 x half> @llvm.masked.gather.nxv4f16.nxv4p0f16(<vscale x 4 x half*> %ptrs, i32 2, <vscale x 4 x i1> %m, <vscale x 4 x half> %passthru)
1395  ret <vscale x 4 x half> %v
1396}
1397
1398define <vscale x 4 x half> @mgather_truemask_nxv4f16(<vscale x 4 x half*> %ptrs, <vscale x 4 x half> %passthru) {
1399; RV32-LABEL: mgather_truemask_nxv4f16:
1400; RV32:       # %bb.0:
1401; RV32-NEXT:    vsetvli a0, zero, e16, m1, ta, mu
1402; RV32-NEXT:    vluxei32.v v10, (zero), v8
1403; RV32-NEXT:    vmv.v.v v8, v10
1404; RV32-NEXT:    ret
1405;
1406; RV64-LABEL: mgather_truemask_nxv4f16:
1407; RV64:       # %bb.0:
1408; RV64-NEXT:    vsetvli a0, zero, e16, m1, ta, mu
1409; RV64-NEXT:    vluxei64.v v12, (zero), v8
1410; RV64-NEXT:    vmv.v.v v8, v12
1411; RV64-NEXT:    ret
1412  %mhead = insertelement <vscale x 4 x i1> poison, i1 1, i32 0
1413  %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer
1414  %v = call <vscale x 4 x half> @llvm.masked.gather.nxv4f16.nxv4p0f16(<vscale x 4 x half*> %ptrs, i32 2, <vscale x 4 x i1> %mtrue, <vscale x 4 x half> %passthru)
1415  ret <vscale x 4 x half> %v
1416}
1417
1418define <vscale x 4 x half> @mgather_falsemask_nxv4f16(<vscale x 4 x half*> %ptrs, <vscale x 4 x half> %passthru) {
1419; RV32-LABEL: mgather_falsemask_nxv4f16:
1420; RV32:       # %bb.0:
1421; RV32-NEXT:    vmv1r.v v8, v10
1422; RV32-NEXT:    ret
1423;
1424; RV64-LABEL: mgather_falsemask_nxv4f16:
1425; RV64:       # %bb.0:
1426; RV64-NEXT:    vmv1r.v v8, v12
1427; RV64-NEXT:    ret
1428  %v = call <vscale x 4 x half> @llvm.masked.gather.nxv4f16.nxv4p0f16(<vscale x 4 x half*> %ptrs, i32 2, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x half> %passthru)
1429  ret <vscale x 4 x half> %v
1430}
1431
1432declare <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*>, i32, <vscale x 8 x i1>, <vscale x 8 x half>)
1433
1434define <vscale x 8 x half> @mgather_nxv8f16(<vscale x 8 x half*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) {
1435; RV32-LABEL: mgather_nxv8f16:
1436; RV32:       # %bb.0:
1437; RV32-NEXT:    vsetvli a0, zero, e16, m2, ta, mu
1438; RV32-NEXT:    vluxei32.v v12, (zero), v8, v0.t
1439; RV32-NEXT:    vmv.v.v v8, v12
1440; RV32-NEXT:    ret
1441;
1442; RV64-LABEL: mgather_nxv8f16:
1443; RV64:       # %bb.0:
1444; RV64-NEXT:    vsetvli a0, zero, e16, m2, ta, mu
1445; RV64-NEXT:    vluxei64.v v16, (zero), v8, v0.t
1446; RV64-NEXT:    vmv.v.v v8, v16
1447; RV64-NEXT:    ret
1448  %v = call <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru)
1449  ret <vscale x 8 x half> %v
1450}
1451
1452define <vscale x 8 x half> @mgather_baseidx_nxv8i8_nxv8f16(half* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) {
1453; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8f16:
1454; RV32:       # %bb.0:
1455; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
1456; RV32-NEXT:    vsext.vf4 v12, v8
1457; RV32-NEXT:    vadd.vv v12, v12, v12
1458; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, mu
1459; RV32-NEXT:    vluxei32.v v10, (a0), v12, v0.t
1460; RV32-NEXT:    vmv.v.v v8, v10
1461; RV32-NEXT:    ret
1462;
1463; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8f16:
1464; RV64:       # %bb.0:
1465; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1466; RV64-NEXT:    vsext.vf8 v16, v8
1467; RV64-NEXT:    vadd.vv v16, v16, v16
1468; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, mu
1469; RV64-NEXT:    vluxei64.v v10, (a0), v16, v0.t
1470; RV64-NEXT:    vmv.v.v v8, v10
1471; RV64-NEXT:    ret
1472  %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i8> %idxs
1473  %v = call <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru)
1474  ret <vscale x 8 x half> %v
1475}
1476
1477define <vscale x 8 x half> @mgather_baseidx_sext_nxv8i8_nxv8f16(half* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) {
1478; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f16:
1479; RV32:       # %bb.0:
1480; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
1481; RV32-NEXT:    vsext.vf4 v12, v8
1482; RV32-NEXT:    vadd.vv v12, v12, v12
1483; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, mu
1484; RV32-NEXT:    vluxei32.v v10, (a0), v12, v0.t
1485; RV32-NEXT:    vmv.v.v v8, v10
1486; RV32-NEXT:    ret
1487;
1488; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f16:
1489; RV64:       # %bb.0:
1490; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1491; RV64-NEXT:    vsext.vf8 v16, v8
1492; RV64-NEXT:    vadd.vv v16, v16, v16
1493; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, mu
1494; RV64-NEXT:    vluxei64.v v10, (a0), v16, v0.t
1495; RV64-NEXT:    vmv.v.v v8, v10
1496; RV64-NEXT:    ret
1497  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>
1498  %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i16> %eidxs
1499  %v = call <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru)
1500  ret <vscale x 8 x half> %v
1501}
1502
1503define <vscale x 8 x half> @mgather_baseidx_zext_nxv8i8_nxv8f16(half* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) {
1504; RV32-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f16:
1505; RV32:       # %bb.0:
1506; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
1507; RV32-NEXT:    vzext.vf4 v12, v8
1508; RV32-NEXT:    vadd.vv v12, v12, v12
1509; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, mu
1510; RV32-NEXT:    vluxei32.v v10, (a0), v12, v0.t
1511; RV32-NEXT:    vmv.v.v v8, v10
1512; RV32-NEXT:    ret
1513;
1514; RV64-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f16:
1515; RV64:       # %bb.0:
1516; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1517; RV64-NEXT:    vzext.vf8 v16, v8
1518; RV64-NEXT:    vadd.vv v16, v16, v16
1519; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, mu
1520; RV64-NEXT:    vluxei64.v v10, (a0), v16, v0.t
1521; RV64-NEXT:    vmv.v.v v8, v10
1522; RV64-NEXT:    ret
1523  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i16>
1524  %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i16> %eidxs
1525  %v = call <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru)
1526  ret <vscale x 8 x half> %v
1527}
1528
1529define <vscale x 8 x half> @mgather_baseidx_nxv8f16(half* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru) {
1530; RV32-LABEL: mgather_baseidx_nxv8f16:
1531; RV32:       # %bb.0:
1532; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
1533; RV32-NEXT:    vsext.vf2 v12, v8
1534; RV32-NEXT:    vadd.vv v12, v12, v12
1535; RV32-NEXT:    vsetvli zero, zero, e16, m2, ta, mu
1536; RV32-NEXT:    vluxei32.v v10, (a0), v12, v0.t
1537; RV32-NEXT:    vmv.v.v v8, v10
1538; RV32-NEXT:    ret
1539;
1540; RV64-LABEL: mgather_baseidx_nxv8f16:
1541; RV64:       # %bb.0:
1542; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1543; RV64-NEXT:    vsext.vf4 v16, v8
1544; RV64-NEXT:    vadd.vv v16, v16, v16
1545; RV64-NEXT:    vsetvli zero, zero, e16, m2, ta, mu
1546; RV64-NEXT:    vluxei64.v v10, (a0), v16, v0.t
1547; RV64-NEXT:    vmv.v.v v8, v10
1548; RV64-NEXT:    ret
1549  %ptrs = getelementptr inbounds half, half* %base, <vscale x 8 x i16> %idxs
1550  %v = call <vscale x 8 x half> @llvm.masked.gather.nxv8f16.nxv8p0f16(<vscale x 8 x half*> %ptrs, i32 2, <vscale x 8 x i1> %m, <vscale x 8 x half> %passthru)
1551  ret <vscale x 8 x half> %v
1552}
1553
1554declare <vscale x 1 x float> @llvm.masked.gather.nxv1f32.nxv1p0f32(<vscale x 1 x float*>, i32, <vscale x 1 x i1>, <vscale x 1 x float>)
1555
1556define <vscale x 1 x float> @mgather_nxv1f32(<vscale x 1 x float*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x float> %passthru) {
1557; RV32-LABEL: mgather_nxv1f32:
1558; RV32:       # %bb.0:
1559; RV32-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu
1560; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t
1561; RV32-NEXT:    vmv1r.v v8, v9
1562; RV32-NEXT:    ret
1563;
1564; RV64-LABEL: mgather_nxv1f32:
1565; RV64:       # %bb.0:
1566; RV64-NEXT:    vsetvli a0, zero, e32, mf2, ta, mu
1567; RV64-NEXT:    vluxei64.v v9, (zero), v8, v0.t
1568; RV64-NEXT:    vmv1r.v v8, v9
1569; RV64-NEXT:    ret
1570  %v = call <vscale x 1 x float> @llvm.masked.gather.nxv1f32.nxv1p0f32(<vscale x 1 x float*> %ptrs, i32 4, <vscale x 1 x i1> %m, <vscale x 1 x float> %passthru)
1571  ret <vscale x 1 x float> %v
1572}
1573
1574declare <vscale x 2 x float> @llvm.masked.gather.nxv2f32.nxv2p0f32(<vscale x 2 x float*>, i32, <vscale x 2 x i1>, <vscale x 2 x float>)
1575
1576define <vscale x 2 x float> @mgather_nxv2f32(<vscale x 2 x float*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x float> %passthru) {
1577; RV32-LABEL: mgather_nxv2f32:
1578; RV32:       # %bb.0:
1579; RV32-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
1580; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t
1581; RV32-NEXT:    vmv.v.v v8, v9
1582; RV32-NEXT:    ret
1583;
1584; RV64-LABEL: mgather_nxv2f32:
1585; RV64:       # %bb.0:
1586; RV64-NEXT:    vsetvli a0, zero, e32, m1, ta, mu
1587; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t
1588; RV64-NEXT:    vmv.v.v v8, v10
1589; RV64-NEXT:    ret
1590  %v = call <vscale x 2 x float> @llvm.masked.gather.nxv2f32.nxv2p0f32(<vscale x 2 x float*> %ptrs, i32 4, <vscale x 2 x i1> %m, <vscale x 2 x float> %passthru)
1591  ret <vscale x 2 x float> %v
1592}
1593
1594declare <vscale x 4 x float> @llvm.masked.gather.nxv4f32.nxv4p0f32(<vscale x 4 x float*>, i32, <vscale x 4 x i1>, <vscale x 4 x float>)
1595
1596define <vscale x 4 x float> @mgather_nxv4f32(<vscale x 4 x float*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x float> %passthru) {
1597; RV32-LABEL: mgather_nxv4f32:
1598; RV32:       # %bb.0:
1599; RV32-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
1600; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t
1601; RV32-NEXT:    vmv.v.v v8, v10
1602; RV32-NEXT:    ret
1603;
1604; RV64-LABEL: mgather_nxv4f32:
1605; RV64:       # %bb.0:
1606; RV64-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
1607; RV64-NEXT:    vluxei64.v v12, (zero), v8, v0.t
1608; RV64-NEXT:    vmv.v.v v8, v12
1609; RV64-NEXT:    ret
1610  %v = call <vscale x 4 x float> @llvm.masked.gather.nxv4f32.nxv4p0f32(<vscale x 4 x float*> %ptrs, i32 4, <vscale x 4 x i1> %m, <vscale x 4 x float> %passthru)
1611  ret <vscale x 4 x float> %v
1612}
1613
1614define <vscale x 4 x float> @mgather_truemask_nxv4f32(<vscale x 4 x float*> %ptrs, <vscale x 4 x float> %passthru) {
1615; RV32-LABEL: mgather_truemask_nxv4f32:
1616; RV32:       # %bb.0:
1617; RV32-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
1618; RV32-NEXT:    vluxei32.v v8, (zero), v8
1619; RV32-NEXT:    ret
1620;
1621; RV64-LABEL: mgather_truemask_nxv4f32:
1622; RV64:       # %bb.0:
1623; RV64-NEXT:    vsetvli a0, zero, e32, m2, ta, mu
1624; RV64-NEXT:    vluxei64.v v12, (zero), v8
1625; RV64-NEXT:    vmv.v.v v8, v12
1626; RV64-NEXT:    ret
1627  %mhead = insertelement <vscale x 4 x i1> poison, i1 1, i32 0
1628  %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer
1629  %v = call <vscale x 4 x float> @llvm.masked.gather.nxv4f32.nxv4p0f32(<vscale x 4 x float*> %ptrs, i32 4, <vscale x 4 x i1> %mtrue, <vscale x 4 x float> %passthru)
1630  ret <vscale x 4 x float> %v
1631}
1632
1633define <vscale x 4 x float> @mgather_falsemask_nxv4f32(<vscale x 4 x float*> %ptrs, <vscale x 4 x float> %passthru) {
1634; RV32-LABEL: mgather_falsemask_nxv4f32:
1635; RV32:       # %bb.0:
1636; RV32-NEXT:    vmv2r.v v8, v10
1637; RV32-NEXT:    ret
1638;
1639; RV64-LABEL: mgather_falsemask_nxv4f32:
1640; RV64:       # %bb.0:
1641; RV64-NEXT:    vmv2r.v v8, v12
1642; RV64-NEXT:    ret
1643  %v = call <vscale x 4 x float> @llvm.masked.gather.nxv4f32.nxv4p0f32(<vscale x 4 x float*> %ptrs, i32 4, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x float> %passthru)
1644  ret <vscale x 4 x float> %v
1645}
1646
1647declare <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*>, i32, <vscale x 8 x i1>, <vscale x 8 x float>)
1648
1649define <vscale x 8 x float> @mgather_nxv8f32(<vscale x 8 x float*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) {
1650; RV32-LABEL: mgather_nxv8f32:
1651; RV32:       # %bb.0:
1652; RV32-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
1653; RV32-NEXT:    vluxei32.v v12, (zero), v8, v0.t
1654; RV32-NEXT:    vmv.v.v v8, v12
1655; RV32-NEXT:    ret
1656;
1657; RV64-LABEL: mgather_nxv8f32:
1658; RV64:       # %bb.0:
1659; RV64-NEXT:    vsetvli a0, zero, e32, m4, ta, mu
1660; RV64-NEXT:    vluxei64.v v16, (zero), v8, v0.t
1661; RV64-NEXT:    vmv.v.v v8, v16
1662; RV64-NEXT:    ret
1663  %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru)
1664  ret <vscale x 8 x float> %v
1665}
1666
1667define <vscale x 8 x float> @mgather_baseidx_nxv8i8_nxv8f32(float* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) {
1668; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8f32:
1669; RV32:       # %bb.0:
1670; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
1671; RV32-NEXT:    vsext.vf4 v16, v8
1672; RV32-NEXT:    vsll.vi v8, v16, 2
1673; RV32-NEXT:    vluxei32.v v12, (a0), v8, v0.t
1674; RV32-NEXT:    vmv.v.v v8, v12
1675; RV32-NEXT:    ret
1676;
1677; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8f32:
1678; RV64:       # %bb.0:
1679; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1680; RV64-NEXT:    vsext.vf8 v16, v8
1681; RV64-NEXT:    vsll.vi v16, v16, 2
1682; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
1683; RV64-NEXT:    vluxei64.v v12, (a0), v16, v0.t
1684; RV64-NEXT:    vmv.v.v v8, v12
1685; RV64-NEXT:    ret
1686  %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i8> %idxs
1687  %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru)
1688  ret <vscale x 8 x float> %v
1689}
1690
1691define <vscale x 8 x float> @mgather_baseidx_sext_nxv8i8_nxv8f32(float* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) {
1692; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f32:
1693; RV32:       # %bb.0:
1694; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
1695; RV32-NEXT:    vsext.vf4 v16, v8
1696; RV32-NEXT:    vsll.vi v8, v16, 2
1697; RV32-NEXT:    vluxei32.v v12, (a0), v8, v0.t
1698; RV32-NEXT:    vmv.v.v v8, v12
1699; RV32-NEXT:    ret
1700;
1701; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f32:
1702; RV64:       # %bb.0:
1703; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1704; RV64-NEXT:    vsext.vf8 v16, v8
1705; RV64-NEXT:    vsll.vi v16, v16, 2
1706; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
1707; RV64-NEXT:    vluxei64.v v12, (a0), v16, v0.t
1708; RV64-NEXT:    vmv.v.v v8, v12
1709; RV64-NEXT:    ret
1710  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>
1711  %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs
1712  %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru)
1713  ret <vscale x 8 x float> %v
1714}
1715
1716define <vscale x 8 x float> @mgather_baseidx_zext_nxv8i8_nxv8f32(float* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) {
1717; RV32-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f32:
1718; RV32:       # %bb.0:
1719; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
1720; RV32-NEXT:    vzext.vf4 v16, v8
1721; RV32-NEXT:    vsll.vi v8, v16, 2
1722; RV32-NEXT:    vluxei32.v v12, (a0), v8, v0.t
1723; RV32-NEXT:    vmv.v.v v8, v12
1724; RV32-NEXT:    ret
1725;
1726; RV64-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f32:
1727; RV64:       # %bb.0:
1728; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1729; RV64-NEXT:    vzext.vf8 v16, v8
1730; RV64-NEXT:    vsll.vi v16, v16, 2
1731; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
1732; RV64-NEXT:    vluxei64.v v12, (a0), v16, v0.t
1733; RV64-NEXT:    vmv.v.v v8, v12
1734; RV64-NEXT:    ret
1735  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i32>
1736  %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs
1737  %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru)
1738  ret <vscale x 8 x float> %v
1739}
1740
1741define <vscale x 8 x float> @mgather_baseidx_nxv8i16_nxv8f32(float* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) {
1742; RV32-LABEL: mgather_baseidx_nxv8i16_nxv8f32:
1743; RV32:       # %bb.0:
1744; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
1745; RV32-NEXT:    vsext.vf2 v16, v8
1746; RV32-NEXT:    vsll.vi v8, v16, 2
1747; RV32-NEXT:    vluxei32.v v12, (a0), v8, v0.t
1748; RV32-NEXT:    vmv.v.v v8, v12
1749; RV32-NEXT:    ret
1750;
1751; RV64-LABEL: mgather_baseidx_nxv8i16_nxv8f32:
1752; RV64:       # %bb.0:
1753; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1754; RV64-NEXT:    vsext.vf4 v16, v8
1755; RV64-NEXT:    vsll.vi v16, v16, 2
1756; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
1757; RV64-NEXT:    vluxei64.v v12, (a0), v16, v0.t
1758; RV64-NEXT:    vmv.v.v v8, v12
1759; RV64-NEXT:    ret
1760  %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i16> %idxs
1761  %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru)
1762  ret <vscale x 8 x float> %v
1763}
1764
1765define <vscale x 8 x float> @mgather_baseidx_sext_nxv8i16_nxv8f32(float* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) {
1766; RV32-LABEL: mgather_baseidx_sext_nxv8i16_nxv8f32:
1767; RV32:       # %bb.0:
1768; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
1769; RV32-NEXT:    vsext.vf2 v16, v8
1770; RV32-NEXT:    vsll.vi v8, v16, 2
1771; RV32-NEXT:    vluxei32.v v12, (a0), v8, v0.t
1772; RV32-NEXT:    vmv.v.v v8, v12
1773; RV32-NEXT:    ret
1774;
1775; RV64-LABEL: mgather_baseidx_sext_nxv8i16_nxv8f32:
1776; RV64:       # %bb.0:
1777; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1778; RV64-NEXT:    vsext.vf4 v16, v8
1779; RV64-NEXT:    vsll.vi v16, v16, 2
1780; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
1781; RV64-NEXT:    vluxei64.v v12, (a0), v16, v0.t
1782; RV64-NEXT:    vmv.v.v v8, v12
1783; RV64-NEXT:    ret
1784  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>
1785  %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs
1786  %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru)
1787  ret <vscale x 8 x float> %v
1788}
1789
1790define <vscale x 8 x float> @mgather_baseidx_zext_nxv8i16_nxv8f32(float* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) {
1791; RV32-LABEL: mgather_baseidx_zext_nxv8i16_nxv8f32:
1792; RV32:       # %bb.0:
1793; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
1794; RV32-NEXT:    vzext.vf2 v16, v8
1795; RV32-NEXT:    vsll.vi v8, v16, 2
1796; RV32-NEXT:    vluxei32.v v12, (a0), v8, v0.t
1797; RV32-NEXT:    vmv.v.v v8, v12
1798; RV32-NEXT:    ret
1799;
1800; RV64-LABEL: mgather_baseidx_zext_nxv8i16_nxv8f32:
1801; RV64:       # %bb.0:
1802; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1803; RV64-NEXT:    vzext.vf4 v16, v8
1804; RV64-NEXT:    vsll.vi v16, v16, 2
1805; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
1806; RV64-NEXT:    vluxei64.v v12, (a0), v16, v0.t
1807; RV64-NEXT:    vmv.v.v v8, v12
1808; RV64-NEXT:    ret
1809  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i32>
1810  %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %eidxs
1811  %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru)
1812  ret <vscale x 8 x float> %v
1813}
1814
1815define <vscale x 8 x float> @mgather_baseidx_nxv8f32(float* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru) {
1816; RV32-LABEL: mgather_baseidx_nxv8f32:
1817; RV32:       # %bb.0:
1818; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
1819; RV32-NEXT:    vsll.vi v8, v8, 2
1820; RV32-NEXT:    vluxei32.v v12, (a0), v8, v0.t
1821; RV32-NEXT:    vmv.v.v v8, v12
1822; RV32-NEXT:    ret
1823;
1824; RV64-LABEL: mgather_baseidx_nxv8f32:
1825; RV64:       # %bb.0:
1826; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1827; RV64-NEXT:    vsext.vf2 v16, v8
1828; RV64-NEXT:    vsll.vi v16, v16, 2
1829; RV64-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
1830; RV64-NEXT:    vluxei64.v v12, (a0), v16, v0.t
1831; RV64-NEXT:    vmv.v.v v8, v12
1832; RV64-NEXT:    ret
1833  %ptrs = getelementptr inbounds float, float* %base, <vscale x 8 x i32> %idxs
1834  %v = call <vscale x 8 x float> @llvm.masked.gather.nxv8f32.nxv8p0f32(<vscale x 8 x float*> %ptrs, i32 4, <vscale x 8 x i1> %m, <vscale x 8 x float> %passthru)
1835  ret <vscale x 8 x float> %v
1836}
1837
1838declare <vscale x 1 x double> @llvm.masked.gather.nxv1f64.nxv1p0f64(<vscale x 1 x double*>, i32, <vscale x 1 x i1>, <vscale x 1 x double>)
1839
1840define <vscale x 1 x double> @mgather_nxv1f64(<vscale x 1 x double*> %ptrs, <vscale x 1 x i1> %m, <vscale x 1 x double> %passthru) {
1841; RV32-LABEL: mgather_nxv1f64:
1842; RV32:       # %bb.0:
1843; RV32-NEXT:    vsetvli a0, zero, e64, m1, ta, mu
1844; RV32-NEXT:    vluxei32.v v9, (zero), v8, v0.t
1845; RV32-NEXT:    vmv.v.v v8, v9
1846; RV32-NEXT:    ret
1847;
1848; RV64-LABEL: mgather_nxv1f64:
1849; RV64:       # %bb.0:
1850; RV64-NEXT:    vsetvli a0, zero, e64, m1, ta, mu
1851; RV64-NEXT:    vluxei64.v v9, (zero), v8, v0.t
1852; RV64-NEXT:    vmv.v.v v8, v9
1853; RV64-NEXT:    ret
1854  %v = call <vscale x 1 x double> @llvm.masked.gather.nxv1f64.nxv1p0f64(<vscale x 1 x double*> %ptrs, i32 8, <vscale x 1 x i1> %m, <vscale x 1 x double> %passthru)
1855  ret <vscale x 1 x double> %v
1856}
1857
1858declare <vscale x 2 x double> @llvm.masked.gather.nxv2f64.nxv2p0f64(<vscale x 2 x double*>, i32, <vscale x 2 x i1>, <vscale x 2 x double>)
1859
1860define <vscale x 2 x double> @mgather_nxv2f64(<vscale x 2 x double*> %ptrs, <vscale x 2 x i1> %m, <vscale x 2 x double> %passthru) {
1861; RV32-LABEL: mgather_nxv2f64:
1862; RV32:       # %bb.0:
1863; RV32-NEXT:    vsetvli a0, zero, e64, m2, ta, mu
1864; RV32-NEXT:    vluxei32.v v10, (zero), v8, v0.t
1865; RV32-NEXT:    vmv.v.v v8, v10
1866; RV32-NEXT:    ret
1867;
1868; RV64-LABEL: mgather_nxv2f64:
1869; RV64:       # %bb.0:
1870; RV64-NEXT:    vsetvli a0, zero, e64, m2, ta, mu
1871; RV64-NEXT:    vluxei64.v v10, (zero), v8, v0.t
1872; RV64-NEXT:    vmv.v.v v8, v10
1873; RV64-NEXT:    ret
1874  %v = call <vscale x 2 x double> @llvm.masked.gather.nxv2f64.nxv2p0f64(<vscale x 2 x double*> %ptrs, i32 8, <vscale x 2 x i1> %m, <vscale x 2 x double> %passthru)
1875  ret <vscale x 2 x double> %v
1876}
1877
1878declare <vscale x 4 x double> @llvm.masked.gather.nxv4f64.nxv4p0f64(<vscale x 4 x double*>, i32, <vscale x 4 x i1>, <vscale x 4 x double>)
1879
1880define <vscale x 4 x double> @mgather_nxv4f64(<vscale x 4 x double*> %ptrs, <vscale x 4 x i1> %m, <vscale x 4 x double> %passthru) {
1881; RV32-LABEL: mgather_nxv4f64:
1882; RV32:       # %bb.0:
1883; RV32-NEXT:    vsetvli a0, zero, e64, m4, ta, mu
1884; RV32-NEXT:    vluxei32.v v12, (zero), v8, v0.t
1885; RV32-NEXT:    vmv.v.v v8, v12
1886; RV32-NEXT:    ret
1887;
1888; RV64-LABEL: mgather_nxv4f64:
1889; RV64:       # %bb.0:
1890; RV64-NEXT:    vsetvli a0, zero, e64, m4, ta, mu
1891; RV64-NEXT:    vluxei64.v v12, (zero), v8, v0.t
1892; RV64-NEXT:    vmv.v.v v8, v12
1893; RV64-NEXT:    ret
1894  %v = call <vscale x 4 x double> @llvm.masked.gather.nxv4f64.nxv4p0f64(<vscale x 4 x double*> %ptrs, i32 8, <vscale x 4 x i1> %m, <vscale x 4 x double> %passthru)
1895  ret <vscale x 4 x double> %v
1896}
1897
1898define <vscale x 4 x double> @mgather_truemask_nxv4f64(<vscale x 4 x double*> %ptrs, <vscale x 4 x double> %passthru) {
1899; RV32-LABEL: mgather_truemask_nxv4f64:
1900; RV32:       # %bb.0:
1901; RV32-NEXT:    vsetvli a0, zero, e64, m4, ta, mu
1902; RV32-NEXT:    vluxei32.v v12, (zero), v8
1903; RV32-NEXT:    vmv.v.v v8, v12
1904; RV32-NEXT:    ret
1905;
1906; RV64-LABEL: mgather_truemask_nxv4f64:
1907; RV64:       # %bb.0:
1908; RV64-NEXT:    vsetvli a0, zero, e64, m4, ta, mu
1909; RV64-NEXT:    vluxei64.v v8, (zero), v8
1910; RV64-NEXT:    ret
1911  %mhead = insertelement <vscale x 4 x i1> poison, i1 1, i32 0
1912  %mtrue = shufflevector <vscale x 4 x i1> %mhead, <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer
1913  %v = call <vscale x 4 x double> @llvm.masked.gather.nxv4f64.nxv4p0f64(<vscale x 4 x double*> %ptrs, i32 8, <vscale x 4 x i1> %mtrue, <vscale x 4 x double> %passthru)
1914  ret <vscale x 4 x double> %v
1915}
1916
1917define <vscale x 4 x double> @mgather_falsemask_nxv4f64(<vscale x 4 x double*> %ptrs, <vscale x 4 x double> %passthru) {
1918; RV32-LABEL: mgather_falsemask_nxv4f64:
1919; RV32:       # %bb.0:
1920; RV32-NEXT:    vmv4r.v v8, v12
1921; RV32-NEXT:    ret
1922;
1923; RV64-LABEL: mgather_falsemask_nxv4f64:
1924; RV64:       # %bb.0:
1925; RV64-NEXT:    vmv4r.v v8, v12
1926; RV64-NEXT:    ret
1927  %v = call <vscale x 4 x double> @llvm.masked.gather.nxv4f64.nxv4p0f64(<vscale x 4 x double*> %ptrs, i32 8, <vscale x 4 x i1> zeroinitializer, <vscale x 4 x double> %passthru)
1928  ret <vscale x 4 x double> %v
1929}
1930
1931declare <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*>, i32, <vscale x 8 x i1>, <vscale x 8 x double>)
1932
1933define <vscale x 8 x double> @mgather_nxv8f64(<vscale x 8 x double*> %ptrs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {
1934; RV32-LABEL: mgather_nxv8f64:
1935; RV32:       # %bb.0:
1936; RV32-NEXT:    vsetvli a0, zero, e64, m8, ta, mu
1937; RV32-NEXT:    vluxei32.v v16, (zero), v8, v0.t
1938; RV32-NEXT:    vmv.v.v v8, v16
1939; RV32-NEXT:    ret
1940;
1941; RV64-LABEL: mgather_nxv8f64:
1942; RV64:       # %bb.0:
1943; RV64-NEXT:    vsetvli a0, zero, e64, m8, ta, mu
1944; RV64-NEXT:    vluxei64.v v16, (zero), v8, v0.t
1945; RV64-NEXT:    vmv.v.v v8, v16
1946; RV64-NEXT:    ret
1947  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)
1948  ret <vscale x 8 x double> %v
1949}
1950
1951define <vscale x 8 x double> @mgather_baseidx_nxv8i8_nxv8f64(double* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {
1952; RV32-LABEL: mgather_baseidx_nxv8i8_nxv8f64:
1953; RV32:       # %bb.0:
1954; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
1955; RV32-NEXT:    vsext.vf4 v12, v8
1956; RV32-NEXT:    vsll.vi v8, v12, 3
1957; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
1958; RV32-NEXT:    vluxei32.v v16, (a0), v8, v0.t
1959; RV32-NEXT:    vmv.v.v v8, v16
1960; RV32-NEXT:    ret
1961;
1962; RV64-LABEL: mgather_baseidx_nxv8i8_nxv8f64:
1963; RV64:       # %bb.0:
1964; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1965; RV64-NEXT:    vsext.vf8 v24, v8
1966; RV64-NEXT:    vsll.vi v8, v24, 3
1967; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t
1968; RV64-NEXT:    vmv.v.v v8, v16
1969; RV64-NEXT:    ret
1970  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i8> %idxs
1971  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)
1972  ret <vscale x 8 x double> %v
1973}
1974
1975define <vscale x 8 x double> @mgather_baseidx_sext_nxv8i8_nxv8f64(double* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {
1976; RV32-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f64:
1977; RV32:       # %bb.0:
1978; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1979; RV32-NEXT:    vsext.vf8 v24, v8
1980; RV32-NEXT:    vsll.vi v8, v24, 3
1981; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
1982; RV32-NEXT:    vnsrl.wx v24, v8, zero
1983; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
1984; RV32-NEXT:    vluxei32.v v16, (a0), v24, v0.t
1985; RV32-NEXT:    vmv.v.v v8, v16
1986; RV32-NEXT:    ret
1987;
1988; RV64-LABEL: mgather_baseidx_sext_nxv8i8_nxv8f64:
1989; RV64:       # %bb.0:
1990; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
1991; RV64-NEXT:    vsext.vf8 v24, v8
1992; RV64-NEXT:    vsll.vi v8, v24, 3
1993; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t
1994; RV64-NEXT:    vmv.v.v v8, v16
1995; RV64-NEXT:    ret
1996  %eidxs = sext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>
1997  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs
1998  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)
1999  ret <vscale x 8 x double> %v
2000}
2001
2002define <vscale x 8 x double> @mgather_baseidx_zext_nxv8i8_nxv8f64(double* %base, <vscale x 8 x i8> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {
2003; RV32-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f64:
2004; RV32:       # %bb.0:
2005; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
2006; RV32-NEXT:    vzext.vf8 v24, v8
2007; RV32-NEXT:    vsll.vi v8, v24, 3
2008; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
2009; RV32-NEXT:    vnsrl.wx v24, v8, zero
2010; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
2011; RV32-NEXT:    vluxei32.v v16, (a0), v24, v0.t
2012; RV32-NEXT:    vmv.v.v v8, v16
2013; RV32-NEXT:    ret
2014;
2015; RV64-LABEL: mgather_baseidx_zext_nxv8i8_nxv8f64:
2016; RV64:       # %bb.0:
2017; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
2018; RV64-NEXT:    vzext.vf8 v24, v8
2019; RV64-NEXT:    vsll.vi v8, v24, 3
2020; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t
2021; RV64-NEXT:    vmv.v.v v8, v16
2022; RV64-NEXT:    ret
2023  %eidxs = zext <vscale x 8 x i8> %idxs to <vscale x 8 x i64>
2024  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs
2025  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)
2026  ret <vscale x 8 x double> %v
2027}
2028
2029define <vscale x 8 x double> @mgather_baseidx_nxv8i16_nxv8f64(double* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {
2030; RV32-LABEL: mgather_baseidx_nxv8i16_nxv8f64:
2031; RV32:       # %bb.0:
2032; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
2033; RV32-NEXT:    vsext.vf2 v12, v8
2034; RV32-NEXT:    vsll.vi v8, v12, 3
2035; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
2036; RV32-NEXT:    vluxei32.v v16, (a0), v8, v0.t
2037; RV32-NEXT:    vmv.v.v v8, v16
2038; RV32-NEXT:    ret
2039;
2040; RV64-LABEL: mgather_baseidx_nxv8i16_nxv8f64:
2041; RV64:       # %bb.0:
2042; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
2043; RV64-NEXT:    vsext.vf4 v24, v8
2044; RV64-NEXT:    vsll.vi v8, v24, 3
2045; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t
2046; RV64-NEXT:    vmv.v.v v8, v16
2047; RV64-NEXT:    ret
2048  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i16> %idxs
2049  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)
2050  ret <vscale x 8 x double> %v
2051}
2052
2053define <vscale x 8 x double> @mgather_baseidx_sext_nxv8i16_nxv8f64(double* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {
2054; RV32-LABEL: mgather_baseidx_sext_nxv8i16_nxv8f64:
2055; RV32:       # %bb.0:
2056; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
2057; RV32-NEXT:    vsext.vf4 v24, v8
2058; RV32-NEXT:    vsll.vi v8, v24, 3
2059; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
2060; RV32-NEXT:    vnsrl.wx v24, v8, zero
2061; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
2062; RV32-NEXT:    vluxei32.v v16, (a0), v24, v0.t
2063; RV32-NEXT:    vmv.v.v v8, v16
2064; RV32-NEXT:    ret
2065;
2066; RV64-LABEL: mgather_baseidx_sext_nxv8i16_nxv8f64:
2067; RV64:       # %bb.0:
2068; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
2069; RV64-NEXT:    vsext.vf4 v24, v8
2070; RV64-NEXT:    vsll.vi v8, v24, 3
2071; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t
2072; RV64-NEXT:    vmv.v.v v8, v16
2073; RV64-NEXT:    ret
2074  %eidxs = sext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>
2075  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs
2076  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)
2077  ret <vscale x 8 x double> %v
2078}
2079
2080define <vscale x 8 x double> @mgather_baseidx_zext_nxv8i16_nxv8f64(double* %base, <vscale x 8 x i16> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {
2081; RV32-LABEL: mgather_baseidx_zext_nxv8i16_nxv8f64:
2082; RV32:       # %bb.0:
2083; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
2084; RV32-NEXT:    vzext.vf4 v24, v8
2085; RV32-NEXT:    vsll.vi v8, v24, 3
2086; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
2087; RV32-NEXT:    vnsrl.wx v24, v8, zero
2088; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
2089; RV32-NEXT:    vluxei32.v v16, (a0), v24, v0.t
2090; RV32-NEXT:    vmv.v.v v8, v16
2091; RV32-NEXT:    ret
2092;
2093; RV64-LABEL: mgather_baseidx_zext_nxv8i16_nxv8f64:
2094; RV64:       # %bb.0:
2095; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
2096; RV64-NEXT:    vzext.vf4 v24, v8
2097; RV64-NEXT:    vsll.vi v8, v24, 3
2098; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t
2099; RV64-NEXT:    vmv.v.v v8, v16
2100; RV64-NEXT:    ret
2101  %eidxs = zext <vscale x 8 x i16> %idxs to <vscale x 8 x i64>
2102  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs
2103  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)
2104  ret <vscale x 8 x double> %v
2105}
2106
2107define <vscale x 8 x double> @mgather_baseidx_nxv8i32_nxv8f64(double* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {
2108; RV32-LABEL: mgather_baseidx_nxv8i32_nxv8f64:
2109; RV32:       # %bb.0:
2110; RV32-NEXT:    vsetvli a1, zero, e32, m4, ta, mu
2111; RV32-NEXT:    vsll.vi v8, v8, 3
2112; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
2113; RV32-NEXT:    vluxei32.v v16, (a0), v8, v0.t
2114; RV32-NEXT:    vmv.v.v v8, v16
2115; RV32-NEXT:    ret
2116;
2117; RV64-LABEL: mgather_baseidx_nxv8i32_nxv8f64:
2118; RV64:       # %bb.0:
2119; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
2120; RV64-NEXT:    vsext.vf2 v24, v8
2121; RV64-NEXT:    vsll.vi v8, v24, 3
2122; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t
2123; RV64-NEXT:    vmv.v.v v8, v16
2124; RV64-NEXT:    ret
2125  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i32> %idxs
2126  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)
2127  ret <vscale x 8 x double> %v
2128}
2129
2130define <vscale x 8 x double> @mgather_baseidx_sext_nxv8i32_nxv8f64(double* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {
2131; RV32-LABEL: mgather_baseidx_sext_nxv8i32_nxv8f64:
2132; RV32:       # %bb.0:
2133; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
2134; RV32-NEXT:    vsext.vf2 v24, v8
2135; RV32-NEXT:    vsll.vi v8, v24, 3
2136; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
2137; RV32-NEXT:    vnsrl.wx v24, v8, zero
2138; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
2139; RV32-NEXT:    vluxei32.v v16, (a0), v24, v0.t
2140; RV32-NEXT:    vmv.v.v v8, v16
2141; RV32-NEXT:    ret
2142;
2143; RV64-LABEL: mgather_baseidx_sext_nxv8i32_nxv8f64:
2144; RV64:       # %bb.0:
2145; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
2146; RV64-NEXT:    vsext.vf2 v24, v8
2147; RV64-NEXT:    vsll.vi v8, v24, 3
2148; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t
2149; RV64-NEXT:    vmv.v.v v8, v16
2150; RV64-NEXT:    ret
2151  %eidxs = sext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>
2152  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs
2153  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)
2154  ret <vscale x 8 x double> %v
2155}
2156
2157define <vscale x 8 x double> @mgather_baseidx_zext_nxv8i32_nxv8f64(double* %base, <vscale x 8 x i32> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {
2158; RV32-LABEL: mgather_baseidx_zext_nxv8i32_nxv8f64:
2159; RV32:       # %bb.0:
2160; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
2161; RV32-NEXT:    vzext.vf2 v24, v8
2162; RV32-NEXT:    vsll.vi v8, v24, 3
2163; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
2164; RV32-NEXT:    vnsrl.wx v24, v8, zero
2165; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
2166; RV32-NEXT:    vluxei32.v v16, (a0), v24, v0.t
2167; RV32-NEXT:    vmv.v.v v8, v16
2168; RV32-NEXT:    ret
2169;
2170; RV64-LABEL: mgather_baseidx_zext_nxv8i32_nxv8f64:
2171; RV64:       # %bb.0:
2172; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
2173; RV64-NEXT:    vzext.vf2 v24, v8
2174; RV64-NEXT:    vsll.vi v8, v24, 3
2175; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t
2176; RV64-NEXT:    vmv.v.v v8, v16
2177; RV64-NEXT:    ret
2178  %eidxs = zext <vscale x 8 x i32> %idxs to <vscale x 8 x i64>
2179  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %eidxs
2180  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)
2181  ret <vscale x 8 x double> %v
2182}
2183
2184define <vscale x 8 x double> @mgather_baseidx_nxv8f64(double* %base, <vscale x 8 x i64> %idxs, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru) {
2185; RV32-LABEL: mgather_baseidx_nxv8f64:
2186; RV32:       # %bb.0:
2187; RV32-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
2188; RV32-NEXT:    vsll.vi v8, v8, 3
2189; RV32-NEXT:    vsetvli zero, zero, e32, m4, ta, mu
2190; RV32-NEXT:    vnsrl.wx v24, v8, zero
2191; RV32-NEXT:    vsetvli zero, zero, e64, m8, ta, mu
2192; RV32-NEXT:    vluxei32.v v16, (a0), v24, v0.t
2193; RV32-NEXT:    vmv.v.v v8, v16
2194; RV32-NEXT:    ret
2195;
2196; RV64-LABEL: mgather_baseidx_nxv8f64:
2197; RV64:       # %bb.0:
2198; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
2199; RV64-NEXT:    vsll.vi v8, v8, 3
2200; RV64-NEXT:    vluxei64.v v16, (a0), v8, v0.t
2201; RV64-NEXT:    vmv.v.v v8, v16
2202; RV64-NEXT:    ret
2203  %ptrs = getelementptr inbounds double, double* %base, <vscale x 8 x i64> %idxs
2204  %v = call <vscale x 8 x double> @llvm.masked.gather.nxv8f64.nxv8p0f64(<vscale x 8 x double*> %ptrs, i32 8, <vscale x 8 x i1> %m, <vscale x 8 x double> %passthru)
2205  ret <vscale x 8 x double> %v
2206}
2207
2208declare <vscale x 16 x i8> @llvm.masked.gather.nxv16i8.nxv16p0i8(<vscale x 16 x i8*>, i32, <vscale x 16 x i1>, <vscale x 16 x i8>)
2209
2210define <vscale x 16 x i8> @mgather_baseidx_nxv16i8(i8* %base, <vscale x 16 x i8> %idxs, <vscale x 16 x i1> %m, <vscale x 16 x i8> %passthru) {
2211; RV32-LABEL: mgather_baseidx_nxv16i8:
2212; RV32:       # %bb.0:
2213; RV32-NEXT:    vsetvli a1, zero, e32, m8, ta, mu
2214; RV32-NEXT:    vsext.vf4 v16, v8
2215; RV32-NEXT:    vsetvli zero, zero, e8, m2, ta, mu
2216; RV32-NEXT:    vluxei32.v v10, (a0), v16, v0.t
2217; RV32-NEXT:    vmv.v.v v8, v10
2218; RV32-NEXT:    ret
2219;
2220; RV64-LABEL: mgather_baseidx_nxv16i8:
2221; RV64:       # %bb.0:
2222; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
2223; RV64-NEXT:    vsext.vf8 v16, v8
2224; RV64-NEXT:    vsetvli zero, zero, e8, m1, ta, mu
2225; RV64-NEXT:    vluxei64.v v10, (a0), v16, v0.t
2226; RV64-NEXT:    csrr a1, vlenb
2227; RV64-NEXT:    srli a1, a1, 3
2228; RV64-NEXT:    vsetvli a2, zero, e8, mf4, ta, mu
2229; RV64-NEXT:    vslidedown.vx v0, v0, a1
2230; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
2231; RV64-NEXT:    vsext.vf8 v16, v9
2232; RV64-NEXT:    vsetvli zero, zero, e8, m1, ta, mu
2233; RV64-NEXT:    vluxei64.v v11, (a0), v16, v0.t
2234; RV64-NEXT:    vmv2r.v v8, v10
2235; RV64-NEXT:    ret
2236  %ptrs = getelementptr inbounds i8, i8* %base, <vscale x 16 x i8> %idxs
2237  %v = call <vscale x 16 x i8> @llvm.masked.gather.nxv16i8.nxv16p0i8(<vscale x 16 x i8*> %ptrs, i32 2, <vscale x 16 x i1> %m, <vscale x 16 x i8> %passthru)
2238  ret <vscale x 16 x i8> %v
2239}
2240
2241declare <vscale x 32 x i8> @llvm.masked.gather.nxv32i8.nxv32p0i8(<vscale x 32 x i8*>, i32, <vscale x 32 x i1>, <vscale x 32 x i8>)
2242
2243define <vscale x 32 x i8> @mgather_baseidx_nxv32i8(i8* %base, <vscale x 32 x i8> %idxs, <vscale x 32 x i1> %m, <vscale x 32 x i8> %passthru) {
2244; RV32-LABEL: mgather_baseidx_nxv32i8:
2245; RV32:       # %bb.0:
2246; RV32-NEXT:    vsetvli a1, zero, e32, m8, ta, mu
2247; RV32-NEXT:    vsext.vf4 v16, v8
2248; RV32-NEXT:    vsetvli zero, zero, e8, m2, ta, mu
2249; RV32-NEXT:    vluxei32.v v12, (a0), v16, v0.t
2250; RV32-NEXT:    csrr a1, vlenb
2251; RV32-NEXT:    srli a1, a1, 2
2252; RV32-NEXT:    vsetvli a2, zero, e8, mf2, ta, mu
2253; RV32-NEXT:    vslidedown.vx v0, v0, a1
2254; RV32-NEXT:    vsetvli a1, zero, e32, m8, ta, mu
2255; RV32-NEXT:    vsext.vf4 v16, v10
2256; RV32-NEXT:    vsetvli zero, zero, e8, m2, ta, mu
2257; RV32-NEXT:    vluxei32.v v14, (a0), v16, v0.t
2258; RV32-NEXT:    vmv4r.v v8, v12
2259; RV32-NEXT:    ret
2260;
2261; RV64-LABEL: mgather_baseidx_nxv32i8:
2262; RV64:       # %bb.0:
2263; RV64-NEXT:    vmv1r.v v16, v0
2264; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
2265; RV64-NEXT:    vsext.vf8 v24, v8
2266; RV64-NEXT:    vsetvli zero, zero, e8, m1, ta, mu
2267; RV64-NEXT:    vluxei64.v v12, (a0), v24, v0.t
2268; RV64-NEXT:    csrr a1, vlenb
2269; RV64-NEXT:    srli a2, a1, 3
2270; RV64-NEXT:    vsetvli a3, zero, e8, mf4, ta, mu
2271; RV64-NEXT:    vslidedown.vx v0, v0, a2
2272; RV64-NEXT:    vsetvli a3, zero, e64, m8, ta, mu
2273; RV64-NEXT:    vsext.vf8 v24, v9
2274; RV64-NEXT:    vsetvli zero, zero, e8, m1, ta, mu
2275; RV64-NEXT:    vluxei64.v v13, (a0), v24, v0.t
2276; RV64-NEXT:    srli a1, a1, 2
2277; RV64-NEXT:    vsetvli a3, zero, e8, mf2, ta, mu
2278; RV64-NEXT:    vslidedown.vx v0, v16, a1
2279; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
2280; RV64-NEXT:    vsext.vf8 v16, v10
2281; RV64-NEXT:    vsetvli zero, zero, e8, m1, ta, mu
2282; RV64-NEXT:    vluxei64.v v14, (a0), v16, v0.t
2283; RV64-NEXT:    vsetvli a1, zero, e8, mf4, ta, mu
2284; RV64-NEXT:    vslidedown.vx v0, v0, a2
2285; RV64-NEXT:    vsetvli a1, zero, e64, m8, ta, mu
2286; RV64-NEXT:    vsext.vf8 v16, v11
2287; RV64-NEXT:    vsetvli zero, zero, e8, m1, ta, mu
2288; RV64-NEXT:    vluxei64.v v15, (a0), v16, v0.t
2289; RV64-NEXT:    vmv4r.v v8, v12
2290; RV64-NEXT:    ret
2291  %ptrs = getelementptr inbounds i8, i8* %base, <vscale x 32 x i8> %idxs
2292  %v = call <vscale x 32 x i8> @llvm.masked.gather.nxv32i8.nxv32p0i8(<vscale x 32 x i8*> %ptrs, i32 2, <vscale x 32 x i1> %m, <vscale x 32 x i8> %passthru)
2293  ret <vscale x 32 x i8> %v
2294}
2295