1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv64 -mattr=+m,+experimental-v -verify-machineinstrs -riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=2 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX2
3; RUN: llc -mtriple=riscv64 -mattr=+m,+experimental-v -verify-machineinstrs -riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX1
4
5define <vscale x 8 x i32> @insert_nxv8i32_v2i32_0(<vscale x 8 x i32> %vec, <2 x i32>* %svp) {
6; CHECK-LABEL: insert_nxv8i32_v2i32_0:
7; CHECK:       # %bb.0:
8; CHECK-NEXT:    vsetivli a1, 2, e32,m1,ta,mu
9; CHECK-NEXT:    vle32.v v28, (a0)
10; CHECK-NEXT:    vsetivli a0, 2, e32,m4,tu,mu
11; CHECK-NEXT:    vslideup.vi v8, v28, 0
12; CHECK-NEXT:    ret
13  %sv = load <2 x i32>, <2 x i32>* %svp
14  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v2i32.nxv8i32(<vscale x 8 x i32> %vec, <2 x i32> %sv, i64 0)
15  ret <vscale x 8 x i32> %v
16}
17
18define <vscale x 8 x i32> @insert_nxv8i32_v2i32_2(<vscale x 8 x i32> %vec, <2 x i32>* %svp) {
19; CHECK-LABEL: insert_nxv8i32_v2i32_2:
20; CHECK:       # %bb.0:
21; CHECK-NEXT:    vsetivli a1, 2, e32,m1,ta,mu
22; CHECK-NEXT:    vle32.v v28, (a0)
23; CHECK-NEXT:    vsetivli a0, 4, e32,m4,tu,mu
24; CHECK-NEXT:    vslideup.vi v8, v28, 2
25; CHECK-NEXT:    ret
26  %sv = load <2 x i32>, <2 x i32>* %svp
27  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v2i32.nxv8i32(<vscale x 8 x i32> %vec, <2 x i32> %sv, i64 2)
28  ret <vscale x 8 x i32> %v
29}
30
31define <vscale x 8 x i32> @insert_nxv8i32_v2i32_6(<vscale x 8 x i32> %vec, <2 x i32>* %svp) {
32; CHECK-LABEL: insert_nxv8i32_v2i32_6:
33; CHECK:       # %bb.0:
34; CHECK-NEXT:    vsetivli a1, 2, e32,m1,ta,mu
35; CHECK-NEXT:    vle32.v v28, (a0)
36; CHECK-NEXT:    vsetivli a0, 8, e32,m4,tu,mu
37; CHECK-NEXT:    vslideup.vi v8, v28, 6
38; CHECK-NEXT:    ret
39  %sv = load <2 x i32>, <2 x i32>* %svp
40  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v2i32.nxv8i32(<vscale x 8 x i32> %vec, <2 x i32> %sv, i64 6)
41  ret <vscale x 8 x i32> %v
42}
43
44define <vscale x 8 x i32> @insert_nxv8i32_v8i32_0(<vscale x 8 x i32> %vec, <8 x i32>* %svp) {
45; LMULMAX2-LABEL: insert_nxv8i32_v8i32_0:
46; LMULMAX2:       # %bb.0:
47; LMULMAX2-NEXT:    vsetivli a1, 8, e32,m2,ta,mu
48; LMULMAX2-NEXT:    vle32.v v28, (a0)
49; LMULMAX2-NEXT:    vsetivli a0, 8, e32,m4,tu,mu
50; LMULMAX2-NEXT:    vslideup.vi v8, v28, 0
51; LMULMAX2-NEXT:    ret
52;
53; LMULMAX1-LABEL: insert_nxv8i32_v8i32_0:
54; LMULMAX1:       # %bb.0:
55; LMULMAX1-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
56; LMULMAX1-NEXT:    vle32.v v28, (a0)
57; LMULMAX1-NEXT:    addi a0, a0, 16
58; LMULMAX1-NEXT:    vle32.v v12, (a0)
59; LMULMAX1-NEXT:    vsetivli a0, 4, e32,m4,tu,mu
60; LMULMAX1-NEXT:    vslideup.vi v8, v28, 0
61; LMULMAX1-NEXT:    vsetivli a0, 8, e32,m4,tu,mu
62; LMULMAX1-NEXT:    vslideup.vi v8, v12, 4
63; LMULMAX1-NEXT:    ret
64  %sv = load <8 x i32>, <8 x i32>* %svp
65  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v8i32.nxv8i32(<vscale x 8 x i32> %vec, <8 x i32> %sv, i64 0)
66  ret <vscale x 8 x i32> %v
67}
68
69define <vscale x 8 x i32> @insert_nxv8i32_v8i32_4(<vscale x 8 x i32> %vec, <8 x i32>* %svp) {
70; LMULMAX2-LABEL: insert_nxv8i32_v8i32_4:
71; LMULMAX2:       # %bb.0:
72; LMULMAX2-NEXT:    vsetivli a1, 8, e32,m2,ta,mu
73; LMULMAX2-NEXT:    vle32.v v28, (a0)
74; LMULMAX2-NEXT:    vsetivli a0, 12, e32,m4,tu,mu
75; LMULMAX2-NEXT:    vslideup.vi v8, v28, 4
76; LMULMAX2-NEXT:    ret
77;
78; LMULMAX1-LABEL: insert_nxv8i32_v8i32_4:
79; LMULMAX1:       # %bb.0:
80; LMULMAX1-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
81; LMULMAX1-NEXT:    vle32.v v28, (a0)
82; LMULMAX1-NEXT:    addi a0, a0, 16
83; LMULMAX1-NEXT:    vle32.v v12, (a0)
84; LMULMAX1-NEXT:    vsetivli a0, 8, e32,m4,tu,mu
85; LMULMAX1-NEXT:    vslideup.vi v8, v28, 4
86; LMULMAX1-NEXT:    vsetivli a0, 12, e32,m4,tu,mu
87; LMULMAX1-NEXT:    vslideup.vi v8, v12, 8
88; LMULMAX1-NEXT:    ret
89  %sv = load <8 x i32>, <8 x i32>* %svp
90  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v8i32.nxv8i32(<vscale x 8 x i32> %vec, <8 x i32> %sv, i64 4)
91  ret <vscale x 8 x i32> %v
92}
93
94define <vscale x 8 x i32> @insert_nxv8i32_v8i32_8(<vscale x 8 x i32> %vec, <8 x i32>* %svp) {
95; LMULMAX2-LABEL: insert_nxv8i32_v8i32_8:
96; LMULMAX2:       # %bb.0:
97; LMULMAX2-NEXT:    vsetivli a1, 8, e32,m2,ta,mu
98; LMULMAX2-NEXT:    vle32.v v28, (a0)
99; LMULMAX2-NEXT:    vsetivli a0, 16, e32,m4,tu,mu
100; LMULMAX2-NEXT:    vslideup.vi v8, v28, 8
101; LMULMAX2-NEXT:    ret
102;
103; LMULMAX1-LABEL: insert_nxv8i32_v8i32_8:
104; LMULMAX1:       # %bb.0:
105; LMULMAX1-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
106; LMULMAX1-NEXT:    vle32.v v28, (a0)
107; LMULMAX1-NEXT:    addi a0, a0, 16
108; LMULMAX1-NEXT:    vle32.v v12, (a0)
109; LMULMAX1-NEXT:    vsetivli a0, 12, e32,m4,tu,mu
110; LMULMAX1-NEXT:    vslideup.vi v8, v28, 8
111; LMULMAX1-NEXT:    vsetivli a0, 16, e32,m4,tu,mu
112; LMULMAX1-NEXT:    vslideup.vi v8, v12, 12
113; LMULMAX1-NEXT:    ret
114  %sv = load <8 x i32>, <8 x i32>* %svp
115  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v8i32.nxv8i32(<vscale x 8 x i32> %vec, <8 x i32> %sv, i64 8)
116  ret <vscale x 8 x i32> %v
117}
118
119define <vscale x 8 x i32> @insert_nxv8i32_undef_v2i32_0(<2 x i32>* %svp) {
120; CHECK-LABEL: insert_nxv8i32_undef_v2i32_0:
121; CHECK:       # %bb.0:
122; CHECK-NEXT:    vsetivli a1, 2, e32,m1,ta,mu
123; CHECK-NEXT:    vle32.v v8, (a0)
124; CHECK-NEXT:    ret
125  %sv = load <2 x i32>, <2 x i32>* %svp
126  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v2i32.nxv8i32(<vscale x 8 x i32> undef, <2 x i32> %sv, i64 0)
127  ret <vscale x 8 x i32> %v
128}
129
130define void @insert_v4i32_v2i32_0(<4 x i32>* %vp, <2 x i32>* %svp) {
131; CHECK-LABEL: insert_v4i32_v2i32_0:
132; CHECK:       # %bb.0:
133; CHECK-NEXT:    vsetivli a2, 2, e32,m1,ta,mu
134; CHECK-NEXT:    vle32.v v25, (a1)
135; CHECK-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
136; CHECK-NEXT:    vle32.v v26, (a0)
137; CHECK-NEXT:    vsetivli a1, 2, e32,m1,tu,mu
138; CHECK-NEXT:    vslideup.vi v26, v25, 0
139; CHECK-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
140; CHECK-NEXT:    vse32.v v26, (a0)
141; CHECK-NEXT:    ret
142  %sv = load <2 x i32>, <2 x i32>* %svp
143  %vec = load <4 x i32>, <4 x i32>* %vp
144  %v = call <4 x i32> @llvm.experimental.vector.insert.v2i32.v4i32(<4 x i32> %vec, <2 x i32> %sv, i64 0)
145  store <4 x i32> %v, <4 x i32>* %vp
146  ret void
147}
148
149define void @insert_v4i32_v2i32_2(<4 x i32>* %vp, <2 x i32>* %svp) {
150; CHECK-LABEL: insert_v4i32_v2i32_2:
151; CHECK:       # %bb.0:
152; CHECK-NEXT:    vsetivli a2, 2, e32,m1,ta,mu
153; CHECK-NEXT:    vle32.v v25, (a1)
154; CHECK-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
155; CHECK-NEXT:    vle32.v v26, (a0)
156; CHECK-NEXT:    vsetivli a1, 4, e32,m1,tu,mu
157; CHECK-NEXT:    vslideup.vi v26, v25, 2
158; CHECK-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
159; CHECK-NEXT:    vse32.v v26, (a0)
160; CHECK-NEXT:    ret
161  %sv = load <2 x i32>, <2 x i32>* %svp
162  %vec = load <4 x i32>, <4 x i32>* %vp
163  %v = call <4 x i32> @llvm.experimental.vector.insert.v2i32.v4i32(<4 x i32> %vec, <2 x i32> %sv, i64 2)
164  store <4 x i32> %v, <4 x i32>* %vp
165  ret void
166}
167
168define void @insert_v4i32_undef_v2i32_0(<4 x i32>* %vp, <2 x i32>* %svp) {
169; CHECK-LABEL: insert_v4i32_undef_v2i32_0:
170; CHECK:       # %bb.0:
171; CHECK-NEXT:    vsetivli a2, 2, e32,m1,ta,mu
172; CHECK-NEXT:    vle32.v v25, (a1)
173; CHECK-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
174; CHECK-NEXT:    vmv.v.i v26, 0
175; CHECK-NEXT:    vsetivli a1, 2, e32,m1,tu,mu
176; CHECK-NEXT:    vslideup.vi v26, v25, 0
177; CHECK-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
178; CHECK-NEXT:    vse32.v v26, (a0)
179; CHECK-NEXT:    ret
180  %sv = load <2 x i32>, <2 x i32>* %svp
181  %v = call <4 x i32> @llvm.experimental.vector.insert.v2i32.v4i32(<4 x i32> undef, <2 x i32> %sv, i64 0)
182  store <4 x i32> %v, <4 x i32>* %vp
183  ret void
184}
185
186define void @insert_v8i32_v2i32_0(<8 x i32>* %vp, <2 x i32>* %svp) {
187; LMULMAX2-LABEL: insert_v8i32_v2i32_0:
188; LMULMAX2:       # %bb.0:
189; LMULMAX2-NEXT:    vsetivli a2, 2, e32,m1,ta,mu
190; LMULMAX2-NEXT:    vle32.v v26, (a1)
191; LMULMAX2-NEXT:    vsetivli a1, 8, e32,m2,ta,mu
192; LMULMAX2-NEXT:    vle32.v v28, (a0)
193; LMULMAX2-NEXT:    vsetivli a1, 2, e32,m2,tu,mu
194; LMULMAX2-NEXT:    vslideup.vi v28, v26, 0
195; LMULMAX2-NEXT:    vsetivli a1, 8, e32,m2,ta,mu
196; LMULMAX2-NEXT:    vse32.v v28, (a0)
197; LMULMAX2-NEXT:    ret
198;
199; LMULMAX1-LABEL: insert_v8i32_v2i32_0:
200; LMULMAX1:       # %bb.0:
201; LMULMAX1-NEXT:    vsetivli a2, 2, e32,m1,ta,mu
202; LMULMAX1-NEXT:    vle32.v v25, (a1)
203; LMULMAX1-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
204; LMULMAX1-NEXT:    vle32.v v26, (a0)
205; LMULMAX1-NEXT:    vsetivli a1, 2, e32,m1,tu,mu
206; LMULMAX1-NEXT:    vslideup.vi v26, v25, 0
207; LMULMAX1-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
208; LMULMAX1-NEXT:    vse32.v v26, (a0)
209; LMULMAX1-NEXT:    ret
210  %sv = load <2 x i32>, <2 x i32>* %svp
211  %vec = load <8 x i32>, <8 x i32>* %vp
212  %v = call <8 x i32> @llvm.experimental.vector.insert.v2i32.v8i32(<8 x i32> %vec, <2 x i32> %sv, i64 0)
213  store <8 x i32> %v, <8 x i32>* %vp
214  ret void
215}
216
217define void @insert_v8i32_v2i32_2(<8 x i32>* %vp, <2 x i32>* %svp) {
218; LMULMAX2-LABEL: insert_v8i32_v2i32_2:
219; LMULMAX2:       # %bb.0:
220; LMULMAX2-NEXT:    vsetivli a2, 2, e32,m1,ta,mu
221; LMULMAX2-NEXT:    vle32.v v26, (a1)
222; LMULMAX2-NEXT:    vsetivli a1, 8, e32,m2,ta,mu
223; LMULMAX2-NEXT:    vle32.v v28, (a0)
224; LMULMAX2-NEXT:    vsetivli a1, 4, e32,m2,tu,mu
225; LMULMAX2-NEXT:    vslideup.vi v28, v26, 2
226; LMULMAX2-NEXT:    vsetivli a1, 8, e32,m2,ta,mu
227; LMULMAX2-NEXT:    vse32.v v28, (a0)
228; LMULMAX2-NEXT:    ret
229;
230; LMULMAX1-LABEL: insert_v8i32_v2i32_2:
231; LMULMAX1:       # %bb.0:
232; LMULMAX1-NEXT:    vsetivli a2, 2, e32,m1,ta,mu
233; LMULMAX1-NEXT:    vle32.v v25, (a1)
234; LMULMAX1-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
235; LMULMAX1-NEXT:    vle32.v v26, (a0)
236; LMULMAX1-NEXT:    vsetivli a1, 4, e32,m1,tu,mu
237; LMULMAX1-NEXT:    vslideup.vi v26, v25, 2
238; LMULMAX1-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
239; LMULMAX1-NEXT:    vse32.v v26, (a0)
240; LMULMAX1-NEXT:    ret
241  %sv = load <2 x i32>, <2 x i32>* %svp
242  %vec = load <8 x i32>, <8 x i32>* %vp
243  %v = call <8 x i32> @llvm.experimental.vector.insert.v2i32.v8i32(<8 x i32> %vec, <2 x i32> %sv, i64 2)
244  store <8 x i32> %v, <8 x i32>* %vp
245  ret void
246}
247
248define void @insert_v8i32_v2i32_6(<8 x i32>* %vp, <2 x i32>* %svp) {
249; LMULMAX2-LABEL: insert_v8i32_v2i32_6:
250; LMULMAX2:       # %bb.0:
251; LMULMAX2-NEXT:    vsetivli a2, 2, e32,m1,ta,mu
252; LMULMAX2-NEXT:    vle32.v v26, (a1)
253; LMULMAX2-NEXT:    vsetivli a1, 8, e32,m2,ta,mu
254; LMULMAX2-NEXT:    vle32.v v28, (a0)
255; LMULMAX2-NEXT:    vsetivli a1, 8, e32,m2,tu,mu
256; LMULMAX2-NEXT:    vslideup.vi v28, v26, 6
257; LMULMAX2-NEXT:    vsetivli a1, 8, e32,m2,ta,mu
258; LMULMAX2-NEXT:    vse32.v v28, (a0)
259; LMULMAX2-NEXT:    ret
260;
261; LMULMAX1-LABEL: insert_v8i32_v2i32_6:
262; LMULMAX1:       # %bb.0:
263; LMULMAX1-NEXT:    vsetivli a2, 2, e32,m1,ta,mu
264; LMULMAX1-NEXT:    vle32.v v25, (a1)
265; LMULMAX1-NEXT:    addi a0, a0, 16
266; LMULMAX1-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
267; LMULMAX1-NEXT:    vle32.v v26, (a0)
268; LMULMAX1-NEXT:    vsetivli a1, 4, e32,m1,tu,mu
269; LMULMAX1-NEXT:    vslideup.vi v26, v25, 2
270; LMULMAX1-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
271; LMULMAX1-NEXT:    vse32.v v26, (a0)
272; LMULMAX1-NEXT:    ret
273  %sv = load <2 x i32>, <2 x i32>* %svp
274  %vec = load <8 x i32>, <8 x i32>* %vp
275  %v = call <8 x i32> @llvm.experimental.vector.insert.v2i32.v8i32(<8 x i32> %vec, <2 x i32> %sv, i64 6)
276  store <8 x i32> %v, <8 x i32>* %vp
277  ret void
278}
279
280define void @insert_v8i32_undef_v2i32_6(<8 x i32>* %vp, <2 x i32>* %svp) {
281; LMULMAX2-LABEL: insert_v8i32_undef_v2i32_6:
282; LMULMAX2:       # %bb.0:
283; LMULMAX2-NEXT:    vsetivli a2, 2, e32,m1,ta,mu
284; LMULMAX2-NEXT:    vle32.v v26, (a1)
285; LMULMAX2-NEXT:    vsetivli a1, 8, e32,m2,ta,mu
286; LMULMAX2-NEXT:    vslideup.vi v28, v26, 6
287; LMULMAX2-NEXT:    vse32.v v28, (a0)
288; LMULMAX2-NEXT:    ret
289;
290; LMULMAX1-LABEL: insert_v8i32_undef_v2i32_6:
291; LMULMAX1:       # %bb.0:
292; LMULMAX1-NEXT:    vsetivli a2, 2, e32,m1,ta,mu
293; LMULMAX1-NEXT:    vle32.v v25, (a1)
294; LMULMAX1-NEXT:    vsetivli a1, 4, e32,m1,ta,mu
295; LMULMAX1-NEXT:    vslideup.vi v26, v25, 2
296; LMULMAX1-NEXT:    addi a0, a0, 16
297; LMULMAX1-NEXT:    vse32.v v26, (a0)
298; LMULMAX1-NEXT:    ret
299  %sv = load <2 x i32>, <2 x i32>* %svp
300  %v = call <8 x i32> @llvm.experimental.vector.insert.v2i32.v8i32(<8 x i32> undef, <2 x i32> %sv, i64 6)
301  store <8 x i32> %v, <8 x i32>* %vp
302  ret void
303}
304
305define void @insert_v4i16_v2i16_0(<4 x i16>* %vp, <2 x i16>* %svp) {
306; CHECK-LABEL: insert_v4i16_v2i16_0:
307; CHECK:       # %bb.0:
308; CHECK-NEXT:    vsetivli a2, 4, e16,m1,ta,mu
309; CHECK-NEXT:    vle16.v v25, (a0)
310; CHECK-NEXT:    vsetivli a2, 2, e16,m1,ta,mu
311; CHECK-NEXT:    vle16.v v26, (a1)
312; CHECK-NEXT:    vsetivli a1, 2, e16,m1,tu,mu
313; CHECK-NEXT:    vslideup.vi v25, v26, 0
314; CHECK-NEXT:    vsetivli a1, 4, e16,m1,ta,mu
315; CHECK-NEXT:    vse16.v v25, (a0)
316; CHECK-NEXT:    ret
317  %v = load <4 x i16>, <4 x i16>* %vp
318  %sv = load <2 x i16>, <2 x i16>* %svp
319  %c = call <4 x i16> @llvm.experimental.vector.insert.v2i16.v4i16(<4 x i16> %v, <2 x i16> %sv, i64 0)
320  store <4 x i16> %c, <4 x i16>* %vp
321  ret void
322}
323
324define void @insert_v4i16_v2i16_2(<4 x i16>* %vp, <2 x i16>* %svp) {
325; CHECK-LABEL: insert_v4i16_v2i16_2:
326; CHECK:       # %bb.0:
327; CHECK-NEXT:    vsetivli a2, 4, e16,m1,ta,mu
328; CHECK-NEXT:    vle16.v v25, (a0)
329; CHECK-NEXT:    vsetivli a2, 2, e16,m1,ta,mu
330; CHECK-NEXT:    vle16.v v26, (a1)
331; CHECK-NEXT:    vsetivli a1, 4, e16,m1,tu,mu
332; CHECK-NEXT:    vslideup.vi v25, v26, 2
333; CHECK-NEXT:    vsetivli a1, 4, e16,m1,ta,mu
334; CHECK-NEXT:    vse16.v v25, (a0)
335; CHECK-NEXT:    ret
336  %v = load <4 x i16>, <4 x i16>* %vp
337  %sv = load <2 x i16>, <2 x i16>* %svp
338  %c = call <4 x i16> @llvm.experimental.vector.insert.v2i16.v4i16(<4 x i16> %v, <2 x i16> %sv, i64 2)
339  store <4 x i16> %c, <4 x i16>* %vp
340  ret void
341}
342
343define void @insert_v32i1_v8i1_0(<32 x i1>* %vp, <8 x i1>* %svp) {
344; LMULMAX2-LABEL: insert_v32i1_v8i1_0:
345; LMULMAX2:       # %bb.0:
346; LMULMAX2-NEXT:    addi a2, zero, 32
347; LMULMAX2-NEXT:    vsetvli a3, a2, e8,m2,ta,mu
348; LMULMAX2-NEXT:    vle1.v v25, (a0)
349; LMULMAX2-NEXT:    vsetivli a3, 8, e8,m1,ta,mu
350; LMULMAX2-NEXT:    vle1.v v26, (a1)
351; LMULMAX2-NEXT:    vsetivli a1, 1, e8,m1,tu,mu
352; LMULMAX2-NEXT:    vslideup.vi v25, v26, 0
353; LMULMAX2-NEXT:    vsetvli a1, a2, e8,m2,ta,mu
354; LMULMAX2-NEXT:    vse1.v v25, (a0)
355; LMULMAX2-NEXT:    ret
356;
357; LMULMAX1-LABEL: insert_v32i1_v8i1_0:
358; LMULMAX1:       # %bb.0:
359; LMULMAX1-NEXT:    vsetivli a2, 16, e8,m1,ta,mu
360; LMULMAX1-NEXT:    vle1.v v25, (a0)
361; LMULMAX1-NEXT:    vsetivli a2, 8, e8,m1,ta,mu
362; LMULMAX1-NEXT:    vle1.v v26, (a1)
363; LMULMAX1-NEXT:    vsetivli a1, 1, e8,m1,tu,mu
364; LMULMAX1-NEXT:    vslideup.vi v25, v26, 0
365; LMULMAX1-NEXT:    vsetivli a1, 16, e8,m1,ta,mu
366; LMULMAX1-NEXT:    vse1.v v25, (a0)
367; LMULMAX1-NEXT:    ret
368  %v = load <32 x i1>, <32 x i1>* %vp
369  %sv = load <8 x i1>, <8 x i1>* %svp
370  %c = call <32 x i1> @llvm.experimental.vector.insert.v8i1.v32i1(<32 x i1> %v, <8 x i1> %sv, i64 0)
371  store <32 x i1> %c, <32 x i1>* %vp
372  ret void
373}
374
375define void @insert_v32i1_v8i1_16(<32 x i1>* %vp, <8 x i1>* %svp) {
376; LMULMAX2-LABEL: insert_v32i1_v8i1_16:
377; LMULMAX2:       # %bb.0:
378; LMULMAX2-NEXT:    addi a2, zero, 32
379; LMULMAX2-NEXT:    vsetvli a3, a2, e8,m2,ta,mu
380; LMULMAX2-NEXT:    vle1.v v25, (a0)
381; LMULMAX2-NEXT:    vsetivli a3, 8, e8,m1,ta,mu
382; LMULMAX2-NEXT:    vle1.v v26, (a1)
383; LMULMAX2-NEXT:    vsetivli a1, 3, e8,m1,tu,mu
384; LMULMAX2-NEXT:    vslideup.vi v25, v26, 2
385; LMULMAX2-NEXT:    vsetvli a1, a2, e8,m2,ta,mu
386; LMULMAX2-NEXT:    vse1.v v25, (a0)
387; LMULMAX2-NEXT:    ret
388;
389; LMULMAX1-LABEL: insert_v32i1_v8i1_16:
390; LMULMAX1:       # %bb.0:
391; LMULMAX1-NEXT:    addi a0, a0, 2
392; LMULMAX1-NEXT:    vsetivli a2, 16, e8,m1,ta,mu
393; LMULMAX1-NEXT:    vle1.v v25, (a0)
394; LMULMAX1-NEXT:    vsetivli a2, 8, e8,m1,ta,mu
395; LMULMAX1-NEXT:    vle1.v v26, (a1)
396; LMULMAX1-NEXT:    vsetivli a1, 1, e8,m1,tu,mu
397; LMULMAX1-NEXT:    vslideup.vi v25, v26, 0
398; LMULMAX1-NEXT:    vsetivli a1, 16, e8,m1,ta,mu
399; LMULMAX1-NEXT:    vse1.v v25, (a0)
400; LMULMAX1-NEXT:    ret
401  %v = load <32 x i1>, <32 x i1>* %vp
402  %sv = load <8 x i1>, <8 x i1>* %svp
403  %c = call <32 x i1> @llvm.experimental.vector.insert.v8i1.v32i1(<32 x i1> %v, <8 x i1> %sv, i64 16)
404  store <32 x i1> %c, <32 x i1>* %vp
405  ret void
406}
407
408define void @insert_v8i1_v4i1_0(<8 x i1>* %vp, <4 x i1>* %svp) {
409; CHECK-LABEL: insert_v8i1_v4i1_0:
410; CHECK:       # %bb.0:
411; CHECK-NEXT:    vsetivli a2, 8, e8,m1,ta,mu
412; CHECK-NEXT:    vle1.v v27, (a0)
413; CHECK-NEXT:    vsetivli a2, 4, e8,m1,ta,mu
414; CHECK-NEXT:    vle1.v v0, (a1)
415; CHECK-NEXT:    vmv.v.i v25, 0
416; CHECK-NEXT:    vmerge.vim v25, v25, 1, v0
417; CHECK-NEXT:    vsetivli a1, 8, e8,m1,ta,mu
418; CHECK-NEXT:    vmv.v.i v26, 0
419; CHECK-NEXT:    vmv1r.v v0, v27
420; CHECK-NEXT:    vmerge.vim v26, v26, 1, v0
421; CHECK-NEXT:    vsetivli a1, 4, e8,m1,tu,mu
422; CHECK-NEXT:    vslideup.vi v26, v25, 0
423; CHECK-NEXT:    vsetivli a1, 8, e8,m1,ta,mu
424; CHECK-NEXT:    vmsne.vi v25, v26, 0
425; CHECK-NEXT:    vse1.v v25, (a0)
426; CHECK-NEXT:    ret
427  %v = load <8 x i1>, <8 x i1>* %vp
428  %sv = load <4 x i1>, <4 x i1>* %svp
429  %c = call <8 x i1> @llvm.experimental.vector.insert.v4i1.v8i1(<8 x i1> %v, <4 x i1> %sv, i64 0)
430  store <8 x i1> %c, <8 x i1>* %vp
431  ret void
432}
433
434define void @insert_v8i1_v4i1_4(<8 x i1>* %vp, <4 x i1>* %svp) {
435; CHECK-LABEL: insert_v8i1_v4i1_4:
436; CHECK:       # %bb.0:
437; CHECK-NEXT:    vsetivli a2, 8, e8,m1,ta,mu
438; CHECK-NEXT:    vle1.v v27, (a0)
439; CHECK-NEXT:    vsetivli a2, 4, e8,m1,ta,mu
440; CHECK-NEXT:    vle1.v v0, (a1)
441; CHECK-NEXT:    vmv.v.i v25, 0
442; CHECK-NEXT:    vmerge.vim v25, v25, 1, v0
443; CHECK-NEXT:    vsetivli a1, 8, e8,m1,ta,mu
444; CHECK-NEXT:    vmv.v.i v26, 0
445; CHECK-NEXT:    vmv1r.v v0, v27
446; CHECK-NEXT:    vmerge.vim v26, v26, 1, v0
447; CHECK-NEXT:    vsetivli a1, 8, e8,m1,tu,mu
448; CHECK-NEXT:    vslideup.vi v26, v25, 4
449; CHECK-NEXT:    vsetivli a1, 8, e8,m1,ta,mu
450; CHECK-NEXT:    vmsne.vi v25, v26, 0
451; CHECK-NEXT:    vse1.v v25, (a0)
452; CHECK-NEXT:    ret
453  %v = load <8 x i1>, <8 x i1>* %vp
454  %sv = load <4 x i1>, <4 x i1>* %svp
455  %c = call <8 x i1> @llvm.experimental.vector.insert.v4i1.v8i1(<8 x i1> %v, <4 x i1> %sv, i64 4)
456  store <8 x i1> %c, <8 x i1>* %vp
457  ret void
458}
459
460define <vscale x 2 x i16> @insert_nxv2i16_v2i16_0(<vscale x 2 x i16> %v, <2 x i16>* %svp) {
461; CHECK-LABEL: insert_nxv2i16_v2i16_0:
462; CHECK:       # %bb.0:
463; CHECK-NEXT:    vsetivli a1, 2, e16,m1,ta,mu
464; CHECK-NEXT:    vle16.v v25, (a0)
465; CHECK-NEXT:    vsetivli a0, 2, e16,mf2,tu,mu
466; CHECK-NEXT:    vslideup.vi v8, v25, 0
467; CHECK-NEXT:    ret
468  %sv = load <2 x i16>, <2 x i16>* %svp
469  %c = call <vscale x 2 x i16> @llvm.experimental.vector.insert.v2i16.nxv2i16(<vscale x 2 x i16> %v, <2 x i16> %sv, i64 0)
470  ret <vscale x 2 x i16> %c
471}
472
473define <vscale x 2 x i16> @insert_nxv2i16_v2i16_2(<vscale x 2 x i16> %v, <2 x i16>* %svp) {
474; CHECK-LABEL: insert_nxv2i16_v2i16_2:
475; CHECK:       # %bb.0:
476; CHECK-NEXT:    vsetivli a1, 2, e16,m1,ta,mu
477; CHECK-NEXT:    vle16.v v25, (a0)
478; CHECK-NEXT:    vsetivli a0, 6, e16,mf2,tu,mu
479; CHECK-NEXT:    vslideup.vi v8, v25, 4
480; CHECK-NEXT:    ret
481  %sv = load <2 x i16>, <2 x i16>* %svp
482  %c = call <vscale x 2 x i16> @llvm.experimental.vector.insert.v2i16.nxv2i16(<vscale x 2 x i16> %v, <2 x i16> %sv, i64 4)
483  ret <vscale x 2 x i16> %c
484}
485
486define <vscale x 2 x i1> @insert_nxv2i1_v4i1_0(<vscale x 2 x i1> %v, <4 x i1>* %svp) {
487; CHECK-LABEL: insert_nxv2i1_v4i1_0:
488; CHECK:       # %bb.0:
489; CHECK-NEXT:    vsetivli a1, 4, e8,m1,ta,mu
490; CHECK-NEXT:    vle1.v v27, (a0)
491; CHECK-NEXT:    vsetvli a0, zero, e8,mf4,ta,mu
492; CHECK-NEXT:    vmv.v.i v25, 0
493; CHECK-NEXT:    vmerge.vim v25, v25, 1, v0
494; CHECK-NEXT:    vsetivli a0, 4, e8,m1,ta,mu
495; CHECK-NEXT:    vmv.v.i v26, 0
496; CHECK-NEXT:    vmv1r.v v0, v27
497; CHECK-NEXT:    vmerge.vim v26, v26, 1, v0
498; CHECK-NEXT:    vsetivli a0, 4, e8,mf4,tu,mu
499; CHECK-NEXT:    vslideup.vi v25, v26, 0
500; CHECK-NEXT:    vsetvli a0, zero, e8,mf4,ta,mu
501; CHECK-NEXT:    vmsne.vi v0, v25, 0
502; CHECK-NEXT:    ret
503  %sv = load <4 x i1>, <4 x i1>* %svp
504  %c = call <vscale x 2 x i1> @llvm.experimental.vector.insert.v4i1.nxv2i1(<vscale x 2 x i1> %v, <4 x i1> %sv, i64 0)
505  ret <vscale x 2 x i1> %c
506}
507
508define <vscale x 2 x i1> @insert_nxv2i1_v4i1_6(<vscale x 2 x i1> %v, <4 x i1>* %svp) {
509; CHECK-LABEL: insert_nxv2i1_v4i1_6:
510; CHECK:       # %bb.0:
511; CHECK-NEXT:    vsetivli a1, 4, e8,m1,ta,mu
512; CHECK-NEXT:    vle1.v v27, (a0)
513; CHECK-NEXT:    vsetvli a0, zero, e8,mf4,ta,mu
514; CHECK-NEXT:    vmv.v.i v25, 0
515; CHECK-NEXT:    vmerge.vim v25, v25, 1, v0
516; CHECK-NEXT:    vsetivli a0, 4, e8,m1,ta,mu
517; CHECK-NEXT:    vmv.v.i v26, 0
518; CHECK-NEXT:    vmv1r.v v0, v27
519; CHECK-NEXT:    vmerge.vim v26, v26, 1, v0
520; CHECK-NEXT:    vsetivli a0, 10, e8,mf4,tu,mu
521; CHECK-NEXT:    vslideup.vi v25, v26, 6
522; CHECK-NEXT:    vsetvli a0, zero, e8,mf4,ta,mu
523; CHECK-NEXT:    vmsne.vi v0, v25, 0
524; CHECK-NEXT:    ret
525  %sv = load <4 x i1>, <4 x i1>* %svp
526  %c = call <vscale x 2 x i1> @llvm.experimental.vector.insert.v4i1.nxv2i1(<vscale x 2 x i1> %v, <4 x i1> %sv, i64 6)
527  ret <vscale x 2 x i1> %c
528}
529
530define <vscale x 8 x i1> @insert_nxv8i1_v4i1_0(<vscale x 8 x i1> %v, <8 x i1>* %svp) {
531; CHECK-LABEL: insert_nxv8i1_v4i1_0:
532; CHECK:       # %bb.0:
533; CHECK-NEXT:    vsetivli a1, 8, e8,m1,ta,mu
534; CHECK-NEXT:    vle1.v v25, (a0)
535; CHECK-NEXT:    vsetivli a0, 1, e8,mf8,tu,mu
536; CHECK-NEXT:    vslideup.vi v0, v25, 0
537; CHECK-NEXT:    ret
538  %sv = load <8 x i1>, <8 x i1>* %svp
539  %c = call <vscale x 8 x i1> @llvm.experimental.vector.insert.v8i1.nxv8i1(<vscale x 8 x i1> %v, <8 x i1> %sv, i64 0)
540  ret <vscale x 8 x i1> %c
541}
542
543define <vscale x 8 x i1> @insert_nxv8i1_v8i1_16(<vscale x 8 x i1> %v, <8 x i1>* %svp) {
544; CHECK-LABEL: insert_nxv8i1_v8i1_16:
545; CHECK:       # %bb.0:
546; CHECK-NEXT:    vsetivli a1, 8, e8,m1,ta,mu
547; CHECK-NEXT:    vle1.v v25, (a0)
548; CHECK-NEXT:    vsetivli a0, 3, e8,mf8,tu,mu
549; CHECK-NEXT:    vslideup.vi v0, v25, 2
550; CHECK-NEXT:    ret
551  %sv = load <8 x i1>, <8 x i1>* %svp
552  %c = call <vscale x 8 x i1> @llvm.experimental.vector.insert.v8i1.nxv8i1(<vscale x 8 x i1> %v, <8 x i1> %sv, i64 16)
553  ret <vscale x 8 x i1> %c
554}
555
556declare <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64>, <2 x i64>, i64)
557
558define void @insert_v2i64_nxv16i64(<2 x i64>* %psv0, <2 x i64>* %psv1, <vscale x 16 x i64>* %out) {
559; CHECK-LABEL: insert_v2i64_nxv16i64:
560; CHECK:       # %bb.0:
561; CHECK-NEXT:    vsetivli a3, 2, e64,m1,ta,mu
562; CHECK-NEXT:    vle64.v v8, (a0)
563; CHECK-NEXT:    vle64.v v16, (a1)
564; CHECK-NEXT:    vsetivli a0, 6, e64,m8,tu,mu
565; CHECK-NEXT:    vslideup.vi v8, v16, 4
566; CHECK-NEXT:    vs8r.v v8, (a2)
567; CHECK-NEXT:    ret
568  %sv0 = load <2 x i64>, <2 x i64>* %psv0
569  %sv1 = load <2 x i64>, <2 x i64>* %psv1
570  %v0 = call <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64> undef, <2 x i64> %sv0, i64 0)
571  %v = call <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64> %v0, <2 x i64> %sv1, i64 4)
572  store <vscale x 16 x i64> %v, <vscale x 16 x i64>* %out
573  ret void
574}
575
576define void @insert_v2i64_nxv16i64_lo0(<2 x i64>* %psv, <vscale x 16 x i64>* %out) {
577; CHECK-LABEL: insert_v2i64_nxv16i64_lo0:
578; CHECK:       # %bb.0:
579; CHECK-NEXT:    vsetivli a2, 2, e64,m1,ta,mu
580; CHECK-NEXT:    vle64.v v8, (a0)
581; CHECK-NEXT:    vs8r.v v8, (a1)
582; CHECK-NEXT:    ret
583  %sv = load <2 x i64>, <2 x i64>* %psv
584  %v = call <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64> undef, <2 x i64> %sv, i64 0)
585  store <vscale x 16 x i64> %v, <vscale x 16 x i64>* %out
586  ret void
587}
588
589define void @insert_v2i64_nxv16i64_lo2(<2 x i64>* %psv, <vscale x 16 x i64>* %out) {
590; CHECK-LABEL: insert_v2i64_nxv16i64_lo2:
591; CHECK:       # %bb.0:
592; CHECK-NEXT:    vsetivli a2, 2, e64,m1,ta,mu
593; CHECK-NEXT:    vle64.v v8, (a0)
594; CHECK-NEXT:    vsetivli a0, 4, e64,m8,ta,mu
595; CHECK-NEXT:    vslideup.vi v16, v8, 2
596; CHECK-NEXT:    vs8r.v v16, (a1)
597; CHECK-NEXT:    ret
598  %sv = load <2 x i64>, <2 x i64>* %psv
599  %v = call <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64> undef, <2 x i64> %sv, i64 2)
600  store <vscale x 16 x i64> %v, <vscale x 16 x i64>* %out
601  ret void
602}
603
604; Check we don't mistakenly optimize this: we don't know whether this is
605; inserted into the low or high split vector.
606define void @insert_v2i64_nxv16i64_hi(<2 x i64>* %psv, <vscale x 16 x i64>* %out) {
607; CHECK-LABEL: insert_v2i64_nxv16i64_hi:
608; CHECK:       # %bb.0:
609; CHECK-NEXT:    addi sp, sp, -16
610; CHECK-NEXT:    .cfi_def_cfa_offset 16
611; CHECK-NEXT:    csrr a2, vlenb
612; CHECK-NEXT:    slli a2, a2, 4
613; CHECK-NEXT:    sub sp, sp, a2
614; CHECK-NEXT:    vsetivli a2, 2, e64,m1,ta,mu
615; CHECK-NEXT:    vle64.v v25, (a0)
616; CHECK-NEXT:    csrr a0, vlenb
617; CHECK-NEXT:    srli a0, a0, 3
618; CHECK-NEXT:    slli a2, a0, 4
619; CHECK-NEXT:    addi a2, a2, -1
620; CHECK-NEXT:    addi a3, zero, 8
621; CHECK-NEXT:    bltu a2, a3, .LBB29_2
622; CHECK-NEXT:  # %bb.1:
623; CHECK-NEXT:    addi a2, zero, 8
624; CHECK-NEXT:  .LBB29_2:
625; CHECK-NEXT:    slli a2, a2, 3
626; CHECK-NEXT:    addi a3, sp, 16
627; CHECK-NEXT:    add a2, a3, a2
628; CHECK-NEXT:    vsetivli a4, 2, e64,m1,ta,mu
629; CHECK-NEXT:    vse64.v v25, (a2)
630; CHECK-NEXT:    slli a0, a0, 6
631; CHECK-NEXT:    add a2, a3, a0
632; CHECK-NEXT:    vl8re64.v v8, (a2)
633; CHECK-NEXT:    addi a2, sp, 16
634; CHECK-NEXT:    vl8re64.v v16, (a2)
635; CHECK-NEXT:    add a0, a1, a0
636; CHECK-NEXT:    vs8r.v v8, (a0)
637; CHECK-NEXT:    vs8r.v v16, (a1)
638; CHECK-NEXT:    csrr a0, vlenb
639; CHECK-NEXT:    slli a0, a0, 4
640; CHECK-NEXT:    add sp, sp, a0
641; CHECK-NEXT:    addi sp, sp, 16
642; CHECK-NEXT:    ret
643  %sv = load <2 x i64>, <2 x i64>* %psv
644  %v = call <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64> undef, <2 x i64> %sv, i64 8)
645  store <vscale x 16 x i64> %v, <vscale x 16 x i64>* %out
646  ret void
647}
648
649declare <8 x i1> @llvm.experimental.vector.insert.v4i1.v8i1(<8 x i1>, <4 x i1>, i64)
650declare <32 x i1> @llvm.experimental.vector.insert.v8i1.v32i1(<32 x i1>, <8 x i1>, i64)
651
652declare <4 x i16> @llvm.experimental.vector.insert.v2i16.v4i16(<4 x i16>, <2 x i16>, i64)
653
654declare <4 x i32> @llvm.experimental.vector.insert.v2i32.v4i32(<4 x i32>, <2 x i32>, i64)
655declare <8 x i32> @llvm.experimental.vector.insert.v2i32.v8i32(<8 x i32>, <2 x i32>, i64)
656
657declare <vscale x 2 x i1> @llvm.experimental.vector.insert.v4i1.nxv2i1(<vscale x 2 x i1>, <4 x i1>, i64)
658declare <vscale x 8 x i1> @llvm.experimental.vector.insert.v8i1.nxv8i1(<vscale x 8 x i1>, <8 x i1>, i64)
659
660declare <vscale x 2 x i16> @llvm.experimental.vector.insert.v2i16.nxv2i16(<vscale x 2 x i16>, <2 x i16>, i64)
661
662declare <vscale x 8 x i32> @llvm.experimental.vector.insert.v2i32.nxv8i32(<vscale x 8 x i32>, <2 x i32>, i64)
663declare <vscale x 8 x i32> @llvm.experimental.vector.insert.v4i32.nxv8i32(<vscale x 8 x i32>, <4 x i32>, i64)
664declare <vscale x 8 x i32> @llvm.experimental.vector.insert.v8i32.nxv8i32(<vscale x 8 x i32>, <8 x i32>, i64)
665