1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+m,+v --riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=2 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX2
3; RUN: llc -mtriple=riscv32 -mattr=+m,+v --riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX1
4; RUN: llc -mtriple=riscv64 -mattr=+m,+v --riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=2 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX2
5; RUN: llc -mtriple=riscv64 -mattr=+m,+v --riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX1
6
7; RUN: llc -mtriple=riscv32 -mattr=+m,+v --riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=2 -early-live-intervals -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX2
8; RUN: llc -mtriple=riscv32 -mattr=+m,+v --riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=1 -early-live-intervals -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX1
9; RUN: llc -mtriple=riscv64 -mattr=+m,+v --riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=2 -early-live-intervals -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX2
10; RUN: llc -mtriple=riscv64 -mattr=+m,+v --riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=1 -early-live-intervals -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX1
11
12define <vscale x 8 x i32> @insert_nxv8i32_v2i32_0(<vscale x 8 x i32> %vec, <2 x i32>* %svp) {
13; CHECK-LABEL: insert_nxv8i32_v2i32_0:
14; CHECK:       # %bb.0:
15; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
16; CHECK-NEXT:    vle32.v v12, (a0)
17; CHECK-NEXT:    vsetivli zero, 2, e32, m4, ta, mu
18; CHECK-NEXT:    vslideup.vi v8, v12, 0
19; CHECK-NEXT:    ret
20  %sv = load <2 x i32>, <2 x i32>* %svp
21  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v2i32.nxv8i32(<vscale x 8 x i32> %vec, <2 x i32> %sv, i64 0)
22  ret <vscale x 8 x i32> %v
23}
24
25define <vscale x 8 x i32> @insert_nxv8i32_v2i32_2(<vscale x 8 x i32> %vec, <2 x i32>* %svp) {
26; CHECK-LABEL: insert_nxv8i32_v2i32_2:
27; CHECK:       # %bb.0:
28; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
29; CHECK-NEXT:    vle32.v v12, (a0)
30; CHECK-NEXT:    vsetivli zero, 4, e32, m4, ta, mu
31; CHECK-NEXT:    vslideup.vi v8, v12, 2
32; CHECK-NEXT:    ret
33  %sv = load <2 x i32>, <2 x i32>* %svp
34  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v2i32.nxv8i32(<vscale x 8 x i32> %vec, <2 x i32> %sv, i64 2)
35  ret <vscale x 8 x i32> %v
36}
37
38define <vscale x 8 x i32> @insert_nxv8i32_v2i32_6(<vscale x 8 x i32> %vec, <2 x i32>* %svp) {
39; CHECK-LABEL: insert_nxv8i32_v2i32_6:
40; CHECK:       # %bb.0:
41; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
42; CHECK-NEXT:    vle32.v v12, (a0)
43; CHECK-NEXT:    vsetivli zero, 8, e32, m4, ta, mu
44; CHECK-NEXT:    vslideup.vi v8, v12, 6
45; CHECK-NEXT:    ret
46  %sv = load <2 x i32>, <2 x i32>* %svp
47  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v2i32.nxv8i32(<vscale x 8 x i32> %vec, <2 x i32> %sv, i64 6)
48  ret <vscale x 8 x i32> %v
49}
50
51define <vscale x 8 x i32> @insert_nxv8i32_v8i32_0(<vscale x 8 x i32> %vec, <8 x i32>* %svp) {
52; LMULMAX2-LABEL: insert_nxv8i32_v8i32_0:
53; LMULMAX2:       # %bb.0:
54; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
55; LMULMAX2-NEXT:    vle32.v v12, (a0)
56; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m4, ta, mu
57; LMULMAX2-NEXT:    vslideup.vi v8, v12, 0
58; LMULMAX2-NEXT:    ret
59;
60; LMULMAX1-LABEL: insert_nxv8i32_v8i32_0:
61; LMULMAX1:       # %bb.0:
62; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
63; LMULMAX1-NEXT:    vle32.v v12, (a0)
64; LMULMAX1-NEXT:    addi a0, a0, 16
65; LMULMAX1-NEXT:    vle32.v v16, (a0)
66; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m4, ta, mu
67; LMULMAX1-NEXT:    vslideup.vi v8, v12, 0
68; LMULMAX1-NEXT:    vsetivli zero, 8, e32, m4, ta, mu
69; LMULMAX1-NEXT:    vslideup.vi v8, v16, 4
70; LMULMAX1-NEXT:    ret
71  %sv = load <8 x i32>, <8 x i32>* %svp
72  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v8i32.nxv8i32(<vscale x 8 x i32> %vec, <8 x i32> %sv, i64 0)
73  ret <vscale x 8 x i32> %v
74}
75
76define <vscale x 8 x i32> @insert_nxv8i32_v8i32_8(<vscale x 8 x i32> %vec, <8 x i32>* %svp) {
77; LMULMAX2-LABEL: insert_nxv8i32_v8i32_8:
78; LMULMAX2:       # %bb.0:
79; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
80; LMULMAX2-NEXT:    vle32.v v12, (a0)
81; LMULMAX2-NEXT:    vsetivli zero, 16, e32, m4, ta, mu
82; LMULMAX2-NEXT:    vslideup.vi v8, v12, 8
83; LMULMAX2-NEXT:    ret
84;
85; LMULMAX1-LABEL: insert_nxv8i32_v8i32_8:
86; LMULMAX1:       # %bb.0:
87; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
88; LMULMAX1-NEXT:    vle32.v v12, (a0)
89; LMULMAX1-NEXT:    addi a0, a0, 16
90; LMULMAX1-NEXT:    vle32.v v16, (a0)
91; LMULMAX1-NEXT:    vsetivli zero, 12, e32, m4, ta, mu
92; LMULMAX1-NEXT:    vslideup.vi v8, v12, 8
93; LMULMAX1-NEXT:    vsetivli zero, 16, e32, m4, ta, mu
94; LMULMAX1-NEXT:    vslideup.vi v8, v16, 12
95; LMULMAX1-NEXT:    ret
96  %sv = load <8 x i32>, <8 x i32>* %svp
97  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v8i32.nxv8i32(<vscale x 8 x i32> %vec, <8 x i32> %sv, i64 8)
98  ret <vscale x 8 x i32> %v
99}
100
101define <vscale x 8 x i32> @insert_nxv8i32_undef_v2i32_0(<2 x i32>* %svp) {
102; CHECK-LABEL: insert_nxv8i32_undef_v2i32_0:
103; CHECK:       # %bb.0:
104; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
105; CHECK-NEXT:    vle32.v v8, (a0)
106; CHECK-NEXT:    ret
107  %sv = load <2 x i32>, <2 x i32>* %svp
108  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v2i32.nxv8i32(<vscale x 8 x i32> undef, <2 x i32> %sv, i64 0)
109  ret <vscale x 8 x i32> %v
110}
111
112define void @insert_v4i32_v2i32_0(<4 x i32>* %vp, <2 x i32>* %svp) {
113; CHECK-LABEL: insert_v4i32_v2i32_0:
114; CHECK:       # %bb.0:
115; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
116; CHECK-NEXT:    vle32.v v8, (a1)
117; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
118; CHECK-NEXT:    vle32.v v9, (a0)
119; CHECK-NEXT:    vsetivli zero, 2, e32, m1, ta, mu
120; CHECK-NEXT:    vslideup.vi v9, v8, 0
121; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
122; CHECK-NEXT:    vse32.v v9, (a0)
123; CHECK-NEXT:    ret
124  %sv = load <2 x i32>, <2 x i32>* %svp
125  %vec = load <4 x i32>, <4 x i32>* %vp
126  %v = call <4 x i32> @llvm.experimental.vector.insert.v2i32.v4i32(<4 x i32> %vec, <2 x i32> %sv, i64 0)
127  store <4 x i32> %v, <4 x i32>* %vp
128  ret void
129}
130
131define void @insert_v4i32_v2i32_2(<4 x i32>* %vp, <2 x i32>* %svp) {
132; CHECK-LABEL: insert_v4i32_v2i32_2:
133; CHECK:       # %bb.0:
134; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
135; CHECK-NEXT:    vle32.v v8, (a1)
136; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
137; CHECK-NEXT:    vle32.v v9, (a0)
138; CHECK-NEXT:    vslideup.vi v9, v8, 2
139; CHECK-NEXT:    vse32.v v9, (a0)
140; CHECK-NEXT:    ret
141  %sv = load <2 x i32>, <2 x i32>* %svp
142  %vec = load <4 x i32>, <4 x i32>* %vp
143  %v = call <4 x i32> @llvm.experimental.vector.insert.v2i32.v4i32(<4 x i32> %vec, <2 x i32> %sv, i64 2)
144  store <4 x i32> %v, <4 x i32>* %vp
145  ret void
146}
147
148define void @insert_v4i32_undef_v2i32_0(<4 x i32>* %vp, <2 x i32>* %svp) {
149; CHECK-LABEL: insert_v4i32_undef_v2i32_0:
150; CHECK:       # %bb.0:
151; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
152; CHECK-NEXT:    vle32.v v8, (a1)
153; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
154; CHECK-NEXT:    vse32.v v8, (a0)
155; CHECK-NEXT:    ret
156  %sv = load <2 x i32>, <2 x i32>* %svp
157  %v = call <4 x i32> @llvm.experimental.vector.insert.v2i32.v4i32(<4 x i32> undef, <2 x i32> %sv, i64 0)
158  store <4 x i32> %v, <4 x i32>* %vp
159  ret void
160}
161
162define void @insert_v8i32_v2i32_0(<8 x i32>* %vp, <2 x i32>* %svp) {
163; LMULMAX2-LABEL: insert_v8i32_v2i32_0:
164; LMULMAX2:       # %bb.0:
165; LMULMAX2-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
166; LMULMAX2-NEXT:    vle32.v v8, (a1)
167; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
168; LMULMAX2-NEXT:    vle32.v v10, (a0)
169; LMULMAX2-NEXT:    vsetivli zero, 2, e32, m2, ta, mu
170; LMULMAX2-NEXT:    vslideup.vi v10, v8, 0
171; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
172; LMULMAX2-NEXT:    vse32.v v10, (a0)
173; LMULMAX2-NEXT:    ret
174;
175; LMULMAX1-LABEL: insert_v8i32_v2i32_0:
176; LMULMAX1:       # %bb.0:
177; LMULMAX1-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
178; LMULMAX1-NEXT:    vle32.v v8, (a1)
179; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
180; LMULMAX1-NEXT:    vle32.v v9, (a0)
181; LMULMAX1-NEXT:    vsetivli zero, 2, e32, m1, ta, mu
182; LMULMAX1-NEXT:    vslideup.vi v9, v8, 0
183; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
184; LMULMAX1-NEXT:    vse32.v v9, (a0)
185; LMULMAX1-NEXT:    ret
186  %sv = load <2 x i32>, <2 x i32>* %svp
187  %vec = load <8 x i32>, <8 x i32>* %vp
188  %v = call <8 x i32> @llvm.experimental.vector.insert.v2i32.v8i32(<8 x i32> %vec, <2 x i32> %sv, i64 0)
189  store <8 x i32> %v, <8 x i32>* %vp
190  ret void
191}
192
193define void @insert_v8i32_v2i32_2(<8 x i32>* %vp, <2 x i32>* %svp) {
194; LMULMAX2-LABEL: insert_v8i32_v2i32_2:
195; LMULMAX2:       # %bb.0:
196; LMULMAX2-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
197; LMULMAX2-NEXT:    vle32.v v8, (a1)
198; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
199; LMULMAX2-NEXT:    vle32.v v10, (a0)
200; LMULMAX2-NEXT:    vsetivli zero, 4, e32, m2, ta, mu
201; LMULMAX2-NEXT:    vslideup.vi v10, v8, 2
202; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
203; LMULMAX2-NEXT:    vse32.v v10, (a0)
204; LMULMAX2-NEXT:    ret
205;
206; LMULMAX1-LABEL: insert_v8i32_v2i32_2:
207; LMULMAX1:       # %bb.0:
208; LMULMAX1-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
209; LMULMAX1-NEXT:    vle32.v v8, (a1)
210; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
211; LMULMAX1-NEXT:    vle32.v v9, (a0)
212; LMULMAX1-NEXT:    vslideup.vi v9, v8, 2
213; LMULMAX1-NEXT:    vse32.v v9, (a0)
214; LMULMAX1-NEXT:    ret
215  %sv = load <2 x i32>, <2 x i32>* %svp
216  %vec = load <8 x i32>, <8 x i32>* %vp
217  %v = call <8 x i32> @llvm.experimental.vector.insert.v2i32.v8i32(<8 x i32> %vec, <2 x i32> %sv, i64 2)
218  store <8 x i32> %v, <8 x i32>* %vp
219  ret void
220}
221
222define void @insert_v8i32_v2i32_6(<8 x i32>* %vp, <2 x i32>* %svp) {
223; LMULMAX2-LABEL: insert_v8i32_v2i32_6:
224; LMULMAX2:       # %bb.0:
225; LMULMAX2-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
226; LMULMAX2-NEXT:    vle32.v v8, (a1)
227; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
228; LMULMAX2-NEXT:    vle32.v v10, (a0)
229; LMULMAX2-NEXT:    vslideup.vi v10, v8, 6
230; LMULMAX2-NEXT:    vse32.v v10, (a0)
231; LMULMAX2-NEXT:    ret
232;
233; LMULMAX1-LABEL: insert_v8i32_v2i32_6:
234; LMULMAX1:       # %bb.0:
235; LMULMAX1-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
236; LMULMAX1-NEXT:    vle32.v v8, (a1)
237; LMULMAX1-NEXT:    addi a0, a0, 16
238; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
239; LMULMAX1-NEXT:    vle32.v v9, (a0)
240; LMULMAX1-NEXT:    vslideup.vi v9, v8, 2
241; LMULMAX1-NEXT:    vse32.v v9, (a0)
242; LMULMAX1-NEXT:    ret
243  %sv = load <2 x i32>, <2 x i32>* %svp
244  %vec = load <8 x i32>, <8 x i32>* %vp
245  %v = call <8 x i32> @llvm.experimental.vector.insert.v2i32.v8i32(<8 x i32> %vec, <2 x i32> %sv, i64 6)
246  store <8 x i32> %v, <8 x i32>* %vp
247  ret void
248}
249
250define void @insert_v8i32_undef_v2i32_6(<8 x i32>* %vp, <2 x i32>* %svp) {
251; LMULMAX2-LABEL: insert_v8i32_undef_v2i32_6:
252; LMULMAX2:       # %bb.0:
253; LMULMAX2-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
254; LMULMAX2-NEXT:    vle32.v v8, (a1)
255; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
256; LMULMAX2-NEXT:    vslideup.vi v10, v8, 6
257; LMULMAX2-NEXT:    vse32.v v10, (a0)
258; LMULMAX2-NEXT:    ret
259;
260; LMULMAX1-LABEL: insert_v8i32_undef_v2i32_6:
261; LMULMAX1:       # %bb.0:
262; LMULMAX1-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
263; LMULMAX1-NEXT:    vle32.v v8, (a1)
264; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
265; LMULMAX1-NEXT:    vslideup.vi v9, v8, 2
266; LMULMAX1-NEXT:    addi a0, a0, 16
267; LMULMAX1-NEXT:    vse32.v v9, (a0)
268; LMULMAX1-NEXT:    ret
269  %sv = load <2 x i32>, <2 x i32>* %svp
270  %v = call <8 x i32> @llvm.experimental.vector.insert.v2i32.v8i32(<8 x i32> undef, <2 x i32> %sv, i64 6)
271  store <8 x i32> %v, <8 x i32>* %vp
272  ret void
273}
274
275define void @insert_v4i16_v2i16_0(<4 x i16>* %vp, <2 x i16>* %svp) {
276; CHECK-LABEL: insert_v4i16_v2i16_0:
277; CHECK:       # %bb.0:
278; CHECK-NEXT:    vsetivli zero, 4, e16, mf2, ta, mu
279; CHECK-NEXT:    vle16.v v8, (a0)
280; CHECK-NEXT:    vsetivli zero, 2, e16, mf4, ta, mu
281; CHECK-NEXT:    vle16.v v9, (a1)
282; CHECK-NEXT:    vsetivli zero, 2, e16, mf2, ta, mu
283; CHECK-NEXT:    vslideup.vi v8, v9, 0
284; CHECK-NEXT:    vsetivli zero, 4, e16, mf2, ta, mu
285; CHECK-NEXT:    vse16.v v8, (a0)
286; CHECK-NEXT:    ret
287  %v = load <4 x i16>, <4 x i16>* %vp
288  %sv = load <2 x i16>, <2 x i16>* %svp
289  %c = call <4 x i16> @llvm.experimental.vector.insert.v2i16.v4i16(<4 x i16> %v, <2 x i16> %sv, i64 0)
290  store <4 x i16> %c, <4 x i16>* %vp
291  ret void
292}
293
294define void @insert_v4i16_v2i16_2(<4 x i16>* %vp, <2 x i16>* %svp) {
295; CHECK-LABEL: insert_v4i16_v2i16_2:
296; CHECK:       # %bb.0:
297; CHECK-NEXT:    vsetivli zero, 4, e16, mf2, ta, mu
298; CHECK-NEXT:    vle16.v v8, (a0)
299; CHECK-NEXT:    vsetivli zero, 2, e16, mf4, ta, mu
300; CHECK-NEXT:    vle16.v v9, (a1)
301; CHECK-NEXT:    vsetivli zero, 4, e16, mf2, ta, mu
302; CHECK-NEXT:    vslideup.vi v8, v9, 2
303; CHECK-NEXT:    vse16.v v8, (a0)
304; CHECK-NEXT:    ret
305  %v = load <4 x i16>, <4 x i16>* %vp
306  %sv = load <2 x i16>, <2 x i16>* %svp
307  %c = call <4 x i16> @llvm.experimental.vector.insert.v2i16.v4i16(<4 x i16> %v, <2 x i16> %sv, i64 2)
308  store <4 x i16> %c, <4 x i16>* %vp
309  ret void
310}
311
312define void @insert_v32i1_v8i1_0(<32 x i1>* %vp, <8 x i1>* %svp) {
313; LMULMAX2-LABEL: insert_v32i1_v8i1_0:
314; LMULMAX2:       # %bb.0:
315; LMULMAX2-NEXT:    li a2, 32
316; LMULMAX2-NEXT:    vsetvli zero, a2, e8, m2, ta, mu
317; LMULMAX2-NEXT:    vlm.v v8, (a0)
318; LMULMAX2-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
319; LMULMAX2-NEXT:    vlm.v v9, (a1)
320; LMULMAX2-NEXT:    vsetivli zero, 1, e8, mf4, ta, mu
321; LMULMAX2-NEXT:    vslideup.vi v8, v9, 0
322; LMULMAX2-NEXT:    vsetvli zero, a2, e8, m2, ta, mu
323; LMULMAX2-NEXT:    vsm.v v8, (a0)
324; LMULMAX2-NEXT:    ret
325;
326; LMULMAX1-LABEL: insert_v32i1_v8i1_0:
327; LMULMAX1:       # %bb.0:
328; LMULMAX1-NEXT:    vsetivli zero, 16, e8, m1, ta, mu
329; LMULMAX1-NEXT:    vlm.v v8, (a0)
330; LMULMAX1-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
331; LMULMAX1-NEXT:    vlm.v v9, (a1)
332; LMULMAX1-NEXT:    vsetivli zero, 1, e8, mf8, ta, mu
333; LMULMAX1-NEXT:    vslideup.vi v8, v9, 0
334; LMULMAX1-NEXT:    vsetivli zero, 16, e8, m1, ta, mu
335; LMULMAX1-NEXT:    vsm.v v8, (a0)
336; LMULMAX1-NEXT:    ret
337  %v = load <32 x i1>, <32 x i1>* %vp
338  %sv = load <8 x i1>, <8 x i1>* %svp
339  %c = call <32 x i1> @llvm.experimental.vector.insert.v8i1.v32i1(<32 x i1> %v, <8 x i1> %sv, i64 0)
340  store <32 x i1> %c, <32 x i1>* %vp
341  ret void
342}
343
344define void @insert_v32i1_v8i1_16(<32 x i1>* %vp, <8 x i1>* %svp) {
345; LMULMAX2-LABEL: insert_v32i1_v8i1_16:
346; LMULMAX2:       # %bb.0:
347; LMULMAX2-NEXT:    li a2, 32
348; LMULMAX2-NEXT:    vsetvli zero, a2, e8, m2, ta, mu
349; LMULMAX2-NEXT:    vlm.v v8, (a0)
350; LMULMAX2-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
351; LMULMAX2-NEXT:    vlm.v v9, (a1)
352; LMULMAX2-NEXT:    vsetivli zero, 3, e8, mf4, ta, mu
353; LMULMAX2-NEXT:    vslideup.vi v8, v9, 2
354; LMULMAX2-NEXT:    vsetvli zero, a2, e8, m2, ta, mu
355; LMULMAX2-NEXT:    vsm.v v8, (a0)
356; LMULMAX2-NEXT:    ret
357;
358; LMULMAX1-LABEL: insert_v32i1_v8i1_16:
359; LMULMAX1:       # %bb.0:
360; LMULMAX1-NEXT:    addi a0, a0, 2
361; LMULMAX1-NEXT:    vsetivli zero, 16, e8, m1, ta, mu
362; LMULMAX1-NEXT:    vlm.v v8, (a0)
363; LMULMAX1-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
364; LMULMAX1-NEXT:    vlm.v v9, (a1)
365; LMULMAX1-NEXT:    vsetivli zero, 1, e8, mf8, ta, mu
366; LMULMAX1-NEXT:    vslideup.vi v8, v9, 0
367; LMULMAX1-NEXT:    vsetivli zero, 16, e8, m1, ta, mu
368; LMULMAX1-NEXT:    vsm.v v8, (a0)
369; LMULMAX1-NEXT:    ret
370  %v = load <32 x i1>, <32 x i1>* %vp
371  %sv = load <8 x i1>, <8 x i1>* %svp
372  %c = call <32 x i1> @llvm.experimental.vector.insert.v8i1.v32i1(<32 x i1> %v, <8 x i1> %sv, i64 16)
373  store <32 x i1> %c, <32 x i1>* %vp
374  ret void
375}
376
377define void @insert_v8i1_v4i1_0(<8 x i1>* %vp, <4 x i1>* %svp) {
378; CHECK-LABEL: insert_v8i1_v4i1_0:
379; CHECK:       # %bb.0:
380; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
381; CHECK-NEXT:    vlm.v v0, (a0)
382; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, mu
383; CHECK-NEXT:    vlm.v v8, (a1)
384; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
385; CHECK-NEXT:    vmv.v.i v9, 0
386; CHECK-NEXT:    vmerge.vim v9, v9, 1, v0
387; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, mu
388; CHECK-NEXT:    vmv.v.i v10, 0
389; CHECK-NEXT:    vmv1r.v v0, v8
390; CHECK-NEXT:    vmerge.vim v8, v10, 1, v0
391; CHECK-NEXT:    vsetivli zero, 4, e8, mf2, ta, mu
392; CHECK-NEXT:    vslideup.vi v9, v8, 0
393; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
394; CHECK-NEXT:    vmsne.vi v8, v9, 0
395; CHECK-NEXT:    vsm.v v8, (a0)
396; CHECK-NEXT:    ret
397  %v = load <8 x i1>, <8 x i1>* %vp
398  %sv = load <4 x i1>, <4 x i1>* %svp
399  %c = call <8 x i1> @llvm.experimental.vector.insert.v4i1.v8i1(<8 x i1> %v, <4 x i1> %sv, i64 0)
400  store <8 x i1> %c, <8 x i1>* %vp
401  ret void
402}
403
404define void @insert_v8i1_v4i1_4(<8 x i1>* %vp, <4 x i1>* %svp) {
405; CHECK-LABEL: insert_v8i1_v4i1_4:
406; CHECK:       # %bb.0:
407; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
408; CHECK-NEXT:    vlm.v v0, (a0)
409; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, mu
410; CHECK-NEXT:    vlm.v v8, (a1)
411; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
412; CHECK-NEXT:    vmv.v.i v9, 0
413; CHECK-NEXT:    vmerge.vim v9, v9, 1, v0
414; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, mu
415; CHECK-NEXT:    vmv.v.i v10, 0
416; CHECK-NEXT:    vmv1r.v v0, v8
417; CHECK-NEXT:    vmerge.vim v8, v10, 1, v0
418; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
419; CHECK-NEXT:    vslideup.vi v9, v8, 4
420; CHECK-NEXT:    vmsne.vi v8, v9, 0
421; CHECK-NEXT:    vsm.v v8, (a0)
422; CHECK-NEXT:    ret
423  %v = load <8 x i1>, <8 x i1>* %vp
424  %sv = load <4 x i1>, <4 x i1>* %svp
425  %c = call <8 x i1> @llvm.experimental.vector.insert.v4i1.v8i1(<8 x i1> %v, <4 x i1> %sv, i64 4)
426  store <8 x i1> %c, <8 x i1>* %vp
427  ret void
428}
429
430define <vscale x 2 x i16> @insert_nxv2i16_v2i16_0(<vscale x 2 x i16> %v, <2 x i16>* %svp) {
431; CHECK-LABEL: insert_nxv2i16_v2i16_0:
432; CHECK:       # %bb.0:
433; CHECK-NEXT:    vsetivli zero, 2, e16, mf4, ta, mu
434; CHECK-NEXT:    vle16.v v9, (a0)
435; CHECK-NEXT:    vsetivli zero, 2, e16, mf2, ta, mu
436; CHECK-NEXT:    vslideup.vi v8, v9, 0
437; CHECK-NEXT:    ret
438  %sv = load <2 x i16>, <2 x i16>* %svp
439  %c = call <vscale x 2 x i16> @llvm.experimental.vector.insert.v2i16.nxv2i16(<vscale x 2 x i16> %v, <2 x i16> %sv, i64 0)
440  ret <vscale x 2 x i16> %c
441}
442
443define <vscale x 2 x i16> @insert_nxv2i16_v2i16_2(<vscale x 2 x i16> %v, <2 x i16>* %svp) {
444; CHECK-LABEL: insert_nxv2i16_v2i16_2:
445; CHECK:       # %bb.0:
446; CHECK-NEXT:    vsetivli zero, 2, e16, mf4, ta, mu
447; CHECK-NEXT:    vle16.v v9, (a0)
448; CHECK-NEXT:    vsetivli zero, 6, e16, mf2, ta, mu
449; CHECK-NEXT:    vslideup.vi v8, v9, 4
450; CHECK-NEXT:    ret
451  %sv = load <2 x i16>, <2 x i16>* %svp
452  %c = call <vscale x 2 x i16> @llvm.experimental.vector.insert.v2i16.nxv2i16(<vscale x 2 x i16> %v, <2 x i16> %sv, i64 4)
453  ret <vscale x 2 x i16> %c
454}
455
456define <vscale x 2 x i1> @insert_nxv2i1_v4i1_0(<vscale x 2 x i1> %v, <4 x i1>* %svp) {
457; CHECK-LABEL: insert_nxv2i1_v4i1_0:
458; CHECK:       # %bb.0:
459; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, mu
460; CHECK-NEXT:    vlm.v v8, (a0)
461; CHECK-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
462; CHECK-NEXT:    vmv.v.i v9, 0
463; CHECK-NEXT:    vmerge.vim v9, v9, 1, v0
464; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, mu
465; CHECK-NEXT:    vmv.v.i v10, 0
466; CHECK-NEXT:    vmv1r.v v0, v8
467; CHECK-NEXT:    vmerge.vim v8, v10, 1, v0
468; CHECK-NEXT:    vslideup.vi v9, v8, 0
469; CHECK-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
470; CHECK-NEXT:    vmsne.vi v0, v9, 0
471; CHECK-NEXT:    ret
472  %sv = load <4 x i1>, <4 x i1>* %svp
473  %c = call <vscale x 2 x i1> @llvm.experimental.vector.insert.v4i1.nxv2i1(<vscale x 2 x i1> %v, <4 x i1> %sv, i64 0)
474  ret <vscale x 2 x i1> %c
475}
476
477define <vscale x 8 x i1> @insert_nxv8i1_v4i1_0(<vscale x 8 x i1> %v, <8 x i1>* %svp) {
478; CHECK-LABEL: insert_nxv8i1_v4i1_0:
479; CHECK:       # %bb.0:
480; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
481; CHECK-NEXT:    vlm.v v8, (a0)
482; CHECK-NEXT:    vsetivli zero, 1, e8, mf8, ta, mu
483; CHECK-NEXT:    vslideup.vi v0, v8, 0
484; CHECK-NEXT:    ret
485  %sv = load <8 x i1>, <8 x i1>* %svp
486  %c = call <vscale x 8 x i1> @llvm.experimental.vector.insert.v8i1.nxv8i1(<vscale x 8 x i1> %v, <8 x i1> %sv, i64 0)
487  ret <vscale x 8 x i1> %c
488}
489
490define <vscale x 8 x i1> @insert_nxv8i1_v8i1_16(<vscale x 8 x i1> %v, <8 x i1>* %svp) {
491; CHECK-LABEL: insert_nxv8i1_v8i1_16:
492; CHECK:       # %bb.0:
493; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
494; CHECK-NEXT:    vlm.v v8, (a0)
495; CHECK-NEXT:    vsetivli zero, 3, e8, mf8, ta, mu
496; CHECK-NEXT:    vslideup.vi v0, v8, 2
497; CHECK-NEXT:    ret
498  %sv = load <8 x i1>, <8 x i1>* %svp
499  %c = call <vscale x 8 x i1> @llvm.experimental.vector.insert.v8i1.nxv8i1(<vscale x 8 x i1> %v, <8 x i1> %sv, i64 16)
500  ret <vscale x 8 x i1> %c
501}
502
503declare <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64>, <2 x i64>, i64)
504
505define void @insert_v2i64_nxv16i64(<2 x i64>* %psv0, <2 x i64>* %psv1, <vscale x 16 x i64>* %out) {
506; CHECK-LABEL: insert_v2i64_nxv16i64:
507; CHECK:       # %bb.0:
508; CHECK-NEXT:    vsetivli zero, 2, e64, m1, ta, mu
509; CHECK-NEXT:    vle64.v v8, (a0)
510; CHECK-NEXT:    vle64.v v16, (a1)
511; CHECK-NEXT:    vsetivli zero, 6, e64, m8, ta, mu
512; CHECK-NEXT:    vslideup.vi v8, v16, 4
513; CHECK-NEXT:    vs8r.v v8, (a2)
514; CHECK-NEXT:    ret
515  %sv0 = load <2 x i64>, <2 x i64>* %psv0
516  %sv1 = load <2 x i64>, <2 x i64>* %psv1
517  %v0 = call <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64> undef, <2 x i64> %sv0, i64 0)
518  %v = call <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64> %v0, <2 x i64> %sv1, i64 4)
519  store <vscale x 16 x i64> %v, <vscale x 16 x i64>* %out
520  ret void
521}
522
523define void @insert_v2i64_nxv16i64_lo0(<2 x i64>* %psv, <vscale x 16 x i64>* %out) {
524; CHECK-LABEL: insert_v2i64_nxv16i64_lo0:
525; CHECK:       # %bb.0:
526; CHECK-NEXT:    vsetivli zero, 2, e64, m1, ta, mu
527; CHECK-NEXT:    vle64.v v8, (a0)
528; CHECK-NEXT:    vs8r.v v8, (a1)
529; CHECK-NEXT:    ret
530  %sv = load <2 x i64>, <2 x i64>* %psv
531  %v = call <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64> undef, <2 x i64> %sv, i64 0)
532  store <vscale x 16 x i64> %v, <vscale x 16 x i64>* %out
533  ret void
534}
535
536define void @insert_v2i64_nxv16i64_lo2(<2 x i64>* %psv, <vscale x 16 x i64>* %out) {
537; CHECK-LABEL: insert_v2i64_nxv16i64_lo2:
538; CHECK:       # %bb.0:
539; CHECK-NEXT:    vsetivli zero, 2, e64, m1, ta, mu
540; CHECK-NEXT:    vle64.v v8, (a0)
541; CHECK-NEXT:    vsetivli zero, 4, e64, m8, ta, mu
542; CHECK-NEXT:    vslideup.vi v16, v8, 2
543; CHECK-NEXT:    vs8r.v v16, (a1)
544; CHECK-NEXT:    ret
545  %sv = load <2 x i64>, <2 x i64>* %psv
546  %v = call <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64> undef, <2 x i64> %sv, i64 2)
547  store <vscale x 16 x i64> %v, <vscale x 16 x i64>* %out
548  ret void
549}
550
551; Check we don't mistakenly optimize this: we don't know whether this is
552; inserted into the low or high split vector.
553define void @insert_v2i64_nxv16i64_hi(<2 x i64>* %psv, <vscale x 16 x i64>* %out) {
554; CHECK-LABEL: insert_v2i64_nxv16i64_hi:
555; CHECK:       # %bb.0:
556; CHECK-NEXT:    addi sp, sp, -16
557; CHECK-NEXT:    .cfi_def_cfa_offset 16
558; CHECK-NEXT:    csrr a2, vlenb
559; CHECK-NEXT:    slli a2, a2, 4
560; CHECK-NEXT:    sub sp, sp, a2
561; CHECK-NEXT:    vsetivli zero, 2, e64, m1, ta, mu
562; CHECK-NEXT:    vle64.v v8, (a0)
563; CHECK-NEXT:    addi a0, sp, 80
564; CHECK-NEXT:    vse64.v v8, (a0)
565; CHECK-NEXT:    csrr a0, vlenb
566; CHECK-NEXT:    slli a0, a0, 3
567; CHECK-NEXT:    addi a2, sp, 16
568; CHECK-NEXT:    add a2, a2, a0
569; CHECK-NEXT:    vl8re64.v v8, (a2)
570; CHECK-NEXT:    addi a2, sp, 16
571; CHECK-NEXT:    vl8re64.v v16, (a2)
572; CHECK-NEXT:    add a0, a1, a0
573; CHECK-NEXT:    vs8r.v v8, (a0)
574; CHECK-NEXT:    vs8r.v v16, (a1)
575; CHECK-NEXT:    csrr a0, vlenb
576; CHECK-NEXT:    slli a0, a0, 4
577; CHECK-NEXT:    add sp, sp, a0
578; CHECK-NEXT:    addi sp, sp, 16
579; CHECK-NEXT:    ret
580  %sv = load <2 x i64>, <2 x i64>* %psv
581  %v = call <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64> undef, <2 x i64> %sv, i64 8)
582  store <vscale x 16 x i64> %v, <vscale x 16 x i64>* %out
583  ret void
584}
585
586declare <8 x i1> @llvm.experimental.vector.insert.v4i1.v8i1(<8 x i1>, <4 x i1>, i64)
587declare <32 x i1> @llvm.experimental.vector.insert.v8i1.v32i1(<32 x i1>, <8 x i1>, i64)
588
589declare <4 x i16> @llvm.experimental.vector.insert.v2i16.v4i16(<4 x i16>, <2 x i16>, i64)
590
591declare <4 x i32> @llvm.experimental.vector.insert.v2i32.v4i32(<4 x i32>, <2 x i32>, i64)
592declare <8 x i32> @llvm.experimental.vector.insert.v2i32.v8i32(<8 x i32>, <2 x i32>, i64)
593
594declare <vscale x 2 x i1> @llvm.experimental.vector.insert.v4i1.nxv2i1(<vscale x 2 x i1>, <4 x i1>, i64)
595declare <vscale x 8 x i1> @llvm.experimental.vector.insert.v8i1.nxv8i1(<vscale x 8 x i1>, <8 x i1>, i64)
596
597declare <vscale x 2 x i16> @llvm.experimental.vector.insert.v2i16.nxv2i16(<vscale x 2 x i16>, <2 x i16>, i64)
598
599declare <vscale x 8 x i32> @llvm.experimental.vector.insert.v2i32.nxv8i32(<vscale x 8 x i32>, <2 x i32>, i64)
600declare <vscale x 8 x i32> @llvm.experimental.vector.insert.v4i32.nxv8i32(<vscale x 8 x i32>, <4 x i32>, i64)
601declare <vscale x 8 x i32> @llvm.experimental.vector.insert.v8i32.nxv8i32(<vscale x 8 x i32>, <8 x i32>, i64)
602