1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+m,+experimental-v --riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=2 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX2
3; RUN: llc -mtriple=riscv32 -mattr=+m,+experimental-v --riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX1
4; RUN: llc -mtriple=riscv64 -mattr=+m,+experimental-v --riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=2 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX2
5; RUN: llc -mtriple=riscv64 -mattr=+m,+experimental-v --riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX1
6
7define <vscale x 8 x i32> @insert_nxv8i32_v2i32_0(<vscale x 8 x i32> %vec, <2 x i32>* %svp) {
8; CHECK-LABEL: insert_nxv8i32_v2i32_0:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
11; CHECK-NEXT:    vle32.v v12, (a0)
12; CHECK-NEXT:    vsetivli zero, 2, e32, m4, tu, mu
13; CHECK-NEXT:    vslideup.vi v8, v12, 0
14; CHECK-NEXT:    ret
15  %sv = load <2 x i32>, <2 x i32>* %svp
16  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v2i32.nxv8i32(<vscale x 8 x i32> %vec, <2 x i32> %sv, i64 0)
17  ret <vscale x 8 x i32> %v
18}
19
20define <vscale x 8 x i32> @insert_nxv8i32_v2i32_2(<vscale x 8 x i32> %vec, <2 x i32>* %svp) {
21; CHECK-LABEL: insert_nxv8i32_v2i32_2:
22; CHECK:       # %bb.0:
23; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
24; CHECK-NEXT:    vle32.v v12, (a0)
25; CHECK-NEXT:    vsetivli zero, 4, e32, m4, tu, mu
26; CHECK-NEXT:    vslideup.vi v8, v12, 2
27; CHECK-NEXT:    ret
28  %sv = load <2 x i32>, <2 x i32>* %svp
29  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v2i32.nxv8i32(<vscale x 8 x i32> %vec, <2 x i32> %sv, i64 2)
30  ret <vscale x 8 x i32> %v
31}
32
33define <vscale x 8 x i32> @insert_nxv8i32_v2i32_6(<vscale x 8 x i32> %vec, <2 x i32>* %svp) {
34; CHECK-LABEL: insert_nxv8i32_v2i32_6:
35; CHECK:       # %bb.0:
36; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
37; CHECK-NEXT:    vle32.v v12, (a0)
38; CHECK-NEXT:    vsetivli zero, 8, e32, m4, tu, mu
39; CHECK-NEXT:    vslideup.vi v8, v12, 6
40; CHECK-NEXT:    ret
41  %sv = load <2 x i32>, <2 x i32>* %svp
42  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v2i32.nxv8i32(<vscale x 8 x i32> %vec, <2 x i32> %sv, i64 6)
43  ret <vscale x 8 x i32> %v
44}
45
46define <vscale x 8 x i32> @insert_nxv8i32_v8i32_0(<vscale x 8 x i32> %vec, <8 x i32>* %svp) {
47; LMULMAX2-LABEL: insert_nxv8i32_v8i32_0:
48; LMULMAX2:       # %bb.0:
49; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
50; LMULMAX2-NEXT:    vle32.v v12, (a0)
51; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m4, tu, mu
52; LMULMAX2-NEXT:    vslideup.vi v8, v12, 0
53; LMULMAX2-NEXT:    ret
54;
55; LMULMAX1-LABEL: insert_nxv8i32_v8i32_0:
56; LMULMAX1:       # %bb.0:
57; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
58; LMULMAX1-NEXT:    vle32.v v12, (a0)
59; LMULMAX1-NEXT:    addi a0, a0, 16
60; LMULMAX1-NEXT:    vle32.v v16, (a0)
61; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m4, tu, mu
62; LMULMAX1-NEXT:    vslideup.vi v8, v12, 0
63; LMULMAX1-NEXT:    vsetivli zero, 8, e32, m4, tu, mu
64; LMULMAX1-NEXT:    vslideup.vi v8, v16, 4
65; LMULMAX1-NEXT:    ret
66  %sv = load <8 x i32>, <8 x i32>* %svp
67  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v8i32.nxv8i32(<vscale x 8 x i32> %vec, <8 x i32> %sv, i64 0)
68  ret <vscale x 8 x i32> %v
69}
70
71define <vscale x 8 x i32> @insert_nxv8i32_v8i32_8(<vscale x 8 x i32> %vec, <8 x i32>* %svp) {
72; LMULMAX2-LABEL: insert_nxv8i32_v8i32_8:
73; LMULMAX2:       # %bb.0:
74; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
75; LMULMAX2-NEXT:    vle32.v v12, (a0)
76; LMULMAX2-NEXT:    vsetivli zero, 16, e32, m4, tu, mu
77; LMULMAX2-NEXT:    vslideup.vi v8, v12, 8
78; LMULMAX2-NEXT:    ret
79;
80; LMULMAX1-LABEL: insert_nxv8i32_v8i32_8:
81; LMULMAX1:       # %bb.0:
82; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
83; LMULMAX1-NEXT:    vle32.v v12, (a0)
84; LMULMAX1-NEXT:    addi a0, a0, 16
85; LMULMAX1-NEXT:    vle32.v v16, (a0)
86; LMULMAX1-NEXT:    vsetivli zero, 12, e32, m4, tu, mu
87; LMULMAX1-NEXT:    vslideup.vi v8, v12, 8
88; LMULMAX1-NEXT:    vsetivli zero, 16, e32, m4, tu, mu
89; LMULMAX1-NEXT:    vslideup.vi v8, v16, 12
90; LMULMAX1-NEXT:    ret
91  %sv = load <8 x i32>, <8 x i32>* %svp
92  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v8i32.nxv8i32(<vscale x 8 x i32> %vec, <8 x i32> %sv, i64 8)
93  ret <vscale x 8 x i32> %v
94}
95
96define <vscale x 8 x i32> @insert_nxv8i32_undef_v2i32_0(<2 x i32>* %svp) {
97; CHECK-LABEL: insert_nxv8i32_undef_v2i32_0:
98; CHECK:       # %bb.0:
99; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
100; CHECK-NEXT:    vle32.v v8, (a0)
101; CHECK-NEXT:    ret
102  %sv = load <2 x i32>, <2 x i32>* %svp
103  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v2i32.nxv8i32(<vscale x 8 x i32> undef, <2 x i32> %sv, i64 0)
104  ret <vscale x 8 x i32> %v
105}
106
107define void @insert_v4i32_v2i32_0(<4 x i32>* %vp, <2 x i32>* %svp) {
108; CHECK-LABEL: insert_v4i32_v2i32_0:
109; CHECK:       # %bb.0:
110; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
111; CHECK-NEXT:    vle32.v v8, (a1)
112; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
113; CHECK-NEXT:    vle32.v v9, (a0)
114; CHECK-NEXT:    vsetivli zero, 2, e32, m1, tu, mu
115; CHECK-NEXT:    vslideup.vi v9, v8, 0
116; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
117; CHECK-NEXT:    vse32.v v9, (a0)
118; CHECK-NEXT:    ret
119  %sv = load <2 x i32>, <2 x i32>* %svp
120  %vec = load <4 x i32>, <4 x i32>* %vp
121  %v = call <4 x i32> @llvm.experimental.vector.insert.v2i32.v4i32(<4 x i32> %vec, <2 x i32> %sv, i64 0)
122  store <4 x i32> %v, <4 x i32>* %vp
123  ret void
124}
125
126define void @insert_v4i32_v2i32_2(<4 x i32>* %vp, <2 x i32>* %svp) {
127; CHECK-LABEL: insert_v4i32_v2i32_2:
128; CHECK:       # %bb.0:
129; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
130; CHECK-NEXT:    vle32.v v8, (a1)
131; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
132; CHECK-NEXT:    vle32.v v9, (a0)
133; CHECK-NEXT:    vsetvli zero, zero, e32, m1, tu, mu
134; CHECK-NEXT:    vslideup.vi v9, v8, 2
135; CHECK-NEXT:    vse32.v v9, (a0)
136; CHECK-NEXT:    ret
137  %sv = load <2 x i32>, <2 x i32>* %svp
138  %vec = load <4 x i32>, <4 x i32>* %vp
139  %v = call <4 x i32> @llvm.experimental.vector.insert.v2i32.v4i32(<4 x i32> %vec, <2 x i32> %sv, i64 2)
140  store <4 x i32> %v, <4 x i32>* %vp
141  ret void
142}
143
144define void @insert_v4i32_undef_v2i32_0(<4 x i32>* %vp, <2 x i32>* %svp) {
145; CHECK-LABEL: insert_v4i32_undef_v2i32_0:
146; CHECK:       # %bb.0:
147; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
148; CHECK-NEXT:    vle32.v v8, (a1)
149; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
150; CHECK-NEXT:    vmv.v.i v9, 0
151; CHECK-NEXT:    vsetivli zero, 2, e32, m1, tu, mu
152; CHECK-NEXT:    vslideup.vi v9, v8, 0
153; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
154; CHECK-NEXT:    vse32.v v9, (a0)
155; CHECK-NEXT:    ret
156  %sv = load <2 x i32>, <2 x i32>* %svp
157  %v = call <4 x i32> @llvm.experimental.vector.insert.v2i32.v4i32(<4 x i32> undef, <2 x i32> %sv, i64 0)
158  store <4 x i32> %v, <4 x i32>* %vp
159  ret void
160}
161
162define void @insert_v8i32_v2i32_0(<8 x i32>* %vp, <2 x i32>* %svp) {
163; LMULMAX2-LABEL: insert_v8i32_v2i32_0:
164; LMULMAX2:       # %bb.0:
165; LMULMAX2-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
166; LMULMAX2-NEXT:    vle32.v v8, (a1)
167; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
168; LMULMAX2-NEXT:    vle32.v v10, (a0)
169; LMULMAX2-NEXT:    vsetivli zero, 2, e32, m2, tu, mu
170; LMULMAX2-NEXT:    vslideup.vi v10, v8, 0
171; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
172; LMULMAX2-NEXT:    vse32.v v10, (a0)
173; LMULMAX2-NEXT:    ret
174;
175; LMULMAX1-LABEL: insert_v8i32_v2i32_0:
176; LMULMAX1:       # %bb.0:
177; LMULMAX1-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
178; LMULMAX1-NEXT:    vle32.v v8, (a1)
179; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
180; LMULMAX1-NEXT:    vle32.v v9, (a0)
181; LMULMAX1-NEXT:    vsetivli zero, 2, e32, m1, tu, mu
182; LMULMAX1-NEXT:    vslideup.vi v9, v8, 0
183; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
184; LMULMAX1-NEXT:    vse32.v v9, (a0)
185; LMULMAX1-NEXT:    ret
186  %sv = load <2 x i32>, <2 x i32>* %svp
187  %vec = load <8 x i32>, <8 x i32>* %vp
188  %v = call <8 x i32> @llvm.experimental.vector.insert.v2i32.v8i32(<8 x i32> %vec, <2 x i32> %sv, i64 0)
189  store <8 x i32> %v, <8 x i32>* %vp
190  ret void
191}
192
193define void @insert_v8i32_v2i32_2(<8 x i32>* %vp, <2 x i32>* %svp) {
194; LMULMAX2-LABEL: insert_v8i32_v2i32_2:
195; LMULMAX2:       # %bb.0:
196; LMULMAX2-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
197; LMULMAX2-NEXT:    vle32.v v8, (a1)
198; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
199; LMULMAX2-NEXT:    vle32.v v10, (a0)
200; LMULMAX2-NEXT:    vsetivli zero, 4, e32, m2, tu, mu
201; LMULMAX2-NEXT:    vslideup.vi v10, v8, 2
202; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
203; LMULMAX2-NEXT:    vse32.v v10, (a0)
204; LMULMAX2-NEXT:    ret
205;
206; LMULMAX1-LABEL: insert_v8i32_v2i32_2:
207; LMULMAX1:       # %bb.0:
208; LMULMAX1-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
209; LMULMAX1-NEXT:    vle32.v v8, (a1)
210; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
211; LMULMAX1-NEXT:    vle32.v v9, (a0)
212; LMULMAX1-NEXT:    vsetvli zero, zero, e32, m1, tu, mu
213; LMULMAX1-NEXT:    vslideup.vi v9, v8, 2
214; LMULMAX1-NEXT:    vse32.v v9, (a0)
215; LMULMAX1-NEXT:    ret
216  %sv = load <2 x i32>, <2 x i32>* %svp
217  %vec = load <8 x i32>, <8 x i32>* %vp
218  %v = call <8 x i32> @llvm.experimental.vector.insert.v2i32.v8i32(<8 x i32> %vec, <2 x i32> %sv, i64 2)
219  store <8 x i32> %v, <8 x i32>* %vp
220  ret void
221}
222
223define void @insert_v8i32_v2i32_6(<8 x i32>* %vp, <2 x i32>* %svp) {
224; LMULMAX2-LABEL: insert_v8i32_v2i32_6:
225; LMULMAX2:       # %bb.0:
226; LMULMAX2-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
227; LMULMAX2-NEXT:    vle32.v v8, (a1)
228; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
229; LMULMAX2-NEXT:    vle32.v v10, (a0)
230; LMULMAX2-NEXT:    vsetvli zero, zero, e32, m2, tu, mu
231; LMULMAX2-NEXT:    vslideup.vi v10, v8, 6
232; LMULMAX2-NEXT:    vse32.v v10, (a0)
233; LMULMAX2-NEXT:    ret
234;
235; LMULMAX1-LABEL: insert_v8i32_v2i32_6:
236; LMULMAX1:       # %bb.0:
237; LMULMAX1-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
238; LMULMAX1-NEXT:    vle32.v v8, (a1)
239; LMULMAX1-NEXT:    addi a0, a0, 16
240; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
241; LMULMAX1-NEXT:    vle32.v v9, (a0)
242; LMULMAX1-NEXT:    vsetvli zero, zero, e32, m1, tu, mu
243; LMULMAX1-NEXT:    vslideup.vi v9, v8, 2
244; LMULMAX1-NEXT:    vse32.v v9, (a0)
245; LMULMAX1-NEXT:    ret
246  %sv = load <2 x i32>, <2 x i32>* %svp
247  %vec = load <8 x i32>, <8 x i32>* %vp
248  %v = call <8 x i32> @llvm.experimental.vector.insert.v2i32.v8i32(<8 x i32> %vec, <2 x i32> %sv, i64 6)
249  store <8 x i32> %v, <8 x i32>* %vp
250  ret void
251}
252
253define void @insert_v8i32_undef_v2i32_6(<8 x i32>* %vp, <2 x i32>* %svp) {
254; LMULMAX2-LABEL: insert_v8i32_undef_v2i32_6:
255; LMULMAX2:       # %bb.0:
256; LMULMAX2-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
257; LMULMAX2-NEXT:    vle32.v v8, (a1)
258; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
259; LMULMAX2-NEXT:    vslideup.vi v10, v8, 6
260; LMULMAX2-NEXT:    vse32.v v10, (a0)
261; LMULMAX2-NEXT:    ret
262;
263; LMULMAX1-LABEL: insert_v8i32_undef_v2i32_6:
264; LMULMAX1:       # %bb.0:
265; LMULMAX1-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
266; LMULMAX1-NEXT:    vle32.v v8, (a1)
267; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
268; LMULMAX1-NEXT:    vslideup.vi v9, v8, 2
269; LMULMAX1-NEXT:    addi a0, a0, 16
270; LMULMAX1-NEXT:    vse32.v v9, (a0)
271; LMULMAX1-NEXT:    ret
272  %sv = load <2 x i32>, <2 x i32>* %svp
273  %v = call <8 x i32> @llvm.experimental.vector.insert.v2i32.v8i32(<8 x i32> undef, <2 x i32> %sv, i64 6)
274  store <8 x i32> %v, <8 x i32>* %vp
275  ret void
276}
277
278define void @insert_v4i16_v2i16_0(<4 x i16>* %vp, <2 x i16>* %svp) {
279; CHECK-LABEL: insert_v4i16_v2i16_0:
280; CHECK:       # %bb.0:
281; CHECK-NEXT:    vsetivli zero, 4, e16, mf2, ta, mu
282; CHECK-NEXT:    vle16.v v8, (a0)
283; CHECK-NEXT:    vsetivli zero, 2, e16, mf4, ta, mu
284; CHECK-NEXT:    vle16.v v9, (a1)
285; CHECK-NEXT:    vsetivli zero, 2, e16, mf2, tu, mu
286; CHECK-NEXT:    vslideup.vi v8, v9, 0
287; CHECK-NEXT:    vsetivli zero, 4, e16, mf2, ta, mu
288; CHECK-NEXT:    vse16.v v8, (a0)
289; CHECK-NEXT:    ret
290  %v = load <4 x i16>, <4 x i16>* %vp
291  %sv = load <2 x i16>, <2 x i16>* %svp
292  %c = call <4 x i16> @llvm.experimental.vector.insert.v2i16.v4i16(<4 x i16> %v, <2 x i16> %sv, i64 0)
293  store <4 x i16> %c, <4 x i16>* %vp
294  ret void
295}
296
297define void @insert_v4i16_v2i16_2(<4 x i16>* %vp, <2 x i16>* %svp) {
298; CHECK-LABEL: insert_v4i16_v2i16_2:
299; CHECK:       # %bb.0:
300; CHECK-NEXT:    vsetivli zero, 4, e16, mf2, ta, mu
301; CHECK-NEXT:    vle16.v v8, (a0)
302; CHECK-NEXT:    vsetivli zero, 2, e16, mf4, ta, mu
303; CHECK-NEXT:    vle16.v v9, (a1)
304; CHECK-NEXT:    vsetivli zero, 4, e16, mf2, tu, mu
305; CHECK-NEXT:    vslideup.vi v8, v9, 2
306; CHECK-NEXT:    vse16.v v8, (a0)
307; CHECK-NEXT:    ret
308  %v = load <4 x i16>, <4 x i16>* %vp
309  %sv = load <2 x i16>, <2 x i16>* %svp
310  %c = call <4 x i16> @llvm.experimental.vector.insert.v2i16.v4i16(<4 x i16> %v, <2 x i16> %sv, i64 2)
311  store <4 x i16> %c, <4 x i16>* %vp
312  ret void
313}
314
315define void @insert_v32i1_v8i1_0(<32 x i1>* %vp, <8 x i1>* %svp) {
316; LMULMAX2-LABEL: insert_v32i1_v8i1_0:
317; LMULMAX2:       # %bb.0:
318; LMULMAX2-NEXT:    addi a2, zero, 32
319; LMULMAX2-NEXT:    vsetvli zero, a2, e8, m2, ta, mu
320; LMULMAX2-NEXT:    vlm.v v8, (a0)
321; LMULMAX2-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
322; LMULMAX2-NEXT:    vlm.v v9, (a1)
323; LMULMAX2-NEXT:    vsetivli zero, 1, e8, mf4, tu, mu
324; LMULMAX2-NEXT:    vslideup.vi v8, v9, 0
325; LMULMAX2-NEXT:    vsetvli zero, a2, e8, m2, ta, mu
326; LMULMAX2-NEXT:    vsm.v v8, (a0)
327; LMULMAX2-NEXT:    ret
328;
329; LMULMAX1-LABEL: insert_v32i1_v8i1_0:
330; LMULMAX1:       # %bb.0:
331; LMULMAX1-NEXT:    vsetivli zero, 16, e8, m1, ta, mu
332; LMULMAX1-NEXT:    vlm.v v8, (a0)
333; LMULMAX1-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
334; LMULMAX1-NEXT:    vlm.v v9, (a1)
335; LMULMAX1-NEXT:    vsetivli zero, 1, e8, mf8, tu, mu
336; LMULMAX1-NEXT:    vslideup.vi v8, v9, 0
337; LMULMAX1-NEXT:    vsetivli zero, 16, e8, m1, ta, mu
338; LMULMAX1-NEXT:    vsm.v v8, (a0)
339; LMULMAX1-NEXT:    ret
340  %v = load <32 x i1>, <32 x i1>* %vp
341  %sv = load <8 x i1>, <8 x i1>* %svp
342  %c = call <32 x i1> @llvm.experimental.vector.insert.v8i1.v32i1(<32 x i1> %v, <8 x i1> %sv, i64 0)
343  store <32 x i1> %c, <32 x i1>* %vp
344  ret void
345}
346
347define void @insert_v32i1_v8i1_16(<32 x i1>* %vp, <8 x i1>* %svp) {
348; LMULMAX2-LABEL: insert_v32i1_v8i1_16:
349; LMULMAX2:       # %bb.0:
350; LMULMAX2-NEXT:    addi a2, zero, 32
351; LMULMAX2-NEXT:    vsetvli zero, a2, e8, m2, ta, mu
352; LMULMAX2-NEXT:    vlm.v v8, (a0)
353; LMULMAX2-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
354; LMULMAX2-NEXT:    vlm.v v9, (a1)
355; LMULMAX2-NEXT:    vsetivli zero, 3, e8, mf4, tu, mu
356; LMULMAX2-NEXT:    vslideup.vi v8, v9, 2
357; LMULMAX2-NEXT:    vsetvli zero, a2, e8, m2, ta, mu
358; LMULMAX2-NEXT:    vsm.v v8, (a0)
359; LMULMAX2-NEXT:    ret
360;
361; LMULMAX1-LABEL: insert_v32i1_v8i1_16:
362; LMULMAX1:       # %bb.0:
363; LMULMAX1-NEXT:    addi a0, a0, 2
364; LMULMAX1-NEXT:    vsetivli zero, 16, e8, m1, ta, mu
365; LMULMAX1-NEXT:    vlm.v v8, (a0)
366; LMULMAX1-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
367; LMULMAX1-NEXT:    vlm.v v9, (a1)
368; LMULMAX1-NEXT:    vsetivli zero, 1, e8, mf8, tu, mu
369; LMULMAX1-NEXT:    vslideup.vi v8, v9, 0
370; LMULMAX1-NEXT:    vsetivli zero, 16, e8, m1, ta, mu
371; LMULMAX1-NEXT:    vsm.v v8, (a0)
372; LMULMAX1-NEXT:    ret
373  %v = load <32 x i1>, <32 x i1>* %vp
374  %sv = load <8 x i1>, <8 x i1>* %svp
375  %c = call <32 x i1> @llvm.experimental.vector.insert.v8i1.v32i1(<32 x i1> %v, <8 x i1> %sv, i64 16)
376  store <32 x i1> %c, <32 x i1>* %vp
377  ret void
378}
379
380define void @insert_v8i1_v4i1_0(<8 x i1>* %vp, <4 x i1>* %svp) {
381; CHECK-LABEL: insert_v8i1_v4i1_0:
382; CHECK:       # %bb.0:
383; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
384; CHECK-NEXT:    vlm.v v0, (a0)
385; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, mu
386; CHECK-NEXT:    vlm.v v8, (a1)
387; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
388; CHECK-NEXT:    vmv.v.i v9, 0
389; CHECK-NEXT:    vmerge.vim v9, v9, 1, v0
390; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, mu
391; CHECK-NEXT:    vmv.v.i v10, 0
392; CHECK-NEXT:    vmv1r.v v0, v8
393; CHECK-NEXT:    vmerge.vim v8, v10, 1, v0
394; CHECK-NEXT:    vsetivli zero, 4, e8, mf2, tu, mu
395; CHECK-NEXT:    vslideup.vi v9, v8, 0
396; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
397; CHECK-NEXT:    vmsne.vi v8, v9, 0
398; CHECK-NEXT:    vsm.v v8, (a0)
399; CHECK-NEXT:    ret
400  %v = load <8 x i1>, <8 x i1>* %vp
401  %sv = load <4 x i1>, <4 x i1>* %svp
402  %c = call <8 x i1> @llvm.experimental.vector.insert.v4i1.v8i1(<8 x i1> %v, <4 x i1> %sv, i64 0)
403  store <8 x i1> %c, <8 x i1>* %vp
404  ret void
405}
406
407define void @insert_v8i1_v4i1_4(<8 x i1>* %vp, <4 x i1>* %svp) {
408; CHECK-LABEL: insert_v8i1_v4i1_4:
409; CHECK:       # %bb.0:
410; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
411; CHECK-NEXT:    vlm.v v0, (a0)
412; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, mu
413; CHECK-NEXT:    vlm.v v8, (a1)
414; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
415; CHECK-NEXT:    vmv.v.i v9, 0
416; CHECK-NEXT:    vmerge.vim v9, v9, 1, v0
417; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, mu
418; CHECK-NEXT:    vmv.v.i v10, 0
419; CHECK-NEXT:    vmv1r.v v0, v8
420; CHECK-NEXT:    vmerge.vim v8, v10, 1, v0
421; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, tu, mu
422; CHECK-NEXT:    vslideup.vi v9, v8, 4
423; CHECK-NEXT:    vsetvli zero, zero, e8, mf2, ta, mu
424; CHECK-NEXT:    vmsne.vi v8, v9, 0
425; CHECK-NEXT:    vsm.v v8, (a0)
426; CHECK-NEXT:    ret
427  %v = load <8 x i1>, <8 x i1>* %vp
428  %sv = load <4 x i1>, <4 x i1>* %svp
429  %c = call <8 x i1> @llvm.experimental.vector.insert.v4i1.v8i1(<8 x i1> %v, <4 x i1> %sv, i64 4)
430  store <8 x i1> %c, <8 x i1>* %vp
431  ret void
432}
433
434define <vscale x 2 x i16> @insert_nxv2i16_v2i16_0(<vscale x 2 x i16> %v, <2 x i16>* %svp) {
435; CHECK-LABEL: insert_nxv2i16_v2i16_0:
436; CHECK:       # %bb.0:
437; CHECK-NEXT:    vsetivli zero, 2, e16, mf4, ta, mu
438; CHECK-NEXT:    vle16.v v9, (a0)
439; CHECK-NEXT:    vsetivli zero, 2, e16, mf2, tu, mu
440; CHECK-NEXT:    vslideup.vi v8, v9, 0
441; CHECK-NEXT:    ret
442  %sv = load <2 x i16>, <2 x i16>* %svp
443  %c = call <vscale x 2 x i16> @llvm.experimental.vector.insert.v2i16.nxv2i16(<vscale x 2 x i16> %v, <2 x i16> %sv, i64 0)
444  ret <vscale x 2 x i16> %c
445}
446
447define <vscale x 2 x i16> @insert_nxv2i16_v2i16_2(<vscale x 2 x i16> %v, <2 x i16>* %svp) {
448; CHECK-LABEL: insert_nxv2i16_v2i16_2:
449; CHECK:       # %bb.0:
450; CHECK-NEXT:    vsetivli zero, 2, e16, mf4, ta, mu
451; CHECK-NEXT:    vle16.v v9, (a0)
452; CHECK-NEXT:    vsetivli zero, 6, e16, mf2, tu, mu
453; CHECK-NEXT:    vslideup.vi v8, v9, 4
454; CHECK-NEXT:    ret
455  %sv = load <2 x i16>, <2 x i16>* %svp
456  %c = call <vscale x 2 x i16> @llvm.experimental.vector.insert.v2i16.nxv2i16(<vscale x 2 x i16> %v, <2 x i16> %sv, i64 4)
457  ret <vscale x 2 x i16> %c
458}
459
460define <vscale x 2 x i1> @insert_nxv2i1_v4i1_0(<vscale x 2 x i1> %v, <4 x i1>* %svp) {
461; CHECK-LABEL: insert_nxv2i1_v4i1_0:
462; CHECK:       # %bb.0:
463; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, mu
464; CHECK-NEXT:    vlm.v v8, (a0)
465; CHECK-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
466; CHECK-NEXT:    vmv.v.i v9, 0
467; CHECK-NEXT:    vmerge.vim v9, v9, 1, v0
468; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, mu
469; CHECK-NEXT:    vmv.v.i v10, 0
470; CHECK-NEXT:    vmv1r.v v0, v8
471; CHECK-NEXT:    vmerge.vim v8, v10, 1, v0
472; CHECK-NEXT:    vsetvli zero, zero, e8, mf4, tu, mu
473; CHECK-NEXT:    vslideup.vi v9, v8, 0
474; CHECK-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
475; CHECK-NEXT:    vmsne.vi v0, v9, 0
476; CHECK-NEXT:    ret
477  %sv = load <4 x i1>, <4 x i1>* %svp
478  %c = call <vscale x 2 x i1> @llvm.experimental.vector.insert.v4i1.nxv2i1(<vscale x 2 x i1> %v, <4 x i1> %sv, i64 0)
479  ret <vscale x 2 x i1> %c
480}
481
482define <vscale x 8 x i1> @insert_nxv8i1_v4i1_0(<vscale x 8 x i1> %v, <8 x i1>* %svp) {
483; CHECK-LABEL: insert_nxv8i1_v4i1_0:
484; CHECK:       # %bb.0:
485; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
486; CHECK-NEXT:    vlm.v v8, (a0)
487; CHECK-NEXT:    vsetivli zero, 1, e8, mf8, tu, mu
488; CHECK-NEXT:    vslideup.vi v0, v8, 0
489; CHECK-NEXT:    ret
490  %sv = load <8 x i1>, <8 x i1>* %svp
491  %c = call <vscale x 8 x i1> @llvm.experimental.vector.insert.v8i1.nxv8i1(<vscale x 8 x i1> %v, <8 x i1> %sv, i64 0)
492  ret <vscale x 8 x i1> %c
493}
494
495define <vscale x 8 x i1> @insert_nxv8i1_v8i1_16(<vscale x 8 x i1> %v, <8 x i1>* %svp) {
496; CHECK-LABEL: insert_nxv8i1_v8i1_16:
497; CHECK:       # %bb.0:
498; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
499; CHECK-NEXT:    vlm.v v8, (a0)
500; CHECK-NEXT:    vsetivli zero, 3, e8, mf8, tu, mu
501; CHECK-NEXT:    vslideup.vi v0, v8, 2
502; CHECK-NEXT:    ret
503  %sv = load <8 x i1>, <8 x i1>* %svp
504  %c = call <vscale x 8 x i1> @llvm.experimental.vector.insert.v8i1.nxv8i1(<vscale x 8 x i1> %v, <8 x i1> %sv, i64 16)
505  ret <vscale x 8 x i1> %c
506}
507
508declare <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64>, <2 x i64>, i64)
509
510define void @insert_v2i64_nxv16i64(<2 x i64>* %psv0, <2 x i64>* %psv1, <vscale x 16 x i64>* %out) {
511; CHECK-LABEL: insert_v2i64_nxv16i64:
512; CHECK:       # %bb.0:
513; CHECK-NEXT:    vsetivli zero, 2, e64, m1, ta, mu
514; CHECK-NEXT:    vle64.v v8, (a0)
515; CHECK-NEXT:    vle64.v v16, (a1)
516; CHECK-NEXT:    vsetivli zero, 6, e64, m8, tu, mu
517; CHECK-NEXT:    vslideup.vi v8, v16, 4
518; CHECK-NEXT:    vs8r.v v8, (a2)
519; CHECK-NEXT:    ret
520  %sv0 = load <2 x i64>, <2 x i64>* %psv0
521  %sv1 = load <2 x i64>, <2 x i64>* %psv1
522  %v0 = call <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64> undef, <2 x i64> %sv0, i64 0)
523  %v = call <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64> %v0, <2 x i64> %sv1, i64 4)
524  store <vscale x 16 x i64> %v, <vscale x 16 x i64>* %out
525  ret void
526}
527
528define void @insert_v2i64_nxv16i64_lo0(<2 x i64>* %psv, <vscale x 16 x i64>* %out) {
529; CHECK-LABEL: insert_v2i64_nxv16i64_lo0:
530; CHECK:       # %bb.0:
531; CHECK-NEXT:    vsetivli zero, 2, e64, m1, ta, mu
532; CHECK-NEXT:    vle64.v v8, (a0)
533; CHECK-NEXT:    vs8r.v v8, (a1)
534; CHECK-NEXT:    ret
535  %sv = load <2 x i64>, <2 x i64>* %psv
536  %v = call <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64> undef, <2 x i64> %sv, i64 0)
537  store <vscale x 16 x i64> %v, <vscale x 16 x i64>* %out
538  ret void
539}
540
541define void @insert_v2i64_nxv16i64_lo2(<2 x i64>* %psv, <vscale x 16 x i64>* %out) {
542; CHECK-LABEL: insert_v2i64_nxv16i64_lo2:
543; CHECK:       # %bb.0:
544; CHECK-NEXT:    vsetivli zero, 2, e64, m1, ta, mu
545; CHECK-NEXT:    vle64.v v8, (a0)
546; CHECK-NEXT:    vsetivli zero, 4, e64, m8, ta, mu
547; CHECK-NEXT:    vslideup.vi v16, v8, 2
548; CHECK-NEXT:    vs8r.v v16, (a1)
549; CHECK-NEXT:    ret
550  %sv = load <2 x i64>, <2 x i64>* %psv
551  %v = call <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64> undef, <2 x i64> %sv, i64 2)
552  store <vscale x 16 x i64> %v, <vscale x 16 x i64>* %out
553  ret void
554}
555
556; Check we don't mistakenly optimize this: we don't know whether this is
557; inserted into the low or high split vector.
558define void @insert_v2i64_nxv16i64_hi(<2 x i64>* %psv, <vscale x 16 x i64>* %out) {
559; CHECK-LABEL: insert_v2i64_nxv16i64_hi:
560; CHECK:       # %bb.0:
561; CHECK-NEXT:    addi sp, sp, -16
562; CHECK-NEXT:    .cfi_def_cfa_offset 16
563; CHECK-NEXT:    csrr a2, vlenb
564; CHECK-NEXT:    slli a2, a2, 4
565; CHECK-NEXT:    sub sp, sp, a2
566; CHECK-NEXT:    vsetivli zero, 2, e64, m1, ta, mu
567; CHECK-NEXT:    vle64.v v8, (a0)
568; CHECK-NEXT:    addi a0, sp, 80
569; CHECK-NEXT:    vse64.v v8, (a0)
570; CHECK-NEXT:    csrr a0, vlenb
571; CHECK-NEXT:    slli a0, a0, 3
572; CHECK-NEXT:    addi a2, sp, 16
573; CHECK-NEXT:    add a2, a2, a0
574; CHECK-NEXT:    vl8re64.v v8, (a2)
575; CHECK-NEXT:    addi a2, sp, 16
576; CHECK-NEXT:    vl8re64.v v16, (a2)
577; CHECK-NEXT:    add a0, a1, a0
578; CHECK-NEXT:    vs8r.v v8, (a0)
579; CHECK-NEXT:    vs8r.v v16, (a1)
580; CHECK-NEXT:    csrr a0, vlenb
581; CHECK-NEXT:    slli a0, a0, 4
582; CHECK-NEXT:    add sp, sp, a0
583; CHECK-NEXT:    addi sp, sp, 16
584; CHECK-NEXT:    ret
585  %sv = load <2 x i64>, <2 x i64>* %psv
586  %v = call <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64> undef, <2 x i64> %sv, i64 8)
587  store <vscale x 16 x i64> %v, <vscale x 16 x i64>* %out
588  ret void
589}
590
591declare <8 x i1> @llvm.experimental.vector.insert.v4i1.v8i1(<8 x i1>, <4 x i1>, i64)
592declare <32 x i1> @llvm.experimental.vector.insert.v8i1.v32i1(<32 x i1>, <8 x i1>, i64)
593
594declare <4 x i16> @llvm.experimental.vector.insert.v2i16.v4i16(<4 x i16>, <2 x i16>, i64)
595
596declare <4 x i32> @llvm.experimental.vector.insert.v2i32.v4i32(<4 x i32>, <2 x i32>, i64)
597declare <8 x i32> @llvm.experimental.vector.insert.v2i32.v8i32(<8 x i32>, <2 x i32>, i64)
598
599declare <vscale x 2 x i1> @llvm.experimental.vector.insert.v4i1.nxv2i1(<vscale x 2 x i1>, <4 x i1>, i64)
600declare <vscale x 8 x i1> @llvm.experimental.vector.insert.v8i1.nxv8i1(<vscale x 8 x i1>, <8 x i1>, i64)
601
602declare <vscale x 2 x i16> @llvm.experimental.vector.insert.v2i16.nxv2i16(<vscale x 2 x i16>, <2 x i16>, i64)
603
604declare <vscale x 8 x i32> @llvm.experimental.vector.insert.v2i32.nxv8i32(<vscale x 8 x i32>, <2 x i32>, i64)
605declare <vscale x 8 x i32> @llvm.experimental.vector.insert.v4i32.nxv8i32(<vscale x 8 x i32>, <4 x i32>, i64)
606declare <vscale x 8 x i32> @llvm.experimental.vector.insert.v8i32.nxv8i32(<vscale x 8 x i32>, <8 x i32>, i64)
607