1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=riscv32 -mattr=+m,+experimental-v --riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=2 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX2
3; RUN: llc -mtriple=riscv32 -mattr=+m,+experimental-v --riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX1
4; RUN: llc -mtriple=riscv64 -mattr=+m,+experimental-v --riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=2 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX2
5; RUN: llc -mtriple=riscv64 -mattr=+m,+experimental-v --riscv-v-vector-bits-min=128 -riscv-v-fixed-length-vector-lmul-max=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,LMULMAX1
6
7define <vscale x 8 x i32> @insert_nxv8i32_v2i32_0(<vscale x 8 x i32> %vec, <2 x i32>* %svp) {
8; CHECK-LABEL: insert_nxv8i32_v2i32_0:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
11; CHECK-NEXT:    vle32.v v28, (a0)
12; CHECK-NEXT:    vsetivli zero, 2, e32, m4, tu, mu
13; CHECK-NEXT:    vslideup.vi v8, v28, 0
14; CHECK-NEXT:    ret
15  %sv = load <2 x i32>, <2 x i32>* %svp
16  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v2i32.nxv8i32(<vscale x 8 x i32> %vec, <2 x i32> %sv, i64 0)
17  ret <vscale x 8 x i32> %v
18}
19
20define <vscale x 8 x i32> @insert_nxv8i32_v2i32_2(<vscale x 8 x i32> %vec, <2 x i32>* %svp) {
21; CHECK-LABEL: insert_nxv8i32_v2i32_2:
22; CHECK:       # %bb.0:
23; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
24; CHECK-NEXT:    vle32.v v28, (a0)
25; CHECK-NEXT:    vsetivli zero, 4, e32, m4, tu, mu
26; CHECK-NEXT:    vslideup.vi v8, v28, 2
27; CHECK-NEXT:    ret
28  %sv = load <2 x i32>, <2 x i32>* %svp
29  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v2i32.nxv8i32(<vscale x 8 x i32> %vec, <2 x i32> %sv, i64 2)
30  ret <vscale x 8 x i32> %v
31}
32
33define <vscale x 8 x i32> @insert_nxv8i32_v2i32_6(<vscale x 8 x i32> %vec, <2 x i32>* %svp) {
34; CHECK-LABEL: insert_nxv8i32_v2i32_6:
35; CHECK:       # %bb.0:
36; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
37; CHECK-NEXT:    vle32.v v28, (a0)
38; CHECK-NEXT:    vsetivli zero, 8, e32, m4, tu, mu
39; CHECK-NEXT:    vslideup.vi v8, v28, 6
40; CHECK-NEXT:    ret
41  %sv = load <2 x i32>, <2 x i32>* %svp
42  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v2i32.nxv8i32(<vscale x 8 x i32> %vec, <2 x i32> %sv, i64 6)
43  ret <vscale x 8 x i32> %v
44}
45
46define <vscale x 8 x i32> @insert_nxv8i32_v8i32_0(<vscale x 8 x i32> %vec, <8 x i32>* %svp) {
47; LMULMAX2-LABEL: insert_nxv8i32_v8i32_0:
48; LMULMAX2:       # %bb.0:
49; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
50; LMULMAX2-NEXT:    vle32.v v28, (a0)
51; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m4, tu, mu
52; LMULMAX2-NEXT:    vslideup.vi v8, v28, 0
53; LMULMAX2-NEXT:    ret
54;
55; LMULMAX1-LABEL: insert_nxv8i32_v8i32_0:
56; LMULMAX1:       # %bb.0:
57; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
58; LMULMAX1-NEXT:    vle32.v v28, (a0)
59; LMULMAX1-NEXT:    addi a0, a0, 16
60; LMULMAX1-NEXT:    vle32.v v12, (a0)
61; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m4, tu, mu
62; LMULMAX1-NEXT:    vslideup.vi v8, v28, 0
63; LMULMAX1-NEXT:    vsetivli zero, 8, e32, m4, tu, mu
64; LMULMAX1-NEXT:    vslideup.vi v8, v12, 4
65; LMULMAX1-NEXT:    ret
66  %sv = load <8 x i32>, <8 x i32>* %svp
67  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v8i32.nxv8i32(<vscale x 8 x i32> %vec, <8 x i32> %sv, i64 0)
68  ret <vscale x 8 x i32> %v
69}
70
71define <vscale x 8 x i32> @insert_nxv8i32_v8i32_8(<vscale x 8 x i32> %vec, <8 x i32>* %svp) {
72; LMULMAX2-LABEL: insert_nxv8i32_v8i32_8:
73; LMULMAX2:       # %bb.0:
74; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
75; LMULMAX2-NEXT:    vle32.v v28, (a0)
76; LMULMAX2-NEXT:    vsetivli zero, 16, e32, m4, tu, mu
77; LMULMAX2-NEXT:    vslideup.vi v8, v28, 8
78; LMULMAX2-NEXT:    ret
79;
80; LMULMAX1-LABEL: insert_nxv8i32_v8i32_8:
81; LMULMAX1:       # %bb.0:
82; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
83; LMULMAX1-NEXT:    vle32.v v28, (a0)
84; LMULMAX1-NEXT:    addi a0, a0, 16
85; LMULMAX1-NEXT:    vle32.v v12, (a0)
86; LMULMAX1-NEXT:    vsetivli zero, 12, e32, m4, tu, mu
87; LMULMAX1-NEXT:    vslideup.vi v8, v28, 8
88; LMULMAX1-NEXT:    vsetivli zero, 16, e32, m4, tu, mu
89; LMULMAX1-NEXT:    vslideup.vi v8, v12, 12
90; LMULMAX1-NEXT:    ret
91  %sv = load <8 x i32>, <8 x i32>* %svp
92  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v8i32.nxv8i32(<vscale x 8 x i32> %vec, <8 x i32> %sv, i64 8)
93  ret <vscale x 8 x i32> %v
94}
95
96define <vscale x 8 x i32> @insert_nxv8i32_undef_v2i32_0(<2 x i32>* %svp) {
97; CHECK-LABEL: insert_nxv8i32_undef_v2i32_0:
98; CHECK:       # %bb.0:
99; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
100; CHECK-NEXT:    vle32.v v8, (a0)
101; CHECK-NEXT:    ret
102  %sv = load <2 x i32>, <2 x i32>* %svp
103  %v = call <vscale x 8 x i32> @llvm.experimental.vector.insert.v2i32.nxv8i32(<vscale x 8 x i32> undef, <2 x i32> %sv, i64 0)
104  ret <vscale x 8 x i32> %v
105}
106
107define void @insert_v4i32_v2i32_0(<4 x i32>* %vp, <2 x i32>* %svp) {
108; CHECK-LABEL: insert_v4i32_v2i32_0:
109; CHECK:       # %bb.0:
110; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
111; CHECK-NEXT:    vle32.v v25, (a1)
112; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
113; CHECK-NEXT:    vle32.v v26, (a0)
114; CHECK-NEXT:    vsetivli zero, 2, e32, m1, tu, mu
115; CHECK-NEXT:    vslideup.vi v26, v25, 0
116; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
117; CHECK-NEXT:    vse32.v v26, (a0)
118; CHECK-NEXT:    ret
119  %sv = load <2 x i32>, <2 x i32>* %svp
120  %vec = load <4 x i32>, <4 x i32>* %vp
121  %v = call <4 x i32> @llvm.experimental.vector.insert.v2i32.v4i32(<4 x i32> %vec, <2 x i32> %sv, i64 0)
122  store <4 x i32> %v, <4 x i32>* %vp
123  ret void
124}
125
126define void @insert_v4i32_v2i32_2(<4 x i32>* %vp, <2 x i32>* %svp) {
127; CHECK-LABEL: insert_v4i32_v2i32_2:
128; CHECK:       # %bb.0:
129; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
130; CHECK-NEXT:    vle32.v v25, (a1)
131; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
132; CHECK-NEXT:    vle32.v v26, (a0)
133; CHECK-NEXT:    vsetvli zero, zero, e32, m1, tu, mu
134; CHECK-NEXT:    vslideup.vi v26, v25, 2
135; CHECK-NEXT:    vsetvli zero, zero, e32, m1, ta, mu
136; CHECK-NEXT:    vse32.v v26, (a0)
137; CHECK-NEXT:    ret
138  %sv = load <2 x i32>, <2 x i32>* %svp
139  %vec = load <4 x i32>, <4 x i32>* %vp
140  %v = call <4 x i32> @llvm.experimental.vector.insert.v2i32.v4i32(<4 x i32> %vec, <2 x i32> %sv, i64 2)
141  store <4 x i32> %v, <4 x i32>* %vp
142  ret void
143}
144
145define void @insert_v4i32_undef_v2i32_0(<4 x i32>* %vp, <2 x i32>* %svp) {
146; CHECK-LABEL: insert_v4i32_undef_v2i32_0:
147; CHECK:       # %bb.0:
148; CHECK-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
149; CHECK-NEXT:    vle32.v v25, (a1)
150; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
151; CHECK-NEXT:    vmv.v.i v26, 0
152; CHECK-NEXT:    vsetivli zero, 2, e32, m1, tu, mu
153; CHECK-NEXT:    vslideup.vi v26, v25, 0
154; CHECK-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
155; CHECK-NEXT:    vse32.v v26, (a0)
156; CHECK-NEXT:    ret
157  %sv = load <2 x i32>, <2 x i32>* %svp
158  %v = call <4 x i32> @llvm.experimental.vector.insert.v2i32.v4i32(<4 x i32> undef, <2 x i32> %sv, i64 0)
159  store <4 x i32> %v, <4 x i32>* %vp
160  ret void
161}
162
163define void @insert_v8i32_v2i32_0(<8 x i32>* %vp, <2 x i32>* %svp) {
164; LMULMAX2-LABEL: insert_v8i32_v2i32_0:
165; LMULMAX2:       # %bb.0:
166; LMULMAX2-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
167; LMULMAX2-NEXT:    vle32.v v26, (a1)
168; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
169; LMULMAX2-NEXT:    vle32.v v28, (a0)
170; LMULMAX2-NEXT:    vsetivli zero, 2, e32, m2, tu, mu
171; LMULMAX2-NEXT:    vslideup.vi v28, v26, 0
172; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
173; LMULMAX2-NEXT:    vse32.v v28, (a0)
174; LMULMAX2-NEXT:    ret
175;
176; LMULMAX1-LABEL: insert_v8i32_v2i32_0:
177; LMULMAX1:       # %bb.0:
178; LMULMAX1-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
179; LMULMAX1-NEXT:    vle32.v v25, (a1)
180; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
181; LMULMAX1-NEXT:    vle32.v v26, (a0)
182; LMULMAX1-NEXT:    vsetivli zero, 2, e32, m1, tu, mu
183; LMULMAX1-NEXT:    vslideup.vi v26, v25, 0
184; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
185; LMULMAX1-NEXT:    vse32.v v26, (a0)
186; LMULMAX1-NEXT:    ret
187  %sv = load <2 x i32>, <2 x i32>* %svp
188  %vec = load <8 x i32>, <8 x i32>* %vp
189  %v = call <8 x i32> @llvm.experimental.vector.insert.v2i32.v8i32(<8 x i32> %vec, <2 x i32> %sv, i64 0)
190  store <8 x i32> %v, <8 x i32>* %vp
191  ret void
192}
193
194define void @insert_v8i32_v2i32_2(<8 x i32>* %vp, <2 x i32>* %svp) {
195; LMULMAX2-LABEL: insert_v8i32_v2i32_2:
196; LMULMAX2:       # %bb.0:
197; LMULMAX2-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
198; LMULMAX2-NEXT:    vle32.v v26, (a1)
199; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
200; LMULMAX2-NEXT:    vle32.v v28, (a0)
201; LMULMAX2-NEXT:    vsetivli zero, 4, e32, m2, tu, mu
202; LMULMAX2-NEXT:    vslideup.vi v28, v26, 2
203; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
204; LMULMAX2-NEXT:    vse32.v v28, (a0)
205; LMULMAX2-NEXT:    ret
206;
207; LMULMAX1-LABEL: insert_v8i32_v2i32_2:
208; LMULMAX1:       # %bb.0:
209; LMULMAX1-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
210; LMULMAX1-NEXT:    vle32.v v25, (a1)
211; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
212; LMULMAX1-NEXT:    vle32.v v26, (a0)
213; LMULMAX1-NEXT:    vsetvli zero, zero, e32, m1, tu, mu
214; LMULMAX1-NEXT:    vslideup.vi v26, v25, 2
215; LMULMAX1-NEXT:    vsetvli zero, zero, e32, m1, ta, mu
216; LMULMAX1-NEXT:    vse32.v v26, (a0)
217; LMULMAX1-NEXT:    ret
218  %sv = load <2 x i32>, <2 x i32>* %svp
219  %vec = load <8 x i32>, <8 x i32>* %vp
220  %v = call <8 x i32> @llvm.experimental.vector.insert.v2i32.v8i32(<8 x i32> %vec, <2 x i32> %sv, i64 2)
221  store <8 x i32> %v, <8 x i32>* %vp
222  ret void
223}
224
225define void @insert_v8i32_v2i32_6(<8 x i32>* %vp, <2 x i32>* %svp) {
226; LMULMAX2-LABEL: insert_v8i32_v2i32_6:
227; LMULMAX2:       # %bb.0:
228; LMULMAX2-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
229; LMULMAX2-NEXT:    vle32.v v26, (a1)
230; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
231; LMULMAX2-NEXT:    vle32.v v28, (a0)
232; LMULMAX2-NEXT:    vsetvli zero, zero, e32, m2, tu, mu
233; LMULMAX2-NEXT:    vslideup.vi v28, v26, 6
234; LMULMAX2-NEXT:    vsetvli zero, zero, e32, m2, ta, mu
235; LMULMAX2-NEXT:    vse32.v v28, (a0)
236; LMULMAX2-NEXT:    ret
237;
238; LMULMAX1-LABEL: insert_v8i32_v2i32_6:
239; LMULMAX1:       # %bb.0:
240; LMULMAX1-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
241; LMULMAX1-NEXT:    vle32.v v25, (a1)
242; LMULMAX1-NEXT:    addi a0, a0, 16
243; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
244; LMULMAX1-NEXT:    vle32.v v26, (a0)
245; LMULMAX1-NEXT:    vsetvli zero, zero, e32, m1, tu, mu
246; LMULMAX1-NEXT:    vslideup.vi v26, v25, 2
247; LMULMAX1-NEXT:    vsetvli zero, zero, e32, m1, ta, mu
248; LMULMAX1-NEXT:    vse32.v v26, (a0)
249; LMULMAX1-NEXT:    ret
250  %sv = load <2 x i32>, <2 x i32>* %svp
251  %vec = load <8 x i32>, <8 x i32>* %vp
252  %v = call <8 x i32> @llvm.experimental.vector.insert.v2i32.v8i32(<8 x i32> %vec, <2 x i32> %sv, i64 6)
253  store <8 x i32> %v, <8 x i32>* %vp
254  ret void
255}
256
257define void @insert_v8i32_undef_v2i32_6(<8 x i32>* %vp, <2 x i32>* %svp) {
258; LMULMAX2-LABEL: insert_v8i32_undef_v2i32_6:
259; LMULMAX2:       # %bb.0:
260; LMULMAX2-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
261; LMULMAX2-NEXT:    vle32.v v26, (a1)
262; LMULMAX2-NEXT:    vsetivli zero, 8, e32, m2, ta, mu
263; LMULMAX2-NEXT:    vslideup.vi v28, v26, 6
264; LMULMAX2-NEXT:    vse32.v v28, (a0)
265; LMULMAX2-NEXT:    ret
266;
267; LMULMAX1-LABEL: insert_v8i32_undef_v2i32_6:
268; LMULMAX1:       # %bb.0:
269; LMULMAX1-NEXT:    vsetivli zero, 2, e32, mf2, ta, mu
270; LMULMAX1-NEXT:    vle32.v v25, (a1)
271; LMULMAX1-NEXT:    vsetivli zero, 4, e32, m1, ta, mu
272; LMULMAX1-NEXT:    vslideup.vi v26, v25, 2
273; LMULMAX1-NEXT:    addi a0, a0, 16
274; LMULMAX1-NEXT:    vse32.v v26, (a0)
275; LMULMAX1-NEXT:    ret
276  %sv = load <2 x i32>, <2 x i32>* %svp
277  %v = call <8 x i32> @llvm.experimental.vector.insert.v2i32.v8i32(<8 x i32> undef, <2 x i32> %sv, i64 6)
278  store <8 x i32> %v, <8 x i32>* %vp
279  ret void
280}
281
282define void @insert_v4i16_v2i16_0(<4 x i16>* %vp, <2 x i16>* %svp) {
283; CHECK-LABEL: insert_v4i16_v2i16_0:
284; CHECK:       # %bb.0:
285; CHECK-NEXT:    vsetivli zero, 4, e16, mf2, ta, mu
286; CHECK-NEXT:    vle16.v v25, (a0)
287; CHECK-NEXT:    vsetivli zero, 2, e16, mf4, ta, mu
288; CHECK-NEXT:    vle16.v v26, (a1)
289; CHECK-NEXT:    vsetivli zero, 2, e16, mf2, tu, mu
290; CHECK-NEXT:    vslideup.vi v25, v26, 0
291; CHECK-NEXT:    vsetivli zero, 4, e16, mf2, ta, mu
292; CHECK-NEXT:    vse16.v v25, (a0)
293; CHECK-NEXT:    ret
294  %v = load <4 x i16>, <4 x i16>* %vp
295  %sv = load <2 x i16>, <2 x i16>* %svp
296  %c = call <4 x i16> @llvm.experimental.vector.insert.v2i16.v4i16(<4 x i16> %v, <2 x i16> %sv, i64 0)
297  store <4 x i16> %c, <4 x i16>* %vp
298  ret void
299}
300
301define void @insert_v4i16_v2i16_2(<4 x i16>* %vp, <2 x i16>* %svp) {
302; CHECK-LABEL: insert_v4i16_v2i16_2:
303; CHECK:       # %bb.0:
304; CHECK-NEXT:    vsetivli zero, 4, e16, mf2, ta, mu
305; CHECK-NEXT:    vle16.v v25, (a0)
306; CHECK-NEXT:    vsetivli zero, 2, e16, mf4, ta, mu
307; CHECK-NEXT:    vle16.v v26, (a1)
308; CHECK-NEXT:    vsetivli zero, 4, e16, mf2, tu, mu
309; CHECK-NEXT:    vslideup.vi v25, v26, 2
310; CHECK-NEXT:    vsetvli zero, zero, e16, mf2, ta, mu
311; CHECK-NEXT:    vse16.v v25, (a0)
312; CHECK-NEXT:    ret
313  %v = load <4 x i16>, <4 x i16>* %vp
314  %sv = load <2 x i16>, <2 x i16>* %svp
315  %c = call <4 x i16> @llvm.experimental.vector.insert.v2i16.v4i16(<4 x i16> %v, <2 x i16> %sv, i64 2)
316  store <4 x i16> %c, <4 x i16>* %vp
317  ret void
318}
319
320define void @insert_v32i1_v8i1_0(<32 x i1>* %vp, <8 x i1>* %svp) {
321; LMULMAX2-LABEL: insert_v32i1_v8i1_0:
322; LMULMAX2:       # %bb.0:
323; LMULMAX2-NEXT:    addi a2, zero, 32
324; LMULMAX2-NEXT:    vsetvli zero, a2, e8, m2, ta, mu
325; LMULMAX2-NEXT:    vle1.v v25, (a0)
326; LMULMAX2-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
327; LMULMAX2-NEXT:    vle1.v v26, (a1)
328; LMULMAX2-NEXT:    vsetivli zero, 1, e8, mf4, tu, mu
329; LMULMAX2-NEXT:    vslideup.vi v25, v26, 0
330; LMULMAX2-NEXT:    vsetvli zero, a2, e8, m2, ta, mu
331; LMULMAX2-NEXT:    vse1.v v25, (a0)
332; LMULMAX2-NEXT:    ret
333;
334; LMULMAX1-LABEL: insert_v32i1_v8i1_0:
335; LMULMAX1:       # %bb.0:
336; LMULMAX1-NEXT:    vsetivli zero, 16, e8, m1, ta, mu
337; LMULMAX1-NEXT:    vle1.v v25, (a0)
338; LMULMAX1-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
339; LMULMAX1-NEXT:    vle1.v v26, (a1)
340; LMULMAX1-NEXT:    vsetivli zero, 1, e8, mf8, tu, mu
341; LMULMAX1-NEXT:    vslideup.vi v25, v26, 0
342; LMULMAX1-NEXT:    vsetivli zero, 16, e8, m1, ta, mu
343; LMULMAX1-NEXT:    vse1.v v25, (a0)
344; LMULMAX1-NEXT:    ret
345  %v = load <32 x i1>, <32 x i1>* %vp
346  %sv = load <8 x i1>, <8 x i1>* %svp
347  %c = call <32 x i1> @llvm.experimental.vector.insert.v8i1.v32i1(<32 x i1> %v, <8 x i1> %sv, i64 0)
348  store <32 x i1> %c, <32 x i1>* %vp
349  ret void
350}
351
352define void @insert_v32i1_v8i1_16(<32 x i1>* %vp, <8 x i1>* %svp) {
353; LMULMAX2-LABEL: insert_v32i1_v8i1_16:
354; LMULMAX2:       # %bb.0:
355; LMULMAX2-NEXT:    addi a2, zero, 32
356; LMULMAX2-NEXT:    vsetvli zero, a2, e8, m2, ta, mu
357; LMULMAX2-NEXT:    vle1.v v25, (a0)
358; LMULMAX2-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
359; LMULMAX2-NEXT:    vle1.v v26, (a1)
360; LMULMAX2-NEXT:    vsetivli zero, 3, e8, mf4, tu, mu
361; LMULMAX2-NEXT:    vslideup.vi v25, v26, 2
362; LMULMAX2-NEXT:    vsetvli zero, a2, e8, m2, ta, mu
363; LMULMAX2-NEXT:    vse1.v v25, (a0)
364; LMULMAX2-NEXT:    ret
365;
366; LMULMAX1-LABEL: insert_v32i1_v8i1_16:
367; LMULMAX1:       # %bb.0:
368; LMULMAX1-NEXT:    addi a0, a0, 2
369; LMULMAX1-NEXT:    vsetivli zero, 16, e8, m1, ta, mu
370; LMULMAX1-NEXT:    vle1.v v25, (a0)
371; LMULMAX1-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
372; LMULMAX1-NEXT:    vle1.v v26, (a1)
373; LMULMAX1-NEXT:    vsetivli zero, 1, e8, mf8, tu, mu
374; LMULMAX1-NEXT:    vslideup.vi v25, v26, 0
375; LMULMAX1-NEXT:    vsetivli zero, 16, e8, m1, ta, mu
376; LMULMAX1-NEXT:    vse1.v v25, (a0)
377; LMULMAX1-NEXT:    ret
378  %v = load <32 x i1>, <32 x i1>* %vp
379  %sv = load <8 x i1>, <8 x i1>* %svp
380  %c = call <32 x i1> @llvm.experimental.vector.insert.v8i1.v32i1(<32 x i1> %v, <8 x i1> %sv, i64 16)
381  store <32 x i1> %c, <32 x i1>* %vp
382  ret void
383}
384
385define void @insert_v8i1_v4i1_0(<8 x i1>* %vp, <4 x i1>* %svp) {
386; CHECK-LABEL: insert_v8i1_v4i1_0:
387; CHECK:       # %bb.0:
388; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
389; CHECK-NEXT:    vle1.v v0, (a0)
390; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, mu
391; CHECK-NEXT:    vle1.v v25, (a1)
392; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
393; CHECK-NEXT:    vmv.v.i v26, 0
394; CHECK-NEXT:    vmerge.vim v26, v26, 1, v0
395; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, mu
396; CHECK-NEXT:    vmv.v.i v27, 0
397; CHECK-NEXT:    vmv1r.v v0, v25
398; CHECK-NEXT:    vmerge.vim v25, v27, 1, v0
399; CHECK-NEXT:    vsetivli zero, 4, e8, mf2, tu, mu
400; CHECK-NEXT:    vslideup.vi v26, v25, 0
401; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
402; CHECK-NEXT:    vmsne.vi v25, v26, 0
403; CHECK-NEXT:    vse1.v v25, (a0)
404; CHECK-NEXT:    ret
405  %v = load <8 x i1>, <8 x i1>* %vp
406  %sv = load <4 x i1>, <4 x i1>* %svp
407  %c = call <8 x i1> @llvm.experimental.vector.insert.v4i1.v8i1(<8 x i1> %v, <4 x i1> %sv, i64 0)
408  store <8 x i1> %c, <8 x i1>* %vp
409  ret void
410}
411
412define void @insert_v8i1_v4i1_4(<8 x i1>* %vp, <4 x i1>* %svp) {
413; CHECK-LABEL: insert_v8i1_v4i1_4:
414; CHECK:       # %bb.0:
415; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
416; CHECK-NEXT:    vle1.v v0, (a0)
417; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, mu
418; CHECK-NEXT:    vle1.v v25, (a1)
419; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
420; CHECK-NEXT:    vmv.v.i v26, 0
421; CHECK-NEXT:    vmerge.vim v26, v26, 1, v0
422; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, mu
423; CHECK-NEXT:    vmv.v.i v27, 0
424; CHECK-NEXT:    vmv1r.v v0, v25
425; CHECK-NEXT:    vmerge.vim v25, v27, 1, v0
426; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, tu, mu
427; CHECK-NEXT:    vslideup.vi v26, v25, 4
428; CHECK-NEXT:    vsetvli zero, zero, e8, mf2, ta, mu
429; CHECK-NEXT:    vmsne.vi v25, v26, 0
430; CHECK-NEXT:    vse1.v v25, (a0)
431; CHECK-NEXT:    ret
432  %v = load <8 x i1>, <8 x i1>* %vp
433  %sv = load <4 x i1>, <4 x i1>* %svp
434  %c = call <8 x i1> @llvm.experimental.vector.insert.v4i1.v8i1(<8 x i1> %v, <4 x i1> %sv, i64 4)
435  store <8 x i1> %c, <8 x i1>* %vp
436  ret void
437}
438
439define <vscale x 2 x i16> @insert_nxv2i16_v2i16_0(<vscale x 2 x i16> %v, <2 x i16>* %svp) {
440; CHECK-LABEL: insert_nxv2i16_v2i16_0:
441; CHECK:       # %bb.0:
442; CHECK-NEXT:    vsetivli zero, 2, e16, mf4, ta, mu
443; CHECK-NEXT:    vle16.v v25, (a0)
444; CHECK-NEXT:    vsetivli zero, 2, e16, mf2, tu, mu
445; CHECK-NEXT:    vslideup.vi v8, v25, 0
446; CHECK-NEXT:    ret
447  %sv = load <2 x i16>, <2 x i16>* %svp
448  %c = call <vscale x 2 x i16> @llvm.experimental.vector.insert.v2i16.nxv2i16(<vscale x 2 x i16> %v, <2 x i16> %sv, i64 0)
449  ret <vscale x 2 x i16> %c
450}
451
452define <vscale x 2 x i16> @insert_nxv2i16_v2i16_2(<vscale x 2 x i16> %v, <2 x i16>* %svp) {
453; CHECK-LABEL: insert_nxv2i16_v2i16_2:
454; CHECK:       # %bb.0:
455; CHECK-NEXT:    vsetivli zero, 2, e16, mf4, ta, mu
456; CHECK-NEXT:    vle16.v v25, (a0)
457; CHECK-NEXT:    vsetivli zero, 6, e16, mf2, tu, mu
458; CHECK-NEXT:    vslideup.vi v8, v25, 4
459; CHECK-NEXT:    ret
460  %sv = load <2 x i16>, <2 x i16>* %svp
461  %c = call <vscale x 2 x i16> @llvm.experimental.vector.insert.v2i16.nxv2i16(<vscale x 2 x i16> %v, <2 x i16> %sv, i64 4)
462  ret <vscale x 2 x i16> %c
463}
464
465define <vscale x 2 x i1> @insert_nxv2i1_v4i1_0(<vscale x 2 x i1> %v, <4 x i1>* %svp) {
466; CHECK-LABEL: insert_nxv2i1_v4i1_0:
467; CHECK:       # %bb.0:
468; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, mu
469; CHECK-NEXT:    vle1.v v25, (a0)
470; CHECK-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
471; CHECK-NEXT:    vmv.v.i v26, 0
472; CHECK-NEXT:    vmerge.vim v26, v26, 1, v0
473; CHECK-NEXT:    vsetivli zero, 4, e8, mf4, ta, mu
474; CHECK-NEXT:    vmv.v.i v27, 0
475; CHECK-NEXT:    vmv1r.v v0, v25
476; CHECK-NEXT:    vmerge.vim v25, v27, 1, v0
477; CHECK-NEXT:    vsetvli zero, zero, e8, mf4, tu, mu
478; CHECK-NEXT:    vslideup.vi v26, v25, 0
479; CHECK-NEXT:    vsetvli a0, zero, e8, mf4, ta, mu
480; CHECK-NEXT:    vmsne.vi v0, v26, 0
481; CHECK-NEXT:    ret
482  %sv = load <4 x i1>, <4 x i1>* %svp
483  %c = call <vscale x 2 x i1> @llvm.experimental.vector.insert.v4i1.nxv2i1(<vscale x 2 x i1> %v, <4 x i1> %sv, i64 0)
484  ret <vscale x 2 x i1> %c
485}
486
487define <vscale x 8 x i1> @insert_nxv8i1_v4i1_0(<vscale x 8 x i1> %v, <8 x i1>* %svp) {
488; CHECK-LABEL: insert_nxv8i1_v4i1_0:
489; CHECK:       # %bb.0:
490; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
491; CHECK-NEXT:    vle1.v v25, (a0)
492; CHECK-NEXT:    vsetivli zero, 1, e8, mf8, tu, mu
493; CHECK-NEXT:    vslideup.vi v0, v25, 0
494; CHECK-NEXT:    ret
495  %sv = load <8 x i1>, <8 x i1>* %svp
496  %c = call <vscale x 8 x i1> @llvm.experimental.vector.insert.v8i1.nxv8i1(<vscale x 8 x i1> %v, <8 x i1> %sv, i64 0)
497  ret <vscale x 8 x i1> %c
498}
499
500define <vscale x 8 x i1> @insert_nxv8i1_v8i1_16(<vscale x 8 x i1> %v, <8 x i1>* %svp) {
501; CHECK-LABEL: insert_nxv8i1_v8i1_16:
502; CHECK:       # %bb.0:
503; CHECK-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
504; CHECK-NEXT:    vle1.v v25, (a0)
505; CHECK-NEXT:    vsetivli zero, 3, e8, mf8, tu, mu
506; CHECK-NEXT:    vslideup.vi v0, v25, 2
507; CHECK-NEXT:    ret
508  %sv = load <8 x i1>, <8 x i1>* %svp
509  %c = call <vscale x 8 x i1> @llvm.experimental.vector.insert.v8i1.nxv8i1(<vscale x 8 x i1> %v, <8 x i1> %sv, i64 16)
510  ret <vscale x 8 x i1> %c
511}
512
513declare <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64>, <2 x i64>, i64)
514
515define void @insert_v2i64_nxv16i64(<2 x i64>* %psv0, <2 x i64>* %psv1, <vscale x 16 x i64>* %out) {
516; CHECK-LABEL: insert_v2i64_nxv16i64:
517; CHECK:       # %bb.0:
518; CHECK-NEXT:    vsetivli zero, 2, e64, m1, ta, mu
519; CHECK-NEXT:    vle64.v v8, (a0)
520; CHECK-NEXT:    vle64.v v16, (a1)
521; CHECK-NEXT:    vsetivli zero, 6, e64, m8, tu, mu
522; CHECK-NEXT:    vslideup.vi v8, v16, 4
523; CHECK-NEXT:    vs8r.v v8, (a2)
524; CHECK-NEXT:    ret
525  %sv0 = load <2 x i64>, <2 x i64>* %psv0
526  %sv1 = load <2 x i64>, <2 x i64>* %psv1
527  %v0 = call <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64> undef, <2 x i64> %sv0, i64 0)
528  %v = call <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64> %v0, <2 x i64> %sv1, i64 4)
529  store <vscale x 16 x i64> %v, <vscale x 16 x i64>* %out
530  ret void
531}
532
533define void @insert_v2i64_nxv16i64_lo0(<2 x i64>* %psv, <vscale x 16 x i64>* %out) {
534; CHECK-LABEL: insert_v2i64_nxv16i64_lo0:
535; CHECK:       # %bb.0:
536; CHECK-NEXT:    vsetivli zero, 2, e64, m1, ta, mu
537; CHECK-NEXT:    vle64.v v8, (a0)
538; CHECK-NEXT:    vs8r.v v8, (a1)
539; CHECK-NEXT:    ret
540  %sv = load <2 x i64>, <2 x i64>* %psv
541  %v = call <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64> undef, <2 x i64> %sv, i64 0)
542  store <vscale x 16 x i64> %v, <vscale x 16 x i64>* %out
543  ret void
544}
545
546define void @insert_v2i64_nxv16i64_lo2(<2 x i64>* %psv, <vscale x 16 x i64>* %out) {
547; CHECK-LABEL: insert_v2i64_nxv16i64_lo2:
548; CHECK:       # %bb.0:
549; CHECK-NEXT:    vsetivli zero, 2, e64, m1, ta, mu
550; CHECK-NEXT:    vle64.v v8, (a0)
551; CHECK-NEXT:    vsetivli zero, 4, e64, m8, ta, mu
552; CHECK-NEXT:    vslideup.vi v16, v8, 2
553; CHECK-NEXT:    vs8r.v v16, (a1)
554; CHECK-NEXT:    ret
555  %sv = load <2 x i64>, <2 x i64>* %psv
556  %v = call <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64> undef, <2 x i64> %sv, i64 2)
557  store <vscale x 16 x i64> %v, <vscale x 16 x i64>* %out
558  ret void
559}
560
561; Check we don't mistakenly optimize this: we don't know whether this is
562; inserted into the low or high split vector.
563define void @insert_v2i64_nxv16i64_hi(<2 x i64>* %psv, <vscale x 16 x i64>* %out) {
564; CHECK-LABEL: insert_v2i64_nxv16i64_hi:
565; CHECK:       # %bb.0:
566; CHECK-NEXT:    addi sp, sp, -16
567; CHECK-NEXT:    .cfi_def_cfa_offset 16
568; CHECK-NEXT:    csrr a2, vlenb
569; CHECK-NEXT:    slli a2, a2, 4
570; CHECK-NEXT:    sub sp, sp, a2
571; CHECK-NEXT:    vsetivli zero, 2, e64, m1, ta, mu
572; CHECK-NEXT:    vle64.v v25, (a0)
573; CHECK-NEXT:    addi a0, sp, 80
574; CHECK-NEXT:    vse64.v v25, (a0)
575; CHECK-NEXT:    csrr a0, vlenb
576; CHECK-NEXT:    slli a0, a0, 3
577; CHECK-NEXT:    addi a2, sp, 16
578; CHECK-NEXT:    add a2, a2, a0
579; CHECK-NEXT:    vl8re64.v v8, (a2)
580; CHECK-NEXT:    addi a2, sp, 16
581; CHECK-NEXT:    vl8re64.v v16, (a2)
582; CHECK-NEXT:    add a0, a1, a0
583; CHECK-NEXT:    vs8r.v v8, (a0)
584; CHECK-NEXT:    vs8r.v v16, (a1)
585; CHECK-NEXT:    csrr a0, vlenb
586; CHECK-NEXT:    slli a0, a0, 4
587; CHECK-NEXT:    add sp, sp, a0
588; CHECK-NEXT:    addi sp, sp, 16
589; CHECK-NEXT:    ret
590  %sv = load <2 x i64>, <2 x i64>* %psv
591  %v = call <vscale x 16 x i64> @llvm.experimental.vector.insert.v2i64.nxv16i64(<vscale x 16 x i64> undef, <2 x i64> %sv, i64 8)
592  store <vscale x 16 x i64> %v, <vscale x 16 x i64>* %out
593  ret void
594}
595
596declare <8 x i1> @llvm.experimental.vector.insert.v4i1.v8i1(<8 x i1>, <4 x i1>, i64)
597declare <32 x i1> @llvm.experimental.vector.insert.v8i1.v32i1(<32 x i1>, <8 x i1>, i64)
598
599declare <4 x i16> @llvm.experimental.vector.insert.v2i16.v4i16(<4 x i16>, <2 x i16>, i64)
600
601declare <4 x i32> @llvm.experimental.vector.insert.v2i32.v4i32(<4 x i32>, <2 x i32>, i64)
602declare <8 x i32> @llvm.experimental.vector.insert.v2i32.v8i32(<8 x i32>, <2 x i32>, i64)
603
604declare <vscale x 2 x i1> @llvm.experimental.vector.insert.v4i1.nxv2i1(<vscale x 2 x i1>, <4 x i1>, i64)
605declare <vscale x 8 x i1> @llvm.experimental.vector.insert.v8i1.nxv8i1(<vscale x 8 x i1>, <8 x i1>, i64)
606
607declare <vscale x 2 x i16> @llvm.experimental.vector.insert.v2i16.nxv2i16(<vscale x 2 x i16>, <2 x i16>, i64)
608
609declare <vscale x 8 x i32> @llvm.experimental.vector.insert.v2i32.nxv8i32(<vscale x 8 x i32>, <2 x i32>, i64)
610declare <vscale x 8 x i32> @llvm.experimental.vector.insert.v4i32.nxv8i32(<vscale x 8 x i32>, <4 x i32>, i64)
611declare <vscale x 8 x i32> @llvm.experimental.vector.insert.v8i32.nxv8i32(<vscale x 8 x i32>, <8 x i32>, i64)
612